| T821 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.710966112 |
|
|
Aug 23 10:39:59 PM UTC 24 |
Aug 23 10:40:02 PM UTC 24 |
1058945595 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_stress_all.2510611686 |
|
|
Aug 23 10:37:50 PM UTC 24 |
Aug 23 10:40:02 PM UTC 24 |
35549034259 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_mailbox.3888758672 |
|
|
Aug 23 10:40:00 PM UTC 24 |
Aug 23 10:40:05 PM UTC 24 |
616357743 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_and_tpm.871466289 |
|
|
Aug 23 10:39:17 PM UTC 24 |
Aug 23 10:40:06 PM UTC 24 |
10641469509 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_upload.1047713035 |
|
|
Aug 23 10:40:02 PM UTC 24 |
Aug 23 10:40:06 PM UTC 24 |
130329465 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.2519691735 |
|
|
Aug 23 10:40:02 PM UTC 24 |
Aug 23 10:40:07 PM UTC 24 |
2837528202 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.3258638118 |
|
|
Aug 23 10:39:50 PM UTC 24 |
Aug 23 10:40:07 PM UTC 24 |
12021529227 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.677494053 |
|
|
Aug 23 10:40:03 PM UTC 24 |
Aug 23 10:40:08 PM UTC 24 |
516208481 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_intercept.2013620934 |
|
|
Aug 23 10:42:07 PM UTC 24 |
Aug 23 10:42:11 PM UTC 24 |
83967785 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.1793512404 |
|
|
Aug 23 10:40:00 PM UTC 24 |
Aug 23 10:40:10 PM UTC 24 |
3230895230 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.2958335266 |
|
|
Aug 23 10:40:08 PM UTC 24 |
Aug 23 10:40:10 PM UTC 24 |
40297836 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.1027994974 |
|
|
Aug 23 10:39:56 PM UTC 24 |
Aug 23 10:40:11 PM UTC 24 |
22978805556 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.3631754825 |
|
|
Aug 23 10:40:09 PM UTC 24 |
Aug 23 10:40:11 PM UTC 24 |
86077939 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.2660523251 |
|
|
Aug 23 10:40:12 PM UTC 24 |
Aug 23 10:40:13 PM UTC 24 |
170644790 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_rw.1040228499 |
|
|
Aug 23 10:40:12 PM UTC 24 |
Aug 23 10:40:13 PM UTC 24 |
71682338 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_and_tpm.3825930843 |
|
|
Aug 23 10:39:39 PM UTC 24 |
Aug 23 10:40:15 PM UTC 24 |
2388671596 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.4161007878 |
|
|
Aug 23 10:40:14 PM UTC 24 |
Aug 23 10:40:17 PM UTC 24 |
182315464 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.135706623 |
|
|
Aug 23 10:40:15 PM UTC 24 |
Aug 23 10:40:18 PM UTC 24 |
400934091 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.3401407869 |
|
|
Aug 23 10:40:10 PM UTC 24 |
Aug 23 10:40:18 PM UTC 24 |
2108232838 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.3092185895 |
|
|
Aug 23 10:40:03 PM UTC 24 |
Aug 23 10:40:19 PM UTC 24 |
844201296 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_intercept.906417762 |
|
|
Aug 23 10:40:16 PM UTC 24 |
Aug 23 10:40:19 PM UTC 24 |
199749204 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_cfg_cmd.774044745 |
|
|
Aug 23 10:40:19 PM UTC 24 |
Aug 23 10:40:23 PM UTC 24 |
1512551817 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_upload.2548912605 |
|
|
Aug 23 10:40:19 PM UTC 24 |
Aug 23 10:40:25 PM UTC 24 |
3981625792 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_mailbox.3713098491 |
|
|
Aug 23 10:40:18 PM UTC 24 |
Aug 23 10:40:28 PM UTC 24 |
349707118 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_and_tpm.3508141008 |
|
|
Aug 23 10:40:06 PM UTC 24 |
Aug 23 10:40:28 PM UTC 24 |
2430479582 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode_ignore_cmds.2623790456 |
|
|
Aug 23 10:39:34 PM UTC 24 |
Aug 23 10:40:33 PM UTC 24 |
24699848247 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode.4119297724 |
|
|
Aug 23 10:40:03 PM UTC 24 |
Aug 23 10:40:34 PM UTC 24 |
4001730274 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_and_tpm_min_idle.573690904 |
|
|
Aug 23 10:40:06 PM UTC 24 |
Aug 23 10:40:35 PM UTC 24 |
1136646801 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_stress_all.886785984 |
|
|
Aug 23 10:40:34 PM UTC 24 |
Aug 23 10:40:36 PM UTC 24 |
322903147 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_alert_test.2604348675 |
|
|
Aug 23 10:40:35 PM UTC 24 |
Aug 23 10:40:37 PM UTC 24 |
14331287 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_csb_read.2976187529 |
|
|
Aug 23 10:40:35 PM UTC 24 |
Aug 23 10:40:37 PM UTC 24 |
20910459 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.771685486 |
|
|
Aug 23 10:40:23 PM UTC 24 |
Aug 23 10:40:38 PM UTC 24 |
3368682769 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.1129446768 |
|
|
Aug 23 10:40:37 PM UTC 24 |
Aug 23 10:40:39 PM UTC 24 |
39189375 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.3748310730 |
|
|
Aug 23 10:40:37 PM UTC 24 |
Aug 23 10:40:40 PM UTC 24 |
886535339 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.1105573983 |
|
|
Aug 23 10:38:20 PM UTC 24 |
Aug 23 10:40:41 PM UTC 24 |
19314501128 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_rw.2694932474 |
|
|
Aug 23 10:40:38 PM UTC 24 |
Aug 23 10:40:42 PM UTC 24 |
767697224 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_pass_cmd_filtering.92497724 |
|
|
Aug 23 10:40:39 PM UTC 24 |
Aug 23 10:40:42 PM UTC 24 |
311811753 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.1457501066 |
|
|
Aug 23 10:38:38 PM UTC 24 |
Aug 23 10:40:44 PM UTC 24 |
76695825604 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_mode.919025561 |
|
|
Aug 23 10:40:20 PM UTC 24 |
Aug 23 10:40:45 PM UTC 24 |
10984401534 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_mailbox.2114916949 |
|
|
Aug 23 10:40:43 PM UTC 24 |
Aug 23 10:40:45 PM UTC 24 |
187654941 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_intercept.831863554 |
|
|
Aug 23 10:40:43 PM UTC 24 |
Aug 23 10:40:47 PM UTC 24 |
155346658 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_pass_addr_payload_swap.1264444769 |
|
|
Aug 23 10:40:40 PM UTC 24 |
Aug 23 10:40:48 PM UTC 24 |
35742761577 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_all.486559344 |
|
|
Aug 23 10:40:37 PM UTC 24 |
Aug 23 10:40:48 PM UTC 24 |
21071745489 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_cfg_cmd.105330298 |
|
|
Aug 23 10:40:45 PM UTC 24 |
Aug 23 10:40:49 PM UTC 24 |
429689579 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_all.2143601391 |
|
|
Aug 23 10:40:11 PM UTC 24 |
Aug 23 10:40:50 PM UTC 24 |
171467807446 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_upload.973368760 |
|
|
Aug 23 10:40:44 PM UTC 24 |
Aug 23 10:40:50 PM UTC 24 |
5367918774 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_all.3492983023 |
|
|
Aug 23 10:40:49 PM UTC 24 |
Aug 23 10:40:51 PM UTC 24 |
31608058 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_mode.2410420710 |
|
|
Aug 23 10:40:46 PM UTC 24 |
Aug 23 10:40:52 PM UTC 24 |
428919442 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_csb_read.3237600898 |
|
|
Aug 23 10:40:51 PM UTC 24 |
Aug 23 10:40:53 PM UTC 24 |
15701118 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_read_buffer_direct.329479459 |
|
|
Aug 23 10:40:48 PM UTC 24 |
Aug 23 10:40:53 PM UTC 24 |
175570217 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_alert_test.988975765 |
|
|
Aug 23 10:40:51 PM UTC 24 |
Aug 23 10:40:53 PM UTC 24 |
44334262 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_sts_read.1969130 |
|
|
Aug 23 10:40:53 PM UTC 24 |
Aug 23 10:40:55 PM UTC 24 |
49809498 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_rw.2326869906 |
|
|
Aug 23 10:40:53 PM UTC 24 |
Aug 23 10:40:56 PM UTC 24 |
42302230 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_read_hw_reg.1158200430 |
|
|
Aug 23 10:40:53 PM UTC 24 |
Aug 23 10:40:56 PM UTC 24 |
288843587 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_mode_ignore_cmds.269136924 |
|
|
Aug 23 10:40:20 PM UTC 24 |
Aug 23 10:41:01 PM UTC 24 |
2199607630 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_stress_all.2417237769 |
|
|
Aug 23 10:37:19 PM UTC 24 |
Aug 23 10:41:06 PM UTC 24 |
43617092886 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_mode_ignore_cmds.846785519 |
|
|
Aug 23 10:40:46 PM UTC 24 |
Aug 23 10:41:08 PM UTC 24 |
16028629210 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_intercept.2623916446 |
|
|
Aug 23 10:40:57 PM UTC 24 |
Aug 23 10:41:08 PM UTC 24 |
1135702927 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_mode.1144946426 |
|
|
Aug 23 10:41:09 PM UTC 24 |
Aug 23 10:41:13 PM UTC 24 |
501948671 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_cfg_cmd.2018090341 |
|
|
Aug 23 10:41:09 PM UTC 24 |
Aug 23 10:41:13 PM UTC 24 |
1289352694 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_pass_cmd_filtering.696313124 |
|
|
Aug 23 10:40:56 PM UTC 24 |
Aug 23 10:41:14 PM UTC 24 |
2847131649 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_all.155682324 |
|
|
Aug 23 10:40:53 PM UTC 24 |
Aug 23 10:41:18 PM UTC 24 |
3007018416 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_pass_addr_payload_swap.3533587548 |
|
|
Aug 23 10:40:56 PM UTC 24 |
Aug 23 10:41:18 PM UTC 24 |
7542713326 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_upload.3908337327 |
|
|
Aug 23 10:41:07 PM UTC 24 |
Aug 23 10:41:20 PM UTC 24 |
2976408879 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_mailbox.2481227763 |
|
|
Aug 23 10:41:02 PM UTC 24 |
Aug 23 10:41:21 PM UTC 24 |
16788868809 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_read_buffer_direct.3615963388 |
|
|
Aug 23 10:41:14 PM UTC 24 |
Aug 23 10:41:23 PM UTC 24 |
2124788923 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_alert_test.356183669 |
|
|
Aug 23 10:41:22 PM UTC 24 |
Aug 23 10:41:24 PM UTC 24 |
43298853 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_csb_read.628046775 |
|
|
Aug 23 10:41:24 PM UTC 24 |
Aug 23 10:41:26 PM UTC 24 |
132005678 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_stress_all.2859192353 |
|
|
Aug 23 10:40:07 PM UTC 24 |
Aug 23 10:41:32 PM UTC 24 |
25849121095 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_sts_read.963276810 |
|
|
Aug 23 10:41:33 PM UTC 24 |
Aug 23 10:41:35 PM UTC 24 |
308895996 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_all.1574828032 |
|
|
Aug 23 10:41:26 PM UTC 24 |
Aug 23 10:41:37 PM UTC 24 |
5635808668 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_and_tpm_min_idle.2207463159 |
|
|
Aug 23 10:40:50 PM UTC 24 |
Aug 23 10:41:37 PM UTC 24 |
9734323764 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_rw.974233721 |
|
|
Aug 23 10:41:36 PM UTC 24 |
Aug 23 10:41:38 PM UTC 24 |
43432696 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_and_tpm.3273215288 |
|
|
Aug 23 10:40:29 PM UTC 24 |
Aug 23 10:41:40 PM UTC 24 |
14893296656 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_pass_addr_payload_swap.265379921 |
|
|
Aug 23 10:41:37 PM UTC 24 |
Aug 23 10:41:41 PM UTC 24 |
115302366 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_stress_all.803380915 |
|
|
Aug 23 10:32:57 PM UTC 24 |
Aug 23 10:41:42 PM UTC 24 |
134927391174 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_intercept.1437807382 |
|
|
Aug 23 10:41:39 PM UTC 24 |
Aug 23 10:41:46 PM UTC 24 |
509349880 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_cfg_cmd.1788508884 |
|
|
Aug 23 10:41:42 PM UTC 24 |
Aug 23 10:41:46 PM UTC 24 |
141530083 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_and_tpm_min_idle.4259964880 |
|
|
Aug 23 10:38:46 PM UTC 24 |
Aug 23 10:41:47 PM UTC 24 |
24831197375 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_read_hw_reg.655215223 |
|
|
Aug 23 10:41:24 PM UTC 24 |
Aug 23 10:41:47 PM UTC 24 |
33896246435 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_pass_cmd_filtering.2837991423 |
|
|
Aug 23 10:41:37 PM UTC 24 |
Aug 23 10:41:48 PM UTC 24 |
2515369529 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_and_tpm_min_idle.1585845120 |
|
|
Aug 23 10:39:40 PM UTC 24 |
Aug 23 10:41:49 PM UTC 24 |
71399917833 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_upload.2989652733 |
|
|
Aug 23 10:41:41 PM UTC 24 |
Aug 23 10:41:54 PM UTC 24 |
1067345429 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_all.1578069926 |
|
|
Aug 23 10:39:38 PM UTC 24 |
Aug 23 10:41:57 PM UTC 24 |
101981233586 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_mode_ignore_cmds.3548997563 |
|
|
Aug 23 10:41:46 PM UTC 24 |
Aug 23 10:41:57 PM UTC 24 |
922944493 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_and_tpm.412310544 |
|
|
Aug 23 10:41:19 PM UTC 24 |
Aug 23 10:41:59 PM UTC 24 |
35383051452 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_alert_test.3929175398 |
|
|
Aug 23 10:41:58 PM UTC 24 |
Aug 23 10:41:59 PM UTC 24 |
11228128 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_csb_read.1117380299 |
|
|
Aug 23 10:41:58 PM UTC 24 |
Aug 23 10:42:00 PM UTC 24 |
15303787 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_read_buffer_direct.31159191 |
|
|
Aug 23 10:41:48 PM UTC 24 |
Aug 23 10:42:00 PM UTC 24 |
5799543407 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_sts_read.685905137 |
|
|
Aug 23 10:42:00 PM UTC 24 |
Aug 23 10:42:02 PM UTC 24 |
397469157 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_rw.1011216748 |
|
|
Aug 23 10:42:01 PM UTC 24 |
Aug 23 10:42:03 PM UTC 24 |
57011049 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_pass_cmd_filtering.1663474985 |
|
|
Aug 23 10:42:02 PM UTC 24 |
Aug 23 10:42:07 PM UTC 24 |
1353226427 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_read_hw_reg.530835534 |
|
|
Aug 23 10:42:00 PM UTC 24 |
Aug 23 10:42:07 PM UTC 24 |
3976794189 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_and_tpm_min_idle.408249617 |
|
|
Aug 23 10:41:19 PM UTC 24 |
Aug 23 10:42:09 PM UTC 24 |
27061321364 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_mode_ignore_cmds.3082823417 |
|
|
Aug 23 10:41:14 PM UTC 24 |
Aug 23 10:42:11 PM UTC 24 |
3821322607 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_upload.1987266493 |
|
|
Aug 23 10:42:09 PM UTC 24 |
Aug 23 10:42:12 PM UTC 24 |
351159241 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_mailbox.3770731266 |
|
|
Aug 23 10:42:08 PM UTC 24 |
Aug 23 10:42:13 PM UTC 24 |
552915300 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_cfg_cmd.3717315625 |
|
|
Aug 23 10:42:11 PM UTC 24 |
Aug 23 10:42:14 PM UTC 24 |
256001739 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_pass_addr_payload_swap.3753019626 |
|
|
Aug 23 10:42:04 PM UTC 24 |
Aug 23 10:42:18 PM UTC 24 |
14532418936 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_all.4172685037 |
|
|
Aug 23 10:42:00 PM UTC 24 |
Aug 23 10:42:24 PM UTC 24 |
2804642639 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_mailbox.541237382 |
|
|
Aug 23 10:41:40 PM UTC 24 |
Aug 23 10:42:27 PM UTC 24 |
4624198858 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_read_buffer_direct.3276147665 |
|
|
Aug 23 10:42:14 PM UTC 24 |
Aug 23 10:42:27 PM UTC 24 |
1412234501 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_mode.410080685 |
|
|
Aug 23 10:41:46 PM UTC 24 |
Aug 23 10:42:29 PM UTC 24 |
4376887723 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_alert_test.3345654317 |
|
|
Aug 23 10:42:28 PM UTC 24 |
Aug 23 10:42:29 PM UTC 24 |
39911558 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_csb_read.1089403774 |
|
|
Aug 23 10:42:30 PM UTC 24 |
Aug 23 10:42:32 PM UTC 24 |
26540357 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_read_hw_reg.671667599 |
|
|
Aug 23 10:42:30 PM UTC 24 |
Aug 23 10:42:33 PM UTC 24 |
252365592 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_sts_read.789651900 |
|
|
Aug 23 10:42:34 PM UTC 24 |
Aug 23 10:42:36 PM UTC 24 |
28651403 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.3475108818 |
|
|
Aug 23 10:36:49 PM UTC 24 |
Aug 23 10:42:36 PM UTC 24 |
76893306298 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_all.604206407 |
|
|
Aug 23 10:40:25 PM UTC 24 |
Aug 23 10:42:37 PM UTC 24 |
77923384782 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_rw.2454281704 |
|
|
Aug 23 10:42:36 PM UTC 24 |
Aug 23 10:42:40 PM UTC 24 |
260604501 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_mode.3645679931 |
|
|
Aug 23 10:42:12 PM UTC 24 |
Aug 23 10:42:44 PM UTC 24 |
2089397116 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_intercept.992188163 |
|
|
Aug 23 10:42:41 PM UTC 24 |
Aug 23 10:42:46 PM UTC 24 |
1322794341 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_all.2203692314 |
|
|
Aug 23 10:40:06 PM UTC 24 |
Aug 23 10:42:46 PM UTC 24 |
24323405088 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_all.2195237553 |
|
|
Aug 23 10:42:33 PM UTC 24 |
Aug 23 10:42:49 PM UTC 24 |
37049432543 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_pass_addr_payload_swap.4078149333 |
|
|
Aug 23 10:42:38 PM UTC 24 |
Aug 23 10:42:50 PM UTC 24 |
14662630877 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_mode_ignore_cmds.2873033361 |
|
|
Aug 23 10:42:50 PM UTC 24 |
Aug 23 10:42:52 PM UTC 24 |
39032219 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_cfg_cmd.1304240808 |
|
|
Aug 23 10:42:47 PM UTC 24 |
Aug 23 10:42:52 PM UTC 24 |
764603106 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_upload.3090725609 |
|
|
Aug 23 10:42:47 PM UTC 24 |
Aug 23 10:42:56 PM UTC 24 |
442414620 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_mailbox.2409452371 |
|
|
Aug 23 10:42:45 PM UTC 24 |
Aug 23 10:42:58 PM UTC 24 |
18970820848 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_read_buffer_direct.3144125216 |
|
|
Aug 23 10:42:52 PM UTC 24 |
Aug 23 10:42:58 PM UTC 24 |
916146587 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_and_tpm.1578272507 |
|
|
Aug 23 10:42:20 PM UTC 24 |
Aug 23 10:43:01 PM UTC 24 |
8215472613 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_alert_test.3075363717 |
|
|
Aug 23 10:43:02 PM UTC 24 |
Aug 23 10:43:03 PM UTC 24 |
12719484 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_all.3088348988 |
|
|
Aug 23 10:42:14 PM UTC 24 |
Aug 23 10:43:05 PM UTC 24 |
11342599504 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_csb_read.80508070 |
|
|
Aug 23 10:43:04 PM UTC 24 |
Aug 23 10:43:05 PM UTC 24 |
13962016 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_all.557610849 |
|
|
Aug 23 10:43:06 PM UTC 24 |
Aug 23 10:43:07 PM UTC 24 |
22722885 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_and_tpm.4187894883 |
|
|
Aug 23 10:41:49 PM UTC 24 |
Aug 23 10:43:08 PM UTC 24 |
11905801992 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_mode_ignore_cmds.498539768 |
|
|
Aug 23 10:42:13 PM UTC 24 |
Aug 23 10:43:08 PM UTC 24 |
15925776997 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_read_hw_reg.1259668726 |
|
|
Aug 23 10:43:06 PM UTC 24 |
Aug 23 10:43:09 PM UTC 24 |
1097333293 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_sts_read.4231654152 |
|
|
Aug 23 10:43:08 PM UTC 24 |
Aug 23 10:43:10 PM UTC 24 |
60554695 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_rw.3554766884 |
|
|
Aug 23 10:43:09 PM UTC 24 |
Aug 23 10:43:11 PM UTC 24 |
45917515 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.3892959322 |
|
|
Aug 23 10:36:49 PM UTC 24 |
Aug 23 10:43:11 PM UTC 24 |
60767409605 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_intercept.2703302638 |
|
|
Aug 23 10:43:11 PM UTC 24 |
Aug 23 10:43:14 PM UTC 24 |
72266027 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.3617496055 |
|
|
Aug 23 10:35:50 PM UTC 24 |
Aug 23 10:43:15 PM UTC 24 |
879002963715 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_pass_cmd_filtering.666236079 |
|
|
Aug 23 10:43:09 PM UTC 24 |
Aug 23 10:43:16 PM UTC 24 |
1400827974 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.1813225900 |
|
|
Aug 23 10:37:47 PM UTC 24 |
Aug 23 10:43:16 PM UTC 24 |
48559454860 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_pass_addr_payload_swap.2589953235 |
|
|
Aug 23 10:43:10 PM UTC 24 |
Aug 23 10:43:16 PM UTC 24 |
1922574804 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_pass_cmd_filtering.1110055833 |
|
|
Aug 23 10:42:37 PM UTC 24 |
Aug 23 10:43:17 PM UTC 24 |
14606620028 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_stress_all.1745587645 |
|
|
Aug 23 10:38:23 PM UTC 24 |
Aug 23 10:43:17 PM UTC 24 |
32515931855 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.402111360 |
|
|
Aug 23 10:36:27 PM UTC 24 |
Aug 23 10:43:20 PM UTC 24 |
50552556591 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_and_tpm.1698787188 |
|
|
Aug 23 10:40:49 PM UTC 24 |
Aug 23 10:43:21 PM UTC 24 |
133767725405 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_and_tpm_min_idle.975693161 |
|
|
Aug 23 10:41:50 PM UTC 24 |
Aug 23 10:43:22 PM UTC 24 |
8995090004 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_alert_test.1726406493 |
|
|
Aug 23 10:43:21 PM UTC 24 |
Aug 23 10:43:23 PM UTC 24 |
12023428 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_stress_all.3277639550 |
|
|
Aug 23 10:43:21 PM UTC 24 |
Aug 23 10:43:23 PM UTC 24 |
188821172 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_cfg_cmd.3291201988 |
|
|
Aug 23 10:43:15 PM UTC 24 |
Aug 23 10:43:23 PM UTC 24 |
2927125580 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_csb_read.895650184 |
|
|
Aug 23 10:43:23 PM UTC 24 |
Aug 23 10:43:24 PM UTC 24 |
53844785 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_read_buffer_direct.3704855869 |
|
|
Aug 23 10:43:17 PM UTC 24 |
Aug 23 10:43:26 PM UTC 24 |
1258309598 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_sts_read.2252879963 |
|
|
Aug 23 10:43:25 PM UTC 24 |
Aug 23 10:43:26 PM UTC 24 |
54368874 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_rw.2448716213 |
|
|
Aug 23 10:43:25 PM UTC 24 |
Aug 23 10:43:30 PM UTC 24 |
177194012 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_upload.1212346184 |
|
|
Aug 23 10:43:12 PM UTC 24 |
Aug 23 10:43:30 PM UTC 24 |
6973922528 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_all.1887974109 |
|
|
Aug 23 10:43:24 PM UTC 24 |
Aug 23 10:43:32 PM UTC 24 |
7351862108 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_read_hw_reg.68173569 |
|
|
Aug 23 10:43:24 PM UTC 24 |
Aug 23 10:43:33 PM UTC 24 |
3216482755 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_mailbox.1086444016 |
|
|
Aug 23 10:43:31 PM UTC 24 |
Aug 23 10:43:34 PM UTC 24 |
718554769 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_intercept.3541630999 |
|
|
Aug 23 10:43:31 PM UTC 24 |
Aug 23 10:43:36 PM UTC 24 |
1555579692 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_pass_addr_payload_swap.1721038124 |
|
|
Aug 23 10:43:27 PM UTC 24 |
Aug 23 10:43:36 PM UTC 24 |
2835860400 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_upload.3994399502 |
|
|
Aug 23 10:43:33 PM UTC 24 |
Aug 23 10:43:39 PM UTC 24 |
589429063 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_read_buffer_direct.519880814 |
|
|
Aug 23 10:43:37 PM UTC 24 |
Aug 23 10:43:43 PM UTC 24 |
973413428 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_cfg_cmd.46072450 |
|
|
Aug 23 10:43:34 PM UTC 24 |
Aug 23 10:43:44 PM UTC 24 |
14077830687 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_mode.3558834865 |
|
|
Aug 23 10:43:35 PM UTC 24 |
Aug 23 10:43:44 PM UTC 24 |
553184901 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_pass_cmd_filtering.4144356326 |
|
|
Aug 23 10:43:27 PM UTC 24 |
Aug 23 10:43:47 PM UTC 24 |
5882891017 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_alert_test.3074224318 |
|
|
Aug 23 10:43:47 PM UTC 24 |
Aug 23 10:43:49 PM UTC 24 |
14112292 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_and_tpm_min_idle.492922920 |
|
|
Aug 23 10:43:18 PM UTC 24 |
Aug 23 10:43:49 PM UTC 24 |
3012386554 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_mode.776474980 |
|
|
Aug 23 10:42:50 PM UTC 24 |
Aug 23 10:43:49 PM UTC 24 |
22818145759 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_csb_read.269543358 |
|
|
Aug 23 10:43:49 PM UTC 24 |
Aug 23 10:43:51 PM UTC 24 |
19894672 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_mode_ignore_cmds.666598978 |
|
|
Aug 23 10:43:16 PM UTC 24 |
Aug 23 10:43:52 PM UTC 24 |
6999560636 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_sts_read.2793306242 |
|
|
Aug 23 10:43:52 PM UTC 24 |
Aug 23 10:43:53 PM UTC 24 |
54886558 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_all.2606643240 |
|
|
Aug 23 10:41:49 PM UTC 24 |
Aug 23 10:43:53 PM UTC 24 |
10484018756 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_read_hw_reg.4113517634 |
|
|
Aug 23 10:43:49 PM UTC 24 |
Aug 23 10:43:54 PM UTC 24 |
2362617366 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_mailbox.2429381583 |
|
|
Aug 23 10:43:12 PM UTC 24 |
Aug 23 10:43:55 PM UTC 24 |
5000590463 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_rw.1217740551 |
|
|
Aug 23 10:43:53 PM UTC 24 |
Aug 23 10:43:56 PM UTC 24 |
76894888 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_and_tpm.381801964 |
|
|
Aug 23 10:43:18 PM UTC 24 |
Aug 23 10:43:57 PM UTC 24 |
3763484734 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_pass_addr_payload_swap.2233261976 |
|
|
Aug 23 10:43:54 PM UTC 24 |
Aug 23 10:43:58 PM UTC 24 |
1008923260 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_pass_cmd_filtering.2291027271 |
|
|
Aug 23 10:43:54 PM UTC 24 |
Aug 23 10:44:00 PM UTC 24 |
3180428718 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_mode.3875423512 |
|
|
Aug 23 10:43:15 PM UTC 24 |
Aug 23 10:44:00 PM UTC 24 |
3277376105 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_cfg_cmd.1414251199 |
|
|
Aug 23 10:43:58 PM UTC 24 |
Aug 23 10:44:01 PM UTC 24 |
137565343 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/41.spi_device_stress_all.2367870025 |
|
|
Aug 23 10:40:51 PM UTC 24 |
Aug 23 10:44:06 PM UTC 24 |
31744900056 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_intercept.2845035245 |
|
|
Aug 23 10:43:55 PM UTC 24 |
Aug 23 10:44:07 PM UTC 24 |
2426052260 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_upload.1328135205 |
|
|
Aug 23 10:43:57 PM UTC 24 |
Aug 23 10:44:07 PM UTC 24 |
1197565144 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_mode.664446650 |
|
|
Aug 23 10:43:59 PM UTC 24 |
Aug 23 10:44:09 PM UTC 24 |
2260675055 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_stress_all.524783020 |
|
|
Aug 23 10:44:08 PM UTC 24 |
Aug 23 10:44:10 PM UTC 24 |
33748328 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_read_buffer_direct.1970272472 |
|
|
Aug 23 10:44:01 PM UTC 24 |
Aug 23 10:44:10 PM UTC 24 |
7176147658 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_all.689586754 |
|
|
Aug 23 10:43:49 PM UTC 24 |
Aug 23 10:44:11 PM UTC 24 |
3055652997 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_alert_test.4079236355 |
|
|
Aug 23 10:44:10 PM UTC 24 |
Aug 23 10:44:12 PM UTC 24 |
13042619 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_csb_read.2435167750 |
|
|
Aug 23 10:44:11 PM UTC 24 |
Aug 23 10:44:13 PM UTC 24 |
59904600 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_read_hw_reg.456276318 |
|
|
Aug 23 10:44:11 PM UTC 24 |
Aug 23 10:44:13 PM UTC 24 |
157379514 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_sts_read.3750799577 |
|
|
Aug 23 10:44:12 PM UTC 24 |
Aug 23 10:44:14 PM UTC 24 |
39061125 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_and_tpm_min_idle.3153773375 |
|
|
Aug 23 10:42:58 PM UTC 24 |
Aug 23 10:44:16 PM UTC 24 |
7761840351 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_rw.755210385 |
|
|
Aug 23 10:44:13 PM UTC 24 |
Aug 23 10:44:16 PM UTC 24 |
94460897 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_and_tpm.3778142925 |
|
|
Aug 23 10:43:44 PM UTC 24 |
Aug 23 10:44:17 PM UTC 24 |
3857148162 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_mode_ignore_cmds.1806773721 |
|
|
Aug 23 10:43:37 PM UTC 24 |
Aug 23 10:44:19 PM UTC 24 |
64278456253 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_pass_cmd_filtering.2546114738 |
|
|
Aug 23 10:44:15 PM UTC 24 |
Aug 23 10:44:20 PM UTC 24 |
1668140473 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_all.2406743289 |
|
|
Aug 23 10:44:02 PM UTC 24 |
Aug 23 10:44:21 PM UTC 24 |
2214824594 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_mode_ignore_cmds.3250500665 |
|
|
Aug 23 10:44:01 PM UTC 24 |
Aug 23 10:44:22 PM UTC 24 |
6739326600 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_cfg_cmd.733023318 |
|
|
Aug 23 10:44:20 PM UTC 24 |
Aug 23 10:44:23 PM UTC 24 |
113489693 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_pass_addr_payload_swap.98043178 |
|
|
Aug 23 10:44:15 PM UTC 24 |
Aug 23 10:44:27 PM UTC 24 |
2263922850 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_intercept.1588721187 |
|
|
Aug 23 10:44:17 PM UTC 24 |
Aug 23 10:44:27 PM UTC 24 |
2343970382 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_mailbox.1652942785 |
|
|
Aug 23 10:44:17 PM UTC 24 |
Aug 23 10:44:29 PM UTC 24 |
674216859 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_all.3009037842 |
|
|
Aug 23 10:44:12 PM UTC 24 |
Aug 23 10:44:30 PM UTC 24 |
9454308693 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_read_buffer_direct.69103117 |
|
|
Aug 23 10:44:22 PM UTC 24 |
Aug 23 10:44:31 PM UTC 24 |
3069868070 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_alert_test.3446762329 |
|
|
Aug 23 10:44:31 PM UTC 24 |
Aug 23 10:44:33 PM UTC 24 |
30480631 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_upload.4127938545 |
|
|
Aug 23 10:44:18 PM UTC 24 |
Aug 23 10:44:33 PM UTC 24 |
31774927776 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_mode.3525092601 |
|
|
Aug 23 10:44:21 PM UTC 24 |
Aug 23 10:44:34 PM UTC 24 |
2518086891 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_mailbox.1520276038 |
|
|
Aug 23 10:43:56 PM UTC 24 |
Aug 23 10:44:35 PM UTC 24 |
15670878974 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_stress_all.2407653371 |
|
|
Aug 23 10:39:45 PM UTC 24 |
Aug 23 10:44:36 PM UTC 24 |
314432963636 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_and_tpm.3046251502 |
|
|
Aug 23 10:44:28 PM UTC 24 |
Aug 23 10:44:37 PM UTC 24 |
5810528967 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_mode_ignore_cmds.3542544351 |
|
|
Aug 23 10:44:22 PM UTC 24 |
Aug 23 10:44:40 PM UTC 24 |
3281254888 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_and_tpm_min_idle.1784552768 |
|
|
Aug 23 10:42:25 PM UTC 24 |
Aug 23 10:44:41 PM UTC 24 |
44279558774 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_stress_all.1797034867 |
|
|
Aug 23 10:43:45 PM UTC 24 |
Aug 23 10:45:15 PM UTC 24 |
5925132986 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/44.spi_device_stress_all.3114323109 |
|
|
Aug 23 10:42:28 PM UTC 24 |
Aug 23 10:45:19 PM UTC 24 |
12714778052 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.1182995909 |
|
|
Aug 23 10:39:17 PM UTC 24 |
Aug 23 10:45:20 PM UTC 24 |
47374214468 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_and_tpm.2003067936 |
|
|
Aug 23 10:44:07 PM UTC 24 |
Aug 23 10:45:24 PM UTC 24 |
5578481755 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_and_tpm_min_idle.501192552 |
|
|
Aug 23 10:44:28 PM UTC 24 |
Aug 23 10:45:38 PM UTC 24 |
14989122320 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_all.3962032888 |
|
|
Aug 23 10:42:53 PM UTC 24 |
Aug 23 10:45:45 PM UTC 24 |
140968740062 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_and_tpm_min_idle.3239654104 |
|
|
Aug 23 10:43:45 PM UTC 24 |
Aug 23 10:45:54 PM UTC 24 |
7429088256 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_all.2706914553 |
|
|
Aug 23 10:43:39 PM UTC 24 |
Aug 23 10:45:55 PM UTC 24 |
20250611874 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_all.1011914165 |
|
|
Aug 23 10:41:15 PM UTC 24 |
Aug 23 10:45:57 PM UTC 24 |
45193459731 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/43.spi_device_stress_all.400737038 |
|
|
Aug 23 10:41:55 PM UTC 24 |
Aug 23 10:45:58 PM UTC 24 |
115673373953 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_and_tpm_min_idle.908823051 |
|
|
Aug 23 10:40:29 PM UTC 24 |
Aug 23 10:46:14 PM UTC 24 |
238399626476 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_and_tpm_min_idle.493234693 |
|
|
Aug 23 10:44:08 PM UTC 24 |
Aug 23 10:46:41 PM UTC 24 |
69400482302 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_and_tpm.722287890 |
|
|
Aug 23 10:42:56 PM UTC 24 |
Aug 23 10:46:46 PM UTC 24 |
51313737732 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/42.spi_device_stress_all.1064533010 |
|
|
Aug 23 10:41:21 PM UTC 24 |
Aug 23 10:47:32 PM UTC 24 |
405998860353 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_stress_all.388168401 |
|
|
Aug 23 10:44:30 PM UTC 24 |
Aug 23 10:48:07 PM UTC 24 |
28003062978 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/45.spi_device_stress_all.2113396988 |
|
|
Aug 23 10:43:00 PM UTC 24 |
Aug 23 10:48:53 PM UTC 24 |
156030817415 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_all.1034231158 |
|
|
Aug 23 10:43:17 PM UTC 24 |
Aug 23 10:49:26 PM UTC 24 |
339774323157 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_stress_all.2076340854 |
|
|
Aug 23 10:38:47 PM UTC 24 |
Aug 23 10:50:13 PM UTC 24 |
196748720216 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_all.221926114 |
|
|
Aug 23 10:44:24 PM UTC 24 |
Aug 23 10:50:45 PM UTC 24 |
54786780616 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_stress_all.555987405 |
|
|
Aug 23 10:39:21 PM UTC 24 |
Aug 23 10:51:38 PM UTC 24 |
1655998132799 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_intr_test.2724464550 |
|
|
Aug 23 10:44:34 PM UTC 24 |
Aug 23 10:44:36 PM UTC 24 |
11151204 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_mem_walk.2010294706 |
|
|
Aug 23 10:44:35 PM UTC 24 |
Aug 23 10:44:37 PM UTC 24 |
12727751 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_tl_errors.2963129219 |
|
|
Aug 23 10:44:32 PM UTC 24 |
Aug 23 10:44:37 PM UTC 24 |
751362436 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2768714924 |
|
|
Aug 23 10:44:36 PM UTC 24 |
Aug 23 10:44:39 PM UTC 24 |
27781671 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_mem_partial_access.3234485151 |
|
|
Aug 23 10:44:36 PM UTC 24 |
Aug 23 10:44:39 PM UTC 24 |
915637942 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_rw.2636298557 |
|
|
Aug 23 10:44:36 PM UTC 24 |
Aug 23 10:44:40 PM UTC 24 |
175752352 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3544729553 |
|
|
Aug 23 10:44:40 PM UTC 24 |
Aug 23 10:44:42 PM UTC 24 |
94858922 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1075834420 |
|
|
Aug 23 10:44:39 PM UTC 24 |
Aug 23 10:44:42 PM UTC 24 |
999782613 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_intr_test.2344514459 |
|
|
Aug 23 10:44:41 PM UTC 24 |
Aug 23 10:44:42 PM UTC 24 |
20236143 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_mem_walk.442883370 |
|
|
Aug 23 10:44:42 PM UTC 24 |
Aug 23 10:44:43 PM UTC 24 |
11335653 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_tl_errors.2964986620 |
|
|
Aug 23 10:44:40 PM UTC 24 |
Aug 23 10:44:44 PM UTC 24 |
138762141 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3098066392 |
|
|
Aug 23 10:44:43 PM UTC 24 |
Aug 23 10:44:45 PM UTC 24 |
23350914 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_rw.2681332354 |
|
|
Aug 23 10:44:43 PM UTC 24 |
Aug 23 10:44:45 PM UTC 24 |
79661069 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_mem_partial_access.2195562986 |
|
|
Aug 23 10:44:43 PM UTC 24 |
Aug 23 10:44:46 PM UTC 24 |
62638793 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3198309822 |
|
|
Aug 23 10:44:46 PM UTC 24 |
Aug 23 10:44:49 PM UTC 24 |
77060379 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2766332306 |
|
|
Aug 23 10:44:46 PM UTC 24 |
Aug 23 10:44:49 PM UTC 24 |
357003872 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_tl_errors.963735783 |
|
|
Aug 23 10:44:46 PM UTC 24 |
Aug 23 10:44:51 PM UTC 24 |
373512380 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_aliasing.1720300541 |
|
|
Aug 23 10:44:37 PM UTC 24 |
Aug 23 10:44:52 PM UTC 24 |
1519182344 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_intr_test.3549527034 |
|
|
Aug 23 10:44:50 PM UTC 24 |
Aug 23 10:44:52 PM UTC 24 |
47182860 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_mem_walk.1308126853 |
|
|
Aug 23 10:44:52 PM UTC 24 |
Aug 23 10:44:54 PM UTC 24 |
41182022 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_mem_partial_access.1284752463 |
|
|
Aug 23 10:44:52 PM UTC 24 |
Aug 23 10:44:55 PM UTC 24 |
61529286 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_tl_intg_err.4017984013 |
|
|
Aug 23 10:44:34 PM UTC 24 |
Aug 23 10:44:55 PM UTC 24 |
1059999334 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_csr_hw_reset.3327258886 |
|
|
Aug 23 10:44:53 PM UTC 24 |
Aug 23 10:44:55 PM UTC 24 |
273281168 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2655464334 |
|
|
Aug 23 10:44:44 PM UTC 24 |
Aug 23 10:44:56 PM UTC 24 |
645225507 ps |