| T629 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.2077900709 |
|
|
Sep 04 08:31:18 AM UTC 24 |
Sep 04 08:31:23 AM UTC 24 |
62135408 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.3291907335 |
|
|
Sep 04 08:31:02 AM UTC 24 |
Sep 04 08:31:24 AM UTC 24 |
4558346857 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.705250703 |
|
|
Sep 04 08:31:18 AM UTC 24 |
Sep 04 08:31:24 AM UTC 24 |
126148785 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.1895748228 |
|
|
Sep 04 08:26:14 AM UTC 24 |
Sep 04 08:31:24 AM UTC 24 |
144198199623 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.319765420 |
|
|
Sep 04 08:31:21 AM UTC 24 |
Sep 04 08:31:25 AM UTC 24 |
34784590 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.1893576414 |
|
|
Sep 04 08:31:24 AM UTC 24 |
Sep 04 08:31:26 AM UTC 24 |
25433890 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.1104576708 |
|
|
Sep 04 08:31:20 AM UTC 24 |
Sep 04 08:31:27 AM UTC 24 |
950848039 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_mode_ignore_cmds.3537090356 |
|
|
Sep 04 08:26:14 AM UTC 24 |
Sep 04 08:31:28 AM UTC 24 |
123056896771 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.1167144196 |
|
|
Sep 04 08:27:58 AM UTC 24 |
Sep 04 08:31:28 AM UTC 24 |
86272165647 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.3721942481 |
|
|
Sep 04 08:31:22 AM UTC 24 |
Sep 04 08:31:28 AM UTC 24 |
228920652 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.3837034864 |
|
|
Sep 04 08:31:27 AM UTC 24 |
Sep 04 08:31:30 AM UTC 24 |
24724967 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.3239483364 |
|
|
Sep 04 08:31:28 AM UTC 24 |
Sep 04 08:31:31 AM UTC 24 |
14094335 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.117563329 |
|
|
Sep 04 08:29:54 AM UTC 24 |
Sep 04 08:31:32 AM UTC 24 |
14431472033 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.1327755552 |
|
|
Sep 04 08:31:31 AM UTC 24 |
Sep 04 08:31:34 AM UTC 24 |
98683120 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.95328937 |
|
|
Sep 04 08:31:32 AM UTC 24 |
Sep 04 08:31:34 AM UTC 24 |
14437504 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.3507620511 |
|
|
Sep 04 08:31:25 AM UTC 24 |
Sep 04 08:31:36 AM UTC 24 |
899793115 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.4109568673 |
|
|
Sep 04 08:30:29 AM UTC 24 |
Sep 04 08:31:38 AM UTC 24 |
7802809477 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.4271730366 |
|
|
Sep 04 08:31:29 AM UTC 24 |
Sep 04 08:31:38 AM UTC 24 |
1209057174 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.3643817236 |
|
|
Sep 04 08:30:59 AM UTC 24 |
Sep 04 08:31:38 AM UTC 24 |
4024337420 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.3824855716 |
|
|
Sep 04 08:31:35 AM UTC 24 |
Sep 04 08:31:38 AM UTC 24 |
102576240 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.173662439 |
|
|
Sep 04 08:31:33 AM UTC 24 |
Sep 04 08:31:38 AM UTC 24 |
511227297 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.3137123934 |
|
|
Sep 04 08:31:18 AM UTC 24 |
Sep 04 08:31:39 AM UTC 24 |
2414500098 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.3192143913 |
|
|
Sep 04 08:31:36 AM UTC 24 |
Sep 04 08:31:40 AM UTC 24 |
125408798 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.2055788984 |
|
|
Sep 04 08:31:00 AM UTC 24 |
Sep 04 08:31:41 AM UTC 24 |
4464540403 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.2918117549 |
|
|
Sep 04 08:31:38 AM UTC 24 |
Sep 04 08:31:45 AM UTC 24 |
267658776 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.2050525469 |
|
|
Sep 04 08:31:39 AM UTC 24 |
Sep 04 08:31:46 AM UTC 24 |
1244450394 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.2833898881 |
|
|
Sep 04 08:31:35 AM UTC 24 |
Sep 04 08:31:47 AM UTC 24 |
1825273562 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.1998014686 |
|
|
Sep 04 08:31:46 AM UTC 24 |
Sep 04 08:31:48 AM UTC 24 |
25527113 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_csb_read.1281555785 |
|
|
Sep 04 08:31:47 AM UTC 24 |
Sep 04 08:31:49 AM UTC 24 |
66677395 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.2590478299 |
|
|
Sep 04 08:31:39 AM UTC 24 |
Sep 04 08:31:50 AM UTC 24 |
2036562480 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.1537717137 |
|
|
Sep 04 08:31:50 AM UTC 24 |
Sep 04 08:31:53 AM UTC 24 |
141878428 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.38518426 |
|
|
Sep 04 08:31:50 AM UTC 24 |
Sep 04 08:31:53 AM UTC 24 |
47666881 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.248521084 |
|
|
Sep 04 08:31:30 AM UTC 24 |
Sep 04 08:31:54 AM UTC 24 |
3444019792 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.554111866 |
|
|
Sep 04 08:31:20 AM UTC 24 |
Sep 04 08:31:54 AM UTC 24 |
4849086478 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3493531987 |
|
|
Sep 04 08:31:53 AM UTC 24 |
Sep 04 08:31:58 AM UTC 24 |
141054251 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.1281616358 |
|
|
Sep 04 08:27:43 AM UTC 24 |
Sep 04 08:31:58 AM UTC 24 |
45578148673 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.4279347940 |
|
|
Sep 04 08:30:28 AM UTC 24 |
Sep 04 08:31:59 AM UTC 24 |
3923123522 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.3959451748 |
|
|
Sep 04 08:31:59 AM UTC 24 |
Sep 04 08:32:03 AM UTC 24 |
78207316 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.3772607261 |
|
|
Sep 04 08:31:16 AM UTC 24 |
Sep 04 08:32:03 AM UTC 24 |
11712553322 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.3580036785 |
|
|
Sep 04 08:28:42 AM UTC 24 |
Sep 04 08:32:03 AM UTC 24 |
123716237092 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.1758154110 |
|
|
Sep 04 08:30:08 AM UTC 24 |
Sep 04 08:32:04 AM UTC 24 |
39464951386 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.3573828158 |
|
|
Sep 04 08:32:04 AM UTC 24 |
Sep 04 08:32:06 AM UTC 24 |
108277504 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.2776443865 |
|
|
Sep 04 08:31:48 AM UTC 24 |
Sep 04 08:32:06 AM UTC 24 |
5557277100 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.3487991974 |
|
|
Sep 04 08:31:55 AM UTC 24 |
Sep 04 08:32:06 AM UTC 24 |
1368585362 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.4250302361 |
|
|
Sep 04 08:31:49 AM UTC 24 |
Sep 04 08:32:06 AM UTC 24 |
14857875596 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.3920790909 |
|
|
Sep 04 08:32:07 AM UTC 24 |
Sep 04 08:32:09 AM UTC 24 |
34634290 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.4034428034 |
|
|
Sep 04 08:32:08 AM UTC 24 |
Sep 04 08:32:10 AM UTC 24 |
18570034 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_all.2353190068 |
|
|
Sep 04 08:31:25 AM UTC 24 |
Sep 04 08:32:10 AM UTC 24 |
3078646711 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.78548567 |
|
|
Sep 04 08:32:04 AM UTC 24 |
Sep 04 08:32:10 AM UTC 24 |
444783356 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.4092246296 |
|
|
Sep 04 08:31:39 AM UTC 24 |
Sep 04 08:32:13 AM UTC 24 |
6931895451 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.499208280 |
|
|
Sep 04 08:32:12 AM UTC 24 |
Sep 04 08:32:14 AM UTC 24 |
383147539 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.2193219326 |
|
|
Sep 04 08:32:12 AM UTC 24 |
Sep 04 08:32:15 AM UTC 24 |
326761920 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.2824599894 |
|
|
Sep 04 08:31:59 AM UTC 24 |
Sep 04 08:32:15 AM UTC 24 |
1870463105 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.1005125415 |
|
|
Sep 04 08:30:53 AM UTC 24 |
Sep 04 08:32:15 AM UTC 24 |
6245581204 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_all.2789920473 |
|
|
Sep 04 08:31:04 AM UTC 24 |
Sep 04 08:32:17 AM UTC 24 |
3972624830 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.735418797 |
|
|
Sep 04 08:29:56 AM UTC 24 |
Sep 04 08:32:19 AM UTC 24 |
6582366154 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.3982957395 |
|
|
Sep 04 08:32:11 AM UTC 24 |
Sep 04 08:32:21 AM UTC 24 |
3363762869 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.565667011 |
|
|
Sep 04 08:32:16 AM UTC 24 |
Sep 04 08:32:23 AM UTC 24 |
176064672 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.2920619904 |
|
|
Sep 04 08:32:18 AM UTC 24 |
Sep 04 08:32:26 AM UTC 24 |
417982739 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.2662787078 |
|
|
Sep 04 08:31:54 AM UTC 24 |
Sep 04 08:32:27 AM UTC 24 |
7164880351 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.278503734 |
|
|
Sep 04 08:32:16 AM UTC 24 |
Sep 04 08:32:27 AM UTC 24 |
523803142 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.3016361237 |
|
|
Sep 04 08:32:24 AM UTC 24 |
Sep 04 08:32:30 AM UTC 24 |
181451655 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.4092213635 |
|
|
Sep 04 08:32:05 AM UTC 24 |
Sep 04 08:32:30 AM UTC 24 |
776948422 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.1842222081 |
|
|
Sep 04 08:32:20 AM UTC 24 |
Sep 04 08:32:32 AM UTC 24 |
383059304 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.461820762 |
|
|
Sep 04 08:32:31 AM UTC 24 |
Sep 04 08:32:33 AM UTC 24 |
12094928 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.3540732129 |
|
|
Sep 04 08:32:31 AM UTC 24 |
Sep 04 08:32:33 AM UTC 24 |
22117091 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.2870531064 |
|
|
Sep 04 08:32:34 AM UTC 24 |
Sep 04 08:32:36 AM UTC 24 |
64594619 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.3239273325 |
|
|
Sep 04 08:29:52 AM UTC 24 |
Sep 04 08:32:39 AM UTC 24 |
23457786488 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.373063584 |
|
|
Sep 04 08:32:38 AM UTC 24 |
Sep 04 08:32:40 AM UTC 24 |
101061418 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.768264365 |
|
|
Sep 04 08:32:15 AM UTC 24 |
Sep 04 08:32:41 AM UTC 24 |
46456604236 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.3059638375 |
|
|
Sep 04 08:32:11 AM UTC 24 |
Sep 04 08:32:41 AM UTC 24 |
5550151159 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.67795681 |
|
|
Sep 04 08:32:38 AM UTC 24 |
Sep 04 08:32:42 AM UTC 24 |
271943642 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.3894562829 |
|
|
Sep 04 08:32:00 AM UTC 24 |
Sep 04 08:32:43 AM UTC 24 |
8256065609 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.4195366461 |
|
|
Sep 04 08:32:13 AM UTC 24 |
Sep 04 08:32:44 AM UTC 24 |
7503447047 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.313648940 |
|
|
Sep 04 08:31:26 AM UTC 24 |
Sep 04 08:32:45 AM UTC 24 |
6754150465 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.877714704 |
|
|
Sep 04 08:32:32 AM UTC 24 |
Sep 04 08:32:46 AM UTC 24 |
6278526967 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.3867265490 |
|
|
Sep 04 08:31:55 AM UTC 24 |
Sep 04 08:32:47 AM UTC 24 |
25713463229 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.2943348422 |
|
|
Sep 04 08:32:42 AM UTC 24 |
Sep 04 08:32:49 AM UTC 24 |
629500464 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.2684257377 |
|
|
Sep 04 08:31:39 AM UTC 24 |
Sep 04 08:32:50 AM UTC 24 |
3336843003 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.1373582707 |
|
|
Sep 04 08:32:43 AM UTC 24 |
Sep 04 08:32:50 AM UTC 24 |
751631093 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.1282622426 |
|
|
Sep 04 08:32:42 AM UTC 24 |
Sep 04 08:32:53 AM UTC 24 |
615017384 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.2916697183 |
|
|
Sep 04 08:31:09 AM UTC 24 |
Sep 04 08:32:53 AM UTC 24 |
15256617945 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_stress_all.2705602908 |
|
|
Sep 04 08:32:29 AM UTC 24 |
Sep 04 08:32:54 AM UTC 24 |
1898345174 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.3308422634 |
|
|
Sep 04 08:32:52 AM UTC 24 |
Sep 04 08:32:54 AM UTC 24 |
38544861 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1621739596 |
|
|
Sep 04 08:32:45 AM UTC 24 |
Sep 04 08:32:54 AM UTC 24 |
1010902642 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.1839185760 |
|
|
Sep 04 08:32:44 AM UTC 24 |
Sep 04 08:32:56 AM UTC 24 |
346591370 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.1277227690 |
|
|
Sep 04 08:32:54 AM UTC 24 |
Sep 04 08:32:56 AM UTC 24 |
72148438 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.409871723 |
|
|
Sep 04 08:32:54 AM UTC 24 |
Sep 04 08:32:56 AM UTC 24 |
31636661 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.2382400560 |
|
|
Sep 04 08:30:29 AM UTC 24 |
Sep 04 08:32:56 AM UTC 24 |
5019442494 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.2132662468 |
|
|
Sep 04 08:32:54 AM UTC 24 |
Sep 04 08:32:58 AM UTC 24 |
1202730827 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.4071430162 |
|
|
Sep 04 08:32:55 AM UTC 24 |
Sep 04 08:32:58 AM UTC 24 |
62105389 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.1735241276 |
|
|
Sep 04 08:30:52 AM UTC 24 |
Sep 04 08:32:58 AM UTC 24 |
47591288934 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.911437259 |
|
|
Sep 04 08:32:56 AM UTC 24 |
Sep 04 08:33:00 AM UTC 24 |
105193527 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.3310493180 |
|
|
Sep 04 08:32:59 AM UTC 24 |
Sep 04 08:33:01 AM UTC 24 |
13659790 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.465415249 |
|
|
Sep 04 08:32:34 AM UTC 24 |
Sep 04 08:33:01 AM UTC 24 |
1260120053 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.3166407129 |
|
|
Sep 04 08:32:58 AM UTC 24 |
Sep 04 08:33:01 AM UTC 24 |
104880790 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.2199645822 |
|
|
Sep 04 08:32:41 AM UTC 24 |
Sep 04 08:33:02 AM UTC 24 |
2234942774 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.1739971084 |
|
|
Sep 04 08:32:57 AM UTC 24 |
Sep 04 08:33:04 AM UTC 24 |
261339722 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.3862939429 |
|
|
Sep 04 08:32:55 AM UTC 24 |
Sep 04 08:33:04 AM UTC 24 |
3985301362 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.2929385094 |
|
|
Sep 04 08:32:16 AM UTC 24 |
Sep 04 08:33:05 AM UTC 24 |
26188339275 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_stress_all.313123938 |
|
|
Sep 04 08:33:03 AM UTC 24 |
Sep 04 08:33:06 AM UTC 24 |
696217428 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.4129127154 |
|
|
Sep 04 08:33:04 AM UTC 24 |
Sep 04 08:33:06 AM UTC 24 |
20480891 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.3991577799 |
|
|
Sep 04 08:33:05 AM UTC 24 |
Sep 04 08:33:08 AM UTC 24 |
65371788 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.4172433616 |
|
|
Sep 04 08:28:56 AM UTC 24 |
Sep 04 08:33:10 AM UTC 24 |
27808879413 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.4200407048 |
|
|
Sep 04 08:33:08 AM UTC 24 |
Sep 04 08:33:10 AM UTC 24 |
52741948 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.4161434466 |
|
|
Sep 04 08:32:58 AM UTC 24 |
Sep 04 08:33:10 AM UTC 24 |
7305918836 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.1691749877 |
|
|
Sep 04 08:33:09 AM UTC 24 |
Sep 04 08:33:11 AM UTC 24 |
23221854 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/21.spi_device_stress_all.4202866712 |
|
|
Sep 04 08:29:40 AM UTC 24 |
Sep 04 08:33:12 AM UTC 24 |
302765422353 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.3381555540 |
|
|
Sep 04 08:33:01 AM UTC 24 |
Sep 04 08:33:13 AM UTC 24 |
966348006 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.3747216814 |
|
|
Sep 04 08:32:59 AM UTC 24 |
Sep 04 08:33:16 AM UTC 24 |
2178827758 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_stress_all.3886945682 |
|
|
Sep 04 08:32:07 AM UTC 24 |
Sep 04 08:33:17 AM UTC 24 |
4573802638 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.463342107 |
|
|
Sep 04 08:32:40 AM UTC 24 |
Sep 04 08:33:17 AM UTC 24 |
47925736099 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.3496575352 |
|
|
Sep 04 08:33:11 AM UTC 24 |
Sep 04 08:33:18 AM UTC 24 |
309515235 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.1917837461 |
|
|
Sep 04 08:33:14 AM UTC 24 |
Sep 04 08:33:18 AM UTC 24 |
184726711 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.241297153 |
|
|
Sep 04 08:33:05 AM UTC 24 |
Sep 04 08:33:19 AM UTC 24 |
6084368031 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.3648691743 |
|
|
Sep 04 08:33:13 AM UTC 24 |
Sep 04 08:33:20 AM UTC 24 |
543955507 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_all.72937181 |
|
|
Sep 04 08:32:46 AM UTC 24 |
Sep 04 08:33:20 AM UTC 24 |
1951875311 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_all.51062937 |
|
|
Sep 04 08:33:18 AM UTC 24 |
Sep 04 08:33:20 AM UTC 24 |
66308629 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.2035708613 |
|
|
Sep 04 08:31:25 AM UTC 24 |
Sep 04 08:33:21 AM UTC 24 |
21884813354 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.843235254 |
|
|
Sep 04 08:32:59 AM UTC 24 |
Sep 04 08:33:21 AM UTC 24 |
5495508174 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.3545959356 |
|
|
Sep 04 08:33:21 AM UTC 24 |
Sep 04 08:33:23 AM UTC 24 |
12922855 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_stress_all.1731870771 |
|
|
Sep 04 08:33:21 AM UTC 24 |
Sep 04 08:33:23 AM UTC 24 |
221890049 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.3075280279 |
|
|
Sep 04 08:33:22 AM UTC 24 |
Sep 04 08:33:24 AM UTC 24 |
25879354 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.2855982011 |
|
|
Sep 04 08:33:23 AM UTC 24 |
Sep 04 08:33:26 AM UTC 24 |
1650066926 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.1898253087 |
|
|
Sep 04 08:33:11 AM UTC 24 |
Sep 04 08:33:26 AM UTC 24 |
6222058543 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.3119733032 |
|
|
Sep 04 08:33:24 AM UTC 24 |
Sep 04 08:33:27 AM UTC 24 |
77823387 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.3898334535 |
|
|
Sep 04 08:33:06 AM UTC 24 |
Sep 04 08:33:28 AM UTC 24 |
4093117359 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.3684288185 |
|
|
Sep 04 08:33:12 AM UTC 24 |
Sep 04 08:33:28 AM UTC 24 |
1103588653 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.974571293 |
|
|
Sep 04 08:33:22 AM UTC 24 |
Sep 04 08:33:29 AM UTC 24 |
2644039773 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.2396158956 |
|
|
Sep 04 08:33:17 AM UTC 24 |
Sep 04 08:33:31 AM UTC 24 |
3275515337 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.1166953981 |
|
|
Sep 04 08:30:30 AM UTC 24 |
Sep 04 08:33:32 AM UTC 24 |
11318111863 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.3902561378 |
|
|
Sep 04 08:33:28 AM UTC 24 |
Sep 04 08:33:32 AM UTC 24 |
213739943 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.2386210336 |
|
|
Sep 04 08:33:27 AM UTC 24 |
Sep 04 08:33:33 AM UTC 24 |
74045772 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.278825059 |
|
|
Sep 04 08:33:18 AM UTC 24 |
Sep 04 08:33:34 AM UTC 24 |
10849846878 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.1926963692 |
|
|
Sep 04 08:33:26 AM UTC 24 |
Sep 04 08:33:35 AM UTC 24 |
607294671 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.2950311532 |
|
|
Sep 04 08:33:30 AM UTC 24 |
Sep 04 08:33:36 AM UTC 24 |
688850542 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.1763251080 |
|
|
Sep 04 08:32:54 AM UTC 24 |
Sep 04 08:33:37 AM UTC 24 |
3296319375 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.1724079109 |
|
|
Sep 04 08:33:22 AM UTC 24 |
Sep 04 08:33:37 AM UTC 24 |
2528002964 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.299311270 |
|
|
Sep 04 08:33:27 AM UTC 24 |
Sep 04 08:33:37 AM UTC 24 |
487295576 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/49.spi_device_alert_test.2641273333 |
|
|
Sep 04 08:37:31 AM UTC 24 |
Sep 04 08:37:34 AM UTC 24 |
47158730 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_all.1206429956 |
|
|
Sep 04 08:33:02 AM UTC 24 |
Sep 04 08:33:39 AM UTC 24 |
3466113497 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.22708055 |
|
|
Sep 04 08:33:37 AM UTC 24 |
Sep 04 08:33:39 AM UTC 24 |
96235563 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.3744775150 |
|
|
Sep 04 08:33:37 AM UTC 24 |
Sep 04 08:33:39 AM UTC 24 |
123860505 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.2050517699 |
|
|
Sep 04 08:28:58 AM UTC 24 |
Sep 04 08:33:40 AM UTC 24 |
24783823731 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3435218029 |
|
|
Sep 04 08:33:39 AM UTC 24 |
Sep 04 08:33:42 AM UTC 24 |
73299339 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.1851835152 |
|
|
Sep 04 08:32:22 AM UTC 24 |
Sep 04 08:33:42 AM UTC 24 |
5775165414 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.3968136202 |
|
|
Sep 04 08:33:41 AM UTC 24 |
Sep 04 08:33:43 AM UTC 24 |
102376312 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.3483888390 |
|
|
Sep 04 08:33:38 AM UTC 24 |
Sep 04 08:33:45 AM UTC 24 |
1578876275 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.1545339209 |
|
|
Sep 04 08:33:11 AM UTC 24 |
Sep 04 08:33:46 AM UTC 24 |
4879606978 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.1261435901 |
|
|
Sep 04 08:32:07 AM UTC 24 |
Sep 04 08:33:46 AM UTC 24 |
29414674809 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.3436154812 |
|
|
Sep 04 08:33:33 AM UTC 24 |
Sep 04 08:33:47 AM UTC 24 |
4290149923 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.3169540110 |
|
|
Sep 04 08:33:41 AM UTC 24 |
Sep 04 08:33:49 AM UTC 24 |
2137953846 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.87097147 |
|
|
Sep 04 08:33:44 AM UTC 24 |
Sep 04 08:33:49 AM UTC 24 |
459220783 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.332660721 |
|
|
Sep 04 08:33:46 AM UTC 24 |
Sep 04 08:33:50 AM UTC 24 |
345619629 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1451043821 |
|
|
Sep 04 08:33:46 AM UTC 24 |
Sep 04 08:33:52 AM UTC 24 |
130541047 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.3816254708 |
|
|
Sep 04 08:26:31 AM UTC 24 |
Sep 04 08:33:53 AM UTC 24 |
90546477634 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.4275134425 |
|
|
Sep 04 08:29:57 AM UTC 24 |
Sep 04 08:33:53 AM UTC 24 |
17845823301 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.3614993663 |
|
|
Sep 04 08:33:42 AM UTC 24 |
Sep 04 08:33:54 AM UTC 24 |
6089262462 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.2943920147 |
|
|
Sep 04 08:33:47 AM UTC 24 |
Sep 04 08:33:54 AM UTC 24 |
95482043 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/27.spi_device_stress_all.1373971567 |
|
|
Sep 04 08:31:27 AM UTC 24 |
Sep 04 08:33:54 AM UTC 24 |
6072567522 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.3444400113 |
|
|
Sep 04 08:33:43 AM UTC 24 |
Sep 04 08:33:55 AM UTC 24 |
862277397 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.1533669762 |
|
|
Sep 04 08:33:53 AM UTC 24 |
Sep 04 08:33:55 AM UTC 24 |
44939908 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.1537556274 |
|
|
Sep 04 08:33:54 AM UTC 24 |
Sep 04 08:33:56 AM UTC 24 |
17209452 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.1906579487 |
|
|
Sep 04 08:33:43 AM UTC 24 |
Sep 04 08:33:56 AM UTC 24 |
1886332242 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.4129124413 |
|
|
Sep 04 08:33:55 AM UTC 24 |
Sep 04 08:33:57 AM UTC 24 |
345653011 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.338855768 |
|
|
Sep 04 08:33:55 AM UTC 24 |
Sep 04 08:33:58 AM UTC 24 |
86110996 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.2917141136 |
|
|
Sep 04 08:33:19 AM UTC 24 |
Sep 04 08:33:58 AM UTC 24 |
4222966736 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.4109281941 |
|
|
Sep 04 08:30:52 AM UTC 24 |
Sep 04 08:33:59 AM UTC 24 |
137968139804 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.4147606150 |
|
|
Sep 04 08:33:55 AM UTC 24 |
Sep 04 08:34:00 AM UTC 24 |
285131844 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.125487448 |
|
|
Sep 04 08:31:42 AM UTC 24 |
Sep 04 08:34:01 AM UTC 24 |
16102588305 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.1257192523 |
|
|
Sep 04 08:33:38 AM UTC 24 |
Sep 04 08:34:02 AM UTC 24 |
4134320025 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.4006266669 |
|
|
Sep 04 08:33:55 AM UTC 24 |
Sep 04 08:34:02 AM UTC 24 |
354272689 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.1692060780 |
|
|
Sep 04 08:33:47 AM UTC 24 |
Sep 04 08:34:04 AM UTC 24 |
645540712 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.710280854 |
|
|
Sep 04 08:33:24 AM UTC 24 |
Sep 04 08:34:05 AM UTC 24 |
45145442216 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1384566549 |
|
|
Sep 04 08:33:59 AM UTC 24 |
Sep 04 08:34:06 AM UTC 24 |
317982686 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_all.3405572050 |
|
|
Sep 04 08:31:41 AM UTC 24 |
Sep 04 08:34:06 AM UTC 24 |
39712349364 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.520534357 |
|
|
Sep 04 08:33:54 AM UTC 24 |
Sep 04 08:34:06 AM UTC 24 |
1319950397 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.1880216401 |
|
|
Sep 04 08:34:01 AM UTC 24 |
Sep 04 08:34:07 AM UTC 24 |
190912740 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.2439784259 |
|
|
Sep 04 08:33:57 AM UTC 24 |
Sep 04 08:34:08 AM UTC 24 |
5598731393 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.1253497643 |
|
|
Sep 04 08:33:58 AM UTC 24 |
Sep 04 08:34:08 AM UTC 24 |
345893090 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.2076981760 |
|
|
Sep 04 08:34:06 AM UTC 24 |
Sep 04 08:34:08 AM UTC 24 |
22092371 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.3909109105 |
|
|
Sep 04 08:34:06 AM UTC 24 |
Sep 04 08:34:08 AM UTC 24 |
47410588 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.1383842796 |
|
|
Sep 04 08:33:31 AM UTC 24 |
Sep 04 08:34:11 AM UTC 24 |
2798004372 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.1739062457 |
|
|
Sep 04 08:34:09 AM UTC 24 |
Sep 04 08:34:11 AM UTC 24 |
92279716 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.362240556 |
|
|
Sep 04 08:34:09 AM UTC 24 |
Sep 04 08:34:14 AM UTC 24 |
175835760 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.1433167983 |
|
|
Sep 04 08:34:10 AM UTC 24 |
Sep 04 08:34:15 AM UTC 24 |
362580963 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1367275649 |
|
|
Sep 04 08:29:39 AM UTC 24 |
Sep 04 08:34:18 AM UTC 24 |
109933765412 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.301671637 |
|
|
Sep 04 08:34:00 AM UTC 24 |
Sep 04 08:34:19 AM UTC 24 |
1110850954 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.2568959198 |
|
|
Sep 04 08:34:07 AM UTC 24 |
Sep 04 08:34:21 AM UTC 24 |
2333066079 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.2203331561 |
|
|
Sep 04 08:34:10 AM UTC 24 |
Sep 04 08:34:23 AM UTC 24 |
1021808687 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.1568771473 |
|
|
Sep 04 08:34:09 AM UTC 24 |
Sep 04 08:34:23 AM UTC 24 |
2542098023 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.4252615718 |
|
|
Sep 04 08:34:18 AM UTC 24 |
Sep 04 08:34:24 AM UTC 24 |
269428615 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.1538278783 |
|
|
Sep 04 08:34:12 AM UTC 24 |
Sep 04 08:34:24 AM UTC 24 |
1389699461 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.3310273032 |
|
|
Sep 04 08:33:35 AM UTC 24 |
Sep 04 08:34:24 AM UTC 24 |
5859896629 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_all.102960511 |
|
|
Sep 04 08:34:20 AM UTC 24 |
Sep 04 08:34:26 AM UTC 24 |
431200355 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.2538408331 |
|
|
Sep 04 08:34:25 AM UTC 24 |
Sep 04 08:34:27 AM UTC 24 |
12156690 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.588444433 |
|
|
Sep 04 08:34:25 AM UTC 24 |
Sep 04 08:34:28 AM UTC 24 |
15288672 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_all.1709498873 |
|
|
Sep 04 08:34:02 AM UTC 24 |
Sep 04 08:34:30 AM UTC 24 |
3076768040 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.1301568164 |
|
|
Sep 04 08:34:28 AM UTC 24 |
Sep 04 08:34:31 AM UTC 24 |
51089592 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.2874847365 |
|
|
Sep 04 08:34:28 AM UTC 24 |
Sep 04 08:34:31 AM UTC 24 |
61155065 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.19649374 |
|
|
Sep 04 08:34:07 AM UTC 24 |
Sep 04 08:34:31 AM UTC 24 |
3938175188 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/41.spi_device_cfg_cmd.3243787211 |
|
|
Sep 04 08:35:22 AM UTC 24 |
Sep 04 08:35:28 AM UTC 24 |
174823346 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.414086197 |
|
|
Sep 04 08:34:16 AM UTC 24 |
Sep 04 08:34:33 AM UTC 24 |
7151909533 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_and_tpm_min_idle.113809247 |
|
|
Sep 04 08:24:50 AM UTC 24 |
Sep 04 08:34:34 AM UTC 24 |
65827638882 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.2478116188 |
|
|
Sep 04 08:29:01 AM UTC 24 |
Sep 04 08:34:35 AM UTC 24 |
62403592569 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.1014328459 |
|
|
Sep 04 08:33:54 AM UTC 24 |
Sep 04 08:34:36 AM UTC 24 |
14634576893 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3146005940 |
|
|
Sep 04 08:34:15 AM UTC 24 |
Sep 04 08:34:37 AM UTC 24 |
8506643880 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2230925199 |
|
|
Sep 04 08:34:31 AM UTC 24 |
Sep 04 08:34:37 AM UTC 24 |
130816409 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.609709215 |
|
|
Sep 04 08:31:07 AM UTC 24 |
Sep 04 08:34:38 AM UTC 24 |
50556388297 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.3500601047 |
|
|
Sep 04 08:34:32 AM UTC 24 |
Sep 04 08:34:39 AM UTC 24 |
208826584 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.4293841515 |
|
|
Sep 04 08:34:36 AM UTC 24 |
Sep 04 08:34:40 AM UTC 24 |
109556850 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.1433267585 |
|
|
Sep 04 08:34:12 AM UTC 24 |
Sep 04 08:34:41 AM UTC 24 |
3445118054 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.2721206514 |
|
|
Sep 04 08:34:25 AM UTC 24 |
Sep 04 08:34:42 AM UTC 24 |
5332867617 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.1029439955 |
|
|
Sep 04 08:34:40 AM UTC 24 |
Sep 04 08:34:42 AM UTC 24 |
32229874 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.4180215792 |
|
|
Sep 04 08:34:32 AM UTC 24 |
Sep 04 08:34:43 AM UTC 24 |
2686860645 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.675266944 |
|
|
Sep 04 08:34:36 AM UTC 24 |
Sep 04 08:34:43 AM UTC 24 |
2694426071 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.3146488093 |
|
|
Sep 04 08:34:42 AM UTC 24 |
Sep 04 08:34:45 AM UTC 24 |
20774771 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_mailbox.3613084673 |
|
|
Sep 04 08:34:33 AM UTC 24 |
Sep 04 08:34:45 AM UTC 24 |
187418718 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_all.1159719120 |
|
|
Sep 04 08:34:44 AM UTC 24 |
Sep 04 08:34:46 AM UTC 24 |
30861893 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.2365667967 |
|
|
Sep 04 08:34:44 AM UTC 24 |
Sep 04 08:34:46 AM UTC 24 |
145921569 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.3199289777 |
|
|
Sep 04 08:34:45 AM UTC 24 |
Sep 04 08:34:47 AM UTC 24 |
16233037 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.2161464951 |
|
|
Sep 04 08:34:43 AM UTC 24 |
Sep 04 08:34:50 AM UTC 24 |
862300609 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.4232460725 |
|
|
Sep 04 08:34:38 AM UTC 24 |
Sep 04 08:34:51 AM UTC 24 |
1470148149 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.3667970783 |
|
|
Sep 04 08:34:47 AM UTC 24 |
Sep 04 08:34:52 AM UTC 24 |
754997198 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.1688800756 |
|
|
Sep 04 08:33:50 AM UTC 24 |
Sep 04 08:34:53 AM UTC 24 |
2352293662 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.3986939592 |
|
|
Sep 04 08:33:57 AM UTC 24 |
Sep 04 08:34:53 AM UTC 24 |
14479379741 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_all.3247240723 |
|
|
Sep 04 08:33:33 AM UTC 24 |
Sep 04 08:34:53 AM UTC 24 |
3537512642 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_and_tpm_min_idle.2241533302 |
|
|
Sep 04 08:34:03 AM UTC 24 |
Sep 04 08:34:55 AM UTC 24 |
2530980702 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.1557745565 |
|
|
Sep 04 08:34:35 AM UTC 24 |
Sep 04 08:34:56 AM UTC 24 |
13990812894 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.445485013 |
|
|
Sep 04 08:34:51 AM UTC 24 |
Sep 04 08:34:57 AM UTC 24 |
1256581449 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.1999606273 |
|
|
Sep 04 08:27:59 AM UTC 24 |
Sep 04 08:34:57 AM UTC 24 |
159248301435 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.1745574549 |
|
|
Sep 04 08:34:46 AM UTC 24 |
Sep 04 08:34:58 AM UTC 24 |
930734908 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.3121321027 |
|
|
Sep 04 08:34:00 AM UTC 24 |
Sep 04 08:34:58 AM UTC 24 |
4116056511 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.3196465889 |
|
|
Sep 04 08:34:46 AM UTC 24 |
Sep 04 08:34:59 AM UTC 24 |
417311020 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.2708087368 |
|
|
Sep 04 08:34:54 AM UTC 24 |
Sep 04 08:34:59 AM UTC 24 |
100262471 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.577522942 |
|
|
Sep 04 08:34:58 AM UTC 24 |
Sep 04 08:35:00 AM UTC 24 |
86614133 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.3085857602 |
|
|
Sep 04 08:34:58 AM UTC 24 |
Sep 04 08:35:00 AM UTC 24 |
18155988 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.2810919255 |
|
|
Sep 04 08:34:52 AM UTC 24 |
Sep 04 08:35:01 AM UTC 24 |
2299422570 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.4023662433 |
|
|
Sep 04 08:35:00 AM UTC 24 |
Sep 04 08:35:02 AM UTC 24 |
62875200 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_rw.679278889 |
|
|
Sep 04 08:35:00 AM UTC 24 |
Sep 04 08:35:04 AM UTC 24 |
64574031 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.3547776771 |
|
|
Sep 04 08:35:01 AM UTC 24 |
Sep 04 08:35:06 AM UTC 24 |
58497993 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_intercept.930373092 |
|
|
Sep 04 08:35:01 AM UTC 24 |
Sep 04 08:35:06 AM UTC 24 |
200119300 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_upload.3291137895 |
|
|
Sep 04 08:34:48 AM UTC 24 |
Sep 04 08:35:07 AM UTC 24 |
11187561370 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.3731666534 |
|
|
Sep 04 08:34:59 AM UTC 24 |
Sep 04 08:35:08 AM UTC 24 |
1415526186 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.523092872 |
|
|
Sep 04 08:33:34 AM UTC 24 |
Sep 04 08:35:10 AM UTC 24 |
20336605671 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_cfg_cmd.3940387455 |
|
|
Sep 04 08:35:07 AM UTC 24 |
Sep 04 08:35:11 AM UTC 24 |
56722403 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/39.spi_device_mailbox.3080002439 |
|
|
Sep 04 08:34:47 AM UTC 24 |
Sep 04 08:35:13 AM UTC 24 |
2656869423 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_all.1495464482 |
|
|
Sep 04 08:34:38 AM UTC 24 |
Sep 04 08:35:13 AM UTC 24 |
6260014393 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/35.spi_device_stress_all.743792909 |
|
|
Sep 04 08:33:51 AM UTC 24 |
Sep 04 08:35:14 AM UTC 24 |
21489380993 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.2559358974 |
|
|
Sep 04 08:35:01 AM UTC 24 |
Sep 04 08:35:14 AM UTC 24 |
439330005 ps |