| T474 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_rw.3164707043 |
|
|
Sep 11 05:10:38 PM UTC 24 |
Sep 11 05:10:40 PM UTC 24 |
57093989 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.2403183647 |
|
|
Sep 11 05:10:38 PM UTC 24 |
Sep 11 05:10:40 PM UTC 24 |
15917373 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_read_buffer_direct.2874675333 |
|
|
Sep 11 05:10:24 PM UTC 24 |
Sep 11 05:10:41 PM UTC 24 |
1120409888 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_all.1576871590 |
|
|
Sep 11 05:06:42 PM UTC 24 |
Sep 11 05:10:45 PM UTC 24 |
27088683582 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_and_tpm_min_idle.1886247462 |
|
|
Sep 11 05:06:43 PM UTC 24 |
Sep 11 05:10:46 PM UTC 24 |
23563746230 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.1021906581 |
|
|
Sep 11 05:09:55 PM UTC 24 |
Sep 11 05:10:48 PM UTC 24 |
30765840656 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.834010045 |
|
|
Sep 11 05:10:42 PM UTC 24 |
Sep 11 05:10:50 PM UTC 24 |
204450546 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.3635845202 |
|
|
Sep 11 05:09:51 PM UTC 24 |
Sep 11 05:10:51 PM UTC 24 |
5590560342 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.1157343146 |
|
|
Sep 11 05:10:39 PM UTC 24 |
Sep 11 05:10:52 PM UTC 24 |
1564746352 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.3436991379 |
|
|
Sep 11 05:10:35 PM UTC 24 |
Sep 11 05:10:53 PM UTC 24 |
4622024409 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.3300118294 |
|
|
Sep 11 05:10:48 PM UTC 24 |
Sep 11 05:10:54 PM UTC 24 |
212469422 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.3937824783 |
|
|
Sep 11 05:10:41 PM UTC 24 |
Sep 11 05:10:56 PM UTC 24 |
9602096582 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.3524997458 |
|
|
Sep 11 05:10:16 PM UTC 24 |
Sep 11 05:10:56 PM UTC 24 |
3760242635 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.1045644111 |
|
|
Sep 11 05:10:21 PM UTC 24 |
Sep 11 05:10:56 PM UTC 24 |
12596149611 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.1111039512 |
|
|
Sep 11 05:10:54 PM UTC 24 |
Sep 11 05:10:56 PM UTC 24 |
15964008 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.776643702 |
|
|
Sep 11 05:10:55 PM UTC 24 |
Sep 11 05:10:58 PM UTC 24 |
92794036 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.3787901582 |
|
|
Sep 11 05:10:56 PM UTC 24 |
Sep 11 05:10:59 PM UTC 24 |
17084473 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.2006236881 |
|
|
Sep 11 05:09:26 PM UTC 24 |
Sep 11 05:11:00 PM UTC 24 |
10544335378 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.2097154487 |
|
|
Sep 11 05:10:57 PM UTC 24 |
Sep 11 05:11:00 PM UTC 24 |
93216831 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.1392105014 |
|
|
Sep 11 05:10:47 PM UTC 24 |
Sep 11 05:11:04 PM UTC 24 |
4716437119 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.323838974 |
|
|
Sep 11 05:10:37 PM UTC 24 |
Sep 11 05:11:05 PM UTC 24 |
2377000336 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.1879282507 |
|
|
Sep 11 05:10:56 PM UTC 24 |
Sep 11 05:11:07 PM UTC 24 |
13836716190 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.1473526933 |
|
|
Sep 11 05:10:59 PM UTC 24 |
Sep 11 05:11:08 PM UTC 24 |
315071242 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/1.spi_device_flash_mode_ignore_cmds.926890333 |
|
|
Sep 11 05:06:15 PM UTC 24 |
Sep 11 05:11:09 PM UTC 24 |
144355309709 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.2186639334 |
|
|
Sep 11 05:11:01 PM UTC 24 |
Sep 11 05:11:09 PM UTC 24 |
1784800766 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/11.spi_device_mailbox.3207383303 |
|
|
Sep 11 05:09:44 PM UTC 24 |
Sep 11 05:11:10 PM UTC 24 |
12318746196 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.675935612 |
|
|
Sep 11 05:10:56 PM UTC 24 |
Sep 11 05:11:37 PM UTC 24 |
116210726870 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.3038254514 |
|
|
Sep 11 05:10:41 PM UTC 24 |
Sep 11 05:11:11 PM UTC 24 |
7497324354 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.2043158131 |
|
|
Sep 11 05:11:07 PM UTC 24 |
Sep 11 05:11:11 PM UTC 24 |
106724310 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.472177348 |
|
|
Sep 11 05:10:48 PM UTC 24 |
Sep 11 05:11:12 PM UTC 24 |
2288643634 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_all.3157599532 |
|
|
Sep 11 05:09:53 PM UTC 24 |
Sep 11 05:11:13 PM UTC 24 |
17078439274 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.640523471 |
|
|
Sep 11 05:10:27 PM UTC 24 |
Sep 11 05:11:13 PM UTC 24 |
3894142349 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.1437345529 |
|
|
Sep 11 05:11:14 PM UTC 24 |
Sep 11 05:11:16 PM UTC 24 |
67858835 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.3780576846 |
|
|
Sep 11 05:11:14 PM UTC 24 |
Sep 11 05:11:16 PM UTC 24 |
15801365 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_mailbox.1100982749 |
|
|
Sep 11 05:10:19 PM UTC 24 |
Sep 11 05:11:17 PM UTC 24 |
4428659519 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.488243670 |
|
|
Sep 11 05:09:02 PM UTC 24 |
Sep 11 05:11:18 PM UTC 24 |
9885787622 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.983286316 |
|
|
Sep 11 05:11:16 PM UTC 24 |
Sep 11 05:11:18 PM UTC 24 |
16622629 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.238000892 |
|
|
Sep 11 05:10:38 PM UTC 24 |
Sep 11 05:11:18 PM UTC 24 |
7917097036 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.3218990691 |
|
|
Sep 11 05:11:18 PM UTC 24 |
Sep 11 05:11:20 PM UTC 24 |
36349690 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.2177330647 |
|
|
Sep 11 05:11:19 PM UTC 24 |
Sep 11 05:11:21 PM UTC 24 |
28120792 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.2552705838 |
|
|
Sep 11 05:11:10 PM UTC 24 |
Sep 11 05:11:22 PM UTC 24 |
2656245786 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.674149483 |
|
|
Sep 11 05:11:09 PM UTC 24 |
Sep 11 05:11:24 PM UTC 24 |
517866377 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.3470254277 |
|
|
Sep 11 05:11:06 PM UTC 24 |
Sep 11 05:11:26 PM UTC 24 |
2422461109 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.1494828609 |
|
|
Sep 11 05:11:17 PM UTC 24 |
Sep 11 05:11:27 PM UTC 24 |
4081700190 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.2013726104 |
|
|
Sep 11 05:11:22 PM UTC 24 |
Sep 11 05:11:27 PM UTC 24 |
530779674 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.716220437 |
|
|
Sep 11 05:11:25 PM UTC 24 |
Sep 11 05:11:29 PM UTC 24 |
407565648 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.999741328 |
|
|
Sep 11 05:11:22 PM UTC 24 |
Sep 11 05:11:31 PM UTC 24 |
1632612350 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.2487837974 |
|
|
Sep 11 05:11:19 PM UTC 24 |
Sep 11 05:11:31 PM UTC 24 |
4194377646 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.2740910675 |
|
|
Sep 11 05:11:17 PM UTC 24 |
Sep 11 05:11:31 PM UTC 24 |
983052932 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.93131934 |
|
|
Sep 11 05:10:06 PM UTC 24 |
Sep 11 05:11:31 PM UTC 24 |
186753902828 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.2587838927 |
|
|
Sep 11 05:11:00 PM UTC 24 |
Sep 11 05:11:32 PM UTC 24 |
36773067032 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.3460336518 |
|
|
Sep 11 05:11:28 PM UTC 24 |
Sep 11 05:11:33 PM UTC 24 |
160958650 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.2639611006 |
|
|
Sep 11 05:11:21 PM UTC 24 |
Sep 11 05:11:33 PM UTC 24 |
2129832961 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/12.spi_device_stress_all.2839179921 |
|
|
Sep 11 05:10:12 PM UTC 24 |
Sep 11 05:11:33 PM UTC 24 |
130565406971 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.91657659 |
|
|
Sep 11 05:11:32 PM UTC 24 |
Sep 11 05:11:34 PM UTC 24 |
33118091 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.3720281844 |
|
|
Sep 11 05:10:41 PM UTC 24 |
Sep 11 05:11:34 PM UTC 24 |
4078240281 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.1076999746 |
|
|
Sep 11 05:11:33 PM UTC 24 |
Sep 11 05:11:35 PM UTC 24 |
16570270 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.2793241370 |
|
|
Sep 11 05:10:23 PM UTC 24 |
Sep 11 05:11:36 PM UTC 24 |
14162808083 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.1210104498 |
|
|
Sep 11 05:11:33 PM UTC 24 |
Sep 11 05:11:36 PM UTC 24 |
28463766 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.779695706 |
|
|
Sep 11 05:11:36 PM UTC 24 |
Sep 11 05:11:38 PM UTC 24 |
26853453 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.1694762195 |
|
|
Sep 11 05:11:36 PM UTC 24 |
Sep 11 05:11:38 PM UTC 24 |
208664845 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.2940114692 |
|
|
Sep 11 05:11:02 PM UTC 24 |
Sep 11 05:11:40 PM UTC 24 |
3649320095 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.2884635035 |
|
|
Sep 11 05:11:37 PM UTC 24 |
Sep 11 05:11:41 PM UTC 24 |
436747938 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.1019624601 |
|
|
Sep 11 05:11:38 PM UTC 24 |
Sep 11 05:11:43 PM UTC 24 |
354581629 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.985252444 |
|
|
Sep 11 05:11:19 PM UTC 24 |
Sep 11 05:11:43 PM UTC 24 |
3495993225 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.3673371269 |
|
|
Sep 11 05:11:40 PM UTC 24 |
Sep 11 05:11:44 PM UTC 24 |
31360320 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.1498759625 |
|
|
Sep 11 05:11:40 PM UTC 24 |
Sep 11 05:11:44 PM UTC 24 |
40674058 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_and_tpm.2725144311 |
|
|
Sep 11 05:06:43 PM UTC 24 |
Sep 11 05:11:44 PM UTC 24 |
31262423891 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.3885398794 |
|
|
Sep 11 05:11:05 PM UTC 24 |
Sep 11 05:11:46 PM UTC 24 |
12535237514 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_all.162450663 |
|
|
Sep 11 05:09:24 PM UTC 24 |
Sep 11 05:11:47 PM UTC 24 |
18536908811 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.2930317418 |
|
|
Sep 11 05:11:46 PM UTC 24 |
Sep 11 05:11:48 PM UTC 24 |
10933932 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.199506828 |
|
|
Sep 11 05:11:47 PM UTC 24 |
Sep 11 05:11:49 PM UTC 24 |
29292890 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.1695279509 |
|
|
Sep 11 05:11:42 PM UTC 24 |
Sep 11 05:11:49 PM UTC 24 |
417857093 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.501425215 |
|
|
Sep 11 05:11:27 PM UTC 24 |
Sep 11 05:11:50 PM UTC 24 |
2133290435 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.2836264474 |
|
|
Sep 11 05:09:06 PM UTC 24 |
Sep 11 05:11:50 PM UTC 24 |
16831633147 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.3467329070 |
|
|
Sep 11 05:11:48 PM UTC 24 |
Sep 11 05:11:50 PM UTC 24 |
45950031 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/9.spi_device_stress_all.3885812370 |
|
|
Sep 11 05:09:07 PM UTC 24 |
Sep 11 05:11:52 PM UTC 24 |
30825557984 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.131735846 |
|
|
Sep 11 05:11:50 PM UTC 24 |
Sep 11 05:11:52 PM UTC 24 |
44259903 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2943772410 |
|
|
Sep 11 05:11:49 PM UTC 24 |
Sep 11 05:11:57 PM UTC 24 |
3887681222 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.1855286913 |
|
|
Sep 11 05:11:40 PM UTC 24 |
Sep 11 05:11:57 PM UTC 24 |
491748831 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.3866658055 |
|
|
Sep 11 05:11:37 PM UTC 24 |
Sep 11 05:11:58 PM UTC 24 |
8476603150 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.4029553171 |
|
|
Sep 11 05:11:51 PM UTC 24 |
Sep 11 05:11:58 PM UTC 24 |
356657622 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.2404148677 |
|
|
Sep 11 05:11:53 PM UTC 24 |
Sep 11 05:12:00 PM UTC 24 |
180538548 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.1633427852 |
|
|
Sep 11 05:11:51 PM UTC 24 |
Sep 11 05:12:00 PM UTC 24 |
1337495213 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.2271123296 |
|
|
Sep 11 05:11:51 PM UTC 24 |
Sep 11 05:12:01 PM UTC 24 |
340915438 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.2962806414 |
|
|
Sep 11 05:11:32 PM UTC 24 |
Sep 11 05:12:01 PM UTC 24 |
7921380646 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.3575652373 |
|
|
Sep 11 05:09:05 PM UTC 24 |
Sep 11 05:12:01 PM UTC 24 |
14756651633 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/2.spi_device_flash_and_tpm_min_idle.837996989 |
|
|
Sep 11 05:06:25 PM UTC 24 |
Sep 11 05:12:03 PM UTC 24 |
34268118451 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.2962547035 |
|
|
Sep 11 05:11:33 PM UTC 24 |
Sep 11 05:12:05 PM UTC 24 |
58407673764 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.2321357441 |
|
|
Sep 11 05:11:58 PM UTC 24 |
Sep 11 05:12:05 PM UTC 24 |
1019094602 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.4060172901 |
|
|
Sep 11 05:11:34 PM UTC 24 |
Sep 11 05:12:06 PM UTC 24 |
18679309646 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.1997231169 |
|
|
Sep 11 05:11:53 PM UTC 24 |
Sep 11 05:12:49 PM UTC 24 |
19351873349 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.2695969682 |
|
|
Sep 11 05:12:01 PM UTC 24 |
Sep 11 05:12:06 PM UTC 24 |
125624557 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.2491645400 |
|
|
Sep 11 05:12:04 PM UTC 24 |
Sep 11 05:12:07 PM UTC 24 |
46042621 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.2016701883 |
|
|
Sep 11 05:11:30 PM UTC 24 |
Sep 11 05:12:07 PM UTC 24 |
34454725097 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.2114402730 |
|
|
Sep 11 05:12:05 PM UTC 24 |
Sep 11 05:12:08 PM UTC 24 |
14247373 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.2203639013 |
|
|
Sep 11 05:12:06 PM UTC 24 |
Sep 11 05:12:09 PM UTC 24 |
79218545 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.2231213699 |
|
|
Sep 11 05:12:06 PM UTC 24 |
Sep 11 05:12:09 PM UTC 24 |
146444023 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.2776516740 |
|
|
Sep 11 05:12:08 PM UTC 24 |
Sep 11 05:12:10 PM UTC 24 |
357670818 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.3693274452 |
|
|
Sep 11 05:11:58 PM UTC 24 |
Sep 11 05:12:10 PM UTC 24 |
23986820517 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.286997123 |
|
|
Sep 11 05:12:10 PM UTC 24 |
Sep 11 05:12:14 PM UTC 24 |
31953817 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.3215639917 |
|
|
Sep 11 05:12:11 PM UTC 24 |
Sep 11 05:12:15 PM UTC 24 |
30734462 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/3.spi_device_stress_all.781099209 |
|
|
Sep 11 05:06:45 PM UTC 24 |
Sep 11 05:12:15 PM UTC 24 |
42804158128 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.1788787775 |
|
|
Sep 11 05:12:08 PM UTC 24 |
Sep 11 05:12:15 PM UTC 24 |
157936659 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.1786959209 |
|
|
Sep 11 05:11:37 PM UTC 24 |
Sep 11 05:12:16 PM UTC 24 |
46894927711 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.1853483270 |
|
|
Sep 11 05:10:08 PM UTC 24 |
Sep 11 05:12:17 PM UTC 24 |
14164043619 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.3956399083 |
|
|
Sep 11 05:11:41 PM UTC 24 |
Sep 11 05:12:19 PM UTC 24 |
7499080224 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.4260289983 |
|
|
Sep 11 05:12:10 PM UTC 24 |
Sep 11 05:12:19 PM UTC 24 |
15369134863 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.891736955 |
|
|
Sep 11 05:12:15 PM UTC 24 |
Sep 11 05:12:19 PM UTC 24 |
58312224 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.31184663 |
|
|
Sep 11 05:11:28 PM UTC 24 |
Sep 11 05:12:20 PM UTC 24 |
88731351206 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2139266195 |
|
|
Sep 11 05:12:02 PM UTC 24 |
Sep 11 05:12:20 PM UTC 24 |
997852275 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.174929812 |
|
|
Sep 11 05:12:16 PM UTC 24 |
Sep 11 05:12:22 PM UTC 24 |
123234489 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.1000000416 |
|
|
Sep 11 05:12:21 PM UTC 24 |
Sep 11 05:12:23 PM UTC 24 |
58205279 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.3635102748 |
|
|
Sep 11 05:12:21 PM UTC 24 |
Sep 11 05:12:23 PM UTC 24 |
15088499 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.712788193 |
|
|
Sep 11 05:11:10 PM UTC 24 |
Sep 11 05:12:25 PM UTC 24 |
28954670531 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.4179158289 |
|
|
Sep 11 05:12:24 PM UTC 24 |
Sep 11 05:12:26 PM UTC 24 |
37977000 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.2077002606 |
|
|
Sep 11 05:12:11 PM UTC 24 |
Sep 11 05:12:27 PM UTC 24 |
4352789418 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.3778494398 |
|
|
Sep 11 05:12:23 PM UTC 24 |
Sep 11 05:12:27 PM UTC 24 |
578350245 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.423812227 |
|
|
Sep 11 05:12:24 PM UTC 24 |
Sep 11 05:12:31 PM UTC 24 |
85958002 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.2750311195 |
|
|
Sep 11 05:11:59 PM UTC 24 |
Sep 11 05:12:31 PM UTC 24 |
6347681454 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.2801349273 |
|
|
Sep 11 05:12:27 PM UTC 24 |
Sep 11 05:12:33 PM UTC 24 |
450854142 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.3168655977 |
|
|
Sep 11 05:12:27 PM UTC 24 |
Sep 11 05:12:35 PM UTC 24 |
1483640595 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.3894869388 |
|
|
Sep 11 05:12:16 PM UTC 24 |
Sep 11 05:12:35 PM UTC 24 |
1540569982 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.3392005682 |
|
|
Sep 11 05:12:08 PM UTC 24 |
Sep 11 05:12:36 PM UTC 24 |
8089963187 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.3439709963 |
|
|
Sep 11 05:11:50 PM UTC 24 |
Sep 11 05:12:36 PM UTC 24 |
3772395159 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.2905310653 |
|
|
Sep 11 05:12:33 PM UTC 24 |
Sep 11 05:12:37 PM UTC 24 |
1443394627 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.789251819 |
|
|
Sep 11 05:12:29 PM UTC 24 |
Sep 11 05:12:37 PM UTC 24 |
3305408291 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.51253371 |
|
|
Sep 11 05:12:21 PM UTC 24 |
Sep 11 05:12:39 PM UTC 24 |
16127364667 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm_min_idle.2904105806 |
|
|
Sep 11 05:07:40 PM UTC 24 |
Sep 11 05:12:42 PM UTC 24 |
31882660581 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.4021034642 |
|
|
Sep 11 05:12:40 PM UTC 24 |
Sep 11 05:12:42 PM UTC 24 |
47375578 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.3416966232 |
|
|
Sep 11 05:12:36 PM UTC 24 |
Sep 11 05:12:45 PM UTC 24 |
1416969926 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.3820202623 |
|
|
Sep 11 05:12:34 PM UTC 24 |
Sep 11 05:12:45 PM UTC 24 |
1023731234 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.98411988 |
|
|
Sep 11 05:12:43 PM UTC 24 |
Sep 11 05:12:45 PM UTC 24 |
15656580 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.3637695552 |
|
|
Sep 11 05:12:25 PM UTC 24 |
Sep 11 05:12:46 PM UTC 24 |
29185920034 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2408274197 |
|
|
Sep 11 05:12:43 PM UTC 24 |
Sep 11 05:12:47 PM UTC 24 |
704596374 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.874542028 |
|
|
Sep 11 05:12:45 PM UTC 24 |
Sep 11 05:12:48 PM UTC 24 |
15005155 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.1714076226 |
|
|
Sep 11 05:12:47 PM UTC 24 |
Sep 11 05:12:49 PM UTC 24 |
37668362 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.1303916316 |
|
|
Sep 11 05:12:47 PM UTC 24 |
Sep 11 05:12:50 PM UTC 24 |
259141261 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3250481842 |
|
|
Sep 11 05:12:48 PM UTC 24 |
Sep 11 05:12:52 PM UTC 24 |
1007491747 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.2328315540 |
|
|
Sep 11 05:12:32 PM UTC 24 |
Sep 11 05:12:53 PM UTC 24 |
1296799494 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.1268059566 |
|
|
Sep 11 05:11:59 PM UTC 24 |
Sep 11 05:12:54 PM UTC 24 |
7504951292 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.2483977156 |
|
|
Sep 11 05:12:50 PM UTC 24 |
Sep 11 05:12:57 PM UTC 24 |
1255422568 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.1386659487 |
|
|
Sep 11 05:12:50 PM UTC 24 |
Sep 11 05:12:59 PM UTC 24 |
1336795304 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.3757571424 |
|
|
Sep 11 05:12:54 PM UTC 24 |
Sep 11 05:13:01 PM UTC 24 |
1469338068 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.4212673094 |
|
|
Sep 11 05:12:50 PM UTC 24 |
Sep 11 05:13:02 PM UTC 24 |
258393823 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.2234017703 |
|
|
Sep 11 05:12:48 PM UTC 24 |
Sep 11 05:13:02 PM UTC 24 |
1493887208 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.184040802 |
|
|
Sep 11 05:13:03 PM UTC 24 |
Sep 11 05:13:05 PM UTC 24 |
36970129 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.1624592226 |
|
|
Sep 11 05:13:03 PM UTC 24 |
Sep 11 05:13:05 PM UTC 24 |
11876240 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.4084398233 |
|
|
Sep 11 05:11:11 PM UTC 24 |
Sep 11 05:13:06 PM UTC 24 |
15893026429 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.2278525730 |
|
|
Sep 11 05:13:06 PM UTC 24 |
Sep 11 05:13:08 PM UTC 24 |
251302450 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.2881779320 |
|
|
Sep 11 05:12:01 PM UTC 24 |
Sep 11 05:13:08 PM UTC 24 |
7651170498 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.2322027531 |
|
|
Sep 11 05:13:07 PM UTC 24 |
Sep 11 05:13:09 PM UTC 24 |
11355795 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.3925409068 |
|
|
Sep 11 05:13:09 PM UTC 24 |
Sep 11 05:13:12 PM UTC 24 |
375150236 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.4230559084 |
|
|
Sep 11 05:12:49 PM UTC 24 |
Sep 11 05:13:13 PM UTC 24 |
13580307195 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.3098602410 |
|
|
Sep 11 05:12:37 PM UTC 24 |
Sep 11 05:13:17 PM UTC 24 |
6879754060 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.2707442380 |
|
|
Sep 11 05:13:18 PM UTC 24 |
Sep 11 05:13:22 PM UTC 24 |
33363975 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.629867209 |
|
|
Sep 11 05:13:10 PM UTC 24 |
Sep 11 05:13:26 PM UTC 24 |
13848681059 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.1984433525 |
|
|
Sep 11 05:12:54 PM UTC 24 |
Sep 11 05:13:27 PM UTC 24 |
9335255889 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.1220024357 |
|
|
Sep 11 05:13:10 PM UTC 24 |
Sep 11 05:13:27 PM UTC 24 |
3043330669 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.3698655481 |
|
|
Sep 11 05:12:02 PM UTC 24 |
Sep 11 05:13:29 PM UTC 24 |
34356791906 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.235689924 |
|
|
Sep 11 05:13:23 PM UTC 24 |
Sep 11 05:13:29 PM UTC 24 |
102337121 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.1817556105 |
|
|
Sep 11 05:12:09 PM UTC 24 |
Sep 11 05:13:30 PM UTC 24 |
33302861347 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.712710238 |
|
|
Sep 11 05:11:44 PM UTC 24 |
Sep 11 05:13:33 PM UTC 24 |
8657769230 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.2188111188 |
|
|
Sep 11 05:13:10 PM UTC 24 |
Sep 11 05:13:35 PM UTC 24 |
5885440091 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.3847212719 |
|
|
Sep 11 05:13:34 PM UTC 24 |
Sep 11 05:13:36 PM UTC 24 |
14186968 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.1444608735 |
|
|
Sep 11 05:13:14 PM UTC 24 |
Sep 11 05:13:36 PM UTC 24 |
17915783031 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.3169461858 |
|
|
Sep 11 05:13:28 PM UTC 24 |
Sep 11 05:13:37 PM UTC 24 |
3439424961 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.637690144 |
|
|
Sep 11 05:13:13 PM UTC 24 |
Sep 11 05:13:38 PM UTC 24 |
2440621271 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.738402938 |
|
|
Sep 11 05:13:36 PM UTC 24 |
Sep 11 05:13:38 PM UTC 24 |
63394160 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.4133126003 |
|
|
Sep 11 05:12:38 PM UTC 24 |
Sep 11 05:13:38 PM UTC 24 |
8114361363 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.1242228082 |
|
|
Sep 11 05:12:52 PM UTC 24 |
Sep 11 05:13:39 PM UTC 24 |
3684309198 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.1164935203 |
|
|
Sep 11 05:13:38 PM UTC 24 |
Sep 11 05:13:40 PM UTC 24 |
157293025 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.902403831 |
|
|
Sep 11 05:11:32 PM UTC 24 |
Sep 11 05:13:40 PM UTC 24 |
53252757812 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.4256668917 |
|
|
Sep 11 05:13:39 PM UTC 24 |
Sep 11 05:13:41 PM UTC 24 |
13017299 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.3778780810 |
|
|
Sep 11 05:09:55 PM UTC 24 |
Sep 11 05:13:41 PM UTC 24 |
23969865950 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.969682797 |
|
|
Sep 11 05:13:39 PM UTC 24 |
Sep 11 05:13:43 PM UTC 24 |
33224287 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.441758379 |
|
|
Sep 11 05:13:06 PM UTC 24 |
Sep 11 05:13:43 PM UTC 24 |
25540278818 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.750244653 |
|
|
Sep 11 05:13:39 PM UTC 24 |
Sep 11 05:13:43 PM UTC 24 |
239144776 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.3316083357 |
|
|
Sep 11 05:13:26 PM UTC 24 |
Sep 11 05:13:45 PM UTC 24 |
1775403039 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.861092350 |
|
|
Sep 11 05:13:43 PM UTC 24 |
Sep 11 05:13:47 PM UTC 24 |
1001588027 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.1277430352 |
|
|
Sep 11 05:11:13 PM UTC 24 |
Sep 11 05:13:48 PM UTC 24 |
12842626065 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.738023863 |
|
|
Sep 11 05:12:56 PM UTC 24 |
Sep 11 05:13:48 PM UTC 24 |
6207607884 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.1017708326 |
|
|
Sep 11 05:13:48 PM UTC 24 |
Sep 11 05:13:50 PM UTC 24 |
43852508 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_stress_all.3001731627 |
|
|
Sep 11 05:13:48 PM UTC 24 |
Sep 11 05:13:50 PM UTC 24 |
91039957 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.3842720854 |
|
|
Sep 11 05:13:49 PM UTC 24 |
Sep 11 05:13:51 PM UTC 24 |
14074522 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.4080491678 |
|
|
Sep 11 05:12:16 PM UTC 24 |
Sep 11 05:13:52 PM UTC 24 |
16978674676 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.4072650601 |
|
|
Sep 11 05:13:41 PM UTC 24 |
Sep 11 05:13:52 PM UTC 24 |
381607557 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.3908885426 |
|
|
Sep 11 05:13:44 PM UTC 24 |
Sep 11 05:13:53 PM UTC 24 |
1073551074 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.3223007959 |
|
|
Sep 11 05:11:45 PM UTC 24 |
Sep 11 05:13:53 PM UTC 24 |
12246312566 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.1785491834 |
|
|
Sep 11 05:10:26 PM UTC 24 |
Sep 11 05:13:53 PM UTC 24 |
30969427656 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.1871487735 |
|
|
Sep 11 05:13:41 PM UTC 24 |
Sep 11 05:13:54 PM UTC 24 |
1279450173 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.1360780577 |
|
|
Sep 11 05:13:52 PM UTC 24 |
Sep 11 05:13:55 PM UTC 24 |
18430458 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.3601887234 |
|
|
Sep 11 05:13:51 PM UTC 24 |
Sep 11 05:13:55 PM UTC 24 |
182494830 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.4204877178 |
|
|
Sep 11 05:13:52 PM UTC 24 |
Sep 11 05:13:55 PM UTC 24 |
38101590 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_and_tpm.3749543698 |
|
|
Sep 11 05:07:06 PM UTC 24 |
Sep 11 05:13:59 PM UTC 24 |
35976365298 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.28404581 |
|
|
Sep 11 05:13:54 PM UTC 24 |
Sep 11 05:13:59 PM UTC 24 |
985102275 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.3523276797 |
|
|
Sep 11 05:13:54 PM UTC 24 |
Sep 11 05:14:01 PM UTC 24 |
192310486 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.2446611060 |
|
|
Sep 11 05:13:56 PM UTC 24 |
Sep 11 05:14:02 PM UTC 24 |
208650140 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_mode_ignore_cmds.3133814274 |
|
|
Sep 11 05:07:39 PM UTC 24 |
Sep 11 05:14:02 PM UTC 24 |
50282734224 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.4228881651 |
|
|
Sep 11 05:12:38 PM UTC 24 |
Sep 11 05:14:03 PM UTC 24 |
6275484875 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.1378648120 |
|
|
Sep 11 05:10:10 PM UTC 24 |
Sep 11 05:14:05 PM UTC 24 |
27032753867 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.3797012455 |
|
|
Sep 11 05:13:39 PM UTC 24 |
Sep 11 05:14:05 PM UTC 24 |
8331769197 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.4044394579 |
|
|
Sep 11 05:13:38 PM UTC 24 |
Sep 11 05:14:05 PM UTC 24 |
1512702592 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.1081926940 |
|
|
Sep 11 05:13:51 PM UTC 24 |
Sep 11 05:14:21 PM UTC 24 |
1598654341 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.2331244930 |
|
|
Sep 11 05:14:04 PM UTC 24 |
Sep 11 05:14:05 PM UTC 24 |
19508830 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.1667625845 |
|
|
Sep 11 05:13:43 PM UTC 24 |
Sep 11 05:14:06 PM UTC 24 |
2468467932 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.3533490311 |
|
|
Sep 11 05:14:06 PM UTC 24 |
Sep 11 05:14:08 PM UTC 24 |
32839348 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.3305668510 |
|
|
Sep 11 05:13:37 PM UTC 24 |
Sep 11 05:14:08 PM UTC 24 |
160373652299 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.409088932 |
|
|
Sep 11 05:14:06 PM UTC 24 |
Sep 11 05:14:08 PM UTC 24 |
179607397 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.1422163232 |
|
|
Sep 11 05:14:00 PM UTC 24 |
Sep 11 05:14:13 PM UTC 24 |
978542604 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.11772001 |
|
|
Sep 11 05:14:07 PM UTC 24 |
Sep 11 05:14:13 PM UTC 24 |
183040976 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.683334443 |
|
|
Sep 11 05:14:06 PM UTC 24 |
Sep 11 05:14:16 PM UTC 24 |
4527677854 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.2900719540 |
|
|
Sep 11 05:14:06 PM UTC 24 |
Sep 11 05:14:17 PM UTC 24 |
10759378811 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.1426260879 |
|
|
Sep 11 05:14:09 PM UTC 24 |
Sep 11 05:14:21 PM UTC 24 |
3363945627 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.4278319930 |
|
|
Sep 11 05:14:17 PM UTC 24 |
Sep 11 05:14:21 PM UTC 24 |
55741103 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.2943879452 |
|
|
Sep 11 05:14:14 PM UTC 24 |
Sep 11 05:14:22 PM UTC 24 |
772780830 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.4224419362 |
|
|
Sep 11 05:13:53 PM UTC 24 |
Sep 11 05:14:23 PM UTC 24 |
33410103770 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.1091093378 |
|
|
Sep 11 05:14:17 PM UTC 24 |
Sep 11 05:14:23 PM UTC 24 |
153895040 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.3216655501 |
|
|
Sep 11 05:14:09 PM UTC 24 |
Sep 11 05:14:23 PM UTC 24 |
4215583222 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.3864609123 |
|
|
Sep 11 05:13:43 PM UTC 24 |
Sep 11 05:14:24 PM UTC 24 |
2746129259 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.2972452140 |
|
|
Sep 11 05:14:24 PM UTC 24 |
Sep 11 05:14:26 PM UTC 24 |
38937994 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.1462685019 |
|
|
Sep 11 05:13:55 PM UTC 24 |
Sep 11 05:14:27 PM UTC 24 |
6220884482 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.2900528501 |
|
|
Sep 11 05:14:25 PM UTC 24 |
Sep 11 05:14:27 PM UTC 24 |
15736090 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3691032884 |
|
|
Sep 11 05:14:09 PM UTC 24 |
Sep 11 05:14:28 PM UTC 24 |
14199265433 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.3502759399 |
|
|
Sep 11 05:13:55 PM UTC 24 |
Sep 11 05:14:28 PM UTC 24 |
4557034326 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.3234336728 |
|
|
Sep 11 05:14:28 PM UTC 24 |
Sep 11 05:14:31 PM UTC 24 |
159292748 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.528478486 |
|
|
Sep 11 05:14:29 PM UTC 24 |
Sep 11 05:14:32 PM UTC 24 |
104292924 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.682236187 |
|
|
Sep 11 05:14:22 PM UTC 24 |
Sep 11 05:14:36 PM UTC 24 |
1267763196 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.2669789930 |
|
|
Sep 11 05:14:31 PM UTC 24 |
Sep 11 05:14:39 PM UTC 24 |
297880441 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_and_tpm_min_idle.276325281 |
|
|
Sep 11 05:08:05 PM UTC 24 |
Sep 11 05:14:41 PM UTC 24 |
135740179130 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.3620310394 |
|
|
Sep 11 05:10:52 PM UTC 24 |
Sep 11 05:14:42 PM UTC 24 |
82460656083 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.364676000 |
|
|
Sep 11 05:13:28 PM UTC 24 |
Sep 11 05:14:43 PM UTC 24 |
17616712096 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.2459193768 |
|
|
Sep 11 05:11:13 PM UTC 24 |
Sep 11 05:14:43 PM UTC 24 |
38830500141 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/5.spi_device_stress_all.3786796534 |
|
|
Sep 11 05:07:25 PM UTC 24 |
Sep 11 05:14:43 PM UTC 24 |
49763370650 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.386997870 |
|
|
Sep 11 05:12:02 PM UTC 24 |
Sep 11 05:14:45 PM UTC 24 |
219337439904 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.1390799482 |
|
|
Sep 11 05:13:44 PM UTC 24 |
Sep 11 05:14:46 PM UTC 24 |
3046493115 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.2905180398 |
|
|
Sep 11 05:09:56 PM UTC 24 |
Sep 11 05:14:46 PM UTC 24 |
101270911060 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.529178716 |
|
|
Sep 11 05:14:42 PM UTC 24 |
Sep 11 05:14:47 PM UTC 24 |
312535828 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.452455405 |
|
|
Sep 11 05:12:20 PM UTC 24 |
Sep 11 05:14:48 PM UTC 24 |
5006164913 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3402467984 |
|
|
Sep 11 05:14:44 PM UTC 24 |
Sep 11 05:14:49 PM UTC 24 |
299349337 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.1671798442 |
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|
Sep 11 05:14:02 PM UTC 24 |
Sep 11 05:14:50 PM UTC 24 |
5447478547 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.451089575 |
|
|
Sep 11 05:14:29 PM UTC 24 |
Sep 11 05:14:50 PM UTC 24 |
25374970829 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.2368417012 |
|
|
Sep 11 05:14:48 PM UTC 24 |
Sep 11 05:14:51 PM UTC 24 |
21575742 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.3656186754 |
|
|
Sep 11 05:14:48 PM UTC 24 |
Sep 11 05:14:51 PM UTC 24 |
17382599 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.3033972621 |
|
|
Sep 11 05:14:49 PM UTC 24 |
Sep 11 05:14:52 PM UTC 24 |
11022931 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.168884488 |
|
|
Sep 11 05:14:32 PM UTC 24 |
Sep 11 05:14:52 PM UTC 24 |
1361727593 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.1428448445 |
|
|
Sep 11 05:14:28 PM UTC 24 |
Sep 11 05:14:52 PM UTC 24 |
5204376254 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.3828919870 |
|
|
Sep 11 05:14:27 PM UTC 24 |
Sep 11 05:14:53 PM UTC 24 |
5362526192 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.1889676708 |
|
|
Sep 11 05:14:51 PM UTC 24 |
Sep 11 05:14:53 PM UTC 24 |
21615038 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.1660721477 |
|
|
Sep 11 05:14:43 PM UTC 24 |
Sep 11 05:14:55 PM UTC 24 |
272240177 ps |