| T296 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_pass_cmd_filtering.1719117684 |
|
|
Sep 24 02:18:34 PM UTC 24 |
Sep 24 02:18:58 PM UTC 24 |
29172575186 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.2305903375 |
|
|
Sep 24 02:16:26 PM UTC 24 |
Sep 24 02:18:58 PM UTC 24 |
17631414775 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_intercept.4253823240 |
|
|
Sep 24 02:18:43 PM UTC 24 |
Sep 24 02:18:59 PM UTC 24 |
3388338138 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_upload.2131007606 |
|
|
Sep 24 02:18:49 PM UTC 24 |
Sep 24 02:19:05 PM UTC 24 |
3257094968 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_mailbox.2192740578 |
|
|
Sep 24 02:18:44 PM UTC 24 |
Sep 24 02:19:09 PM UTC 24 |
2128744793 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_read_buffer_direct.3243948276 |
|
|
Sep 24 02:18:55 PM UTC 24 |
Sep 24 02:19:10 PM UTC 24 |
10091148394 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_alert_test.2174770892 |
|
|
Sep 24 02:19:10 PM UTC 24 |
Sep 24 02:19:12 PM UTC 24 |
63555885 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_csb_read.1686083853 |
|
|
Sep 24 02:19:11 PM UTC 24 |
Sep 24 02:19:13 PM UTC 24 |
26800537 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.1962374624 |
|
|
Sep 24 02:18:51 PM UTC 24 |
Sep 24 02:19:14 PM UTC 24 |
2611022785 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mem_parity.3544333081 |
|
|
Sep 24 02:19:13 PM UTC 24 |
Sep 24 02:19:16 PM UTC 24 |
106964856 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.1664765248 |
|
|
Sep 24 02:19:16 PM UTC 24 |
Sep 24 02:19:19 PM UTC 24 |
272659630 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.1809721923 |
|
|
Sep 24 02:18:06 PM UTC 24 |
Sep 24 02:19:20 PM UTC 24 |
3232533410 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.1582698690 |
|
|
Sep 24 02:18:52 PM UTC 24 |
Sep 24 02:19:21 PM UTC 24 |
7974453740 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.3202588321 |
|
|
Sep 24 02:20:18 PM UTC 24 |
Sep 24 02:20:28 PM UTC 24 |
380262698 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_rw.2101032039 |
|
|
Sep 24 02:19:19 PM UTC 24 |
Sep 24 02:19:24 PM UTC 24 |
2560720559 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.3339998492 |
|
|
Sep 24 02:19:14 PM UTC 24 |
Sep 24 02:19:25 PM UTC 24 |
1166791077 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.3112095313 |
|
|
Sep 24 02:18:24 PM UTC 24 |
Sep 24 02:19:29 PM UTC 24 |
51895581108 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.2294331710 |
|
|
Sep 24 02:19:30 PM UTC 24 |
Sep 24 02:19:35 PM UTC 24 |
82464718 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.240046548 |
|
|
Sep 24 02:19:26 PM UTC 24 |
Sep 24 02:19:36 PM UTC 24 |
1085430293 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.3563045572 |
|
|
Sep 24 02:16:53 PM UTC 24 |
Sep 24 02:19:39 PM UTC 24 |
11449127768 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.34036158 |
|
|
Sep 24 02:19:23 PM UTC 24 |
Sep 24 02:19:39 PM UTC 24 |
3470494697 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.2384335969 |
|
|
Sep 24 02:19:27 PM UTC 24 |
Sep 24 02:19:41 PM UTC 24 |
1040557680 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_all.771238255 |
|
|
Sep 24 02:17:24 PM UTC 24 |
Sep 24 02:19:43 PM UTC 24 |
16016077750 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.4165418681 |
|
|
Sep 24 02:17:31 PM UTC 24 |
Sep 24 02:19:45 PM UTC 24 |
4712784210 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.3393604066 |
|
|
Sep 24 02:19:44 PM UTC 24 |
Sep 24 02:19:46 PM UTC 24 |
55636121 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.475905791 |
|
|
Sep 24 02:19:32 PM UTC 24 |
Sep 24 02:19:47 PM UTC 24 |
701391931 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.2661909018 |
|
|
Sep 24 02:19:46 PM UTC 24 |
Sep 24 02:19:48 PM UTC 24 |
14713882 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.841673825 |
|
|
Sep 24 02:19:47 PM UTC 24 |
Sep 24 02:19:49 PM UTC 24 |
85376662 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.3972666111 |
|
|
Sep 24 02:19:48 PM UTC 24 |
Sep 24 02:19:51 PM UTC 24 |
16210436 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.795553633 |
|
|
Sep 24 02:19:51 PM UTC 24 |
Sep 24 02:19:53 PM UTC 24 |
29318542 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.1420684248 |
|
|
Sep 24 02:19:26 PM UTC 24 |
Sep 24 02:19:54 PM UTC 24 |
2536033955 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.1992919696 |
|
|
Sep 24 02:19:52 PM UTC 24 |
Sep 24 02:19:55 PM UTC 24 |
1092117652 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.1398659436 |
|
|
Sep 24 02:19:48 PM UTC 24 |
Sep 24 02:19:56 PM UTC 24 |
10767560853 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.4146727832 |
|
|
Sep 24 02:19:53 PM UTC 24 |
Sep 24 02:19:56 PM UTC 24 |
95963396 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_mode_ignore_cmds.1881113349 |
|
|
Sep 24 02:14:20 PM UTC 24 |
Sep 24 02:19:58 PM UTC 24 |
53537153727 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.2762970547 |
|
|
Sep 24 02:19:37 PM UTC 24 |
Sep 24 02:19:58 PM UTC 24 |
1286343539 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.1385359493 |
|
|
Sep 24 02:19:21 PM UTC 24 |
Sep 24 02:19:58 PM UTC 24 |
33100209087 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.3722124630 |
|
|
Sep 24 02:19:49 PM UTC 24 |
Sep 24 02:19:59 PM UTC 24 |
676262884 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.1395198311 |
|
|
Sep 24 02:19:54 PM UTC 24 |
Sep 24 02:19:59 PM UTC 24 |
172150609 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.1348555190 |
|
|
Sep 24 02:19:00 PM UTC 24 |
Sep 24 02:19:59 PM UTC 24 |
8160762765 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.2655885220 |
|
|
Sep 24 02:19:57 PM UTC 24 |
Sep 24 02:20:02 PM UTC 24 |
45605938 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_all.761481336 |
|
|
Sep 24 02:16:48 PM UTC 24 |
Sep 24 02:20:02 PM UTC 24 |
353438380207 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3371191007 |
|
|
Sep 24 02:19:54 PM UTC 24 |
Sep 24 02:20:05 PM UTC 24 |
6054797244 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.3406333869 |
|
|
Sep 24 02:20:03 PM UTC 24 |
Sep 24 02:20:05 PM UTC 24 |
18065363 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.317341245 |
|
|
Sep 24 02:20:06 PM UTC 24 |
Sep 24 02:20:08 PM UTC 24 |
37573276 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.679099143 |
|
|
Sep 24 02:20:06 PM UTC 24 |
Sep 24 02:20:09 PM UTC 24 |
45750596 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.521686861 |
|
|
Sep 24 02:19:58 PM UTC 24 |
Sep 24 02:20:12 PM UTC 24 |
1492981031 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.190108556 |
|
|
Sep 24 02:20:00 PM UTC 24 |
Sep 24 02:20:12 PM UTC 24 |
1023422807 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.2473121306 |
|
|
Sep 24 02:19:57 PM UTC 24 |
Sep 24 02:20:14 PM UTC 24 |
4641591150 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.378714203 |
|
|
Sep 24 02:20:13 PM UTC 24 |
Sep 24 02:20:16 PM UTC 24 |
136569310 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.3097490888 |
|
|
Sep 24 02:19:00 PM UTC 24 |
Sep 24 02:20:16 PM UTC 24 |
12248992431 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.1494280808 |
|
|
Sep 24 02:19:15 PM UTC 24 |
Sep 24 02:20:17 PM UTC 24 |
7059883686 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.570438076 |
|
|
Sep 24 02:20:13 PM UTC 24 |
Sep 24 02:20:17 PM UTC 24 |
470985389 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_and_tpm.1246818891 |
|
|
Sep 24 02:13:55 PM UTC 24 |
Sep 24 02:20:21 PM UTC 24 |
181532814672 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.416530042 |
|
|
Sep 24 02:17:33 PM UTC 24 |
Sep 24 02:20:22 PM UTC 24 |
52863447140 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.3461915212 |
|
|
Sep 24 02:20:09 PM UTC 24 |
Sep 24 02:20:22 PM UTC 24 |
911332065 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.3999855687 |
|
|
Sep 24 02:20:18 PM UTC 24 |
Sep 24 02:20:24 PM UTC 24 |
350716328 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.818566750 |
|
|
Sep 24 02:19:56 PM UTC 24 |
Sep 24 02:20:25 PM UTC 24 |
9874643512 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1000787974 |
|
|
Sep 24 02:20:17 PM UTC 24 |
Sep 24 02:20:27 PM UTC 24 |
3161327019 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.1282885142 |
|
|
Sep 24 02:20:09 PM UTC 24 |
Sep 24 02:20:32 PM UTC 24 |
2806763053 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.3584316663 |
|
|
Sep 24 02:20:22 PM UTC 24 |
Sep 24 02:20:34 PM UTC 24 |
2527574519 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.2692160903 |
|
|
Sep 24 02:20:00 PM UTC 24 |
Sep 24 02:20:34 PM UTC 24 |
2852703730 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.2221371380 |
|
|
Sep 24 02:20:35 PM UTC 24 |
Sep 24 02:20:37 PM UTC 24 |
12908993 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.3845009592 |
|
|
Sep 24 02:20:35 PM UTC 24 |
Sep 24 02:20:37 PM UTC 24 |
48480025 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.533187593 |
|
|
Sep 24 02:20:23 PM UTC 24 |
Sep 24 02:20:38 PM UTC 24 |
872847345 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.4272705088 |
|
|
Sep 24 02:20:38 PM UTC 24 |
Sep 24 02:20:40 PM UTC 24 |
15273734 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.2908187161 |
|
|
Sep 24 02:20:41 PM UTC 24 |
Sep 24 02:20:43 PM UTC 24 |
36765212 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.237333950 |
|
|
Sep 24 02:20:00 PM UTC 24 |
Sep 24 02:20:44 PM UTC 24 |
6131942647 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.3750817024 |
|
|
Sep 24 02:20:44 PM UTC 24 |
Sep 24 02:20:46 PM UTC 24 |
12089080 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.2862559626 |
|
|
Sep 24 02:20:14 PM UTC 24 |
Sep 24 02:20:49 PM UTC 24 |
4091043012 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.3061580314 |
|
|
Sep 24 02:20:25 PM UTC 24 |
Sep 24 02:20:51 PM UTC 24 |
22154893544 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.961395011 |
|
|
Sep 24 02:20:38 PM UTC 24 |
Sep 24 02:20:51 PM UTC 24 |
13440550664 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.3319394486 |
|
|
Sep 24 02:20:45 PM UTC 24 |
Sep 24 02:20:51 PM UTC 24 |
480026327 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.1141115772 |
|
|
Sep 24 02:20:53 PM UTC 24 |
Sep 24 02:20:57 PM UTC 24 |
35491755 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.884646408 |
|
|
Sep 24 02:16:32 PM UTC 24 |
Sep 24 02:20:58 PM UTC 24 |
57402074938 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.3082965471 |
|
|
Sep 24 02:20:50 PM UTC 24 |
Sep 24 02:21:01 PM UTC 24 |
983644917 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.3937398830 |
|
|
Sep 24 02:20:39 PM UTC 24 |
Sep 24 02:21:02 PM UTC 24 |
1892050392 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/8.spi_device_stress_all.224122599 |
|
|
Sep 24 02:15:55 PM UTC 24 |
Sep 24 02:21:04 PM UTC 24 |
105174065671 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.1338810398 |
|
|
Sep 24 02:21:03 PM UTC 24 |
Sep 24 02:21:05 PM UTC 24 |
111666545 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.396887734 |
|
|
Sep 24 02:20:17 PM UTC 24 |
Sep 24 02:21:09 PM UTC 24 |
12330137520 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.1599423434 |
|
|
Sep 24 02:19:58 PM UTC 24 |
Sep 24 02:21:09 PM UTC 24 |
60535413282 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.103380102 |
|
|
Sep 24 02:21:10 PM UTC 24 |
Sep 24 02:21:12 PM UTC 24 |
14459357 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.1504043469 |
|
|
Sep 24 02:21:10 PM UTC 24 |
Sep 24 02:21:13 PM UTC 24 |
40573250 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_all.3577463398 |
|
|
Sep 24 02:15:50 PM UTC 24 |
Sep 24 02:21:13 PM UTC 24 |
136878145620 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.58353339 |
|
|
Sep 24 02:20:51 PM UTC 24 |
Sep 24 02:21:13 PM UTC 24 |
6812038635 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.47264659 |
|
|
Sep 24 02:20:47 PM UTC 24 |
Sep 24 02:21:13 PM UTC 24 |
23687893144 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_all.1848813848 |
|
|
Sep 24 02:13:53 PM UTC 24 |
Sep 24 02:21:14 PM UTC 24 |
45699244755 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.1018701072 |
|
|
Sep 24 02:21:13 PM UTC 24 |
Sep 24 02:21:16 PM UTC 24 |
16756241 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.3127634321 |
|
|
Sep 24 02:21:14 PM UTC 24 |
Sep 24 02:21:16 PM UTC 24 |
27461291 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.495649837 |
|
|
Sep 24 02:20:51 PM UTC 24 |
Sep 24 02:21:16 PM UTC 24 |
8364804014 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.1620917230 |
|
|
Sep 24 02:21:15 PM UTC 24 |
Sep 24 02:21:17 PM UTC 24 |
258730427 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.728598154 |
|
|
Sep 24 02:21:15 PM UTC 24 |
Sep 24 02:21:18 PM UTC 24 |
83758087 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.3500822349 |
|
|
Sep 24 02:21:14 PM UTC 24 |
Sep 24 02:21:22 PM UTC 24 |
327580851 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.652842947 |
|
|
Sep 24 02:21:02 PM UTC 24 |
Sep 24 02:21:25 PM UTC 24 |
6617709204 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.2574259097 |
|
|
Sep 24 02:20:58 PM UTC 24 |
Sep 24 02:21:26 PM UTC 24 |
977980340 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.1252359146 |
|
|
Sep 24 02:21:17 PM UTC 24 |
Sep 24 02:21:27 PM UTC 24 |
773924387 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.1774494761 |
|
|
Sep 24 02:19:42 PM UTC 24 |
Sep 24 02:21:31 PM UTC 24 |
43128275045 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.3792442001 |
|
|
Sep 24 02:21:18 PM UTC 24 |
Sep 24 02:21:33 PM UTC 24 |
18578842281 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.746769327 |
|
|
Sep 24 02:21:27 PM UTC 24 |
Sep 24 02:21:35 PM UTC 24 |
379817759 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.187589379 |
|
|
Sep 24 02:21:18 PM UTC 24 |
Sep 24 02:21:35 PM UTC 24 |
5442592286 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.1547343369 |
|
|
Sep 24 02:19:01 PM UTC 24 |
Sep 24 02:21:36 PM UTC 24 |
6442551709 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.1610139650 |
|
|
Sep 24 02:21:14 PM UTC 24 |
Sep 24 02:21:36 PM UTC 24 |
45881578036 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.2542996796 |
|
|
Sep 24 02:21:17 PM UTC 24 |
Sep 24 02:21:38 PM UTC 24 |
10187013486 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.2952240668 |
|
|
Sep 24 02:21:36 PM UTC 24 |
Sep 24 02:21:38 PM UTC 24 |
36317510 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.2821112762 |
|
|
Sep 24 02:21:37 PM UTC 24 |
Sep 24 02:21:40 PM UTC 24 |
13784747 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.2048245440 |
|
|
Sep 24 02:21:37 PM UTC 24 |
Sep 24 02:21:40 PM UTC 24 |
33633537 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.4141049400 |
|
|
Sep 24 02:22:29 PM UTC 24 |
Sep 24 02:22:36 PM UTC 24 |
1291356706 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.305402765 |
|
|
Sep 24 02:21:17 PM UTC 24 |
Sep 24 02:21:40 PM UTC 24 |
26369658777 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.528129388 |
|
|
Sep 24 02:20:59 PM UTC 24 |
Sep 24 02:21:42 PM UTC 24 |
9509315224 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.2927525169 |
|
|
Sep 24 02:21:41 PM UTC 24 |
Sep 24 02:21:43 PM UTC 24 |
42067775 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.1279603198 |
|
|
Sep 24 02:18:11 PM UTC 24 |
Sep 24 02:21:50 PM UTC 24 |
24975808998 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.1420433827 |
|
|
Sep 24 02:21:41 PM UTC 24 |
Sep 24 02:21:51 PM UTC 24 |
1149962433 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.1772363387 |
|
|
Sep 24 02:21:43 PM UTC 24 |
Sep 24 02:21:51 PM UTC 24 |
628596134 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.2840456314 |
|
|
Sep 24 02:21:38 PM UTC 24 |
Sep 24 02:21:52 PM UTC 24 |
15381103974 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.3154252035 |
|
|
Sep 24 02:21:44 PM UTC 24 |
Sep 24 02:21:54 PM UTC 24 |
302507003 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.3763130552 |
|
|
Sep 24 02:21:51 PM UTC 24 |
Sep 24 02:21:56 PM UTC 24 |
389557170 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.2778801800 |
|
|
Sep 24 02:21:53 PM UTC 24 |
Sep 24 02:21:58 PM UTC 24 |
55408230 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.3214132472 |
|
|
Sep 24 02:17:25 PM UTC 24 |
Sep 24 02:22:02 PM UTC 24 |
52539116275 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.1328456403 |
|
|
Sep 24 02:21:51 PM UTC 24 |
Sep 24 02:22:04 PM UTC 24 |
2650797292 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.3544874524 |
|
|
Sep 24 02:21:22 PM UTC 24 |
Sep 24 02:22:06 PM UTC 24 |
2820832959 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.3494917292 |
|
|
Sep 24 02:21:42 PM UTC 24 |
Sep 24 02:22:07 PM UTC 24 |
4581710915 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.542107605 |
|
|
Sep 24 02:22:08 PM UTC 24 |
Sep 24 02:22:10 PM UTC 24 |
94657797 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.1525071664 |
|
|
Sep 24 02:21:50 PM UTC 24 |
Sep 24 02:22:11 PM UTC 24 |
914902385 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.3989625650 |
|
|
Sep 24 02:22:11 PM UTC 24 |
Sep 24 02:22:14 PM UTC 24 |
15898575 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.1512569993 |
|
|
Sep 24 02:21:18 PM UTC 24 |
Sep 24 02:22:15 PM UTC 24 |
3360776698 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.646140249 |
|
|
Sep 24 02:21:40 PM UTC 24 |
Sep 24 02:22:16 PM UTC 24 |
1822705533 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.4283569236 |
|
|
Sep 24 02:21:58 PM UTC 24 |
Sep 24 02:22:17 PM UTC 24 |
5418158100 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.3005743239 |
|
|
Sep 24 02:22:17 PM UTC 24 |
Sep 24 02:22:19 PM UTC 24 |
99688015 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.1349525653 |
|
|
Sep 24 02:22:17 PM UTC 24 |
Sep 24 02:22:20 PM UTC 24 |
88791532 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.3511797444 |
|
|
Sep 24 02:22:12 PM UTC 24 |
Sep 24 02:22:23 PM UTC 24 |
2417104679 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.976362370 |
|
|
Sep 24 02:21:34 PM UTC 24 |
Sep 24 02:22:28 PM UTC 24 |
8579573964 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.3419103496 |
|
|
Sep 24 02:22:24 PM UTC 24 |
Sep 24 02:22:28 PM UTC 24 |
32066631 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.277673292 |
|
|
Sep 24 02:22:20 PM UTC 24 |
Sep 24 02:22:29 PM UTC 24 |
3822975249 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.2905036402 |
|
|
Sep 24 02:21:36 PM UTC 24 |
Sep 24 02:22:30 PM UTC 24 |
13446456344 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.2888672908 |
|
|
Sep 24 02:22:19 PM UTC 24 |
Sep 24 02:22:30 PM UTC 24 |
1326488262 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.4085281641 |
|
|
Sep 24 02:22:14 PM UTC 24 |
Sep 24 02:22:31 PM UTC 24 |
6121579961 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_and_tpm_min_idle.1156910240 |
|
|
Sep 24 02:15:23 PM UTC 24 |
Sep 24 02:22:36 PM UTC 24 |
36743561533 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.4033702417 |
|
|
Sep 24 02:22:29 PM UTC 24 |
Sep 24 02:22:37 PM UTC 24 |
162205735 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.2806456988 |
|
|
Sep 24 02:22:30 PM UTC 24 |
Sep 24 02:22:37 PM UTC 24 |
109119829 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.3670834551 |
|
|
Sep 24 02:22:38 PM UTC 24 |
Sep 24 02:22:40 PM UTC 24 |
92623243 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.3417248337 |
|
|
Sep 24 02:22:30 PM UTC 24 |
Sep 24 02:22:42 PM UTC 24 |
846531071 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.2714397229 |
|
|
Sep 24 02:22:41 PM UTC 24 |
Sep 24 02:22:43 PM UTC 24 |
27485241 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.3538149871 |
|
|
Sep 24 02:20:03 PM UTC 24 |
Sep 24 02:22:43 PM UTC 24 |
10310751881 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.1603660392 |
|
|
Sep 24 02:22:44 PM UTC 24 |
Sep 24 02:22:46 PM UTC 24 |
93831080 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.2444696134 |
|
|
Sep 24 02:22:44 PM UTC 24 |
Sep 24 02:22:47 PM UTC 24 |
36339965 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.2204636001 |
|
|
Sep 24 02:22:48 PM UTC 24 |
Sep 24 02:22:50 PM UTC 24 |
201739820 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/2.spi_device_stress_all.3459412732 |
|
|
Sep 24 02:13:01 PM UTC 24 |
Sep 24 02:22:51 PM UTC 24 |
48002507076 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.3504778060 |
|
|
Sep 24 02:22:48 PM UTC 24 |
Sep 24 02:22:55 PM UTC 24 |
658244163 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.1501995167 |
|
|
Sep 24 02:22:43 PM UTC 24 |
Sep 24 02:22:57 PM UTC 24 |
1891901911 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.138158889 |
|
|
Sep 24 02:22:21 PM UTC 24 |
Sep 24 02:22:58 PM UTC 24 |
3502716882 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3382551763 |
|
|
Sep 24 02:22:52 PM UTC 24 |
Sep 24 02:23:02 PM UTC 24 |
2563846820 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.891193841 |
|
|
Sep 24 02:22:57 PM UTC 24 |
Sep 24 02:23:02 PM UTC 24 |
165514481 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.2436269102 |
|
|
Sep 24 02:22:56 PM UTC 24 |
Sep 24 02:23:05 PM UTC 24 |
2855690644 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.2552815885 |
|
|
Sep 24 02:23:02 PM UTC 24 |
Sep 24 02:23:11 PM UTC 24 |
567240058 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.4265748148 |
|
|
Sep 24 02:20:33 PM UTC 24 |
Sep 24 02:23:11 PM UTC 24 |
8887441765 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.4074260462 |
|
|
Sep 24 02:23:06 PM UTC 24 |
Sep 24 02:23:14 PM UTC 24 |
122123650 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.2139963397 |
|
|
Sep 24 02:20:29 PM UTC 24 |
Sep 24 02:23:14 PM UTC 24 |
18197450386 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.629881753 |
|
|
Sep 24 02:22:52 PM UTC 24 |
Sep 24 02:23:19 PM UTC 24 |
12276127066 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.3331651585 |
|
|
Sep 24 02:22:59 PM UTC 24 |
Sep 24 02:23:20 PM UTC 24 |
19030239767 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.1314928373 |
|
|
Sep 24 02:23:20 PM UTC 24 |
Sep 24 02:23:22 PM UTC 24 |
13844804 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.2489902127 |
|
|
Sep 24 02:23:21 PM UTC 24 |
Sep 24 02:23:24 PM UTC 24 |
56056063 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.1281281585 |
|
|
Sep 24 02:23:23 PM UTC 24 |
Sep 24 02:23:30 PM UTC 24 |
16763242582 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.1287809700 |
|
|
Sep 24 02:21:05 PM UTC 24 |
Sep 24 02:23:30 PM UTC 24 |
11084432245 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.964982214 |
|
|
Sep 24 02:19:40 PM UTC 24 |
Sep 24 02:23:30 PM UTC 24 |
33096774598 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.2527520581 |
|
|
Sep 24 02:22:37 PM UTC 24 |
Sep 24 02:23:32 PM UTC 24 |
5060754030 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.4246411576 |
|
|
Sep 24 02:23:30 PM UTC 24 |
Sep 24 02:23:33 PM UTC 24 |
99454634 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.1614789153 |
|
|
Sep 24 02:23:30 PM UTC 24 |
Sep 24 02:23:33 PM UTC 24 |
41017740 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.3998197587 |
|
|
Sep 24 02:23:34 PM UTC 24 |
Sep 24 02:23:43 PM UTC 24 |
586487927 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.1598513544 |
|
|
Sep 24 02:23:34 PM UTC 24 |
Sep 24 02:23:43 PM UTC 24 |
180054001 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.2139771631 |
|
|
Sep 24 02:22:29 PM UTC 24 |
Sep 24 02:23:46 PM UTC 24 |
12230730816 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.3600642366 |
|
|
Sep 24 02:23:34 PM UTC 24 |
Sep 24 02:23:50 PM UTC 24 |
771015197 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.3193894230 |
|
|
Sep 24 02:23:43 PM UTC 24 |
Sep 24 02:23:51 PM UTC 24 |
2267726581 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.3158159281 |
|
|
Sep 24 02:21:06 PM UTC 24 |
Sep 24 02:23:53 PM UTC 24 |
72596607522 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.1066327112 |
|
|
Sep 24 02:23:44 PM UTC 24 |
Sep 24 02:23:54 PM UTC 24 |
213408136 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.2113789436 |
|
|
Sep 24 02:23:43 PM UTC 24 |
Sep 24 02:23:54 PM UTC 24 |
2028409856 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.984388855 |
|
|
Sep 24 02:23:51 PM UTC 24 |
Sep 24 02:23:57 PM UTC 24 |
169246881 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.1771106376 |
|
|
Sep 24 02:23:32 PM UTC 24 |
Sep 24 02:23:58 PM UTC 24 |
16432646609 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.489868955 |
|
|
Sep 24 02:23:58 PM UTC 24 |
Sep 24 02:24:00 PM UTC 24 |
47644965 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.429266231 |
|
|
Sep 24 02:23:59 PM UTC 24 |
Sep 24 02:24:01 PM UTC 24 |
17048747 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.3432403217 |
|
|
Sep 24 02:21:55 PM UTC 24 |
Sep 24 02:24:08 PM UTC 24 |
11087497324 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.258194958 |
|
|
Sep 24 02:23:13 PM UTC 24 |
Sep 24 02:24:10 PM UTC 24 |
39814424486 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.2537731097 |
|
|
Sep 24 02:24:09 PM UTC 24 |
Sep 24 02:24:12 PM UTC 24 |
88474946 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.3453129073 |
|
|
Sep 24 02:24:11 PM UTC 24 |
Sep 24 02:24:14 PM UTC 24 |
345679828 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/13.spi_device_stress_all.3670889388 |
|
|
Sep 24 02:19:07 PM UTC 24 |
Sep 24 02:24:16 PM UTC 24 |
132235759231 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.1964930376 |
|
|
Sep 24 02:24:15 PM UTC 24 |
Sep 24 02:24:19 PM UTC 24 |
896136803 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.4146911876 |
|
|
Sep 24 02:24:02 PM UTC 24 |
Sep 24 02:24:21 PM UTC 24 |
1290105525 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.4271599198 |
|
|
Sep 24 02:24:13 PM UTC 24 |
Sep 24 02:24:22 PM UTC 24 |
7528395853 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.268939158 |
|
|
Sep 24 02:24:17 PM UTC 24 |
Sep 24 02:24:22 PM UTC 24 |
180731334 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.2285149090 |
|
|
Sep 24 02:24:01 PM UTC 24 |
Sep 24 02:24:27 PM UTC 24 |
43996456615 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.3342148448 |
|
|
Sep 24 02:23:24 PM UTC 24 |
Sep 24 02:24:28 PM UTC 24 |
34706750627 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.673393054 |
|
|
Sep 24 02:23:55 PM UTC 24 |
Sep 24 02:24:33 PM UTC 24 |
9394860333 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.2388163343 |
|
|
Sep 24 02:24:23 PM UTC 24 |
Sep 24 02:24:34 PM UTC 24 |
928430825 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.409708543 |
|
|
Sep 24 02:24:23 PM UTC 24 |
Sep 24 02:24:38 PM UTC 24 |
544210645 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.311444495 |
|
|
Sep 24 02:24:22 PM UTC 24 |
Sep 24 02:24:38 PM UTC 24 |
2351756011 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.1165120517 |
|
|
Sep 24 02:24:41 PM UTC 24 |
Sep 24 02:24:43 PM UTC 24 |
40840155 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.880659202 |
|
|
Sep 24 02:24:44 PM UTC 24 |
Sep 24 02:24:47 PM UTC 24 |
16556737 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2742469801 |
|
|
Sep 24 02:24:28 PM UTC 24 |
Sep 24 02:24:52 PM UTC 24 |
2100845940 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.266270280 |
|
|
Sep 24 02:21:59 PM UTC 24 |
Sep 24 02:24:57 PM UTC 24 |
46016085431 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.2836870973 |
|
|
Sep 24 02:24:58 PM UTC 24 |
Sep 24 02:25:01 PM UTC 24 |
124516510 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.2566985154 |
|
|
Sep 24 02:24:47 PM UTC 24 |
Sep 24 02:25:01 PM UTC 24 |
24774632127 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.336587096 |
|
|
Sep 24 02:20:23 PM UTC 24 |
Sep 24 02:25:03 PM UTC 24 |
41420515326 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.269561676 |
|
|
Sep 24 02:25:01 PM UTC 24 |
Sep 24 02:25:05 PM UTC 24 |
209168357 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.1318860158 |
|
|
Sep 24 02:24:52 PM UTC 24 |
Sep 24 02:25:05 PM UTC 24 |
1789161545 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.3160266296 |
|
|
Sep 24 02:25:03 PM UTC 24 |
Sep 24 02:25:08 PM UTC 24 |
156096230 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.1782526384 |
|
|
Sep 24 02:25:06 PM UTC 24 |
Sep 24 02:25:10 PM UTC 24 |
186393486 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.121061798 |
|
|
Sep 24 02:25:09 PM UTC 24 |
Sep 24 02:25:12 PM UTC 24 |
116866457 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3855929825 |
|
|
Sep 24 02:25:11 PM UTC 24 |
Sep 24 02:25:15 PM UTC 24 |
97804922 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.209380736 |
|
|
Sep 24 02:22:37 PM UTC 24 |
Sep 24 02:25:16 PM UTC 24 |
66261817373 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.1559629943 |
|
|
Sep 24 02:25:06 PM UTC 24 |
Sep 24 02:25:21 PM UTC 24 |
8110587014 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.1354268797 |
|
|
Sep 24 02:25:16 PM UTC 24 |
Sep 24 02:25:22 PM UTC 24 |
286291176 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.2126001571 |
|
|
Sep 24 02:24:20 PM UTC 24 |
Sep 24 02:25:25 PM UTC 24 |
7704521121 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.3792587703 |
|
|
Sep 24 02:23:54 PM UTC 24 |
Sep 24 02:25:25 PM UTC 24 |
42398992813 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.2460212072 |
|
|
Sep 24 02:25:13 PM UTC 24 |
Sep 24 02:25:28 PM UTC 24 |
271262694 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.1641695103 |
|
|
Sep 24 02:25:29 PM UTC 24 |
Sep 24 02:25:31 PM UTC 24 |
12469236 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.628342842 |
|
|
Sep 24 02:24:27 PM UTC 24 |
Sep 24 02:25:33 PM UTC 24 |
10845402261 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.347158049 |
|
|
Sep 24 02:25:32 PM UTC 24 |
Sep 24 02:25:34 PM UTC 24 |
60853384 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.3481729098 |
|
|
Sep 24 02:25:05 PM UTC 24 |
Sep 24 02:25:36 PM UTC 24 |
5123787532 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.2844116160 |
|
|
Sep 24 02:25:36 PM UTC 24 |
Sep 24 02:25:38 PM UTC 24 |
78777796 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.798247151 |
|
|
Sep 24 02:25:33 PM UTC 24 |
Sep 24 02:25:41 PM UTC 24 |
2288984545 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.3826866030 |
|
|
Sep 24 02:22:38 PM UTC 24 |
Sep 24 02:25:42 PM UTC 24 |
11990859310 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.2760374055 |
|
|
Sep 24 02:25:39 PM UTC 24 |
Sep 24 02:25:42 PM UTC 24 |
161312522 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.3566080667 |
|
|
Sep 24 02:25:35 PM UTC 24 |
Sep 24 02:25:50 PM UTC 24 |
1129758927 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.754968219 |
|
|
Sep 24 02:25:22 PM UTC 24 |
Sep 24 02:25:51 PM UTC 24 |
3392691957 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.482972 |
|
|
Sep 24 02:25:42 PM UTC 24 |
Sep 24 02:25:54 PM UTC 24 |
4991976234 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.3028080557 |
|
|
Sep 24 02:25:44 PM UTC 24 |
Sep 24 02:25:55 PM UTC 24 |
913726351 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.2244891717 |
|
|
Sep 24 02:22:03 PM UTC 24 |
Sep 24 02:25:58 PM UTC 24 |
30742619382 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.3627070992 |
|
|
Sep 24 02:23:55 PM UTC 24 |
Sep 24 02:26:00 PM UTC 24 |
11251094395 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.53227373 |
|
|
Sep 24 02:25:42 PM UTC 24 |
Sep 24 02:26:00 PM UTC 24 |
2482948554 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.3427480543 |
|
|
Sep 24 02:25:55 PM UTC 24 |
Sep 24 02:26:00 PM UTC 24 |
168496756 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.1603014938 |
|
|
Sep 24 02:25:56 PM UTC 24 |
Sep 24 02:26:01 PM UTC 24 |
220177847 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.1874030330 |
|
|
Sep 24 02:25:52 PM UTC 24 |
Sep 24 02:26:09 PM UTC 24 |
703881261 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2031466120 |
|
|
Sep 24 02:19:40 PM UTC 24 |
Sep 24 02:26:11 PM UTC 24 |
31567935027 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.2963988564 |
|
|
Sep 24 02:22:32 PM UTC 24 |
Sep 24 02:26:11 PM UTC 24 |
83022003245 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.881424119 |
|
|
Sep 24 02:19:35 PM UTC 24 |
Sep 24 02:26:13 PM UTC 24 |
109231050196 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.3786068353 |
|
|
Sep 24 02:26:12 PM UTC 24 |
Sep 24 02:26:14 PM UTC 24 |
54868991 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.2927805423 |
|
|
Sep 24 02:26:12 PM UTC 24 |
Sep 24 02:26:14 PM UTC 24 |
15890275 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.3279499290 |
|
|
Sep 24 02:25:16 PM UTC 24 |
Sep 24 02:26:16 PM UTC 24 |
2550021757 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.3209436563 |
|
|
Sep 24 02:26:15 PM UTC 24 |
Sep 24 02:26:17 PM UTC 24 |
129522200 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.2644661116 |
|
|
Sep 24 02:26:17 PM UTC 24 |
Sep 24 02:26:23 PM UTC 24 |
504104466 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.1164954491 |
|
|
Sep 24 02:26:00 PM UTC 24 |
Sep 24 02:26:27 PM UTC 24 |
8552040311 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.632476813 |
|
|
Sep 24 02:26:23 PM UTC 24 |
Sep 24 02:26:31 PM UTC 24 |
468235701 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.520990762 |
|
|
Sep 24 02:26:15 PM UTC 24 |
Sep 24 02:26:32 PM UTC 24 |
43018714441 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.3387985641 |
|
|
Sep 24 02:26:15 PM UTC 24 |
Sep 24 02:26:32 PM UTC 24 |
1050753185 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.1935274463 |
|
|
Sep 24 02:23:15 PM UTC 24 |
Sep 24 02:26:34 PM UTC 24 |
110971933002 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm.2801408488 |
|
|
Sep 24 02:14:50 PM UTC 24 |
Sep 24 02:26:34 PM UTC 24 |
277712159178 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1793251336 |
|
|
Sep 24 02:23:13 PM UTC 24 |
Sep 24 02:26:36 PM UTC 24 |
39699525125 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.851528634 |
|
|
Sep 24 02:26:28 PM UTC 24 |
Sep 24 02:26:39 PM UTC 24 |
1447421381 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.2211078595 |
|
|
Sep 24 02:26:34 PM UTC 24 |
Sep 24 02:26:40 PM UTC 24 |
484993620 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.3469324835 |
|
|
Sep 24 02:26:35 PM UTC 24 |
Sep 24 02:26:41 PM UTC 24 |
218034844 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.2276202212 |
|
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Sep 24 02:26:37 PM UTC 24 |
Sep 24 02:26:42 PM UTC 24 |
97200474 ps |