| T80 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.68332473 |
|
|
Oct 09 04:09:08 PM UTC 24 |
Oct 09 04:09:10 PM UTC 24 |
64909111 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.4058685042 |
|
|
Oct 09 04:09:00 PM UTC 24 |
Oct 09 04:09:10 PM UTC 24 |
825600918 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.4182915339 |
|
|
Oct 09 04:08:36 PM UTC 24 |
Oct 09 04:09:11 PM UTC 24 |
1103240781 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.2145845747 |
|
|
Oct 09 04:09:10 PM UTC 24 |
Oct 09 04:09:12 PM UTC 24 |
45606041 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.2462464162 |
|
|
Oct 09 04:08:57 PM UTC 24 |
Oct 09 04:09:13 PM UTC 24 |
1423521253 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.2647453910 |
|
|
Oct 09 04:09:12 PM UTC 24 |
Oct 09 04:09:14 PM UTC 24 |
45635853 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_rw.1164678589 |
|
|
Oct 09 04:09:12 PM UTC 24 |
Oct 09 04:09:14 PM UTC 24 |
60076101 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.770887796 |
|
|
Oct 09 04:09:02 PM UTC 24 |
Oct 09 04:09:17 PM UTC 24 |
1366316284 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.202942691 |
|
|
Oct 09 04:09:11 PM UTC 24 |
Oct 09 04:09:17 PM UTC 24 |
268387789 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.164329270 |
|
|
Oct 09 04:08:41 PM UTC 24 |
Oct 09 04:09:18 PM UTC 24 |
12918398204 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.1551282296 |
|
|
Oct 09 04:03:10 PM UTC 24 |
Oct 09 04:09:18 PM UTC 24 |
88798929874 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.272185865 |
|
|
Oct 09 04:09:12 PM UTC 24 |
Oct 09 04:09:19 PM UTC 24 |
6967089033 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.3288483672 |
|
|
Oct 09 04:09:14 PM UTC 24 |
Oct 09 04:09:19 PM UTC 24 |
153679538 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.312517125 |
|
|
Oct 09 04:09:15 PM UTC 24 |
Oct 09 04:09:19 PM UTC 24 |
336780177 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.340090500 |
|
|
Oct 09 04:09:00 PM UTC 24 |
Oct 09 04:09:21 PM UTC 24 |
3463180583 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.3296910590 |
|
|
Oct 09 04:09:13 PM UTC 24 |
Oct 09 04:09:22 PM UTC 24 |
1769100206 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.3074620759 |
|
|
Oct 09 04:08:50 PM UTC 24 |
Oct 09 04:09:22 PM UTC 24 |
1712938051 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.950603105 |
|
|
Oct 09 04:06:42 PM UTC 24 |
Oct 09 04:09:22 PM UTC 24 |
10405594397 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.2382208889 |
|
|
Oct 09 04:09:18 PM UTC 24 |
Oct 09 04:09:24 PM UTC 24 |
328795911 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_stress_all.3431419094 |
|
|
Oct 09 04:09:21 PM UTC 24 |
Oct 09 04:09:24 PM UTC 24 |
40057040 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.3808363936 |
|
|
Oct 09 04:09:23 PM UTC 24 |
Oct 09 04:09:25 PM UTC 24 |
45458687 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.3893784214 |
|
|
Oct 09 04:09:23 PM UTC 24 |
Oct 09 04:09:25 PM UTC 24 |
46149884 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.3455839189 |
|
|
Oct 09 04:09:15 PM UTC 24 |
Oct 09 04:09:27 PM UTC 24 |
3399742358 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.3119642053 |
|
|
Oct 09 04:07:34 PM UTC 24 |
Oct 09 04:09:27 PM UTC 24 |
4804165062 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.661719853 |
|
|
Oct 09 04:09:25 PM UTC 24 |
Oct 09 04:09:28 PM UTC 24 |
27657894 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.1942754604 |
|
|
Oct 09 04:09:18 PM UTC 24 |
Oct 09 04:09:28 PM UTC 24 |
143582902 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.2771150743 |
|
|
Oct 09 04:09:25 PM UTC 24 |
Oct 09 04:09:29 PM UTC 24 |
41862643 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.263856450 |
|
|
Oct 09 04:09:26 PM UTC 24 |
Oct 09 04:09:31 PM UTC 24 |
123352823 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.3440062347 |
|
|
Oct 09 04:08:19 PM UTC 24 |
Oct 09 04:09:32 PM UTC 24 |
11232964934 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.1710618689 |
|
|
Oct 09 04:09:28 PM UTC 24 |
Oct 09 04:09:32 PM UTC 24 |
165654473 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.3517110791 |
|
|
Oct 09 04:09:20 PM UTC 24 |
Oct 09 04:09:32 PM UTC 24 |
1661222549 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.4011881938 |
|
|
Oct 09 04:09:29 PM UTC 24 |
Oct 09 04:09:33 PM UTC 24 |
209809426 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.1697281466 |
|
|
Oct 09 04:06:19 PM UTC 24 |
Oct 09 04:09:33 PM UTC 24 |
29262881146 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.1207988815 |
|
|
Oct 09 04:09:29 PM UTC 24 |
Oct 09 04:09:33 PM UTC 24 |
675374576 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.2968052228 |
|
|
Oct 09 04:08:59 PM UTC 24 |
Oct 09 04:09:34 PM UTC 24 |
3185422093 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.2927324374 |
|
|
Oct 09 04:09:34 PM UTC 24 |
Oct 09 04:09:36 PM UTC 24 |
14501875 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.2492847362 |
|
|
Oct 09 04:07:31 PM UTC 24 |
Oct 09 04:09:36 PM UTC 24 |
11584606796 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_stress_all.2192207688 |
|
|
Oct 09 04:09:34 PM UTC 24 |
Oct 09 04:09:37 PM UTC 24 |
206350887 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.3178206473 |
|
|
Oct 09 04:07:30 PM UTC 24 |
Oct 09 04:09:37 PM UTC 24 |
23883755092 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.2988257028 |
|
|
Oct 09 04:09:20 PM UTC 24 |
Oct 09 04:09:37 PM UTC 24 |
3990531757 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.2131546892 |
|
|
Oct 09 04:09:23 PM UTC 24 |
Oct 09 04:09:37 PM UTC 24 |
16414459425 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.553718485 |
|
|
Oct 09 04:08:09 PM UTC 24 |
Oct 09 04:09:37 PM UTC 24 |
38471195300 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.982275739 |
|
|
Oct 09 04:05:33 PM UTC 24 |
Oct 09 04:09:39 PM UTC 24 |
15257680196 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.869099031 |
|
|
Oct 09 04:09:37 PM UTC 24 |
Oct 09 04:09:40 PM UTC 24 |
42644153 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.3195300467 |
|
|
Oct 09 04:09:39 PM UTC 24 |
Oct 09 04:09:43 PM UTC 24 |
127298579 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.2506352539 |
|
|
Oct 09 04:09:39 PM UTC 24 |
Oct 09 04:09:44 PM UTC 24 |
134950049 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.3754122715 |
|
|
Oct 09 04:09:33 PM UTC 24 |
Oct 09 04:09:45 PM UTC 24 |
636689514 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.2633113351 |
|
|
Oct 09 04:09:30 PM UTC 24 |
Oct 09 04:09:46 PM UTC 24 |
1507832425 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.785419207 |
|
|
Oct 09 04:01:59 PM UTC 24 |
Oct 09 04:09:47 PM UTC 24 |
285801947744 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.841721881 |
|
|
Oct 09 04:08:24 PM UTC 24 |
Oct 09 04:09:49 PM UTC 24 |
8368583397 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.1790701129 |
|
|
Oct 09 04:09:39 PM UTC 24 |
Oct 09 04:09:50 PM UTC 24 |
2746240768 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3578587203 |
|
|
Oct 09 04:09:34 PM UTC 24 |
Oct 09 04:09:50 PM UTC 24 |
1251199273 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.82994750 |
|
|
Oct 09 04:09:44 PM UTC 24 |
Oct 09 04:09:51 PM UTC 24 |
266783566 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2641153354 |
|
|
Oct 09 04:09:46 PM UTC 24 |
Oct 09 04:09:51 PM UTC 24 |
88744551 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.3433429135 |
|
|
Oct 09 04:00:25 PM UTC 24 |
Oct 09 04:09:53 PM UTC 24 |
55859367875 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.3737124177 |
|
|
Oct 09 04:09:51 PM UTC 24 |
Oct 09 04:09:53 PM UTC 24 |
13711276 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.122925563 |
|
|
Oct 09 04:09:52 PM UTC 24 |
Oct 09 04:09:54 PM UTC 24 |
30848236 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3747080094 |
|
|
Oct 09 04:09:39 PM UTC 24 |
Oct 09 04:09:57 PM UTC 24 |
4154217075 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1320727357 |
|
|
Oct 09 04:09:55 PM UTC 24 |
Oct 09 04:09:57 PM UTC 24 |
19058521 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.2000332080 |
|
|
Oct 09 04:09:24 PM UTC 24 |
Oct 09 04:09:59 PM UTC 24 |
3019096875 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.3255322778 |
|
|
Oct 09 04:09:40 PM UTC 24 |
Oct 09 04:10:02 PM UTC 24 |
8985131771 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.2869665896 |
|
|
Oct 09 04:09:26 PM UTC 24 |
Oct 09 04:10:04 PM UTC 24 |
10922276362 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.1268329337 |
|
|
Oct 09 04:09:58 PM UTC 24 |
Oct 09 04:10:04 PM UTC 24 |
205122951 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.3303638445 |
|
|
Oct 09 04:09:41 PM UTC 24 |
Oct 09 04:10:05 PM UTC 24 |
5861472238 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.4277719507 |
|
|
Oct 09 04:06:16 PM UTC 24 |
Oct 09 04:10:05 PM UTC 24 |
21640670958 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.392256857 |
|
|
Oct 09 04:09:56 PM UTC 24 |
Oct 09 04:10:05 PM UTC 24 |
232996910 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.2829282576 |
|
|
Oct 09 04:09:52 PM UTC 24 |
Oct 09 04:10:07 PM UTC 24 |
19537319031 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_all.2449945701 |
|
|
Oct 09 04:09:20 PM UTC 24 |
Oct 09 04:10:07 PM UTC 24 |
4686587862 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.723242087 |
|
|
Oct 09 04:10:04 PM UTC 24 |
Oct 09 04:10:09 PM UTC 24 |
1560484599 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.808582191 |
|
|
Oct 09 04:09:37 PM UTC 24 |
Oct 09 04:10:09 PM UTC 24 |
6051253233 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.633237006 |
|
|
Oct 09 04:10:05 PM UTC 24 |
Oct 09 04:10:10 PM UTC 24 |
2552971124 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.3661868289 |
|
|
Oct 09 04:09:28 PM UTC 24 |
Oct 09 04:10:10 PM UTC 24 |
31669598380 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.704450381 |
|
|
Oct 09 04:10:10 PM UTC 24 |
Oct 09 04:10:12 PM UTC 24 |
52064424 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.2491525651 |
|
|
Oct 09 04:10:07 PM UTC 24 |
Oct 09 04:10:13 PM UTC 24 |
72720389 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.627393893 |
|
|
Oct 09 04:10:12 PM UTC 24 |
Oct 09 04:10:14 PM UTC 24 |
18568085 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.513295213 |
|
|
Oct 09 04:10:00 PM UTC 24 |
Oct 09 04:10:14 PM UTC 24 |
2962642417 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.3794435797 |
|
|
Oct 09 04:09:37 PM UTC 24 |
Oct 09 04:10:15 PM UTC 24 |
4161279153 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.1081175265 |
|
|
Oct 09 04:09:39 PM UTC 24 |
Oct 09 04:10:16 PM UTC 24 |
6230755951 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.2867076900 |
|
|
Oct 09 04:10:06 PM UTC 24 |
Oct 09 04:10:16 PM UTC 24 |
1515674096 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.3373542313 |
|
|
Oct 09 04:10:15 PM UTC 24 |
Oct 09 04:10:17 PM UTC 24 |
10326166 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.514544216 |
|
|
Oct 09 04:10:15 PM UTC 24 |
Oct 09 04:10:17 PM UTC 24 |
89450340 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.397294480 |
|
|
Oct 09 04:08:43 PM UTC 24 |
Oct 09 04:10:18 PM UTC 24 |
7891037897 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.182964738 |
|
|
Oct 09 04:10:15 PM UTC 24 |
Oct 09 04:10:19 PM UTC 24 |
77114940 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.201223525 |
|
|
Oct 09 04:10:03 PM UTC 24 |
Oct 09 04:10:20 PM UTC 24 |
1171492050 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.4017454343 |
|
|
Oct 09 04:10:16 PM UTC 24 |
Oct 09 04:10:21 PM UTC 24 |
173540875 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.3335576339 |
|
|
Oct 09 04:10:14 PM UTC 24 |
Oct 09 04:10:21 PM UTC 24 |
1142073376 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.3872095836 |
|
|
Oct 09 04:09:58 PM UTC 24 |
Oct 09 04:10:21 PM UTC 24 |
2366070289 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.1092774109 |
|
|
Oct 09 04:04:00 PM UTC 24 |
Oct 09 04:10:22 PM UTC 24 |
250048701924 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.2621156251 |
|
|
Oct 09 04:09:50 PM UTC 24 |
Oct 09 04:10:23 PM UTC 24 |
3335224575 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.4141995410 |
|
|
Oct 09 04:10:16 PM UTC 24 |
Oct 09 04:10:23 PM UTC 24 |
1208936364 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.501355817 |
|
|
Oct 09 04:10:19 PM UTC 24 |
Oct 09 04:10:24 PM UTC 24 |
89101987 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.661491006 |
|
|
Oct 09 04:10:24 PM UTC 24 |
Oct 09 04:10:26 PM UTC 24 |
11976811 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.308870553 |
|
|
Oct 09 04:10:25 PM UTC 24 |
Oct 09 04:10:27 PM UTC 24 |
57131910 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.649547840 |
|
|
Oct 09 04:10:19 PM UTC 24 |
Oct 09 04:10:27 PM UTC 24 |
2357563529 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.2443545716 |
|
|
Oct 09 04:10:25 PM UTC 24 |
Oct 09 04:10:28 PM UTC 24 |
141708033 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.2954190021 |
|
|
Oct 09 04:10:19 PM UTC 24 |
Oct 09 04:10:28 PM UTC 24 |
932970442 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_all.1598036748 |
|
|
Oct 09 04:09:47 PM UTC 24 |
Oct 09 04:10:29 PM UTC 24 |
7505740909 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.3193324445 |
|
|
Oct 09 04:10:28 PM UTC 24 |
Oct 09 04:10:30 PM UTC 24 |
21031527 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.1081207561 |
|
|
Oct 09 04:10:28 PM UTC 24 |
Oct 09 04:10:31 PM UTC 24 |
203150636 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_all.959638961 |
|
|
Oct 09 04:09:03 PM UTC 24 |
Oct 09 04:10:34 PM UTC 24 |
16371485875 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.516020147 |
|
|
Oct 09 04:10:14 PM UTC 24 |
Oct 09 04:10:36 PM UTC 24 |
1324150825 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.3371502508 |
|
|
Oct 09 04:10:21 PM UTC 24 |
Oct 09 04:10:37 PM UTC 24 |
4012255464 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2910231935 |
|
|
Oct 09 04:10:29 PM UTC 24 |
Oct 09 04:10:38 PM UTC 24 |
398606064 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.1033643129 |
|
|
Oct 09 04:09:49 PM UTC 24 |
Oct 09 04:10:39 PM UTC 24 |
30353952366 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.2286133332 |
|
|
Oct 09 04:09:54 PM UTC 24 |
Oct 09 04:10:41 PM UTC 24 |
8197755638 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.2460492402 |
|
|
Oct 09 04:10:32 PM UTC 24 |
Oct 09 04:10:43 PM UTC 24 |
1685376575 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.1500479788 |
|
|
Oct 09 04:01:33 PM UTC 24 |
Oct 09 04:10:44 PM UTC 24 |
44490471623 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.262506741 |
|
|
Oct 09 04:10:32 PM UTC 24 |
Oct 09 04:10:45 PM UTC 24 |
4326047295 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.2452243795 |
|
|
Oct 09 04:10:31 PM UTC 24 |
Oct 09 04:10:45 PM UTC 24 |
4311929039 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_stress_all.2594410015 |
|
|
Oct 09 04:10:44 PM UTC 24 |
Oct 09 04:10:46 PM UTC 24 |
460872902 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.3145300843 |
|
|
Oct 09 04:10:45 PM UTC 24 |
Oct 09 04:10:47 PM UTC 24 |
12430254 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.3866120837 |
|
|
Oct 09 04:07:55 PM UTC 24 |
Oct 09 04:10:47 PM UTC 24 |
96922509484 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.3924183565 |
|
|
Oct 09 04:10:27 PM UTC 24 |
Oct 09 04:10:48 PM UTC 24 |
3070544179 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.163792524 |
|
|
Oct 09 04:10:46 PM UTC 24 |
Oct 09 04:10:48 PM UTC 24 |
24118528 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.2581476335 |
|
|
Oct 09 04:10:48 PM UTC 24 |
Oct 09 04:10:51 PM UTC 24 |
207732129 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.1510872843 |
|
|
Oct 09 04:10:48 PM UTC 24 |
Oct 09 04:10:51 PM UTC 24 |
26682168 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.3856956154 |
|
|
Oct 09 04:10:29 PM UTC 24 |
Oct 09 04:10:55 PM UTC 24 |
8886197453 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.2048814809 |
|
|
Oct 09 04:10:37 PM UTC 24 |
Oct 09 04:10:55 PM UTC 24 |
2340754274 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.113262380 |
|
|
Oct 09 04:10:35 PM UTC 24 |
Oct 09 04:10:57 PM UTC 24 |
3947878174 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.4164334634 |
|
|
Oct 09 04:10:52 PM UTC 24 |
Oct 09 04:10:58 PM UTC 24 |
212668300 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.2493008146 |
|
|
Oct 09 04:10:56 PM UTC 24 |
Oct 09 04:11:00 PM UTC 24 |
106723687 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.3079160162 |
|
|
Oct 09 04:10:52 PM UTC 24 |
Oct 09 04:11:00 PM UTC 24 |
226688476 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.1061305179 |
|
|
Oct 09 04:10:22 PM UTC 24 |
Oct 09 04:11:01 PM UTC 24 |
1547286688 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.3442251749 |
|
|
Oct 09 04:10:48 PM UTC 24 |
Oct 09 04:11:01 PM UTC 24 |
6984390756 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.3257343009 |
|
|
Oct 09 04:10:55 PM UTC 24 |
Oct 09 04:11:01 PM UTC 24 |
803539232 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.3570122276 |
|
|
Oct 09 04:10:59 PM UTC 24 |
Oct 09 04:11:01 PM UTC 24 |
53066334 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.3207165831 |
|
|
Oct 09 04:08:39 PM UTC 24 |
Oct 09 04:11:02 PM UTC 24 |
163698291257 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.303963989 |
|
|
Oct 09 04:10:57 PM UTC 24 |
Oct 09 04:11:05 PM UTC 24 |
64024579 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.1547258328 |
|
|
Oct 09 04:11:03 PM UTC 24 |
Oct 09 04:11:05 PM UTC 24 |
42478788 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.4289512861 |
|
|
Oct 09 04:11:03 PM UTC 24 |
Oct 09 04:11:05 PM UTC 24 |
52297584 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_stress_all.1484157098 |
|
|
Oct 09 04:11:03 PM UTC 24 |
Oct 09 04:11:06 PM UTC 24 |
527649653 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.414373565 |
|
|
Oct 09 04:10:37 PM UTC 24 |
Oct 09 04:11:07 PM UTC 24 |
1575989337 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.3675674592 |
|
|
Oct 09 04:11:05 PM UTC 24 |
Oct 09 04:11:07 PM UTC 24 |
14140919 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.1432181965 |
|
|
Oct 09 04:11:01 PM UTC 24 |
Oct 09 04:11:08 PM UTC 24 |
143584756 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.1160128195 |
|
|
Oct 09 04:10:20 PM UTC 24 |
Oct 09 04:11:08 PM UTC 24 |
3416308012 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.1766354784 |
|
|
Oct 09 04:11:06 PM UTC 24 |
Oct 09 04:11:09 PM UTC 24 |
104248600 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.1473346509 |
|
|
Oct 09 04:11:06 PM UTC 24 |
Oct 09 04:11:09 PM UTC 24 |
145768130 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1884241258 |
|
|
Oct 09 04:07:08 PM UTC 24 |
Oct 09 04:11:09 PM UTC 24 |
54840800736 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.3024332802 |
|
|
Oct 09 04:11:06 PM UTC 24 |
Oct 09 04:11:10 PM UTC 24 |
754430491 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.2713716105 |
|
|
Oct 09 04:10:50 PM UTC 24 |
Oct 09 04:11:12 PM UTC 24 |
10937768052 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.618928472 |
|
|
Oct 09 04:07:52 PM UTC 24 |
Oct 09 04:11:12 PM UTC 24 |
97269901726 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_stress_all.424212980 |
|
|
Oct 09 04:10:24 PM UTC 24 |
Oct 09 04:11:13 PM UTC 24 |
4117013561 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.1730454013 |
|
|
Oct 09 04:11:09 PM UTC 24 |
Oct 09 04:11:13 PM UTC 24 |
211506770 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.3418270477 |
|
|
Oct 09 04:11:10 PM UTC 24 |
Oct 09 04:11:14 PM UTC 24 |
78281100 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.964856320 |
|
|
Oct 09 04:11:09 PM UTC 24 |
Oct 09 04:11:14 PM UTC 24 |
207337455 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.3551428395 |
|
|
Oct 09 04:11:10 PM UTC 24 |
Oct 09 04:11:15 PM UTC 24 |
253317979 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.3254367265 |
|
|
Oct 09 04:11:09 PM UTC 24 |
Oct 09 04:11:15 PM UTC 24 |
189345099 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_all.786721499 |
|
|
Oct 09 04:11:01 PM UTC 24 |
Oct 09 04:11:16 PM UTC 24 |
659517152 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.3805895967 |
|
|
Oct 09 04:11:15 PM UTC 24 |
Oct 09 04:11:17 PM UTC 24 |
35052491 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.3174382727 |
|
|
Oct 09 04:11:16 PM UTC 24 |
Oct 09 04:11:18 PM UTC 24 |
52452574 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.735405285 |
|
|
Oct 09 04:11:16 PM UTC 24 |
Oct 09 04:11:18 PM UTC 24 |
11986437 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.2267888011 |
|
|
Oct 09 04:09:00 PM UTC 24 |
Oct 09 04:11:19 PM UTC 24 |
31064910427 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.736180658 |
|
|
Oct 09 04:10:46 PM UTC 24 |
Oct 09 04:11:20 PM UTC 24 |
50943039973 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3530185731 |
|
|
Oct 09 04:11:19 PM UTC 24 |
Oct 09 04:11:21 PM UTC 24 |
20350968 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.557697403 |
|
|
Oct 09 04:11:12 PM UTC 24 |
Oct 09 04:11:22 PM UTC 24 |
889607157 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.3561060807 |
|
|
Oct 09 04:11:20 PM UTC 24 |
Oct 09 04:11:23 PM UTC 24 |
23514174 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1768723218 |
|
|
Oct 09 04:09:34 PM UTC 24 |
Oct 09 04:11:23 PM UTC 24 |
21297703222 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.681977814 |
|
|
Oct 09 04:10:18 PM UTC 24 |
Oct 09 04:11:24 PM UTC 24 |
4066481277 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.2900356583 |
|
|
Oct 09 04:11:08 PM UTC 24 |
Oct 09 04:11:25 PM UTC 24 |
1976198971 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.3130002495 |
|
|
Oct 09 04:11:20 PM UTC 24 |
Oct 09 04:11:25 PM UTC 24 |
856253704 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.1435988342 |
|
|
Oct 09 04:10:47 PM UTC 24 |
Oct 09 04:11:27 PM UTC 24 |
6418404633 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.3020516905 |
|
|
Oct 09 04:10:10 PM UTC 24 |
Oct 09 04:11:29 PM UTC 24 |
8458644509 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.2478226191 |
|
|
Oct 09 04:11:24 PM UTC 24 |
Oct 09 04:11:29 PM UTC 24 |
31376838 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.1356148067 |
|
|
Oct 09 04:11:08 PM UTC 24 |
Oct 09 04:11:29 PM UTC 24 |
51073419073 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.1810037058 |
|
|
Oct 09 04:11:26 PM UTC 24 |
Oct 09 04:11:32 PM UTC 24 |
145929372 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.2388366965 |
|
|
Oct 09 04:11:30 PM UTC 24 |
Oct 09 04:11:32 PM UTC 24 |
37449587 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_stress_all.62207628 |
|
|
Oct 09 04:11:30 PM UTC 24 |
Oct 09 04:11:33 PM UTC 24 |
806858120 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.494748523 |
|
|
Oct 09 04:11:32 PM UTC 24 |
Oct 09 04:11:35 PM UTC 24 |
24505344 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.2212624061 |
|
|
Oct 09 04:11:17 PM UTC 24 |
Oct 09 04:11:35 PM UTC 24 |
1413332838 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.1058482275 |
|
|
Oct 09 04:11:21 PM UTC 24 |
Oct 09 04:11:35 PM UTC 24 |
383244562 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.343576339 |
|
|
Oct 09 04:10:22 PM UTC 24 |
Oct 09 04:11:35 PM UTC 24 |
4272401416 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.716759424 |
|
|
Oct 09 04:11:22 PM UTC 24 |
Oct 09 04:11:37 PM UTC 24 |
1054693584 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.2800634340 |
|
|
Oct 09 04:11:23 PM UTC 24 |
Oct 09 04:11:38 PM UTC 24 |
4724381569 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.3735933334 |
|
|
Oct 09 04:11:36 PM UTC 24 |
Oct 09 04:11:39 PM UTC 24 |
227364289 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.1641320809 |
|
|
Oct 09 04:11:20 PM UTC 24 |
Oct 09 04:11:39 PM UTC 24 |
2805569485 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.267830333 |
|
|
Oct 09 04:11:51 PM UTC 24 |
Oct 09 04:11:53 PM UTC 24 |
14827983 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.3921375290 |
|
|
Oct 09 04:11:36 PM UTC 24 |
Oct 09 04:11:39 PM UTC 24 |
88966913 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.1541360268 |
|
|
Oct 09 04:08:41 PM UTC 24 |
Oct 09 04:11:39 PM UTC 24 |
20319093516 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_all.1741339890 |
|
|
Oct 09 04:10:07 PM UTC 24 |
Oct 09 04:11:44 PM UTC 24 |
17229181289 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.990061356 |
|
|
Oct 09 04:11:37 PM UTC 24 |
Oct 09 04:11:45 PM UTC 24 |
2073774227 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.2103219809 |
|
|
Oct 09 04:11:24 PM UTC 24 |
Oct 09 04:11:46 PM UTC 24 |
2112195432 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.3351974217 |
|
|
Oct 09 04:11:11 PM UTC 24 |
Oct 09 04:11:46 PM UTC 24 |
1909609201 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.1279246660 |
|
|
Oct 09 04:11:41 PM UTC 24 |
Oct 09 04:11:46 PM UTC 24 |
103908748 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.3628595419 |
|
|
Oct 09 04:11:38 PM UTC 24 |
Oct 09 04:11:47 PM UTC 24 |
1383995986 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.2313224189 |
|
|
Oct 09 04:11:37 PM UTC 24 |
Oct 09 04:11:49 PM UTC 24 |
6255846444 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.2151493829 |
|
|
Oct 09 04:11:28 PM UTC 24 |
Oct 09 04:11:50 PM UTC 24 |
4786315463 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_stress_all.651892964 |
|
|
Oct 09 04:11:47 PM UTC 24 |
Oct 09 04:11:50 PM UTC 24 |
54650030 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.15881405 |
|
|
Oct 09 04:11:39 PM UTC 24 |
Oct 09 04:11:50 PM UTC 24 |
2012911710 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_all.2500338329 |
|
|
Oct 09 04:10:39 PM UTC 24 |
Oct 09 04:11:50 PM UTC 24 |
4783053027 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.398062070 |
|
|
Oct 09 04:11:45 PM UTC 24 |
Oct 09 04:11:50 PM UTC 24 |
190256405 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.2707784571 |
|
|
Oct 09 04:11:48 PM UTC 24 |
Oct 09 04:11:50 PM UTC 24 |
20491537 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.1954676987 |
|
|
Oct 09 04:11:51 PM UTC 24 |
Oct 09 04:11:53 PM UTC 24 |
125940730 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.2442791402 |
|
|
Oct 09 04:10:06 PM UTC 24 |
Oct 09 04:11:53 PM UTC 24 |
83424701905 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.1349599243 |
|
|
Oct 09 04:11:39 PM UTC 24 |
Oct 09 04:11:54 PM UTC 24 |
2339550888 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.1688894621 |
|
|
Oct 09 04:11:51 PM UTC 24 |
Oct 09 04:11:54 PM UTC 24 |
276922369 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.1164400409 |
|
|
Oct 09 04:11:51 PM UTC 24 |
Oct 09 04:11:56 PM UTC 24 |
499538849 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.3973761349 |
|
|
Oct 09 04:09:21 PM UTC 24 |
Oct 09 04:11:56 PM UTC 24 |
31296838420 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.2653906337 |
|
|
Oct 09 04:11:34 PM UTC 24 |
Oct 09 04:11:57 PM UTC 24 |
7001440337 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.556986429 |
|
|
Oct 09 04:09:46 PM UTC 24 |
Oct 09 04:11:58 PM UTC 24 |
15127275712 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.3271158764 |
|
|
Oct 09 04:11:53 PM UTC 24 |
Oct 09 04:11:58 PM UTC 24 |
538957682 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.108640996 |
|
|
Oct 09 04:11:52 PM UTC 24 |
Oct 09 04:11:58 PM UTC 24 |
2775805894 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.1396954662 |
|
|
Oct 09 04:11:14 PM UTC 24 |
Oct 09 04:11:59 PM UTC 24 |
21871356280 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.2208572295 |
|
|
Oct 09 04:11:25 PM UTC 24 |
Oct 09 04:11:59 PM UTC 24 |
1799008632 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.681062186 |
|
|
Oct 09 04:11:55 PM UTC 24 |
Oct 09 04:12:00 PM UTC 24 |
124604805 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.2250398893 |
|
|
Oct 09 04:11:34 PM UTC 24 |
Oct 09 04:12:01 PM UTC 24 |
5043493549 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3183019998 |
|
|
Oct 09 04:11:51 PM UTC 24 |
Oct 09 04:12:01 PM UTC 24 |
4229061105 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.1933435644 |
|
|
Oct 09 04:11:59 PM UTC 24 |
Oct 09 04:12:02 PM UTC 24 |
30072898 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.2927167942 |
|
|
Oct 09 04:12:00 PM UTC 24 |
Oct 09 04:12:02 PM UTC 24 |
16284572 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.3190143979 |
|
|
Oct 09 04:11:57 PM UTC 24 |
Oct 09 04:12:03 PM UTC 24 |
99734427 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.2920505050 |
|
|
Oct 09 04:11:52 PM UTC 24 |
Oct 09 04:12:04 PM UTC 24 |
40227705048 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.1829854383 |
|
|
Oct 09 04:12:02 PM UTC 24 |
Oct 09 04:12:04 PM UTC 24 |
60443862 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.1614642592 |
|
|
Oct 09 04:11:55 PM UTC 24 |
Oct 09 04:12:04 PM UTC 24 |
392873709 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.2195503482 |
|
|
Oct 09 04:11:39 PM UTC 24 |
Oct 09 04:12:06 PM UTC 24 |
1910578029 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.2086183180 |
|
|
Oct 09 04:12:03 PM UTC 24 |
Oct 09 04:12:06 PM UTC 24 |
44911348 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.4122049281 |
|
|
Oct 09 04:11:54 PM UTC 24 |
Oct 09 04:12:07 PM UTC 24 |
899745580 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1736165230 |
|
|
Oct 09 04:12:01 PM UTC 24 |
Oct 09 04:12:10 PM UTC 24 |
553807882 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_mailbox.4287350792 |
|
|
Oct 09 04:12:06 PM UTC 24 |
Oct 09 04:12:10 PM UTC 24 |
286099720 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_all.2811842036 |
|
|
Oct 09 04:12:02 PM UTC 24 |
Oct 09 04:12:10 PM UTC 24 |
626701208 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.2434707967 |
|
|
Oct 09 04:12:07 PM UTC 24 |
Oct 09 04:12:11 PM UTC 24 |
323273072 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.3003815518 |
|
|
Oct 09 04:09:05 PM UTC 24 |
Oct 09 04:12:13 PM UTC 24 |
16125335532 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_all.748202009 |
|
|
Oct 09 04:11:58 PM UTC 24 |
Oct 09 04:12:14 PM UTC 24 |
2278231234 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.279240332 |
|
|
Oct 09 04:12:06 PM UTC 24 |
Oct 09 04:12:14 PM UTC 24 |
399236455 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.995776821 |
|
|
Oct 09 04:12:04 PM UTC 24 |
Oct 09 04:12:16 PM UTC 24 |
1005493380 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.4009984489 |
|
|
Oct 09 04:12:15 PM UTC 24 |
Oct 09 04:12:17 PM UTC 24 |
36324418 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.167445012 |
|
|
Oct 09 04:12:15 PM UTC 24 |
Oct 09 04:12:17 PM UTC 24 |
77664034 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.2017760951 |
|
|
Oct 09 04:12:05 PM UTC 24 |
Oct 09 04:12:19 PM UTC 24 |
584372752 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_and_tpm.3188724008 |
|
|
Oct 09 04:11:47 PM UTC 24 |
Oct 09 04:12:20 PM UTC 24 |
1227044273 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.2620679684 |
|
|
Oct 09 04:12:18 PM UTC 24 |
Oct 09 04:12:21 PM UTC 24 |
73462493 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.3625214912 |
|
|
Oct 09 04:12:09 PM UTC 24 |
Oct 09 04:12:22 PM UTC 24 |
1272555169 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.119722376 |
|
|
Oct 09 04:12:18 PM UTC 24 |
Oct 09 04:12:23 PM UTC 24 |
248341006 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.1923446805 |
|
|
Oct 09 04:12:19 PM UTC 24 |
Oct 09 04:12:24 PM UTC 24 |
423943677 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.2484117936 |
|
|
Oct 09 04:12:21 PM UTC 24 |
Oct 09 04:12:25 PM UTC 24 |
373782010 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode.4150236687 |
|
|
Oct 09 04:12:26 PM UTC 24 |
Oct 09 04:12:31 PM UTC 24 |
173547373 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.3918142999 |
|
|
Oct 09 04:12:15 PM UTC 24 |
Oct 09 04:12:33 PM UTC 24 |
3241125732 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.378622185 |
|
|
Oct 09 04:12:25 PM UTC 24 |
Oct 09 04:12:33 PM UTC 24 |
1551951286 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.596093503 |
|
|
Oct 09 04:08:24 PM UTC 24 |
Oct 09 04:12:34 PM UTC 24 |
46483315827 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.282993567 |
|
|
Oct 09 04:05:14 PM UTC 24 |
Oct 09 04:12:34 PM UTC 24 |
33241299309 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.406471812 |
|
|
Oct 09 04:12:22 PM UTC 24 |
Oct 09 04:12:35 PM UTC 24 |
1142466627 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2225080208 |
|
|
Oct 09 04:12:03 PM UTC 24 |
Oct 09 04:12:36 PM UTC 24 |
19775908793 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.3555458720 |
|
|
Oct 09 04:11:55 PM UTC 24 |
Oct 09 04:12:36 PM UTC 24 |
30516422988 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_all.4188978836 |
|
|
Oct 09 04:12:17 PM UTC 24 |
Oct 09 04:12:36 PM UTC 24 |
2326282277 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/23.spi_device_stress_all.3469724273 |
|
|
Oct 09 04:07:59 PM UTC 24 |
Oct 09 04:12:38 PM UTC 24 |
206442909819 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.646877238 |
|
|
Oct 09 04:12:37 PM UTC 24 |
Oct 09 04:12:39 PM UTC 24 |
44031661 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.2894430536 |
|
|
Oct 09 04:12:37 PM UTC 24 |
Oct 09 04:12:39 PM UTC 24 |
61152087 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/29.spi_device_stress_all.3104246464 |
|
|
Oct 09 04:09:51 PM UTC 24 |
Oct 09 04:12:41 PM UTC 24 |
10455586374 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.2872218621 |
|
|
Oct 09 04:12:40 PM UTC 24 |
Oct 09 04:12:43 PM UTC 24 |
186446971 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_rw.2912940369 |
|
|
Oct 09 04:12:41 PM UTC 24 |
Oct 09 04:12:44 PM UTC 24 |
739781250 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode_ignore_cmds.1562517187 |
|
|
Oct 09 04:12:08 PM UTC 24 |
Oct 09 04:12:45 PM UTC 24 |
2192774373 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_stress_all.3728834911 |
|
|
Oct 09 04:10:10 PM UTC 24 |
Oct 09 04:12:49 PM UTC 24 |
41955778980 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_all.2400025105 |
|
|
Oct 09 04:12:34 PM UTC 24 |
Oct 09 04:12:50 PM UTC 24 |
755039946 ps |