| T822 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_intercept.2271140207 |
|
|
Oct 09 04:12:45 PM UTC 24 |
Oct 09 04:12:51 PM UTC 24 |
368437997 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_all.2893168010 |
|
|
Oct 09 04:11:46 PM UTC 24 |
Oct 09 04:12:51 PM UTC 24 |
8681589945 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_upload.786884846 |
|
|
Oct 09 04:12:24 PM UTC 24 |
Oct 09 04:12:52 PM UTC 24 |
3445733098 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.38359717 |
|
|
Oct 09 04:12:43 PM UTC 24 |
Oct 09 04:12:54 PM UTC 24 |
2530785534 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.2049536440 |
|
|
Oct 09 04:12:33 PM UTC 24 |
Oct 09 04:12:54 PM UTC 24 |
5177543610 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_cfg_cmd.2339582253 |
|
|
Oct 09 04:12:52 PM UTC 24 |
Oct 09 04:12:55 PM UTC 24 |
388280449 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.3365455706 |
|
|
Oct 09 04:10:37 PM UTC 24 |
Oct 09 04:12:56 PM UTC 24 |
13701859308 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.724634199 |
|
|
Oct 09 04:11:14 PM UTC 24 |
Oct 09 04:12:58 PM UTC 24 |
21456930525 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_alert_test.2835277786 |
|
|
Oct 09 04:12:58 PM UTC 24 |
Oct 09 04:13:00 PM UTC 24 |
23052172 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.1240349307 |
|
|
Oct 09 04:12:44 PM UTC 24 |
Oct 09 04:13:00 PM UTC 24 |
12365977400 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.927735217 |
|
|
Oct 09 04:12:07 PM UTC 24 |
Oct 09 04:13:00 PM UTC 24 |
13642761083 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_all.333713187 |
|
|
Oct 09 04:09:34 PM UTC 24 |
Oct 09 04:13:01 PM UTC 24 |
150457406672 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_csb_read.911144731 |
|
|
Oct 09 04:12:59 PM UTC 24 |
Oct 09 04:13:01 PM UTC 24 |
20677949 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_all.504717205 |
|
|
Oct 09 04:12:39 PM UTC 24 |
Oct 09 04:13:03 PM UTC 24 |
4123303962 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_all.13046241 |
|
|
Oct 09 04:10:22 PM UTC 24 |
Oct 09 04:13:03 PM UTC 24 |
38339825836 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.2581272179 |
|
|
Oct 09 04:13:01 PM UTC 24 |
Oct 09 04:13:04 PM UTC 24 |
262869974 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_mailbox.541167171 |
|
|
Oct 09 04:12:46 PM UTC 24 |
Oct 09 04:13:04 PM UTC 24 |
21356316481 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_upload.246640755 |
|
|
Oct 09 04:12:50 PM UTC 24 |
Oct 09 04:13:04 PM UTC 24 |
886327126 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_rw.1131336261 |
|
|
Oct 09 04:13:02 PM UTC 24 |
Oct 09 04:13:08 PM UTC 24 |
197205120 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.1885090744 |
|
|
Oct 09 04:12:37 PM UTC 24 |
Oct 09 04:13:08 PM UTC 24 |
5907651971 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_mailbox.436930326 |
|
|
Oct 09 04:13:05 PM UTC 24 |
Oct 09 04:13:09 PM UTC 24 |
28696030 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_mode.2438151237 |
|
|
Oct 09 04:12:52 PM UTC 24 |
Oct 09 04:13:10 PM UTC 24 |
752137303 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_cfg_cmd.1352733464 |
|
|
Oct 09 04:13:05 PM UTC 24 |
Oct 09 04:13:11 PM UTC 24 |
99875538 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/13.spi_device_stress_all.2016355638 |
|
|
Oct 09 04:03:20 PM UTC 24 |
Oct 09 04:13:11 PM UTC 24 |
249984092711 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_all.2090674521 |
|
|
Oct 09 04:13:01 PM UTC 24 |
Oct 09 04:13:12 PM UTC 24 |
2613172554 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_stress_all.657612162 |
|
|
Oct 09 04:13:13 PM UTC 24 |
Oct 09 04:13:15 PM UTC 24 |
198978260 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.1672207922 |
|
|
Oct 09 04:13:01 PM UTC 24 |
Oct 09 04:13:17 PM UTC 24 |
4465208625 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_alert_test.3177935640 |
|
|
Oct 09 04:13:16 PM UTC 24 |
Oct 09 04:13:18 PM UTC 24 |
29221532 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_intercept.3439140196 |
|
|
Oct 09 04:13:05 PM UTC 24 |
Oct 09 04:13:18 PM UTC 24 |
949066549 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_upload.3705484890 |
|
|
Oct 09 04:13:05 PM UTC 24 |
Oct 09 04:13:19 PM UTC 24 |
1743405643 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_pass_addr_payload_swap.1102341494 |
|
|
Oct 09 04:13:04 PM UTC 24 |
Oct 09 04:13:19 PM UTC 24 |
1346239397 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.2044415914 |
|
|
Oct 09 04:12:53 PM UTC 24 |
Oct 09 04:13:19 PM UTC 24 |
1829850985 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_all.2867920684 |
|
|
Oct 09 04:12:10 PM UTC 24 |
Oct 09 04:13:20 PM UTC 24 |
2158793324 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_csb_read.3095872263 |
|
|
Oct 09 04:13:18 PM UTC 24 |
Oct 09 04:13:21 PM UTC 24 |
33288705 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_stress_all.517570405 |
|
|
Oct 09 04:11:15 PM UTC 24 |
Oct 09 04:13:22 PM UTC 24 |
19027152375 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_sts_read.273098772 |
|
|
Oct 09 04:13:20 PM UTC 24 |
Oct 09 04:13:23 PM UTC 24 |
245515575 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_read_hw_reg.644816107 |
|
|
Oct 09 04:13:19 PM UTC 24 |
Oct 09 04:13:24 PM UTC 24 |
243820597 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_rw.2770469460 |
|
|
Oct 09 04:13:20 PM UTC 24 |
Oct 09 04:13:24 PM UTC 24 |
88226335 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_read_buffer_direct.1980640256 |
|
|
Oct 09 04:13:10 PM UTC 24 |
Oct 09 04:13:24 PM UTC 24 |
3827152712 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.4144198789 |
|
|
Oct 09 04:10:42 PM UTC 24 |
Oct 09 04:13:25 PM UTC 24 |
12967932221 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.4063659307 |
|
|
Oct 09 04:12:32 PM UTC 24 |
Oct 09 04:13:25 PM UTC 24 |
15779941438 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_pass_cmd_filtering.3480582275 |
|
|
Oct 09 04:13:20 PM UTC 24 |
Oct 09 04:13:25 PM UTC 24 |
31592688 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_and_tpm_min_idle.2499508908 |
|
|
Oct 09 04:12:11 PM UTC 24 |
Oct 09 04:13:29 PM UTC 24 |
65408278153 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_cfg_cmd.812132243 |
|
|
Oct 09 04:13:25 PM UTC 24 |
Oct 09 04:13:30 PM UTC 24 |
123469021 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_pass_cmd_filtering.3454997979 |
|
|
Oct 09 04:13:02 PM UTC 24 |
Oct 09 04:13:31 PM UTC 24 |
12665218141 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_and_tpm.3247736610 |
|
|
Oct 09 04:11:59 PM UTC 24 |
Oct 09 04:13:31 PM UTC 24 |
28404134098 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_tpm_all.2898593093 |
|
|
Oct 09 04:13:19 PM UTC 24 |
Oct 09 04:13:31 PM UTC 24 |
730732031 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.435475822 |
|
|
Oct 09 04:11:03 PM UTC 24 |
Oct 09 04:13:32 PM UTC 24 |
86102337121 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_read_buffer_direct.637823802 |
|
|
Oct 09 04:13:26 PM UTC 24 |
Oct 09 04:13:32 PM UTC 24 |
120658876 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_alert_test.2934561730 |
|
|
Oct 09 04:13:32 PM UTC 24 |
Oct 09 04:13:34 PM UTC 24 |
13140784 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_csb_read.99724243 |
|
|
Oct 09 04:13:32 PM UTC 24 |
Oct 09 04:13:34 PM UTC 24 |
281194803 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_intercept.3898990461 |
|
|
Oct 09 04:13:22 PM UTC 24 |
Oct 09 04:13:34 PM UTC 24 |
568012652 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_sts_read.1444972410 |
|
|
Oct 09 04:13:33 PM UTC 24 |
Oct 09 04:13:35 PM UTC 24 |
32609218 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_mailbox.667223223 |
|
|
Oct 09 04:13:23 PM UTC 24 |
Oct 09 04:13:36 PM UTC 24 |
263177683 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_mode.2134422454 |
|
|
Oct 09 04:13:09 PM UTC 24 |
Oct 09 04:13:37 PM UTC 24 |
2253311703 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_pass_addr_payload_swap.2689016238 |
|
|
Oct 09 04:13:22 PM UTC 24 |
Oct 09 04:13:38 PM UTC 24 |
2333966467 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_mode_ignore_cmds.2848032019 |
|
|
Oct 09 04:13:09 PM UTC 24 |
Oct 09 04:13:38 PM UTC 24 |
1529622671 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_rw.3876610314 |
|
|
Oct 09 04:13:35 PM UTC 24 |
Oct 09 04:13:39 PM UTC 24 |
114841846 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.3250458244 |
|
|
Oct 09 04:11:02 PM UTC 24 |
Oct 09 04:13:39 PM UTC 24 |
35623141254 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_pass_addr_payload_swap.2420237022 |
|
|
Oct 09 04:13:36 PM UTC 24 |
Oct 09 04:13:40 PM UTC 24 |
108911846 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_pass_cmd_filtering.490194427 |
|
|
Oct 09 04:13:35 PM UTC 24 |
Oct 09 04:13:40 PM UTC 24 |
108306326 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_read_hw_reg.1574085801 |
|
|
Oct 09 04:13:32 PM UTC 24 |
Oct 09 04:13:41 PM UTC 24 |
4330381714 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_intercept.1696077522 |
|
|
Oct 09 04:13:37 PM UTC 24 |
Oct 09 04:13:41 PM UTC 24 |
67426353 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_upload.3188653857 |
|
|
Oct 09 04:13:24 PM UTC 24 |
Oct 09 04:13:41 PM UTC 24 |
5848433594 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_all.678140397 |
|
|
Oct 09 04:13:39 PM UTC 24 |
Oct 09 04:13:42 PM UTC 24 |
226219680 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_alert_test.172808983 |
|
|
Oct 09 04:13:42 PM UTC 24 |
Oct 09 04:13:44 PM UTC 24 |
21794686 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_read_buffer_direct.4231507685 |
|
|
Oct 09 04:13:39 PM UTC 24 |
Oct 09 04:13:44 PM UTC 24 |
272025945 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_csb_read.2541891046 |
|
|
Oct 09 04:13:42 PM UTC 24 |
Oct 09 04:13:44 PM UTC 24 |
64439559 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_all.3481290513 |
|
|
Oct 09 04:13:10 PM UTC 24 |
Oct 09 04:13:45 PM UTC 24 |
4526099841 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_upload.2517242356 |
|
|
Oct 09 04:13:37 PM UTC 24 |
Oct 09 04:13:47 PM UTC 24 |
1221631236 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_rw.1106379481 |
|
|
Oct 09 04:13:45 PM UTC 24 |
Oct 09 04:13:48 PM UTC 24 |
351142735 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_mode.2588971619 |
|
|
Oct 09 04:13:25 PM UTC 24 |
Oct 09 04:13:48 PM UTC 24 |
1147331268 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_sts_read.4009507527 |
|
|
Oct 09 04:13:45 PM UTC 24 |
Oct 09 04:13:48 PM UTC 24 |
536813013 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_mode_ignore_cmds.3006395386 |
|
|
Oct 09 04:13:25 PM UTC 24 |
Oct 09 04:13:49 PM UTC 24 |
1138639415 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_cfg_cmd.3849755949 |
|
|
Oct 09 04:13:38 PM UTC 24 |
Oct 09 04:13:50 PM UTC 24 |
1265430016 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_pass_addr_payload_swap.356980311 |
|
|
Oct 09 04:13:48 PM UTC 24 |
Oct 09 04:13:51 PM UTC 24 |
601019494 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_intercept.1037975704 |
|
|
Oct 09 04:13:49 PM UTC 24 |
Oct 09 04:13:54 PM UTC 24 |
166942889 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_mailbox.1134394485 |
|
|
Oct 09 04:12:23 PM UTC 24 |
Oct 09 04:13:55 PM UTC 24 |
8470257576 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_mode.3300655889 |
|
|
Oct 09 04:13:39 PM UTC 24 |
Oct 09 04:13:56 PM UTC 24 |
3177155398 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.1437574960 |
|
|
Oct 09 04:11:59 PM UTC 24 |
Oct 09 04:13:56 PM UTC 24 |
10461600277 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_cfg_cmd.3741077157 |
|
|
Oct 09 04:13:50 PM UTC 24 |
Oct 09 04:13:57 PM UTC 24 |
964972692 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_mailbox.1653088037 |
|
|
Oct 09 04:13:49 PM UTC 24 |
Oct 09 04:14:00 PM UTC 24 |
1701992602 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.248272591 |
|
|
Oct 09 04:10:40 PM UTC 24 |
Oct 09 04:14:02 PM UTC 24 |
78643853852 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_alert_test.231740699 |
|
|
Oct 09 04:14:01 PM UTC 24 |
Oct 09 04:14:03 PM UTC 24 |
18194600 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_upload.1810284564 |
|
|
Oct 09 04:13:49 PM UTC 24 |
Oct 09 04:14:04 PM UTC 24 |
1381679914 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_csb_read.3322906813 |
|
|
Oct 09 04:14:03 PM UTC 24 |
Oct 09 04:14:05 PM UTC 24 |
27279909 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_mode_ignore_cmds.3094519165 |
|
|
Oct 09 04:13:52 PM UTC 24 |
Oct 09 04:14:06 PM UTC 24 |
1755637174 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_read_buffer_direct.566195867 |
|
|
Oct 09 04:13:54 PM UTC 24 |
Oct 09 04:14:07 PM UTC 24 |
2520974501 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_sts_read.2832152212 |
|
|
Oct 09 04:14:06 PM UTC 24 |
Oct 09 04:14:09 PM UTC 24 |
92168012 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_read_hw_reg.1443320222 |
|
|
Oct 09 04:13:43 PM UTC 24 |
Oct 09 04:14:09 PM UTC 24 |
8327031589 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.3789999908 |
|
|
Oct 09 04:11:30 PM UTC 24 |
Oct 09 04:14:09 PM UTC 24 |
43327170938 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_read_hw_reg.2578950112 |
|
|
Oct 09 04:14:04 PM UTC 24 |
Oct 09 04:14:10 PM UTC 24 |
1288127244 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_rw.572905412 |
|
|
Oct 09 04:14:07 PM UTC 24 |
Oct 09 04:14:10 PM UTC 24 |
45952080 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_tpm_all.309511041 |
|
|
Oct 09 04:13:33 PM UTC 24 |
Oct 09 04:14:11 PM UTC 24 |
22565947034 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_and_tpm_min_idle.3258453649 |
|
|
Oct 09 04:13:30 PM UTC 24 |
Oct 09 04:14:12 PM UTC 24 |
10814239952 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_mailbox.2502761447 |
|
|
Oct 09 04:13:37 PM UTC 24 |
Oct 09 04:14:13 PM UTC 24 |
4538837495 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_mode.590697828 |
|
|
Oct 09 04:13:51 PM UTC 24 |
Oct 09 04:14:16 PM UTC 24 |
2369856698 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_intercept.752447266 |
|
|
Oct 09 04:14:10 PM UTC 24 |
Oct 09 04:14:16 PM UTC 24 |
172662358 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_pass_cmd_filtering.512125728 |
|
|
Oct 09 04:13:45 PM UTC 24 |
Oct 09 04:14:20 PM UTC 24 |
122367563400 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_cfg_cmd.3963326488 |
|
|
Oct 09 04:14:11 PM UTC 24 |
Oct 09 04:14:23 PM UTC 24 |
610598825 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_read_buffer_direct.629002438 |
|
|
Oct 09 04:14:14 PM UTC 24 |
Oct 09 04:14:23 PM UTC 24 |
303268544 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_pass_addr_payload_swap.1818610464 |
|
|
Oct 09 04:14:10 PM UTC 24 |
Oct 09 04:14:23 PM UTC 24 |
1205451970 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_pass_cmd_filtering.2211497359 |
|
|
Oct 09 04:14:09 PM UTC 24 |
Oct 09 04:14:24 PM UTC 24 |
2077828674 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_alert_test.2953185696 |
|
|
Oct 09 04:14:24 PM UTC 24 |
Oct 09 04:14:26 PM UTC 24 |
11831244 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_stress_all.3510867762 |
|
|
Oct 09 04:14:24 PM UTC 24 |
Oct 09 04:14:26 PM UTC 24 |
295753617 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_tpm_all.35227142 |
|
|
Oct 09 04:13:45 PM UTC 24 |
Oct 09 04:14:27 PM UTC 24 |
4448709013 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_csb_read.269236185 |
|
|
Oct 09 04:14:26 PM UTC 24 |
Oct 09 04:14:28 PM UTC 24 |
93077112 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_tpm_all.2482821815 |
|
|
Oct 09 04:14:04 PM UTC 24 |
Oct 09 04:14:29 PM UTC 24 |
1219555652 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_sts_read.1823790155 |
|
|
Oct 09 04:14:28 PM UTC 24 |
Oct 09 04:14:30 PM UTC 24 |
22959357 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_rw.4103584432 |
|
|
Oct 09 04:14:28 PM UTC 24 |
Oct 09 04:14:30 PM UTC 24 |
30188837 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_read_hw_reg.3517681131 |
|
|
Oct 09 04:14:26 PM UTC 24 |
Oct 09 04:14:32 PM UTC 24 |
781894499 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_all.2555153551 |
|
|
Oct 09 04:11:14 PM UTC 24 |
Oct 09 04:14:33 PM UTC 24 |
34913252637 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_pass_cmd_filtering.2797798703 |
|
|
Oct 09 04:14:30 PM UTC 24 |
Oct 09 04:14:34 PM UTC 24 |
364638048 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_and_tpm_min_idle.3145086030 |
|
|
Oct 09 04:13:13 PM UTC 24 |
Oct 09 04:14:34 PM UTC 24 |
4957852589 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_mailbox.3980329434 |
|
|
Oct 09 04:14:10 PM UTC 24 |
Oct 09 04:14:35 PM UTC 24 |
1153539075 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_mode.1686661081 |
|
|
Oct 09 04:14:12 PM UTC 24 |
Oct 09 04:14:35 PM UTC 24 |
9991615979 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_tpm_all.1443015111 |
|
|
Oct 09 04:14:28 PM UTC 24 |
Oct 09 04:14:38 PM UTC 24 |
1367715937 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_all.3094975867 |
|
|
Oct 09 04:13:57 PM UTC 24 |
Oct 09 04:14:38 PM UTC 24 |
6636206022 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_intercept.2132119759 |
|
|
Oct 09 04:14:33 PM UTC 24 |
Oct 09 04:14:39 PM UTC 24 |
270212747 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.3277979863 |
|
|
Oct 09 04:09:31 PM UTC 24 |
Oct 09 04:14:43 PM UTC 24 |
70559063416 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_mode.1012507506 |
|
|
Oct 09 04:14:35 PM UTC 24 |
Oct 09 04:14:43 PM UTC 24 |
2310188944 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_read_buffer_direct.3533946820 |
|
|
Oct 09 04:14:37 PM UTC 24 |
Oct 09 04:14:43 PM UTC 24 |
151097025 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_upload.1084888417 |
|
|
Oct 09 04:14:11 PM UTC 24 |
Oct 09 04:14:44 PM UTC 24 |
5480703608 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.451292337 |
|
|
Oct 09 04:05:57 PM UTC 24 |
Oct 09 04:14:45 PM UTC 24 |
203222197811 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_alert_test.3524472042 |
|
|
Oct 09 04:14:45 PM UTC 24 |
Oct 09 04:14:47 PM UTC 24 |
15976895 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_csb_read.2696918621 |
|
|
Oct 09 04:14:45 PM UTC 24 |
Oct 09 04:14:47 PM UTC 24 |
68105185 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_sts_read.1536569113 |
|
|
Oct 09 04:14:46 PM UTC 24 |
Oct 09 04:14:48 PM UTC 24 |
90792993 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_rw.4154425473 |
|
|
Oct 09 04:14:46 PM UTC 24 |
Oct 09 04:14:50 PM UTC 24 |
60887572 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_and_tpm_min_idle.1480770045 |
|
|
Oct 09 04:13:58 PM UTC 24 |
Oct 09 04:14:52 PM UTC 24 |
11741799907 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_pass_addr_payload_swap.1985122687 |
|
|
Oct 09 04:14:30 PM UTC 24 |
Oct 09 04:14:55 PM UTC 24 |
4710818270 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_read_hw_reg.1918524143 |
|
|
Oct 09 04:14:45 PM UTC 24 |
Oct 09 04:14:56 PM UTC 24 |
757888936 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_and_tpm.2677319443 |
|
|
Oct 09 04:13:41 PM UTC 24 |
Oct 09 04:14:57 PM UTC 24 |
10119559828 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_all.3094467503 |
|
|
Oct 09 04:12:53 PM UTC 24 |
Oct 09 04:14:57 PM UTC 24 |
50661109074 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_cfg_cmd.4112178382 |
|
|
Oct 09 04:14:35 PM UTC 24 |
Oct 09 04:14:58 PM UTC 24 |
1005798163 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.910733815 |
|
|
Oct 09 04:09:07 PM UTC 24 |
Oct 09 04:14:59 PM UTC 24 |
63544711922 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_intercept.469693971 |
|
|
Oct 09 04:14:50 PM UTC 24 |
Oct 09 04:14:59 PM UTC 24 |
319615467 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_and_tpm_min_idle.2155674923 |
|
|
Oct 09 04:13:41 PM UTC 24 |
Oct 09 04:15:01 PM UTC 24 |
9365796688 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_mailbox.344757735 |
|
|
Oct 09 04:14:33 PM UTC 24 |
Oct 09 04:15:02 PM UTC 24 |
603880313 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_pass_addr_payload_swap.2929547264 |
|
|
Oct 09 04:14:48 PM UTC 24 |
Oct 09 04:15:05 PM UTC 24 |
22476756129 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_alert_test.384303177 |
|
|
Oct 09 04:15:03 PM UTC 24 |
Oct 09 04:15:05 PM UTC 24 |
13478634 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_flash_mode_ignore_cmds.1574980856 |
|
|
Oct 09 04:13:39 PM UTC 24 |
Oct 09 04:15:05 PM UTC 24 |
35140857008 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_pass_cmd_filtering.2400209812 |
|
|
Oct 09 04:14:47 PM UTC 24 |
Oct 09 04:15:06 PM UTC 24 |
4847730470 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_read_buffer_direct.845697572 |
|
|
Oct 09 04:14:58 PM UTC 24 |
Oct 09 04:15:08 PM UTC 24 |
1923622777 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_csb_read.2186601696 |
|
|
Oct 09 04:15:06 PM UTC 24 |
Oct 09 04:15:08 PM UTC 24 |
19278116 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_sts_read.700050904 |
|
|
Oct 09 04:15:07 PM UTC 24 |
Oct 09 04:15:09 PM UTC 24 |
26945215 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_rw.2033476446 |
|
|
Oct 09 04:15:09 PM UTC 24 |
Oct 09 04:15:12 PM UTC 24 |
27716334 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_and_tpm_min_idle.2565456518 |
|
|
Oct 09 04:12:35 PM UTC 24 |
Oct 09 04:15:14 PM UTC 24 |
30506622845 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_mode.133452452 |
|
|
Oct 09 04:14:57 PM UTC 24 |
Oct 09 04:15:17 PM UTC 24 |
755465626 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_and_tpm_min_idle.3750741295 |
|
|
Oct 09 04:11:47 PM UTC 24 |
Oct 09 04:15:18 PM UTC 24 |
86361376398 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_tpm_all.1333546772 |
|
|
Oct 09 04:14:46 PM UTC 24 |
Oct 09 04:15:18 PM UTC 24 |
19354235631 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_upload.1058362543 |
|
|
Oct 09 04:14:35 PM UTC 24 |
Oct 09 04:15:19 PM UTC 24 |
29687919632 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_read_hw_reg.2471591736 |
|
|
Oct 09 04:15:06 PM UTC 24 |
Oct 09 04:15:20 PM UTC 24 |
5695943374 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_intercept.591777407 |
|
|
Oct 09 04:15:13 PM UTC 24 |
Oct 09 04:15:20 PM UTC 24 |
500684083 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_and_tpm_min_idle.4164343936 |
|
|
Oct 09 04:12:55 PM UTC 24 |
Oct 09 04:15:21 PM UTC 24 |
16330385943 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_and_tpm_min_idle.1810584839 |
|
|
Oct 09 04:14:39 PM UTC 24 |
Oct 09 04:15:23 PM UTC 24 |
1138569245 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_pass_cmd_filtering.1047470255 |
|
|
Oct 09 04:15:09 PM UTC 24 |
Oct 09 04:15:24 PM UTC 24 |
2229584026 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_upload.861436546 |
|
|
Oct 09 04:15:18 PM UTC 24 |
Oct 09 04:15:24 PM UTC 24 |
593521621 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_cfg_cmd.3514803874 |
|
|
Oct 09 04:14:56 PM UTC 24 |
Oct 09 04:15:24 PM UTC 24 |
6713105815 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_mode.4284370956 |
|
|
Oct 09 04:15:19 PM UTC 24 |
Oct 09 04:15:24 PM UTC 24 |
95729804 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_all.4128651624 |
|
|
Oct 09 04:14:17 PM UTC 24 |
Oct 09 04:15:24 PM UTC 24 |
1632061348 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_read_buffer_direct.786228695 |
|
|
Oct 09 04:15:20 PM UTC 24 |
Oct 09 04:15:27 PM UTC 24 |
357793730 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_upload.1310471718 |
|
|
Oct 09 04:14:53 PM UTC 24 |
Oct 09 04:15:27 PM UTC 24 |
9572356815 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_csb_read.3209905276 |
|
|
Oct 09 04:15:25 PM UTC 24 |
Oct 09 04:15:27 PM UTC 24 |
11977155 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_alert_test.3087042493 |
|
|
Oct 09 04:15:25 PM UTC 24 |
Oct 09 04:15:27 PM UTC 24 |
44157782 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_cfg_cmd.1859448366 |
|
|
Oct 09 04:15:18 PM UTC 24 |
Oct 09 04:15:29 PM UTC 24 |
2568589687 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_rw.3895129745 |
|
|
Oct 09 04:15:27 PM UTC 24 |
Oct 09 04:15:29 PM UTC 24 |
35897460 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_sts_read.849180338 |
|
|
Oct 09 04:15:27 PM UTC 24 |
Oct 09 04:15:30 PM UTC 24 |
30432268 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_mailbox.2978287227 |
|
|
Oct 09 04:15:15 PM UTC 24 |
Oct 09 04:15:30 PM UTC 24 |
397340338 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_read_hw_reg.1772737716 |
|
|
Oct 09 04:15:25 PM UTC 24 |
Oct 09 04:15:32 PM UTC 24 |
6531524912 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_pass_cmd_filtering.4091850928 |
|
|
Oct 09 04:15:28 PM UTC 24 |
Oct 09 04:15:33 PM UTC 24 |
58452778 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_pass_addr_payload_swap.142502794 |
|
|
Oct 09 04:15:29 PM UTC 24 |
Oct 09 04:15:34 PM UTC 24 |
99837724 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_pass_addr_payload_swap.4203341640 |
|
|
Oct 09 04:15:11 PM UTC 24 |
Oct 09 04:15:34 PM UTC 24 |
48088413904 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_cfg_cmd.964010757 |
|
|
Oct 09 04:15:31 PM UTC 24 |
Oct 09 04:15:37 PM UTC 24 |
232279003 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_mode_ignore_cmds.1929236145 |
|
|
Oct 09 04:14:57 PM UTC 24 |
Oct 09 04:15:39 PM UTC 24 |
2748553167 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_and_tpm.3467673025 |
|
|
Oct 09 04:13:27 PM UTC 24 |
Oct 09 04:15:43 PM UTC 24 |
12731822751 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_tpm_all.1092697068 |
|
|
Oct 09 04:15:06 PM UTC 24 |
Oct 09 04:15:44 PM UTC 24 |
7635957347 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_read_buffer_direct.744783781 |
|
|
Oct 09 04:15:35 PM UTC 24 |
Oct 09 04:15:44 PM UTC 24 |
3471511629 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_alert_test.1485322263 |
|
|
Oct 09 04:15:44 PM UTC 24 |
Oct 09 04:15:47 PM UTC 24 |
15175305 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_upload.3120899113 |
|
|
Oct 09 04:15:31 PM UTC 24 |
Oct 09 04:15:47 PM UTC 24 |
5307438731 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_stress_all.2699200050 |
|
|
Oct 09 04:15:02 PM UTC 24 |
Oct 09 04:15:50 PM UTC 24 |
8219377087 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_mode_ignore_cmds.4237812020 |
|
|
Oct 09 04:12:52 PM UTC 24 |
Oct 09 04:15:54 PM UTC 24 |
41280015266 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.2291317947 |
|
|
Oct 09 04:03:14 PM UTC 24 |
Oct 09 04:15:56 PM UTC 24 |
242300750958 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_mode.1541322017 |
|
|
Oct 09 04:15:32 PM UTC 24 |
Oct 09 04:15:56 PM UTC 24 |
4641469976 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_intercept.1896759117 |
|
|
Oct 09 04:15:30 PM UTC 24 |
Oct 09 04:15:58 PM UTC 24 |
8614364090 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_stress_all.2039644703 |
|
|
Oct 09 04:13:31 PM UTC 24 |
Oct 09 04:16:01 PM UTC 24 |
14165916675 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_and_tpm.2534748642 |
|
|
Oct 09 04:14:39 PM UTC 24 |
Oct 09 04:16:05 PM UTC 24 |
20622352026 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_all.1827518851 |
|
|
Oct 09 04:14:59 PM UTC 24 |
Oct 09 04:16:07 PM UTC 24 |
4765457074 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_tpm_all.889454675 |
|
|
Oct 09 04:15:25 PM UTC 24 |
Oct 09 04:16:08 PM UTC 24 |
5903537840 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.4288333652 |
|
|
Oct 09 04:11:41 PM UTC 24 |
Oct 09 04:16:08 PM UTC 24 |
593296414242 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_stress_all.1170184139 |
|
|
Oct 09 04:13:58 PM UTC 24 |
Oct 09 04:16:15 PM UTC 24 |
21490163585 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_mode_ignore_cmds.1577277647 |
|
|
Oct 09 04:15:20 PM UTC 24 |
Oct 09 04:16:17 PM UTC 24 |
32741093959 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_all.1221396324 |
|
|
Oct 09 04:15:35 PM UTC 24 |
Oct 09 04:16:17 PM UTC 24 |
9271198034 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_mode_ignore_cmds.3658848849 |
|
|
Oct 09 04:15:33 PM UTC 24 |
Oct 09 04:16:20 PM UTC 24 |
5784542025 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/44.spi_device_flash_and_tpm.4281344008 |
|
|
Oct 09 04:13:58 PM UTC 24 |
Oct 09 04:16:25 PM UTC 24 |
22063599168 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_stress_all.1935555810 |
|
|
Oct 09 04:15:25 PM UTC 24 |
Oct 09 04:16:25 PM UTC 24 |
10714125730 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_and_tpm_min_idle.138504488 |
|
|
Oct 09 04:15:25 PM UTC 24 |
Oct 09 04:16:28 PM UTC 24 |
4705125892 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/42.spi_device_flash_all.4264601115 |
|
|
Oct 09 04:13:26 PM UTC 24 |
Oct 09 04:16:32 PM UTC 24 |
38121218482 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_mailbox.160045703 |
|
|
Oct 09 04:14:51 PM UTC 24 |
Oct 09 04:16:32 PM UTC 24 |
19069157885 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_all.3643864317 |
|
|
Oct 09 04:15:21 PM UTC 24 |
Oct 09 04:16:44 PM UTC 24 |
4038764909 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_mailbox.44455720 |
|
|
Oct 09 04:15:31 PM UTC 24 |
Oct 09 04:16:44 PM UTC 24 |
22510764054 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/41.spi_device_flash_and_tpm.479091992 |
|
|
Oct 09 04:13:12 PM UTC 24 |
Oct 09 04:16:46 PM UTC 24 |
34626396659 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_and_tpm.1706507112 |
|
|
Oct 09 04:12:10 PM UTC 24 |
Oct 09 04:16:51 PM UTC 24 |
27216755807 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_and_tpm.1332248986 |
|
|
Oct 09 04:12:54 PM UTC 24 |
Oct 09 04:16:51 PM UTC 24 |
163950967523 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_and_tpm.3302283013 |
|
|
Oct 09 04:14:17 PM UTC 24 |
Oct 09 04:16:52 PM UTC 24 |
57141747271 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_and_tpm.524365878 |
|
|
Oct 09 04:15:36 PM UTC 24 |
Oct 09 04:17:05 PM UTC 24 |
3773251526 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.1797948401 |
|
|
Oct 09 04:11:57 PM UTC 24 |
Oct 09 04:17:18 PM UTC 24 |
36018256922 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_stress_all.4011547134 |
|
|
Oct 09 04:12:36 PM UTC 24 |
Oct 09 04:17:20 PM UTC 24 |
93017481805 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_and_tpm.22173531 |
|
|
Oct 09 04:15:01 PM UTC 24 |
Oct 09 04:17:24 PM UTC 24 |
138002342309 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/48.spi_device_flash_and_tpm.1073854355 |
|
|
Oct 09 04:15:23 PM UTC 24 |
Oct 09 04:17:36 PM UTC 24 |
4781437140 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_flash_and_tpm_min_idle.3427010325 |
|
|
Oct 09 04:15:38 PM UTC 24 |
Oct 09 04:17:59 PM UTC 24 |
3760668068 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_mode_ignore_cmds.3297184898 |
|
|
Oct 09 04:14:13 PM UTC 24 |
Oct 09 04:18:15 PM UTC 24 |
121936398181 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_and_tpm_min_idle.3926333038 |
|
|
Oct 09 04:14:22 PM UTC 24 |
Oct 09 04:18:26 PM UTC 24 |
18237478480 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/47.spi_device_flash_and_tpm_min_idle.3300511401 |
|
|
Oct 09 04:15:01 PM UTC 24 |
Oct 09 04:18:29 PM UTC 24 |
62308722382 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_all.2670110115 |
|
|
Oct 09 04:11:26 PM UTC 24 |
Oct 09 04:18:49 PM UTC 24 |
54649201509 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_all.306583258 |
|
|
Oct 09 04:14:37 PM UTC 24 |
Oct 09 04:18:51 PM UTC 24 |
67921298133 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/40.spi_device_stress_all.2033222908 |
|
|
Oct 09 04:12:57 PM UTC 24 |
Oct 09 04:18:53 PM UTC 24 |
151916707335 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_and_tpm.1458222786 |
|
|
Oct 09 04:12:35 PM UTC 24 |
Oct 09 04:19:51 PM UTC 24 |
43221123027 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_flash_mode_ignore_cmds.3853132853 |
|
|
Oct 09 04:14:35 PM UTC 24 |
Oct 09 04:20:28 PM UTC 24 |
43799025704 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.2492110409 |
|
|
Oct 09 04:10:08 PM UTC 24 |
Oct 09 04:20:34 PM UTC 24 |
63271373372 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.1638368728 |
|
|
Oct 09 04:09:21 PM UTC 24 |
Oct 09 04:21:12 PM UTC 24 |
76632091677 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/37.spi_device_stress_all.806018419 |
|
|
Oct 09 04:11:59 PM UTC 24 |
Oct 09 04:21:26 PM UTC 24 |
56010577005 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/46.spi_device_stress_all.4218236537 |
|
|
Oct 09 04:14:40 PM UTC 24 |
Oct 09 04:21:48 PM UTC 24 |
30687721601 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/43.spi_device_stress_all.2021676204 |
|
|
Oct 09 04:13:42 PM UTC 24 |
Oct 09 04:22:51 PM UTC 24 |
54874501304 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/38.spi_device_stress_all.2943018051 |
|
|
Oct 09 04:12:13 PM UTC 24 |
Oct 09 04:23:08 PM UTC 24 |
262210935946 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/49.spi_device_stress_all.3486734826 |
|
|
Oct 09 04:15:39 PM UTC 24 |
Oct 09 04:23:35 PM UTC 24 |
40752433195 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/default/1.spi_device_stress_all.169795094 |
|
|
Oct 09 03:55:06 PM UTC 24 |
Oct 09 04:28:22 PM UTC 24 |
337054640427 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_mem_walk.2030362849 |
|
|
Oct 09 12:16:42 PM UTC 24 |
Oct 09 12:16:44 PM UTC 24 |
13675719 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_intr_test.1898658176 |
|
|
Oct 09 12:16:42 PM UTC 24 |
Oct 09 12:16:44 PM UTC 24 |
25598260 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2924133842 |
|
|
Oct 09 12:16:42 PM UTC 24 |
Oct 09 12:16:45 PM UTC 24 |
67327930 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_rw.3307455069 |
|
|
Oct 09 12:16:42 PM UTC 24 |
Oct 09 12:16:46 PM UTC 24 |
68678074 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_mem_partial_access.3232368835 |
|
|
Oct 09 12:16:42 PM UTC 24 |
Oct 09 12:16:46 PM UTC 24 |
72626392 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_tl_errors.1703320777 |
|
|
Oct 09 12:16:40 PM UTC 24 |
Oct 09 12:16:47 PM UTC 24 |
717976151 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_mem_walk.1708573437 |
|
|
Oct 09 12:16:45 PM UTC 24 |
Oct 09 12:16:47 PM UTC 24 |
27982035 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_intr_test.4060777320 |
|
|
Oct 09 12:16:45 PM UTC 24 |
Oct 09 12:16:48 PM UTC 24 |
17284251 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2509145695 |
|
|
Oct 09 12:16:44 PM UTC 24 |
Oct 09 12:16:48 PM UTC 24 |
46046784 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1692657791 |
|
|
Oct 09 12:16:44 PM UTC 24 |
Oct 09 12:16:48 PM UTC 24 |
255412115 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_tl_errors.1101908553 |
|
|
Oct 09 12:16:44 PM UTC 24 |
Oct 09 12:16:48 PM UTC 24 |
182798611 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_mem_partial_access.3203838434 |
|
|
Oct 09 12:16:46 PM UTC 24 |
Oct 09 12:16:49 PM UTC 24 |
61234036 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2783875492 |
|
|
Oct 09 12:16:47 PM UTC 24 |
Oct 09 12:16:50 PM UTC 24 |
17217242 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_rw.2399349307 |
|
|
Oct 09 12:16:47 PM UTC 24 |
Oct 09 12:16:51 PM UTC 24 |
105920322 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_tl_errors.1828568533 |
|
|
Oct 09 12:16:49 PM UTC 24 |
Oct 09 12:16:53 PM UTC 24 |
336385836 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_intr_test.1028262990 |
|
|
Oct 09 12:16:51 PM UTC 24 |
Oct 09 12:16:53 PM UTC 24 |
18991012 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_mem_walk.1970649832 |
|
|
Oct 09 12:16:51 PM UTC 24 |
Oct 09 12:16:53 PM UTC 24 |
12131206 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.951282633 |
|
|
Oct 09 12:16:49 PM UTC 24 |
Oct 09 12:16:54 PM UTC 24 |
108674411 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3859236568 |
|
|
Oct 09 12:16:49 PM UTC 24 |
Oct 09 12:16:55 PM UTC 24 |
200841856 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_mem_partial_access.3768350792 |
|
|
Oct 09 12:16:52 PM UTC 24 |
Oct 09 12:16:56 PM UTC 24 |
56985236 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/9.spi_device_csr_rw.3883313059 |
|
|
Oct 09 12:17:29 PM UTC 24 |
Oct 09 12:17:33 PM UTC 24 |
69171304 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1686723383 |
|
|
Oct 09 12:16:54 PM UTC 24 |
Oct 09 12:16:57 PM UTC 24 |
42156879 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/2.spi_device_csr_rw.2853052473 |
|
|
Oct 09 12:16:54 PM UTC 24 |
Oct 09 12:16:58 PM UTC 24 |
98543849 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_2p-sim-vcs/coverage/cover_reg_top/1.spi_device_csr_aliasing.2026432019 |
|
|
Oct 09 12:16:48 PM UTC 24 |
Oct 09 12:17:00 PM UTC 24 |
225930652 ps |