| T471 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_csb_read.1172873543 |
|
|
Oct 12 02:22:45 PM UTC 24 |
Oct 12 02:22:47 PM UTC 24 |
21120456 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.3478713470 |
|
|
Oct 12 02:22:32 PM UTC 24 |
Oct 12 02:22:47 PM UTC 24 |
2971779113 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mem_parity.2847256851 |
|
|
Oct 12 02:22:46 PM UTC 24 |
Oct 12 02:22:48 PM UTC 24 |
131867235 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.1005893504 |
|
|
Oct 12 02:20:54 PM UTC 24 |
Oct 12 02:22:48 PM UTC 24 |
3767594318 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/7.spi_device_stress_all.4273191017 |
|
|
Oct 12 02:20:04 PM UTC 24 |
Oct 12 02:22:51 PM UTC 24 |
24382522986 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.2695950938 |
|
|
Oct 12 02:22:49 PM UTC 24 |
Oct 12 02:22:51 PM UTC 24 |
15356387 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_rw.1180195604 |
|
|
Oct 12 02:22:49 PM UTC 24 |
Oct 12 02:22:54 PM UTC 24 |
393905658 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.1912174981 |
|
|
Oct 12 02:22:48 PM UTC 24 |
Oct 12 02:22:55 PM UTC 24 |
688176256 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.1374275927 |
|
|
Oct 12 02:22:22 PM UTC 24 |
Oct 12 02:22:56 PM UTC 24 |
4454020622 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.718260943 |
|
|
Oct 12 02:22:52 PM UTC 24 |
Oct 12 02:22:56 PM UTC 24 |
33489187 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.2810692007 |
|
|
Oct 12 02:22:13 PM UTC 24 |
Oct 12 02:22:56 PM UTC 24 |
3679983790 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.3500360504 |
|
|
Oct 12 02:22:48 PM UTC 24 |
Oct 12 02:23:00 PM UTC 24 |
2293638112 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.1875061441 |
|
|
Oct 12 02:21:27 PM UTC 24 |
Oct 12 02:23:02 PM UTC 24 |
11992770238 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.1878706538 |
|
|
Oct 12 02:21:53 PM UTC 24 |
Oct 12 02:23:02 PM UTC 24 |
36069815661 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.3109528661 |
|
|
Oct 12 02:22:58 PM UTC 24 |
Oct 12 02:23:02 PM UTC 24 |
62700720 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.3824698295 |
|
|
Oct 12 02:22:57 PM UTC 24 |
Oct 12 02:23:03 PM UTC 24 |
1343805909 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.3021109335 |
|
|
Oct 12 02:22:52 PM UTC 24 |
Oct 12 02:23:04 PM UTC 24 |
4200790357 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.4218448642 |
|
|
Oct 12 02:23:05 PM UTC 24 |
Oct 12 02:23:08 PM UTC 24 |
45103384 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.2645745047 |
|
|
Oct 12 02:19:22 PM UTC 24 |
Oct 12 02:23:09 PM UTC 24 |
23790752809 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_mode_ignore_cmds.3154362952 |
|
|
Oct 12 02:19:09 PM UTC 24 |
Oct 12 02:23:11 PM UTC 24 |
217128724808 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.1432400781 |
|
|
Oct 12 02:23:09 PM UTC 24 |
Oct 12 02:23:11 PM UTC 24 |
16058911 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.454736814 |
|
|
Oct 12 02:23:03 PM UTC 24 |
Oct 12 02:23:11 PM UTC 24 |
192700691 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_mode_ignore_cmds.3669892702 |
|
|
Oct 12 02:20:54 PM UTC 24 |
Oct 12 02:23:11 PM UTC 24 |
40436356048 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.3254086540 |
|
|
Oct 12 02:23:11 PM UTC 24 |
Oct 12 02:23:13 PM UTC 24 |
115005943 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.3331041480 |
|
|
Oct 12 02:23:12 PM UTC 24 |
Oct 12 02:23:14 PM UTC 24 |
47306857 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.2442053231 |
|
|
Oct 12 02:23:12 PM UTC 24 |
Oct 12 02:23:14 PM UTC 24 |
17439177 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.1558833073 |
|
|
Oct 12 02:22:55 PM UTC 24 |
Oct 12 02:23:15 PM UTC 24 |
14721730799 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.3375845485 |
|
|
Oct 12 02:23:14 PM UTC 24 |
Oct 12 02:23:16 PM UTC 24 |
17600274 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_and_tpm_min_idle.499564303 |
|
|
Oct 12 02:19:04 PM UTC 24 |
Oct 12 02:23:17 PM UTC 24 |
87816085440 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.3672809356 |
|
|
Oct 12 02:21:48 PM UTC 24 |
Oct 12 02:23:17 PM UTC 24 |
12575183104 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.161119289 |
|
|
Oct 12 02:22:58 PM UTC 24 |
Oct 12 02:23:18 PM UTC 24 |
1900475497 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.2925712493 |
|
|
Oct 12 02:22:14 PM UTC 24 |
Oct 12 02:23:18 PM UTC 24 |
11238525021 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.574138780 |
|
|
Oct 12 02:23:16 PM UTC 24 |
Oct 12 02:23:20 PM UTC 24 |
309791402 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.1609822831 |
|
|
Oct 12 02:23:12 PM UTC 24 |
Oct 12 02:23:21 PM UTC 24 |
941068172 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_all.190300292 |
|
|
Oct 12 02:20:00 PM UTC 24 |
Oct 12 02:23:21 PM UTC 24 |
16697750815 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.2738685793 |
|
|
Oct 12 02:23:21 PM UTC 24 |
Oct 12 02:23:23 PM UTC 24 |
90722967 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3893118314 |
|
|
Oct 12 02:23:15 PM UTC 24 |
Oct 12 02:23:28 PM UTC 24 |
1423925955 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.3973316311 |
|
|
Oct 12 02:23:19 PM UTC 24 |
Oct 12 02:23:28 PM UTC 24 |
344375172 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/1.spi_device_flash_and_tpm_min_idle.1207562072 |
|
|
Oct 12 02:18:45 PM UTC 24 |
Oct 12 02:23:29 PM UTC 24 |
55489749014 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/12.spi_device_stress_all.2679965155 |
|
|
Oct 12 02:22:15 PM UTC 24 |
Oct 12 02:23:30 PM UTC 24 |
2790940686 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.3262476584 |
|
|
Oct 12 02:23:19 PM UTC 24 |
Oct 12 02:23:31 PM UTC 24 |
1156830924 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.3329155636 |
|
|
Oct 12 02:23:30 PM UTC 24 |
Oct 12 02:23:32 PM UTC 24 |
14831545 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.3574085955 |
|
|
Oct 12 02:23:30 PM UTC 24 |
Oct 12 02:23:32 PM UTC 24 |
14781789 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.2141805173 |
|
|
Oct 12 02:23:19 PM UTC 24 |
Oct 12 02:23:33 PM UTC 24 |
22661164186 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.1702835572 |
|
|
Oct 12 02:23:32 PM UTC 24 |
Oct 12 02:23:34 PM UTC 24 |
16283369 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.2879423466 |
|
|
Oct 12 02:23:33 PM UTC 24 |
Oct 12 02:23:35 PM UTC 24 |
52086716 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/6.spi_device_stress_all.3262304941 |
|
|
Oct 12 02:19:43 PM UTC 24 |
Oct 12 02:23:37 PM UTC 24 |
123086388131 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.4015587158 |
|
|
Oct 12 02:23:34 PM UTC 24 |
Oct 12 02:23:37 PM UTC 24 |
59205025 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.3935558851 |
|
|
Oct 12 02:23:33 PM UTC 24 |
Oct 12 02:23:39 PM UTC 24 |
827115788 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.1399469757 |
|
|
Oct 12 02:23:21 PM UTC 24 |
Oct 12 02:23:41 PM UTC 24 |
8649420817 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.864441178 |
|
|
Oct 12 02:23:35 PM UTC 24 |
Oct 12 02:23:42 PM UTC 24 |
638604721 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.717781806 |
|
|
Oct 12 02:23:38 PM UTC 24 |
Oct 12 02:23:46 PM UTC 24 |
2381691569 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.506974952 |
|
|
Oct 12 02:23:12 PM UTC 24 |
Oct 12 02:23:46 PM UTC 24 |
3334425913 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.2178006240 |
|
|
Oct 12 02:23:33 PM UTC 24 |
Oct 12 02:23:49 PM UTC 24 |
2987813036 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.3566075163 |
|
|
Oct 12 02:23:47 PM UTC 24 |
Oct 12 02:23:49 PM UTC 24 |
30560247 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.2237486615 |
|
|
Oct 12 02:23:36 PM UTC 24 |
Oct 12 02:23:51 PM UTC 24 |
4136257700 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.4074290724 |
|
|
Oct 12 02:23:42 PM UTC 24 |
Oct 12 02:23:52 PM UTC 24 |
3928526383 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.3056682237 |
|
|
Oct 12 02:23:38 PM UTC 24 |
Oct 12 02:23:52 PM UTC 24 |
1838340808 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.515593977 |
|
|
Oct 12 02:23:53 PM UTC 24 |
Oct 12 02:23:55 PM UTC 24 |
23509323 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.3024440263 |
|
|
Oct 12 02:23:43 PM UTC 24 |
Oct 12 02:23:55 PM UTC 24 |
552838053 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.1472263954 |
|
|
Oct 12 02:23:56 PM UTC 24 |
Oct 12 02:23:58 PM UTC 24 |
17419776 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.3339083487 |
|
|
Oct 12 02:23:56 PM UTC 24 |
Oct 12 02:23:58 PM UTC 24 |
29807999 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.1995866033 |
|
|
Oct 12 02:23:47 PM UTC 24 |
Oct 12 02:24:04 PM UTC 24 |
2100115444 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.3818325077 |
|
|
Oct 12 02:23:59 PM UTC 24 |
Oct 12 02:24:05 PM UTC 24 |
1396409075 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.1446058125 |
|
|
Oct 12 02:22:40 PM UTC 24 |
Oct 12 02:24:05 PM UTC 24 |
7961596087 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.3799894278 |
|
|
Oct 12 02:24:04 PM UTC 24 |
Oct 12 02:24:07 PM UTC 24 |
94478301 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.2490742958 |
|
|
Oct 12 02:23:59 PM UTC 24 |
Oct 12 02:24:08 PM UTC 24 |
1539948367 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.2437053298 |
|
|
Oct 12 02:24:05 PM UTC 24 |
Oct 12 02:24:09 PM UTC 24 |
35112820 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_mode_ignore_cmds.3349849019 |
|
|
Oct 12 02:19:40 PM UTC 24 |
Oct 12 02:24:11 PM UTC 24 |
28430605413 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.296174346 |
|
|
Oct 12 02:24:08 PM UTC 24 |
Oct 12 02:24:12 PM UTC 24 |
687193756 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.1419779701 |
|
|
Oct 12 02:24:07 PM UTC 24 |
Oct 12 02:24:14 PM UTC 24 |
2587233948 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3173388790 |
|
|
Oct 12 02:23:15 PM UTC 24 |
Oct 12 02:24:14 PM UTC 24 |
150124319244 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.3143392520 |
|
|
Oct 12 02:24:10 PM UTC 24 |
Oct 12 02:24:17 PM UTC 24 |
348171212 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.943729727 |
|
|
Oct 12 02:24:14 PM UTC 24 |
Oct 12 02:24:19 PM UTC 24 |
247041452 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.2884178166 |
|
|
Oct 12 02:24:13 PM UTC 24 |
Oct 12 02:24:20 PM UTC 24 |
192965076 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.427669790 |
|
|
Oct 12 02:23:40 PM UTC 24 |
Oct 12 02:24:21 PM UTC 24 |
22542556773 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.1878542020 |
|
|
Oct 12 02:24:12 PM UTC 24 |
Oct 12 02:24:22 PM UTC 24 |
1525164365 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.2581473458 |
|
|
Oct 12 02:24:09 PM UTC 24 |
Oct 12 02:24:25 PM UTC 24 |
1163031943 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.761340694 |
|
|
Oct 12 02:24:26 PM UTC 24 |
Oct 12 02:24:28 PM UTC 24 |
86506741 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.1077733165 |
|
|
Oct 12 02:23:20 PM UTC 24 |
Oct 12 02:24:29 PM UTC 24 |
12630534139 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.2905693709 |
|
|
Oct 12 02:24:29 PM UTC 24 |
Oct 12 02:24:32 PM UTC 24 |
32853679 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.2200320563 |
|
|
Oct 12 02:20:55 PM UTC 24 |
Oct 12 02:24:32 PM UTC 24 |
25188621432 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.4018047534 |
|
|
Oct 12 02:22:40 PM UTC 24 |
Oct 12 02:24:32 PM UTC 24 |
26874578937 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.1782371696 |
|
|
Oct 12 02:24:18 PM UTC 24 |
Oct 12 02:24:32 PM UTC 24 |
6733009585 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.3813412973 |
|
|
Oct 12 02:23:17 PM UTC 24 |
Oct 12 02:24:33 PM UTC 24 |
22278891531 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.4005411646 |
|
|
Oct 12 02:24:30 PM UTC 24 |
Oct 12 02:24:33 PM UTC 24 |
18347786 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.1289194471 |
|
|
Oct 12 02:24:33 PM UTC 24 |
Oct 12 02:24:35 PM UTC 24 |
57855255 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.3892944116 |
|
|
Oct 12 02:24:33 PM UTC 24 |
Oct 12 02:24:36 PM UTC 24 |
221382296 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.2415710923 |
|
|
Oct 12 02:24:34 PM UTC 24 |
Oct 12 02:24:38 PM UTC 24 |
136870106 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2931674227 |
|
|
Oct 12 02:24:33 PM UTC 24 |
Oct 12 02:24:40 PM UTC 24 |
3169232096 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_all.3988739764 |
|
|
Oct 12 02:21:52 PM UTC 24 |
Oct 12 02:24:40 PM UTC 24 |
6040799795 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.3258972516 |
|
|
Oct 12 02:24:36 PM UTC 24 |
Oct 12 02:24:41 PM UTC 24 |
351959239 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.1252779545 |
|
|
Oct 12 02:24:34 PM UTC 24 |
Oct 12 02:24:42 PM UTC 24 |
4760511350 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.2486971394 |
|
|
Oct 12 02:23:52 PM UTC 24 |
Oct 12 02:24:43 PM UTC 24 |
17084411939 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.1767397656 |
|
|
Oct 12 02:24:40 PM UTC 24 |
Oct 12 02:24:51 PM UTC 24 |
4026706901 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.2977694335 |
|
|
Oct 12 02:24:44 PM UTC 24 |
Oct 12 02:24:51 PM UTC 24 |
144331295 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.2529396498 |
|
|
Oct 12 02:22:57 PM UTC 24 |
Oct 12 02:24:52 PM UTC 24 |
48848083170 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.3474845284 |
|
|
Oct 12 02:24:39 PM UTC 24 |
Oct 12 02:24:53 PM UTC 24 |
3413063827 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.2979207940 |
|
|
Oct 12 02:24:53 PM UTC 24 |
Oct 12 02:24:56 PM UTC 24 |
43616844 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.1559046343 |
|
|
Oct 12 02:24:52 PM UTC 24 |
Oct 12 02:24:57 PM UTC 24 |
110631640 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.3565076062 |
|
|
Oct 12 02:24:33 PM UTC 24 |
Oct 12 02:24:58 PM UTC 24 |
4126414146 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.1541551208 |
|
|
Oct 12 02:24:56 PM UTC 24 |
Oct 12 02:24:58 PM UTC 24 |
48716184 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.4244256449 |
|
|
Oct 12 02:24:37 PM UTC 24 |
Oct 12 02:24:59 PM UTC 24 |
702192254 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.4082423246 |
|
|
Oct 12 02:24:58 PM UTC 24 |
Oct 12 02:25:00 PM UTC 24 |
43094432 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.3991451167 |
|
|
Oct 12 02:23:03 PM UTC 24 |
Oct 12 02:25:01 PM UTC 24 |
8524788846 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.4068590340 |
|
|
Oct 12 02:25:00 PM UTC 24 |
Oct 12 02:25:02 PM UTC 24 |
35584035 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.2107834794 |
|
|
Oct 12 02:24:43 PM UTC 24 |
Oct 12 02:25:02 PM UTC 24 |
7199433840 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.437399713 |
|
|
Oct 12 02:21:54 PM UTC 24 |
Oct 12 02:25:03 PM UTC 24 |
79582171455 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.4035968736 |
|
|
Oct 12 02:24:21 PM UTC 24 |
Oct 12 02:25:04 PM UTC 24 |
2466176671 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.3625944186 |
|
|
Oct 12 02:25:01 PM UTC 24 |
Oct 12 02:25:05 PM UTC 24 |
159266366 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.3869369514 |
|
|
Oct 12 02:25:02 PM UTC 24 |
Oct 12 02:25:06 PM UTC 24 |
38721785 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm_min_idle.3029103073 |
|
|
Oct 12 02:19:42 PM UTC 24 |
Oct 12 02:25:06 PM UTC 24 |
234298816538 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.4111269229 |
|
|
Oct 12 02:25:06 PM UTC 24 |
Oct 12 02:25:10 PM UTC 24 |
218248211 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.1092555341 |
|
|
Oct 12 02:24:59 PM UTC 24 |
Oct 12 02:25:12 PM UTC 24 |
8898358562 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.1404606078 |
|
|
Oct 12 02:25:03 PM UTC 24 |
Oct 12 02:25:16 PM UTC 24 |
1472131440 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.2340581222 |
|
|
Oct 12 02:25:03 PM UTC 24 |
Oct 12 02:25:17 PM UTC 24 |
3583143460 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.48958551 |
|
|
Oct 12 02:24:52 PM UTC 24 |
Oct 12 02:25:18 PM UTC 24 |
3806731486 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.2307412482 |
|
|
Oct 12 02:25:11 PM UTC 24 |
Oct 12 02:25:19 PM UTC 24 |
657364794 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.2779812796 |
|
|
Oct 12 02:23:49 PM UTC 24 |
Oct 12 02:25:22 PM UTC 24 |
3253192560 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.3141484729 |
|
|
Oct 12 02:25:20 PM UTC 24 |
Oct 12 02:25:22 PM UTC 24 |
12957484 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.1688716593 |
|
|
Oct 12 02:25:06 PM UTC 24 |
Oct 12 02:25:22 PM UTC 24 |
2917045359 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.594265736 |
|
|
Oct 12 02:23:04 PM UTC 24 |
Oct 12 02:25:23 PM UTC 24 |
102928070581 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.3377597819 |
|
|
Oct 12 02:24:40 PM UTC 24 |
Oct 12 02:25:24 PM UTC 24 |
1854075440 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.3133776465 |
|
|
Oct 12 02:25:23 PM UTC 24 |
Oct 12 02:25:25 PM UTC 24 |
22823880 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_mode_ignore_cmds.1635624894 |
|
|
Oct 12 02:21:20 PM UTC 24 |
Oct 12 02:25:25 PM UTC 24 |
51804036266 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.2478888676 |
|
|
Oct 12 02:25:24 PM UTC 24 |
Oct 12 02:25:26 PM UTC 24 |
24936280 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.4005616332 |
|
|
Oct 12 02:23:50 PM UTC 24 |
Oct 12 02:25:27 PM UTC 24 |
8540281048 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.1293118576 |
|
|
Oct 12 02:25:25 PM UTC 24 |
Oct 12 02:25:28 PM UTC 24 |
23974205 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2270213395 |
|
|
Oct 12 02:25:26 PM UTC 24 |
Oct 12 02:25:30 PM UTC 24 |
108482214 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.2534637450 |
|
|
Oct 12 02:25:27 PM UTC 24 |
Oct 12 02:25:32 PM UTC 24 |
426802007 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.1970672711 |
|
|
Oct 12 02:25:23 PM UTC 24 |
Oct 12 02:25:33 PM UTC 24 |
8057194995 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.4007943040 |
|
|
Oct 12 02:24:15 PM UTC 24 |
Oct 12 02:25:34 PM UTC 24 |
22535738422 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.1861277237 |
|
|
Oct 12 02:25:26 PM UTC 24 |
Oct 12 02:25:34 PM UTC 24 |
867048888 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.1496901369 |
|
|
Oct 12 02:25:07 PM UTC 24 |
Oct 12 02:25:34 PM UTC 24 |
967195124 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_all.2078777732 |
|
|
Oct 12 02:20:26 PM UTC 24 |
Oct 12 02:25:34 PM UTC 24 |
76082074983 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.3739480963 |
|
|
Oct 12 02:25:32 PM UTC 24 |
Oct 12 02:25:36 PM UTC 24 |
29023346 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.949253127 |
|
|
Oct 12 02:25:34 PM UTC 24 |
Oct 12 02:25:41 PM UTC 24 |
382325417 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.810020674 |
|
|
Oct 12 02:25:42 PM UTC 24 |
Oct 12 02:25:44 PM UTC 24 |
13940836 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.3774077112 |
|
|
Oct 12 02:25:23 PM UTC 24 |
Oct 12 02:25:45 PM UTC 24 |
2232386885 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.307088406 |
|
|
Oct 12 02:25:45 PM UTC 24 |
Oct 12 02:25:47 PM UTC 24 |
30918575 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.1412735160 |
|
|
Oct 12 02:25:35 PM UTC 24 |
Oct 12 02:25:50 PM UTC 24 |
1787959158 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.3163245916 |
|
|
Oct 12 02:25:51 PM UTC 24 |
Oct 12 02:25:53 PM UTC 24 |
127504837 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.527133097 |
|
|
Oct 12 02:23:24 PM UTC 24 |
Oct 12 02:25:54 PM UTC 24 |
42763711979 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.582486498 |
|
|
Oct 12 02:25:04 PM UTC 24 |
Oct 12 02:25:55 PM UTC 24 |
5137049528 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.2435437242 |
|
|
Oct 12 02:25:29 PM UTC 24 |
Oct 12 02:25:56 PM UTC 24 |
10676863404 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.1081268080 |
|
|
Oct 12 02:23:28 PM UTC 24 |
Oct 12 02:25:58 PM UTC 24 |
31825745919 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.2673187702 |
|
|
Oct 12 02:25:54 PM UTC 24 |
Oct 12 02:25:58 PM UTC 24 |
470443875 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.2755887081 |
|
|
Oct 12 02:25:00 PM UTC 24 |
Oct 12 02:25:59 PM UTC 24 |
34507440295 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.4109401541 |
|
|
Oct 12 02:22:37 PM UTC 24 |
Oct 12 02:25:59 PM UTC 24 |
115179292315 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.1898687265 |
|
|
Oct 12 02:25:57 PM UTC 24 |
Oct 12 02:26:00 PM UTC 24 |
29030054 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.3960410238 |
|
|
Oct 12 02:26:01 PM UTC 24 |
Oct 12 02:26:03 PM UTC 24 |
14088635 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2150803923 |
|
|
Oct 12 02:25:46 PM UTC 24 |
Oct 12 02:26:04 PM UTC 24 |
2681895532 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.1050976577 |
|
|
Oct 12 02:25:57 PM UTC 24 |
Oct 12 02:26:04 PM UTC 24 |
752829128 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.3195110318 |
|
|
Oct 12 02:25:33 PM UTC 24 |
Oct 12 02:26:04 PM UTC 24 |
5762174082 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.3448927091 |
|
|
Oct 12 02:26:00 PM UTC 24 |
Oct 12 02:26:06 PM UTC 24 |
856442406 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.3956628558 |
|
|
Oct 12 02:26:00 PM UTC 24 |
Oct 12 02:26:09 PM UTC 24 |
15823169706 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.1235888426 |
|
|
Oct 12 02:26:04 PM UTC 24 |
Oct 12 02:26:11 PM UTC 24 |
381115036 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.3453381117 |
|
|
Oct 12 02:25:18 PM UTC 24 |
Oct 12 02:26:12 PM UTC 24 |
76793130829 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.2329012800 |
|
|
Oct 12 02:26:10 PM UTC 24 |
Oct 12 02:26:12 PM UTC 24 |
15503854 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.1596278963 |
|
|
Oct 12 02:26:12 PM UTC 24 |
Oct 12 02:26:14 PM UTC 24 |
40478472 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/2.spi_device_flash_and_tpm.1043256189 |
|
|
Oct 12 02:18:54 PM UTC 24 |
Oct 12 02:26:14 PM UTC 24 |
179330300844 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.1920203773 |
|
|
Oct 12 02:25:34 PM UTC 24 |
Oct 12 02:26:15 PM UTC 24 |
2153475078 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.4271480611 |
|
|
Oct 12 02:26:00 PM UTC 24 |
Oct 12 02:26:16 PM UTC 24 |
7818469755 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.2297065028 |
|
|
Oct 12 02:26:14 PM UTC 24 |
Oct 12 02:26:17 PM UTC 24 |
25713076 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2796747478 |
|
|
Oct 12 02:23:03 PM UTC 24 |
Oct 12 02:26:18 PM UTC 24 |
15496081334 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.322848671 |
|
|
Oct 12 02:25:34 PM UTC 24 |
Oct 12 02:26:19 PM UTC 24 |
3990458405 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.822599507 |
|
|
Oct 12 02:26:15 PM UTC 24 |
Oct 12 02:26:20 PM UTC 24 |
144205083 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.541215066 |
|
|
Oct 12 02:24:44 PM UTC 24 |
Oct 12 02:26:20 PM UTC 24 |
18461089280 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.339399687 |
|
|
Oct 12 02:26:17 PM UTC 24 |
Oct 12 02:26:21 PM UTC 24 |
113943625 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.984084797 |
|
|
Oct 12 02:24:52 PM UTC 24 |
Oct 12 02:26:21 PM UTC 24 |
24994407474 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.2411619139 |
|
|
Oct 12 02:25:27 PM UTC 24 |
Oct 12 02:26:21 PM UTC 24 |
16934745562 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.1031295210 |
|
|
Oct 12 02:25:35 PM UTC 24 |
Oct 12 02:26:25 PM UTC 24 |
1783223355 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.3468447726 |
|
|
Oct 12 02:26:18 PM UTC 24 |
Oct 12 02:26:26 PM UTC 24 |
141374562 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.186968079 |
|
|
Oct 12 02:20:55 PM UTC 24 |
Oct 12 02:26:26 PM UTC 24 |
148815748924 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1696465126 |
|
|
Oct 12 02:26:22 PM UTC 24 |
Oct 12 02:26:28 PM UTC 24 |
507321959 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.3557938586 |
|
|
Oct 12 02:26:19 PM UTC 24 |
Oct 12 02:26:28 PM UTC 24 |
2372444036 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.2587616487 |
|
|
Oct 12 02:26:22 PM UTC 24 |
Oct 12 02:26:29 PM UTC 24 |
134228116 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.1499352852 |
|
|
Oct 12 02:26:17 PM UTC 24 |
Oct 12 02:26:29 PM UTC 24 |
545104535 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.1095387812 |
|
|
Oct 12 02:26:20 PM UTC 24 |
Oct 12 02:26:31 PM UTC 24 |
2159934343 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.2472643235 |
|
|
Oct 12 02:26:28 PM UTC 24 |
Oct 12 02:26:31 PM UTC 24 |
15289592 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.1139593693 |
|
|
Oct 12 02:26:30 PM UTC 24 |
Oct 12 02:26:32 PM UTC 24 |
66846623 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.1513135725 |
|
|
Oct 12 02:25:59 PM UTC 24 |
Oct 12 02:26:33 PM UTC 24 |
3170247329 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.1483380224 |
|
|
Oct 12 02:26:13 PM UTC 24 |
Oct 12 02:26:33 PM UTC 24 |
7864669791 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.2362628285 |
|
|
Oct 12 02:26:32 PM UTC 24 |
Oct 12 02:26:35 PM UTC 24 |
79343784 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.2703238327 |
|
|
Oct 12 02:26:32 PM UTC 24 |
Oct 12 02:26:35 PM UTC 24 |
88476139 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.38578772 |
|
|
Oct 12 02:25:54 PM UTC 24 |
Oct 12 02:26:36 PM UTC 24 |
40677052757 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.3275496014 |
|
|
Oct 12 02:26:35 PM UTC 24 |
Oct 12 02:26:40 PM UTC 24 |
99492405 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.1473099195 |
|
|
Oct 12 02:26:36 PM UTC 24 |
Oct 12 02:26:41 PM UTC 24 |
393532038 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.2300746292 |
|
|
Oct 12 02:26:30 PM UTC 24 |
Oct 12 02:26:41 PM UTC 24 |
1911828383 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.2742468812 |
|
|
Oct 12 02:26:37 PM UTC 24 |
Oct 12 02:26:42 PM UTC 24 |
121960162 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.3896425064 |
|
|
Oct 12 02:26:06 PM UTC 24 |
Oct 12 02:26:50 PM UTC 24 |
5753937185 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.898383351 |
|
|
Oct 12 02:26:13 PM UTC 24 |
Oct 12 02:26:50 PM UTC 24 |
32562061131 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.1987663756 |
|
|
Oct 12 02:26:43 PM UTC 24 |
Oct 12 02:26:51 PM UTC 24 |
231776190 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.3846245239 |
|
|
Oct 12 02:25:19 PM UTC 24 |
Oct 12 02:26:51 PM UTC 24 |
76569335443 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.2291703033 |
|
|
Oct 12 02:26:19 PM UTC 24 |
Oct 12 02:26:51 PM UTC 24 |
2131575364 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.4046487223 |
|
|
Oct 12 02:26:33 PM UTC 24 |
Oct 12 02:26:53 PM UTC 24 |
20639945424 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.916785607 |
|
|
Oct 12 02:26:36 PM UTC 24 |
Oct 12 02:26:53 PM UTC 24 |
2910790386 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.743957794 |
|
|
Oct 12 02:25:48 PM UTC 24 |
Oct 12 02:26:54 PM UTC 24 |
10703228303 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.2875463338 |
|
|
Oct 12 02:26:53 PM UTC 24 |
Oct 12 02:26:55 PM UTC 24 |
12420592 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.660709376 |
|
|
Oct 12 02:26:53 PM UTC 24 |
Oct 12 02:26:55 PM UTC 24 |
14458392 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.2949599237 |
|
|
Oct 12 02:26:35 PM UTC 24 |
Oct 12 02:26:55 PM UTC 24 |
3143341064 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.564709771 |
|
|
Oct 12 02:26:55 PM UTC 24 |
Oct 12 02:26:57 PM UTC 24 |
10428193 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.1507112119 |
|
|
Oct 12 02:26:31 PM UTC 24 |
Oct 12 02:26:57 PM UTC 24 |
2117638864 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.1398043240 |
|
|
Oct 12 02:26:55 PM UTC 24 |
Oct 12 02:26:58 PM UTC 24 |
180430564 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.3463988505 |
|
|
Oct 12 02:26:51 PM UTC 24 |
Oct 12 02:26:59 PM UTC 24 |
4688233196 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.1129106806 |
|
|
Oct 12 02:25:07 PM UTC 24 |
Oct 12 02:26:59 PM UTC 24 |
27101651791 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.3976540523 |
|
|
Oct 12 02:26:56 PM UTC 24 |
Oct 12 02:27:03 PM UTC 24 |
741203849 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.2783761114 |
|
|
Oct 12 02:26:59 PM UTC 24 |
Oct 12 02:27:03 PM UTC 24 |
116523787 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3178624290 |
|
|
Oct 12 02:27:00 PM UTC 24 |
Oct 12 02:27:04 PM UTC 24 |
73502432 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.613497857 |
|
|
Oct 12 02:26:59 PM UTC 24 |
Oct 12 02:27:05 PM UTC 24 |
148973824 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.2018646822 |
|
|
Oct 12 02:26:59 PM UTC 24 |
Oct 12 02:27:05 PM UTC 24 |
1449489618 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.2608357743 |
|
|
Oct 12 02:27:07 PM UTC 24 |
Oct 12 02:27:10 PM UTC 24 |
73673204 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1046548472 |
|
|
Oct 12 02:26:54 PM UTC 24 |
Oct 12 02:27:07 PM UTC 24 |
762594619 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3247287435 |
|
|
Oct 12 02:27:04 PM UTC 24 |
Oct 12 02:27:10 PM UTC 24 |
521483413 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_all.1839215352 |
|
|
Oct 12 02:21:24 PM UTC 24 |
Oct 12 02:27:12 PM UTC 24 |
34527647556 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.666887368 |
|
|
Oct 12 02:27:10 PM UTC 24 |
Oct 12 02:27:12 PM UTC 24 |
68930309 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.1427919854 |
|
|
Oct 12 02:27:11 PM UTC 24 |
Oct 12 02:27:14 PM UTC 24 |
59063519 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.3662786720 |
|
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Oct 12 02:22:33 PM UTC 24 |
Oct 12 02:27:15 PM UTC 24 |
45370985768 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.2486559338 |
|
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Oct 12 02:27:15 PM UTC 24 |
Oct 12 02:27:17 PM UTC 24 |
143942158 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.1333630143 |
|
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Oct 12 02:27:16 PM UTC 24 |
Oct 12 02:27:18 PM UTC 24 |
34014228 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.163124183 |
|
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Oct 12 02:26:41 PM UTC 24 |
Oct 12 02:27:18 PM UTC 24 |
2456997935 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.3105670822 |
|
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Oct 12 02:27:00 PM UTC 24 |
Oct 12 02:27:19 PM UTC 24 |
4862752091 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.1540789338 |
|
|
Oct 12 02:27:13 PM UTC 24 |
Oct 12 02:27:20 PM UTC 24 |
1498265049 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.1695292832 |
|
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Oct 12 02:21:28 PM UTC 24 |
Oct 12 02:27:23 PM UTC 24 |
119744688234 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.390951310 |
|
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Oct 12 02:27:14 PM UTC 24 |
Oct 12 02:27:25 PM UTC 24 |
565343749 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.4207694694 |
|
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Oct 12 02:27:20 PM UTC 24 |
Oct 12 02:27:27 PM UTC 24 |
865315186 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.2680279745 |
|
|
Oct 12 02:26:55 PM UTC 24 |
Oct 12 02:27:28 PM UTC 24 |
5185004812 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.159714174 |
|
|
Oct 12 02:21:56 PM UTC 24 |
Oct 12 02:27:28 PM UTC 24 |
63584183616 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.4131166961 |
|
|
Oct 12 02:27:24 PM UTC 24 |
Oct 12 02:27:29 PM UTC 24 |
58213591 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.1676394703 |
|
|
Oct 12 02:27:26 PM UTC 24 |
Oct 12 02:27:31 PM UTC 24 |
38965395 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.3707789330 |
|
|
Oct 12 02:26:54 PM UTC 24 |
Oct 12 02:27:34 PM UTC 24 |
4852706849 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.3182446162 |
|
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Oct 12 02:26:22 PM UTC 24 |
Oct 12 02:27:34 PM UTC 24 |
6628680937 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.3389057210 |
|
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Oct 12 02:26:41 PM UTC 24 |
Oct 12 02:27:37 PM UTC 24 |
3883223865 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.1673018263 |
|
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Oct 12 02:27:35 PM UTC 24 |
Oct 12 02:27:37 PM UTC 24 |
13378653 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.80740077 |
|
|
Oct 12 02:27:06 PM UTC 24 |
Oct 12 02:27:39 PM UTC 24 |
6634441749 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.1866862450 |
|
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Oct 12 02:27:38 PM UTC 24 |
Oct 12 02:27:40 PM UTC 24 |
14670702 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.1941720620 |
|
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Oct 12 02:27:41 PM UTC 24 |
Oct 12 02:27:43 PM UTC 24 |
15638550 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.431971375 |
|
|
Oct 12 02:27:41 PM UTC 24 |
Oct 12 02:27:43 PM UTC 24 |
72740218 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.2824274752 |
|
|
Oct 12 02:27:22 PM UTC 24 |
Oct 12 02:27:44 PM UTC 24 |
17019733865 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.39878701 |
|
|
Oct 12 02:27:19 PM UTC 24 |
Oct 12 02:27:46 PM UTC 24 |
24593225148 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.2437941761 |
|
|
Oct 12 02:27:44 PM UTC 24 |
Oct 12 02:27:48 PM UTC 24 |
244465891 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.4093661423 |
|
|
Oct 12 02:27:39 PM UTC 24 |
Oct 12 02:27:49 PM UTC 24 |
18191737884 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.1323571837 |
|
|
Oct 12 02:27:30 PM UTC 24 |
Oct 12 02:27:49 PM UTC 24 |
1704991198 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.3425136429 |
|
|
Oct 12 02:27:21 PM UTC 24 |
Oct 12 02:27:50 PM UTC 24 |
12497702828 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.1295138905 |
|
|
Oct 12 02:27:47 PM UTC 24 |
Oct 12 02:27:51 PM UTC 24 |
200405055 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.1657840960 |
|
|
Oct 12 02:27:51 PM UTC 24 |
Oct 12 02:27:53 PM UTC 24 |
37521397 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.365365952 |
|
|
Oct 12 02:27:45 PM UTC 24 |
Oct 12 02:27:55 PM UTC 24 |
835110046 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.920426988 |
|
|
Oct 12 02:23:01 PM UTC 24 |
Oct 12 02:27:56 PM UTC 24 |
32550361878 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.3087750262 |
|
|
Oct 12 02:27:50 PM UTC 24 |
Oct 12 02:27:59 PM UTC 24 |
772398695 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.906751742 |
|
|
Oct 12 02:22:13 PM UTC 24 |
Oct 12 02:28:01 PM UTC 24 |
85494210127 ps |