| T628 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.1933269137 |
|
|
Oct 12 02:27:28 PM UTC 24 |
Oct 12 02:28:02 PM UTC 24 |
884627492 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.409284674 |
|
|
Oct 12 02:27:18 PM UTC 24 |
Oct 12 02:28:03 PM UTC 24 |
4675409369 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.1071982167 |
|
|
Oct 12 02:27:51 PM UTC 24 |
Oct 12 02:28:05 PM UTC 24 |
2788325088 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.3547710131 |
|
|
Oct 12 02:28:03 PM UTC 24 |
Oct 12 02:28:06 PM UTC 24 |
11764906 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.2097929105 |
|
|
Oct 12 02:28:03 PM UTC 24 |
Oct 12 02:28:06 PM UTC 24 |
24363984 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.687530804 |
|
|
Oct 12 02:27:50 PM UTC 24 |
Oct 12 02:28:06 PM UTC 24 |
4515008050 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.1069016102 |
|
|
Oct 12 02:27:49 PM UTC 24 |
Oct 12 02:28:06 PM UTC 24 |
1859682155 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3091705715 |
|
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Oct 12 02:27:55 PM UTC 24 |
Oct 12 02:28:09 PM UTC 24 |
951317016 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.903485188 |
|
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Oct 12 02:28:07 PM UTC 24 |
Oct 12 02:28:09 PM UTC 24 |
47792714 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.288552463 |
|
|
Oct 12 02:28:07 PM UTC 24 |
Oct 12 02:28:12 PM UTC 24 |
358684357 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_rw.893567905 |
|
|
Oct 12 02:28:07 PM UTC 24 |
Oct 12 02:28:12 PM UTC 24 |
98844450 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.3710206930 |
|
|
Oct 12 02:28:13 PM UTC 24 |
Oct 12 02:28:17 PM UTC 24 |
417128118 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.4087721029 |
|
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Oct 12 02:27:44 PM UTC 24 |
Oct 12 02:28:17 PM UTC 24 |
3946164563 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.4136328919 |
|
|
Oct 12 02:27:32 PM UTC 24 |
Oct 12 02:28:19 PM UTC 24 |
5741206897 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.278262815 |
|
|
Oct 12 02:28:08 PM UTC 24 |
Oct 12 02:28:23 PM UTC 24 |
5944682630 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.1380299051 |
|
|
Oct 12 02:28:07 PM UTC 24 |
Oct 12 02:28:23 PM UTC 24 |
7446858138 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.215136506 |
|
|
Oct 12 02:23:53 PM UTC 24 |
Oct 12 02:28:25 PM UTC 24 |
130092617814 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.147952385 |
|
|
Oct 12 02:28:18 PM UTC 24 |
Oct 12 02:28:25 PM UTC 24 |
711676313 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.224367631 |
|
|
Oct 12 02:28:10 PM UTC 24 |
Oct 12 02:28:27 PM UTC 24 |
987350791 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.1142666007 |
|
|
Oct 12 02:28:11 PM UTC 24 |
Oct 12 02:28:27 PM UTC 24 |
2300973641 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.2728193228 |
|
|
Oct 12 02:28:13 PM UTC 24 |
Oct 12 02:28:30 PM UTC 24 |
573903296 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.2512116395 |
|
|
Oct 12 02:28:28 PM UTC 24 |
Oct 12 02:28:31 PM UTC 24 |
25855178 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.753406619 |
|
|
Oct 12 02:25:17 PM UTC 24 |
Oct 12 02:28:31 PM UTC 24 |
7457141384 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_stress_all.1213085237 |
|
|
Oct 12 02:28:28 PM UTC 24 |
Oct 12 02:28:31 PM UTC 24 |
34498598 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.3845010359 |
|
|
Oct 12 02:28:30 PM UTC 24 |
Oct 12 02:28:33 PM UTC 24 |
130488972 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.1654259964 |
|
|
Oct 12 02:28:32 PM UTC 24 |
Oct 12 02:28:34 PM UTC 24 |
17714202 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.2085827270 |
|
|
Oct 12 02:28:42 PM UTC 24 |
Oct 12 02:28:53 PM UTC 24 |
28465255781 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.2946785007 |
|
|
Oct 12 02:28:23 PM UTC 24 |
Oct 12 02:28:36 PM UTC 24 |
803665451 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.3724858179 |
|
|
Oct 12 02:28:34 PM UTC 24 |
Oct 12 02:28:37 PM UTC 24 |
41379403 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.3852410708 |
|
|
Oct 12 02:28:36 PM UTC 24 |
Oct 12 02:28:40 PM UTC 24 |
58872943 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.1697487 |
|
|
Oct 12 02:28:32 PM UTC 24 |
Oct 12 02:28:41 PM UTC 24 |
2573713044 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_all.2971122025 |
|
|
Oct 12 02:19:21 PM UTC 24 |
Oct 12 02:28:44 PM UTC 24 |
131453719356 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.2826897941 |
|
|
Oct 12 02:26:22 PM UTC 24 |
Oct 12 02:28:45 PM UTC 24 |
65899584723 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.3612925732 |
|
|
Oct 12 02:28:38 PM UTC 24 |
Oct 12 02:28:46 PM UTC 24 |
799217820 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.4056711024 |
|
|
Oct 12 02:26:04 PM UTC 24 |
Oct 12 02:28:48 PM UTC 24 |
16226935322 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.2640142430 |
|
|
Oct 12 02:28:32 PM UTC 24 |
Oct 12 02:28:49 PM UTC 24 |
1013164780 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.3896431046 |
|
|
Oct 12 02:28:18 PM UTC 24 |
Oct 12 02:28:51 PM UTC 24 |
1415073004 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.4187281703 |
|
|
Oct 12 02:26:43 PM UTC 24 |
Oct 12 02:28:52 PM UTC 24 |
29488537501 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.1362452702 |
|
|
Oct 12 02:28:46 PM UTC 24 |
Oct 12 02:28:52 PM UTC 24 |
158350737 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.3195095011 |
|
|
Oct 12 02:27:30 PM UTC 24 |
Oct 12 02:28:54 PM UTC 24 |
15464401519 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.4237666899 |
|
|
Oct 12 02:28:45 PM UTC 24 |
Oct 12 02:28:55 PM UTC 24 |
571002535 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_stress_all.3814904663 |
|
|
Oct 12 02:28:53 PM UTC 24 |
Oct 12 02:28:56 PM UTC 24 |
118905487 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.3309849053 |
|
|
Oct 12 02:28:55 PM UTC 24 |
Oct 12 02:28:57 PM UTC 24 |
13670288 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.4149337850 |
|
|
Oct 12 02:26:27 PM UTC 24 |
Oct 12 02:28:57 PM UTC 24 |
24801599680 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.2475732617 |
|
|
Oct 12 02:24:20 PM UTC 24 |
Oct 12 02:28:57 PM UTC 24 |
32688227000 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_csb_read.3654850091 |
|
|
Oct 12 02:28:56 PM UTC 24 |
Oct 12 02:28:58 PM UTC 24 |
50770808 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.2721224562 |
|
|
Oct 12 02:28:56 PM UTC 24 |
Oct 12 02:28:59 PM UTC 24 |
93994108 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.656335887 |
|
|
Oct 12 02:28:57 PM UTC 24 |
Oct 12 02:29:00 PM UTC 24 |
57089727 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.3677879476 |
|
|
Oct 12 02:27:05 PM UTC 24 |
Oct 12 02:29:00 PM UTC 24 |
14853891048 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.3545527708 |
|
|
Oct 12 02:27:57 PM UTC 24 |
Oct 12 02:29:00 PM UTC 24 |
2489255386 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.2523340876 |
|
|
Oct 12 02:28:57 PM UTC 24 |
Oct 12 02:29:00 PM UTC 24 |
203169325 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.1190796095 |
|
|
Oct 12 02:28:35 PM UTC 24 |
Oct 12 02:29:01 PM UTC 24 |
3910610852 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.3398283347 |
|
|
Oct 12 02:28:59 PM UTC 24 |
Oct 12 02:29:01 PM UTC 24 |
27649309 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.2578229240 |
|
|
Oct 12 02:28:59 PM UTC 24 |
Oct 12 02:29:03 PM UTC 24 |
1046882552 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.3467047389 |
|
|
Oct 12 02:29:00 PM UTC 24 |
Oct 12 02:29:05 PM UTC 24 |
84246647 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.2539239438 |
|
|
Oct 12 02:28:46 PM UTC 24 |
Oct 12 02:29:06 PM UTC 24 |
3211400609 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_all.1540822017 |
|
|
Oct 12 02:28:25 PM UTC 24 |
Oct 12 02:29:08 PM UTC 24 |
3043805992 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.2540891229 |
|
|
Oct 12 02:28:50 PM UTC 24 |
Oct 12 02:29:12 PM UTC 24 |
18053103702 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.4053064676 |
|
|
Oct 12 02:27:06 PM UTC 24 |
Oct 12 02:29:13 PM UTC 24 |
50960651923 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2778691480 |
|
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Oct 12 02:29:03 PM UTC 24 |
Oct 12 02:29:14 PM UTC 24 |
895178603 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.915065585 |
|
|
Oct 12 02:29:13 PM UTC 24 |
Oct 12 02:29:15 PM UTC 24 |
13201325 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.3025896708 |
|
|
Oct 12 02:25:12 PM UTC 24 |
Oct 12 02:29:15 PM UTC 24 |
60645697411 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.417767808 |
|
|
Oct 12 02:29:14 PM UTC 24 |
Oct 12 02:29:16 PM UTC 24 |
69140877 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.634097406 |
|
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Oct 12 02:28:41 PM UTC 24 |
Oct 12 02:29:18 PM UTC 24 |
57052691740 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.1269207048 |
|
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Oct 12 02:29:02 PM UTC 24 |
Oct 12 02:29:19 PM UTC 24 |
3556980641 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.3288830277 |
|
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Oct 12 02:29:17 PM UTC 24 |
Oct 12 02:29:19 PM UTC 24 |
317892844 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3114149174 |
|
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Oct 12 02:28:59 PM UTC 24 |
Oct 12 02:29:19 PM UTC 24 |
1659169917 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.1905938640 |
|
|
Oct 12 02:29:00 PM UTC 24 |
Oct 12 02:29:19 PM UTC 24 |
2178191520 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.1402613141 |
|
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Oct 12 02:29:17 PM UTC 24 |
Oct 12 02:29:20 PM UTC 24 |
42037870 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.656037789 |
|
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Oct 12 02:29:02 PM UTC 24 |
Oct 12 02:29:21 PM UTC 24 |
7207384933 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.2532185653 |
|
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Oct 12 02:27:30 PM UTC 24 |
Oct 12 02:29:21 PM UTC 24 |
31480235585 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_stress_all.419491726 |
|
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Oct 12 02:28:02 PM UTC 24 |
Oct 12 02:29:22 PM UTC 24 |
36605067357 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_all.721008003 |
|
|
Oct 12 02:29:05 PM UTC 24 |
Oct 12 02:29:23 PM UTC 24 |
1607298292 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.877653392 |
|
|
Oct 12 02:29:21 PM UTC 24 |
Oct 12 02:29:25 PM UTC 24 |
31661355 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.2815710881 |
|
|
Oct 12 02:29:02 PM UTC 24 |
Oct 12 02:29:26 PM UTC 24 |
2812605329 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.893858258 |
|
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Oct 12 02:29:22 PM UTC 24 |
Oct 12 02:29:29 PM UTC 24 |
291886540 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.5794373 |
|
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Oct 12 02:29:15 PM UTC 24 |
Oct 12 02:29:29 PM UTC 24 |
7923370438 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.3410426879 |
|
|
Oct 12 02:29:31 PM UTC 24 |
Oct 12 02:29:33 PM UTC 24 |
21142878 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.651623931 |
|
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Oct 12 02:29:21 PM UTC 24 |
Oct 12 02:29:34 PM UTC 24 |
1468689655 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.1774284035 |
|
|
Oct 12 02:29:21 PM UTC 24 |
Oct 12 02:29:34 PM UTC 24 |
1093190928 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.4202179593 |
|
|
Oct 12 02:29:21 PM UTC 24 |
Oct 12 02:29:35 PM UTC 24 |
1233911132 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.790098419 |
|
|
Oct 12 02:29:34 PM UTC 24 |
Oct 12 02:29:36 PM UTC 24 |
59502494 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.3936742552 |
|
|
Oct 12 02:29:24 PM UTC 24 |
Oct 12 02:29:37 PM UTC 24 |
1292386586 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.870152650 |
|
|
Oct 12 02:29:21 PM UTC 24 |
Oct 12 02:29:38 PM UTC 24 |
762663448 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.2454059964 |
|
|
Oct 12 02:29:21 PM UTC 24 |
Oct 12 02:29:38 PM UTC 24 |
24021251279 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.354611186 |
|
|
Oct 12 02:29:36 PM UTC 24 |
Oct 12 02:29:39 PM UTC 24 |
134579868 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_all.1331187620 |
|
|
Oct 12 02:28:51 PM UTC 24 |
Oct 12 02:29:40 PM UTC 24 |
5146118328 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.2710787838 |
|
|
Oct 12 02:29:35 PM UTC 24 |
Oct 12 02:29:42 PM UTC 24 |
630988389 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.3743596794 |
|
|
Oct 12 02:29:15 PM UTC 24 |
Oct 12 02:29:43 PM UTC 24 |
2573864454 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.3373985150 |
|
|
Oct 12 02:29:39 PM UTC 24 |
Oct 12 02:29:43 PM UTC 24 |
36443697 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.1714493908 |
|
|
Oct 12 02:29:37 PM UTC 24 |
Oct 12 02:29:44 PM UTC 24 |
952478056 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.259724884 |
|
|
Oct 12 02:28:20 PM UTC 24 |
Oct 12 02:29:49 PM UTC 24 |
9642025256 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.2962011829 |
|
|
Oct 12 02:29:39 PM UTC 24 |
Oct 12 02:29:50 PM UTC 24 |
1480027646 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.3907583072 |
|
|
Oct 12 02:29:43 PM UTC 24 |
Oct 12 02:29:50 PM UTC 24 |
1732142801 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.570524453 |
|
|
Oct 12 02:29:39 PM UTC 24 |
Oct 12 02:29:52 PM UTC 24 |
776350185 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3646093442 |
|
|
Oct 12 02:28:53 PM UTC 24 |
Oct 12 02:29:54 PM UTC 24 |
3722975363 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.321886412 |
|
|
Oct 12 02:29:44 PM UTC 24 |
Oct 12 02:29:56 PM UTC 24 |
354646822 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.195002927 |
|
|
Oct 12 02:29:44 PM UTC 24 |
Oct 12 02:29:56 PM UTC 24 |
1297129426 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.4240871902 |
|
|
Oct 12 02:29:54 PM UTC 24 |
Oct 12 02:29:56 PM UTC 24 |
36842450 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.3830893608 |
|
|
Oct 12 02:29:40 PM UTC 24 |
Oct 12 02:29:57 PM UTC 24 |
1474498132 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.3623005608 |
|
|
Oct 12 02:29:55 PM UTC 24 |
Oct 12 02:29:58 PM UTC 24 |
58229106 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.2244545816 |
|
|
Oct 12 02:29:57 PM UTC 24 |
Oct 12 02:30:00 PM UTC 24 |
13659722 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.1017486850 |
|
|
Oct 12 02:29:58 PM UTC 24 |
Oct 12 02:30:00 PM UTC 24 |
65473777 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.3651298251 |
|
|
Oct 12 02:28:52 PM UTC 24 |
Oct 12 02:30:05 PM UTC 24 |
17451003036 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.2758947534 |
|
|
Oct 12 02:29:59 PM UTC 24 |
Oct 12 02:30:06 PM UTC 24 |
510450388 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.1440089886 |
|
|
Oct 12 02:30:01 PM UTC 24 |
Oct 12 02:30:08 PM UTC 24 |
675691879 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.4083635855 |
|
|
Oct 12 02:29:57 PM UTC 24 |
Oct 12 02:30:09 PM UTC 24 |
4095790130 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.3166671220 |
|
|
Oct 12 02:29:59 PM UTC 24 |
Oct 12 02:30:09 PM UTC 24 |
836686202 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.3620911487 |
|
|
Oct 12 02:30:01 PM UTC 24 |
Oct 12 02:30:10 PM UTC 24 |
211777761 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.3445342078 |
|
|
Oct 12 02:29:27 PM UTC 24 |
Oct 12 02:30:11 PM UTC 24 |
2251887450 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.374816408 |
|
|
Oct 12 02:29:35 PM UTC 24 |
Oct 12 02:30:12 PM UTC 24 |
5208121046 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.1946609490 |
|
|
Oct 12 02:28:26 PM UTC 24 |
Oct 12 02:30:12 PM UTC 24 |
13880935753 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3665522146 |
|
|
Oct 12 02:30:09 PM UTC 24 |
Oct 12 02:30:18 PM UTC 24 |
616523636 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.2918585257 |
|
|
Oct 12 02:30:08 PM UTC 24 |
Oct 12 02:30:19 PM UTC 24 |
595265018 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.2460124909 |
|
|
Oct 12 02:30:10 PM UTC 24 |
Oct 12 02:30:21 PM UTC 24 |
355098207 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.3404479225 |
|
|
Oct 12 02:30:07 PM UTC 24 |
Oct 12 02:30:21 PM UTC 24 |
1410883245 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.194457921 |
|
|
Oct 12 02:30:20 PM UTC 24 |
Oct 12 02:30:22 PM UTC 24 |
111062159 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.1329352176 |
|
|
Oct 12 02:30:11 PM UTC 24 |
Oct 12 02:30:23 PM UTC 24 |
951214263 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_all.1120824058 |
|
|
Oct 12 02:27:57 PM UTC 24 |
Oct 12 02:30:23 PM UTC 24 |
36334231641 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.851434983 |
|
|
Oct 12 02:30:22 PM UTC 24 |
Oct 12 02:30:24 PM UTC 24 |
59598878 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.3294548287 |
|
|
Oct 12 02:30:22 PM UTC 24 |
Oct 12 02:30:25 PM UTC 24 |
1523650792 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.1260722863 |
|
|
Oct 12 02:30:25 PM UTC 24 |
Oct 12 02:30:27 PM UTC 24 |
126215723 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.2069477510 |
|
|
Oct 12 02:30:25 PM UTC 24 |
Oct 12 02:30:27 PM UTC 24 |
449205424 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.4292630889 |
|
|
Oct 12 02:28:26 PM UTC 24 |
Oct 12 02:30:29 PM UTC 24 |
27932358256 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.1626772430 |
|
|
Oct 12 02:30:26 PM UTC 24 |
Oct 12 02:30:30 PM UTC 24 |
398799986 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.773615382 |
|
|
Oct 12 02:29:02 PM UTC 24 |
Oct 12 02:30:33 PM UTC 24 |
63780403526 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.2626671149 |
|
|
Oct 12 02:32:22 PM UTC 24 |
Oct 12 02:32:24 PM UTC 24 |
17832272 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.2746104368 |
|
|
Oct 12 02:29:41 PM UTC 24 |
Oct 12 02:30:34 PM UTC 24 |
31039574132 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.3141276516 |
|
|
Oct 12 02:30:32 PM UTC 24 |
Oct 12 02:30:36 PM UTC 24 |
31896094 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.3102078381 |
|
|
Oct 12 02:30:30 PM UTC 24 |
Oct 12 02:30:37 PM UTC 24 |
4076141876 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.299134409 |
|
|
Oct 12 02:30:27 PM UTC 24 |
Oct 12 02:30:37 PM UTC 24 |
562420644 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_all.2319046930 |
|
|
Oct 12 02:29:24 PM UTC 24 |
Oct 12 02:30:42 PM UTC 24 |
5455860323 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.2934563750 |
|
|
Oct 12 02:30:33 PM UTC 24 |
Oct 12 02:30:42 PM UTC 24 |
261753880 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.1708286209 |
|
|
Oct 12 02:30:25 PM UTC 24 |
Oct 12 02:30:43 PM UTC 24 |
7214747322 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.4022443562 |
|
|
Oct 12 02:29:51 PM UTC 24 |
Oct 12 02:30:44 PM UTC 24 |
4026894704 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.367203083 |
|
|
Oct 12 02:30:28 PM UTC 24 |
Oct 12 02:30:45 PM UTC 24 |
1322797979 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.3624603792 |
|
|
Oct 12 02:30:43 PM UTC 24 |
Oct 12 02:30:46 PM UTC 24 |
65878537 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.2555895851 |
|
|
Oct 12 02:30:23 PM UTC 24 |
Oct 12 02:30:46 PM UTC 24 |
5690514813 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_stress_all.2049271220 |
|
|
Oct 12 02:30:43 PM UTC 24 |
Oct 12 02:30:46 PM UTC 24 |
140759003 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.633892250 |
|
|
Oct 12 02:30:46 PM UTC 24 |
Oct 12 02:30:48 PM UTC 24 |
17324555 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.3169114751 |
|
|
Oct 12 02:30:47 PM UTC 24 |
Oct 12 02:30:50 PM UTC 24 |
121304045 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.1467682691 |
|
|
Oct 12 02:30:37 PM UTC 24 |
Oct 12 02:30:51 PM UTC 24 |
912494603 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.2994468249 |
|
|
Oct 12 02:30:49 PM UTC 24 |
Oct 12 02:30:53 PM UTC 24 |
93239094 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.1257844073 |
|
|
Oct 12 02:30:47 PM UTC 24 |
Oct 12 02:30:53 PM UTC 24 |
256635340 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.3797414736 |
|
|
Oct 12 02:30:47 PM UTC 24 |
Oct 12 02:30:55 PM UTC 24 |
296455933 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.1287802485 |
|
|
Oct 12 02:27:03 PM UTC 24 |
Oct 12 02:30:56 PM UTC 24 |
107016695901 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.3646764123 |
|
|
Oct 12 02:30:46 PM UTC 24 |
Oct 12 02:30:56 PM UTC 24 |
1543402683 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.835199655 |
|
|
Oct 12 02:30:56 PM UTC 24 |
Oct 12 02:31:00 PM UTC 24 |
92187832 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.1819168777 |
|
|
Oct 12 02:30:55 PM UTC 24 |
Oct 12 02:31:06 PM UTC 24 |
1883765756 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.537663689 |
|
|
Oct 12 02:29:06 PM UTC 24 |
Oct 12 02:31:08 PM UTC 24 |
42713218383 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.2581892394 |
|
|
Oct 12 02:30:35 PM UTC 24 |
Oct 12 02:31:13 PM UTC 24 |
7013589607 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.322947250 |
|
|
Oct 12 02:30:52 PM UTC 24 |
Oct 12 02:31:14 PM UTC 24 |
13415668067 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.1330450255 |
|
|
Oct 12 02:29:22 PM UTC 24 |
Oct 12 02:31:18 PM UTC 24 |
140142592341 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.537911983 |
|
|
Oct 12 02:30:51 PM UTC 24 |
Oct 12 02:31:19 PM UTC 24 |
4312180566 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.95938048 |
|
|
Oct 12 02:30:57 PM UTC 24 |
Oct 12 02:31:19 PM UTC 24 |
3442817167 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_all.1056726578 |
|
|
Oct 12 02:31:08 PM UTC 24 |
Oct 12 02:31:19 PM UTC 24 |
416720192 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.2478737848 |
|
|
Oct 12 02:31:18 PM UTC 24 |
Oct 12 02:31:21 PM UTC 24 |
43202388 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.256642435 |
|
|
Oct 12 02:31:01 PM UTC 24 |
Oct 12 02:31:21 PM UTC 24 |
972190916 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.2201804421 |
|
|
Oct 12 02:31:20 PM UTC 24 |
Oct 12 02:31:22 PM UTC 24 |
22679573 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3253998476 |
|
|
Oct 12 02:31:22 PM UTC 24 |
Oct 12 02:31:25 PM UTC 24 |
33867611 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.596553505 |
|
|
Oct 12 02:31:20 PM UTC 24 |
Oct 12 02:31:29 PM UTC 24 |
5405891524 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.460757834 |
|
|
Oct 12 02:30:10 PM UTC 24 |
Oct 12 02:31:29 PM UTC 24 |
39702792653 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.1382101351 |
|
|
Oct 12 02:31:22 PM UTC 24 |
Oct 12 02:31:29 PM UTC 24 |
358868782 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/29.spi_device_stress_all.2502139868 |
|
|
Oct 12 02:29:09 PM UTC 24 |
Oct 12 02:31:32 PM UTC 24 |
178292462932 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.3025029544 |
|
|
Oct 12 02:31:30 PM UTC 24 |
Oct 12 02:31:35 PM UTC 24 |
380729632 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.3015080596 |
|
|
Oct 12 02:31:30 PM UTC 24 |
Oct 12 02:31:36 PM UTC 24 |
161259691 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1211361800 |
|
|
Oct 12 02:31:33 PM UTC 24 |
Oct 12 02:31:38 PM UTC 24 |
28997790 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2488051962 |
|
|
Oct 12 02:31:23 PM UTC 24 |
Oct 12 02:31:38 PM UTC 24 |
3575740393 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.1644858388 |
|
|
Oct 12 02:31:26 PM UTC 24 |
Oct 12 02:31:38 PM UTC 24 |
393106355 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/25.spi_device_stress_all.3219326304 |
|
|
Oct 12 02:27:35 PM UTC 24 |
Oct 12 02:31:40 PM UTC 24 |
108974855497 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.4203664821 |
|
|
Oct 12 02:31:36 PM UTC 24 |
Oct 12 02:31:41 PM UTC 24 |
68875714 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.590902612 |
|
|
Oct 12 02:31:38 PM UTC 24 |
Oct 12 02:31:44 PM UTC 24 |
84050727 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.615541738 |
|
|
Oct 12 02:31:20 PM UTC 24 |
Oct 12 02:31:47 PM UTC 24 |
6413520948 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.1874444364 |
|
|
Oct 12 02:31:45 PM UTC 24 |
Oct 12 02:31:47 PM UTC 24 |
40396803 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.3533504590 |
|
|
Oct 12 02:31:47 PM UTC 24 |
Oct 12 02:31:50 PM UTC 24 |
15522855 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.2068294631 |
|
|
Oct 12 02:30:53 PM UTC 24 |
Oct 12 02:31:54 PM UTC 24 |
23500571957 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.2427424699 |
|
|
Oct 12 02:31:55 PM UTC 24 |
Oct 12 02:31:57 PM UTC 24 |
80498287 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.2986101441 |
|
|
Oct 12 02:30:43 PM UTC 24 |
Oct 12 02:31:58 PM UTC 24 |
64889277384 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_all.3352909508 |
|
|
Oct 12 02:30:38 PM UTC 24 |
Oct 12 02:31:59 PM UTC 24 |
11807810697 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.3548431497 |
|
|
Oct 12 02:31:58 PM UTC 24 |
Oct 12 02:32:00 PM UTC 24 |
16163619 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.2907441082 |
|
|
Oct 12 02:29:44 PM UTC 24 |
Oct 12 02:32:06 PM UTC 24 |
17613710500 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.1769600168 |
|
|
Oct 12 02:32:02 PM UTC 24 |
Oct 12 02:32:08 PM UTC 24 |
124226147 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.2418384293 |
|
|
Oct 12 02:23:22 PM UTC 24 |
Oct 12 02:32:12 PM UTC 24 |
50175942468 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.1102174950 |
|
|
Oct 12 02:31:51 PM UTC 24 |
Oct 12 02:32:13 PM UTC 24 |
3823630034 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.1445446026 |
|
|
Oct 12 02:31:49 PM UTC 24 |
Oct 12 02:32:15 PM UTC 24 |
10372367080 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.3686584785 |
|
|
Oct 12 02:26:51 PM UTC 24 |
Oct 12 02:32:15 PM UTC 24 |
134066423826 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.2247585307 |
|
|
Oct 12 02:32:07 PM UTC 24 |
Oct 12 02:32:15 PM UTC 24 |
3199438235 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2379707560 |
|
|
Oct 12 02:31:59 PM UTC 24 |
Oct 12 02:32:16 PM UTC 24 |
538897026 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/21.spi_device_stress_all.930839431 |
|
|
Oct 12 02:26:07 PM UTC 24 |
Oct 12 02:32:19 PM UTC 24 |
48666299806 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.3385537619 |
|
|
Oct 12 02:32:14 PM UTC 24 |
Oct 12 02:32:20 PM UTC 24 |
286492864 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.2541050660 |
|
|
Oct 12 02:31:30 PM UTC 24 |
Oct 12 02:32:21 PM UTC 24 |
7821970207 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.2988523382 |
|
|
Oct 12 02:32:14 PM UTC 24 |
Oct 12 02:32:22 PM UTC 24 |
4279582588 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_stress_all.3307278217 |
|
|
Oct 12 02:32:21 PM UTC 24 |
Oct 12 02:32:24 PM UTC 24 |
70172364 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.990543779 |
|
|
Oct 12 02:32:09 PM UTC 24 |
Oct 12 02:32:25 PM UTC 24 |
1469343413 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.657382331 |
|
|
Oct 12 02:32:23 PM UTC 24 |
Oct 12 02:32:25 PM UTC 24 |
58910895 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.2772438815 |
|
|
Oct 12 02:32:01 PM UTC 24 |
Oct 12 02:32:25 PM UTC 24 |
20287838661 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.3938450711 |
|
|
Oct 12 02:30:13 PM UTC 24 |
Oct 12 02:32:26 PM UTC 24 |
62164047604 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.1560768944 |
|
|
Oct 12 02:26:27 PM UTC 24 |
Oct 12 02:32:26 PM UTC 24 |
31049598760 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.4012000514 |
|
|
Oct 12 02:32:26 PM UTC 24 |
Oct 12 02:32:28 PM UTC 24 |
32918579 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.1636604185 |
|
|
Oct 12 02:32:16 PM UTC 24 |
Oct 12 02:32:29 PM UTC 24 |
756698549 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.2936683632 |
|
|
Oct 12 02:32:26 PM UTC 24 |
Oct 12 02:32:29 PM UTC 24 |
114923486 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.2818915712 |
|
|
Oct 12 02:32:27 PM UTC 24 |
Oct 12 02:32:32 PM UTC 24 |
469920022 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.998665533 |
|
|
Oct 12 02:32:28 PM UTC 24 |
Oct 12 02:32:34 PM UTC 24 |
673233221 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.2786547196 |
|
|
Oct 12 02:32:28 PM UTC 24 |
Oct 12 02:32:38 PM UTC 24 |
567157328 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.2930137515 |
|
|
Oct 12 02:32:25 PM UTC 24 |
Oct 12 02:32:44 PM UTC 24 |
12073102138 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.1397665493 |
|
|
Oct 12 02:32:30 PM UTC 24 |
Oct 12 02:32:45 PM UTC 24 |
981840853 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.2520178727 |
|
|
Oct 12 02:32:39 PM UTC 24 |
Oct 12 02:32:46 PM UTC 24 |
550714036 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.4189677273 |
|
|
Oct 12 02:32:32 PM UTC 24 |
Oct 12 02:32:48 PM UTC 24 |
2066242125 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.1871586129 |
|
|
Oct 12 02:32:30 PM UTC 24 |
Oct 12 02:32:50 PM UTC 24 |
4340955564 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_stress_all.609870019 |
|
|
Oct 12 02:32:49 PM UTC 24 |
Oct 12 02:32:51 PM UTC 24 |
200694547 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.2473880550 |
|
|
Oct 12 02:32:51 PM UTC 24 |
Oct 12 02:32:53 PM UTC 24 |
66910506 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.322329939 |
|
|
Oct 12 02:30:39 PM UTC 24 |
Oct 12 02:32:54 PM UTC 24 |
7560133078 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.1775588594 |
|
|
Oct 12 02:32:52 PM UTC 24 |
Oct 12 02:32:54 PM UTC 24 |
21170929 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.2745471444 |
|
|
Oct 12 02:32:16 PM UTC 24 |
Oct 12 02:32:57 PM UTC 24 |
4776553864 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_all.3652476535 |
|
|
Oct 12 02:32:56 PM UTC 24 |
Oct 12 02:32:58 PM UTC 24 |
11705533 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.2853333162 |
|
|
Oct 12 02:32:56 PM UTC 24 |
Oct 12 02:32:58 PM UTC 24 |
149405957 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_all.3231829092 |
|
|
Oct 12 02:32:45 PM UTC 24 |
Oct 12 02:33:00 PM UTC 24 |
2794658638 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.2432443200 |
|
|
Oct 12 02:32:54 PM UTC 24 |
Oct 12 02:33:01 PM UTC 24 |
2438081515 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.1645463729 |
|
|
Oct 12 02:32:59 PM UTC 24 |
Oct 12 02:33:01 PM UTC 24 |
13301019 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.408039607 |
|
|
Oct 12 02:32:59 PM UTC 24 |
Oct 12 02:33:04 PM UTC 24 |
136825979 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.1223297420 |
|
|
Oct 12 02:32:25 PM UTC 24 |
Oct 12 02:33:04 PM UTC 24 |
28529465785 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_all.946599525 |
|
|
Oct 12 02:31:39 PM UTC 24 |
Oct 12 02:33:04 PM UTC 24 |
8774989399 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.2668181665 |
|
|
Oct 12 02:24:23 PM UTC 24 |
Oct 12 02:33:05 PM UTC 24 |
51618403082 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1142429001 |
|
|
Oct 12 02:33:04 PM UTC 24 |
Oct 12 02:33:08 PM UTC 24 |
34415552 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.2664434602 |
|
|
Oct 12 02:33:02 PM UTC 24 |
Oct 12 02:33:09 PM UTC 24 |
1688261037 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.1456946110 |
|
|
Oct 12 02:33:04 PM UTC 24 |
Oct 12 02:33:09 PM UTC 24 |
116807666 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.730795873 |
|
|
Oct 12 02:33:02 PM UTC 24 |
Oct 12 02:33:10 PM UTC 24 |
494055750 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.1266407968 |
|
|
Oct 12 02:31:41 PM UTC 24 |
Oct 12 02:33:11 PM UTC 24 |
24437788533 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.2558809644 |
|
|
Oct 12 02:24:22 PM UTC 24 |
Oct 12 02:33:12 PM UTC 24 |
60085128589 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.1174272051 |
|
|
Oct 12 02:33:12 PM UTC 24 |
Oct 12 02:33:14 PM UTC 24 |
44703351 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.899351430 |
|
|
Oct 12 02:33:13 PM UTC 24 |
Oct 12 02:33:15 PM UTC 24 |
19837044 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2149197022 |
|
|
Oct 12 02:33:06 PM UTC 24 |
Oct 12 02:33:19 PM UTC 24 |
1853651202 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.3274645046 |
|
|
Oct 12 02:33:15 PM UTC 24 |
Oct 12 02:33:21 PM UTC 24 |
1479008642 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.747457412 |
|
|
Oct 12 02:33:20 PM UTC 24 |
Oct 12 02:33:22 PM UTC 24 |
85807161 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_all.1527817554 |
|
|
Oct 12 02:33:09 PM UTC 24 |
Oct 12 02:33:25 PM UTC 24 |
554218292 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.3962052601 |
|
|
Oct 12 02:33:23 PM UTC 24 |
Oct 12 02:33:25 PM UTC 24 |
11353551 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.3787810873 |
|
|
Oct 12 02:32:47 PM UTC 24 |
Oct 12 02:33:26 PM UTC 24 |
2585994549 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.2188254 |
|
|
Oct 12 02:32:29 PM UTC 24 |
Oct 12 02:33:28 PM UTC 24 |
44359901038 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.4186916368 |
|
|
Oct 12 02:33:27 PM UTC 24 |
Oct 12 02:33:32 PM UTC 24 |
67628638 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.1580962244 |
|
|
Oct 12 02:33:23 PM UTC 24 |
Oct 12 02:33:34 PM UTC 24 |
5335005848 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2028957709 |
|
|
Oct 12 02:32:59 PM UTC 24 |
Oct 12 02:33:35 PM UTC 24 |
50232054036 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.3876000376 |
|
|
Oct 12 02:31:14 PM UTC 24 |
Oct 12 02:33:37 PM UTC 24 |
12434584252 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.3100002842 |
|
|
Oct 12 02:33:36 PM UTC 24 |
Oct 12 02:33:38 PM UTC 24 |
55112134 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.1416935919 |
|
|
Oct 12 02:33:33 PM UTC 24 |
Oct 12 02:33:40 PM UTC 24 |
1851407943 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode.424839277 |
|
|
Oct 12 02:33:35 PM UTC 24 |
Oct 12 02:33:42 PM UTC 24 |
451878581 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.277105094 |
|
|
Oct 12 02:26:26 PM UTC 24 |
Oct 12 02:33:46 PM UTC 24 |
42166087458 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.1900787683 |
|
|
Oct 12 02:33:27 PM UTC 24 |
Oct 12 02:33:48 PM UTC 24 |
31973163836 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.3588790375 |
|
|
Oct 12 02:33:49 PM UTC 24 |
Oct 12 02:33:51 PM UTC 24 |
42196074 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.1956331549 |
|
|
Oct 12 02:33:52 PM UTC 24 |
Oct 12 02:33:54 PM UTC 24 |
163395363 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.203906570 |
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|
Oct 12 02:33:38 PM UTC 24 |
Oct 12 02:33:55 PM UTC 24 |
1044843033 ps |