| T340 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/12.spi_device_mailbox.1753511128 |
|
|
Oct 15 12:34:59 PM UTC 24 |
Oct 15 12:35:41 PM UTC 24 |
4768863556 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_cfg_cmd.116185314 |
|
|
Oct 15 12:35:37 PM UTC 24 |
Oct 15 12:35:43 PM UTC 24 |
2241089012 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_all.3990125013 |
|
|
Oct 15 12:29:47 PM UTC 24 |
Oct 15 12:35:49 PM UTC 24 |
42673313973 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_read_buffer_direct.4245619816 |
|
|
Oct 15 12:35:43 PM UTC 24 |
Oct 15 12:35:50 PM UTC 24 |
388989744 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.3343384995 |
|
|
Oct 15 12:35:37 PM UTC 24 |
Oct 15 12:35:52 PM UTC 24 |
518549710 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_pass_cmd_filtering.1995594555 |
|
|
Oct 15 12:35:28 PM UTC 24 |
Oct 15 12:35:54 PM UTC 24 |
6855776767 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.2325588116 |
|
|
Oct 15 12:35:23 PM UTC 24 |
Oct 15 12:35:54 PM UTC 24 |
16808858821 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_upload.1923332366 |
|
|
Oct 15 12:35:36 PM UTC 24 |
Oct 15 12:35:54 PM UTC 24 |
8193139685 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_alert_test.2503483776 |
|
|
Oct 15 12:35:55 PM UTC 24 |
Oct 15 12:35:57 PM UTC 24 |
36384246 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_csb_read.2109163453 |
|
|
Oct 15 12:35:55 PM UTC 24 |
Oct 15 12:35:57 PM UTC 24 |
22243276 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mem_parity.1808651179 |
|
|
Oct 15 12:35:56 PM UTC 24 |
Oct 15 12:35:59 PM UTC 24 |
55712072 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.297405380 |
|
|
Oct 15 12:35:59 PM UTC 24 |
Oct 15 12:36:01 PM UTC 24 |
15390233 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.2200661619 |
|
|
Oct 15 12:35:58 PM UTC 24 |
Oct 15 12:36:04 PM UTC 24 |
516751165 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_rw.1684964716 |
|
|
Oct 15 12:36:01 PM UTC 24 |
Oct 15 12:36:04 PM UTC 24 |
79802707 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.3204584339 |
|
|
Oct 15 12:35:58 PM UTC 24 |
Oct 15 12:36:05 PM UTC 24 |
718271554 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.3208912895 |
|
|
Oct 15 12:36:03 PM UTC 24 |
Oct 15 12:36:13 PM UTC 24 |
4390393977 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.2460787345 |
|
|
Oct 15 12:36:05 PM UTC 24 |
Oct 15 12:36:15 PM UTC 24 |
1947785003 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.2566742963 |
|
|
Oct 15 12:36:05 PM UTC 24 |
Oct 15 12:36:17 PM UTC 24 |
418891989 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.2983754207 |
|
|
Oct 15 12:34:36 PM UTC 24 |
Oct 15 12:36:17 PM UTC 24 |
4900284730 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.4050222166 |
|
|
Oct 15 12:36:16 PM UTC 24 |
Oct 15 12:36:19 PM UTC 24 |
58349789 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.1503232123 |
|
|
Oct 15 12:36:14 PM UTC 24 |
Oct 15 12:36:22 PM UTC 24 |
2792927554 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.3392098136 |
|
|
Oct 15 12:36:20 PM UTC 24 |
Oct 15 12:36:26 PM UTC 24 |
431038120 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.916473123 |
|
|
Oct 15 12:34:34 PM UTC 24 |
Oct 15 12:36:28 PM UTC 24 |
3992270271 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_mailbox.1644896119 |
|
|
Oct 15 12:35:32 PM UTC 24 |
Oct 15 12:36:29 PM UTC 24 |
22857618007 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.2704605907 |
|
|
Oct 15 12:36:30 PM UTC 24 |
Oct 15 12:36:32 PM UTC 24 |
17525362 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.2595613584 |
|
|
Oct 15 12:36:06 PM UTC 24 |
Oct 15 12:36:33 PM UTC 24 |
3841861014 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.1156801226 |
|
|
Oct 15 12:32:56 PM UTC 24 |
Oct 15 12:36:33 PM UTC 24 |
15314809790 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_mode_ignore_cmds.1031707287 |
|
|
Oct 15 12:34:00 PM UTC 24 |
Oct 15 12:36:34 PM UTC 24 |
11185519287 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.1279448783 |
|
|
Oct 15 12:36:33 PM UTC 24 |
Oct 15 12:36:35 PM UTC 24 |
16768780 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.852986230 |
|
|
Oct 15 12:34:29 PM UTC 24 |
Oct 15 12:36:37 PM UTC 24 |
8847850084 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.1763425845 |
|
|
Oct 15 12:36:34 PM UTC 24 |
Oct 15 12:36:37 PM UTC 24 |
48737655 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.1924478306 |
|
|
Oct 15 12:36:35 PM UTC 24 |
Oct 15 12:36:38 PM UTC 24 |
42119125 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.1359705221 |
|
|
Oct 15 12:36:36 PM UTC 24 |
Oct 15 12:36:39 PM UTC 24 |
23791583 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.3462014561 |
|
|
Oct 15 12:36:37 PM UTC 24 |
Oct 15 12:36:40 PM UTC 24 |
22428448 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.1012188922 |
|
|
Oct 15 12:35:49 PM UTC 24 |
Oct 15 12:36:41 PM UTC 24 |
18172865949 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_mode_ignore_cmds.1126267242 |
|
|
Oct 15 12:29:07 PM UTC 24 |
Oct 15 12:36:44 PM UTC 24 |
53394688294 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.4216883815 |
|
|
Oct 15 12:36:34 PM UTC 24 |
Oct 15 12:36:44 PM UTC 24 |
8056831458 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/1.spi_device_flash_and_tpm.172557043 |
|
|
Oct 15 12:28:08 PM UTC 24 |
Oct 15 12:36:45 PM UTC 24 |
204128411220 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.2663489905 |
|
|
Oct 15 12:36:42 PM UTC 24 |
Oct 15 12:36:46 PM UTC 24 |
59807236 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3154336445 |
|
|
Oct 15 12:36:39 PM UTC 24 |
Oct 15 12:36:46 PM UTC 24 |
563350563 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.1364160216 |
|
|
Oct 15 12:36:48 PM UTC 24 |
Oct 15 12:36:50 PM UTC 24 |
92187304 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.4173667679 |
|
|
Oct 15 12:36:45 PM UTC 24 |
Oct 15 12:36:51 PM UTC 24 |
230711177 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.2026056712 |
|
|
Oct 15 12:36:17 PM UTC 24 |
Oct 15 12:36:56 PM UTC 24 |
3250052235 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.21337596 |
|
|
Oct 15 12:36:44 PM UTC 24 |
Oct 15 12:36:57 PM UTC 24 |
750802526 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.2991057086 |
|
|
Oct 15 12:36:40 PM UTC 24 |
Oct 15 12:36:59 PM UTC 24 |
14234608782 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/12.spi_device_stress_all.2671712509 |
|
|
Oct 15 12:35:14 PM UTC 24 |
Oct 15 12:36:59 PM UTC 24 |
12132218227 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.2024315774 |
|
|
Oct 15 12:36:57 PM UTC 24 |
Oct 15 12:36:59 PM UTC 24 |
56403993 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.3978777980 |
|
|
Oct 15 12:36:58 PM UTC 24 |
Oct 15 12:37:00 PM UTC 24 |
26568065 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.3952624663 |
|
|
Oct 15 12:36:23 PM UTC 24 |
Oct 15 12:37:01 PM UTC 24 |
1744533726 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.1664562239 |
|
|
Oct 15 12:37:00 PM UTC 24 |
Oct 15 12:37:02 PM UTC 24 |
31376840 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.1260813243 |
|
|
Oct 15 12:37:00 PM UTC 24 |
Oct 15 12:37:03 PM UTC 24 |
89635284 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.1704408078 |
|
|
Oct 15 12:36:46 PM UTC 24 |
Oct 15 12:37:03 PM UTC 24 |
1655665378 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.947502563 |
|
|
Oct 15 12:37:02 PM UTC 24 |
Oct 15 12:37:04 PM UTC 24 |
19198471 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.3309119923 |
|
|
Oct 15 12:37:02 PM UTC 24 |
Oct 15 12:37:04 PM UTC 24 |
39096835 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3387720704 |
|
|
Oct 15 12:36:39 PM UTC 24 |
Oct 15 12:37:05 PM UTC 24 |
4255851442 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.458293273 |
|
|
Oct 15 12:37:00 PM UTC 24 |
Oct 15 12:37:06 PM UTC 24 |
1200658509 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.1829701552 |
|
|
Oct 15 12:37:05 PM UTC 24 |
Oct 15 12:37:09 PM UTC 24 |
257715675 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.3455078835 |
|
|
Oct 15 12:37:03 PM UTC 24 |
Oct 15 12:37:11 PM UTC 24 |
339153250 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.1481426870 |
|
|
Oct 15 12:37:05 PM UTC 24 |
Oct 15 12:37:13 PM UTC 24 |
736068881 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.1171195222 |
|
|
Oct 15 12:37:03 PM UTC 24 |
Oct 15 12:37:14 PM UTC 24 |
324785837 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.1830271461 |
|
|
Oct 15 12:36:45 PM UTC 24 |
Oct 15 12:37:15 PM UTC 24 |
1118452703 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.1865946763 |
|
|
Oct 15 12:37:07 PM UTC 24 |
Oct 15 12:37:15 PM UTC 24 |
226363690 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.391757938 |
|
|
Oct 15 12:37:02 PM UTC 24 |
Oct 15 12:37:15 PM UTC 24 |
7316887388 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.833607599 |
|
|
Oct 15 12:37:16 PM UTC 24 |
Oct 15 12:37:18 PM UTC 24 |
41216391 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.2737636929 |
|
|
Oct 15 12:37:16 PM UTC 24 |
Oct 15 12:37:18 PM UTC 24 |
34955003 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.471754419 |
|
|
Oct 15 12:37:03 PM UTC 24 |
Oct 15 12:37:18 PM UTC 24 |
1434830309 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.2597816728 |
|
|
Oct 15 12:37:17 PM UTC 24 |
Oct 15 12:37:20 PM UTC 24 |
266159859 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.2926102263 |
|
|
Oct 15 12:37:19 PM UTC 24 |
Oct 15 12:37:21 PM UTC 24 |
44476289 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.3652705399 |
|
|
Oct 15 12:37:03 PM UTC 24 |
Oct 15 12:37:21 PM UTC 24 |
1803185162 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.1698913471 |
|
|
Oct 15 12:37:06 PM UTC 24 |
Oct 15 12:37:22 PM UTC 24 |
636190880 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.918122442 |
|
|
Oct 15 12:37:20 PM UTC 24 |
Oct 15 12:37:24 PM UTC 24 |
147514576 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.1177701340 |
|
|
Oct 15 12:37:19 PM UTC 24 |
Oct 15 12:37:24 PM UTC 24 |
680458945 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.3186871796 |
|
|
Oct 15 12:36:53 PM UTC 24 |
Oct 15 12:37:28 PM UTC 24 |
11072964358 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.3122049392 |
|
|
Oct 15 12:37:23 PM UTC 24 |
Oct 15 12:37:28 PM UTC 24 |
723128692 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.2907569564 |
|
|
Oct 15 12:34:09 PM UTC 24 |
Oct 15 12:37:29 PM UTC 24 |
22379980306 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_mode_ignore_cmds.3509876241 |
|
|
Oct 15 12:29:44 PM UTC 24 |
Oct 15 12:37:30 PM UTC 24 |
52418980333 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.748036478 |
|
|
Oct 15 12:37:23 PM UTC 24 |
Oct 15 12:37:32 PM UTC 24 |
999181678 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.3634109633 |
|
|
Oct 15 12:37:29 PM UTC 24 |
Oct 15 12:37:36 PM UTC 24 |
414649943 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.1772556559 |
|
|
Oct 15 12:37:24 PM UTC 24 |
Oct 15 12:37:38 PM UTC 24 |
1073137914 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.2716583805 |
|
|
Oct 15 12:37:19 PM UTC 24 |
Oct 15 12:37:39 PM UTC 24 |
6711760232 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/5.spi_device_stress_all.2865604861 |
|
|
Oct 15 12:30:42 PM UTC 24 |
Oct 15 12:37:40 PM UTC 24 |
34512179905 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_all.3663572954 |
|
|
Oct 15 12:34:33 PM UTC 24 |
Oct 15 12:37:41 PM UTC 24 |
89730177861 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.2524620855 |
|
|
Oct 15 12:36:17 PM UTC 24 |
Oct 15 12:37:41 PM UTC 24 |
4637751805 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.727821786 |
|
|
Oct 15 12:37:25 PM UTC 24 |
Oct 15 12:37:42 PM UTC 24 |
3024413078 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.3448861081 |
|
|
Oct 15 12:37:40 PM UTC 24 |
Oct 15 12:37:43 PM UTC 24 |
182692406 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.3518525217 |
|
|
Oct 15 12:37:41 PM UTC 24 |
Oct 15 12:37:43 PM UTC 24 |
49180680 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.3980891340 |
|
|
Oct 15 12:37:41 PM UTC 24 |
Oct 15 12:37:43 PM UTC 24 |
12267940 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.1193568941 |
|
|
Oct 15 12:37:42 PM UTC 24 |
Oct 15 12:37:45 PM UTC 24 |
29588690 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.1523139349 |
|
|
Oct 15 12:37:44 PM UTC 24 |
Oct 15 12:37:46 PM UTC 24 |
30592187 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_mode_ignore_cmds.4118188583 |
|
|
Oct 15 12:30:35 PM UTC 24 |
Oct 15 12:37:47 PM UTC 24 |
96493671613 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.3735536952 |
|
|
Oct 15 12:37:31 PM UTC 24 |
Oct 15 12:37:48 PM UTC 24 |
965527288 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.3356794620 |
|
|
Oct 15 12:37:45 PM UTC 24 |
Oct 15 12:37:48 PM UTC 24 |
657779404 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.3752532460 |
|
|
Oct 15 12:37:47 PM UTC 24 |
Oct 15 12:37:51 PM UTC 24 |
30634707 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.2726177136 |
|
|
Oct 15 12:37:05 PM UTC 24 |
Oct 15 12:37:52 PM UTC 24 |
4948421588 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.332217420 |
|
|
Oct 15 12:37:50 PM UTC 24 |
Oct 15 12:37:54 PM UTC 24 |
255057773 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.3541990592 |
|
|
Oct 15 12:37:46 PM UTC 24 |
Oct 15 12:37:55 PM UTC 24 |
333499247 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.3822117043 |
|
|
Oct 15 12:37:29 PM UTC 24 |
Oct 15 12:37:55 PM UTC 24 |
1916674165 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.2751286961 |
|
|
Oct 15 12:37:25 PM UTC 24 |
Oct 15 12:37:56 PM UTC 24 |
2958025307 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.1945631424 |
|
|
Oct 15 12:37:48 PM UTC 24 |
Oct 15 12:37:57 PM UTC 24 |
297415439 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.1141484488 |
|
|
Oct 15 12:37:52 PM UTC 24 |
Oct 15 12:37:57 PM UTC 24 |
1126767161 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.167210961 |
|
|
Oct 15 12:37:56 PM UTC 24 |
Oct 15 12:37:58 PM UTC 24 |
22928864 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.3127225539 |
|
|
Oct 15 12:37:44 PM UTC 24 |
Oct 15 12:37:59 PM UTC 24 |
14882288300 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.1977921895 |
|
|
Oct 15 12:38:00 PM UTC 24 |
Oct 15 12:38:02 PM UTC 24 |
45730453 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.3102011661 |
|
|
Oct 15 12:38:00 PM UTC 24 |
Oct 15 12:38:02 PM UTC 24 |
124193174 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.650813440 |
|
|
Oct 15 12:37:53 PM UTC 24 |
Oct 15 12:38:04 PM UTC 24 |
2905325167 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.4117015143 |
|
|
Oct 15 12:38:03 PM UTC 24 |
Oct 15 12:38:06 PM UTC 24 |
56191012 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.3738430207 |
|
|
Oct 15 12:37:48 PM UTC 24 |
Oct 15 12:38:07 PM UTC 24 |
1645308091 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.1207906986 |
|
|
Oct 15 12:38:06 PM UTC 24 |
Oct 15 12:38:09 PM UTC 24 |
464365590 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.3068354298 |
|
|
Oct 15 12:38:08 PM UTC 24 |
Oct 15 12:38:12 PM UTC 24 |
67103306 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.745705948 |
|
|
Oct 15 12:38:03 PM UTC 24 |
Oct 15 12:38:13 PM UTC 24 |
23710625363 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.929539216 |
|
|
Oct 15 12:37:44 PM UTC 24 |
Oct 15 12:38:13 PM UTC 24 |
3884687287 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_and_tpm.199081456 |
|
|
Oct 15 12:29:13 PM UTC 24 |
Oct 15 12:38:15 PM UTC 24 |
414138245177 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.1103795169 |
|
|
Oct 15 12:37:56 PM UTC 24 |
Oct 15 12:38:17 PM UTC 24 |
7467818110 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.1459148091 |
|
|
Oct 15 12:37:37 PM UTC 24 |
Oct 15 12:38:18 PM UTC 24 |
6888389407 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.1050865271 |
|
|
Oct 15 12:38:18 PM UTC 24 |
Oct 15 12:38:23 PM UTC 24 |
57329983 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.2288670888 |
|
|
Oct 15 12:33:38 PM UTC 24 |
Oct 15 12:38:24 PM UTC 24 |
24620370687 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.627834337 |
|
|
Oct 15 12:38:10 PM UTC 24 |
Oct 15 12:38:25 PM UTC 24 |
811643191 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.2110788091 |
|
|
Oct 15 12:38:10 PM UTC 24 |
Oct 15 12:38:26 PM UTC 24 |
2344837106 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.2884087842 |
|
|
Oct 15 12:38:16 PM UTC 24 |
Oct 15 12:38:28 PM UTC 24 |
605835773 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.3872341096 |
|
|
Oct 15 12:37:30 PM UTC 24 |
Oct 15 12:38:32 PM UTC 24 |
27180300911 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.1723211788 |
|
|
Oct 15 12:38:14 PM UTC 24 |
Oct 15 12:38:32 PM UTC 24 |
2872804529 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.2929388007 |
|
|
Oct 15 12:35:42 PM UTC 24 |
Oct 15 12:38:34 PM UTC 24 |
73749695630 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.1644623236 |
|
|
Oct 15 12:38:14 PM UTC 24 |
Oct 15 12:38:34 PM UTC 24 |
2372398058 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.1071005035 |
|
|
Oct 15 12:38:33 PM UTC 24 |
Oct 15 12:38:35 PM UTC 24 |
21466411 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.1122727118 |
|
|
Oct 15 12:38:33 PM UTC 24 |
Oct 15 12:38:35 PM UTC 24 |
14693646 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.3836803321 |
|
|
Oct 15 12:37:16 PM UTC 24 |
Oct 15 12:38:37 PM UTC 24 |
12601487245 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.1646738025 |
|
|
Oct 15 12:38:36 PM UTC 24 |
Oct 15 12:38:38 PM UTC 24 |
48496564 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.126838130 |
|
|
Oct 15 12:38:36 PM UTC 24 |
Oct 15 12:38:40 PM UTC 24 |
98496377 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.1185078994 |
|
|
Oct 15 12:38:24 PM UTC 24 |
Oct 15 12:38:43 PM UTC 24 |
981607654 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.1802198788 |
|
|
Oct 15 12:38:39 PM UTC 24 |
Oct 15 12:38:43 PM UTC 24 |
128424892 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.3770196532 |
|
|
Oct 15 12:33:37 PM UTC 24 |
Oct 15 12:38:44 PM UTC 24 |
38658161380 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.1380921049 |
|
|
Oct 15 12:38:13 PM UTC 24 |
Oct 15 12:38:45 PM UTC 24 |
4506215525 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.1956842992 |
|
|
Oct 15 12:38:41 PM UTC 24 |
Oct 15 12:38:45 PM UTC 24 |
595961915 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.4192485405 |
|
|
Oct 15 12:38:38 PM UTC 24 |
Oct 15 12:38:46 PM UTC 24 |
1372413580 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.2321131760 |
|
|
Oct 15 12:38:43 PM UTC 24 |
Oct 15 12:38:47 PM UTC 24 |
62930568 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.3027142912 |
|
|
Oct 15 12:37:39 PM UTC 24 |
Oct 15 12:38:47 PM UTC 24 |
3610261545 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.2316950016 |
|
|
Oct 15 12:38:35 PM UTC 24 |
Oct 15 12:38:48 PM UTC 24 |
1800058162 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.1885109903 |
|
|
Oct 15 12:38:05 PM UTC 24 |
Oct 15 12:38:50 PM UTC 24 |
34590878309 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.3937809878 |
|
|
Oct 15 12:38:44 PM UTC 24 |
Oct 15 12:38:50 PM UTC 24 |
10198127455 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.3084240805 |
|
|
Oct 15 12:38:47 PM UTC 24 |
Oct 15 12:38:52 PM UTC 24 |
295170475 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.2563579683 |
|
|
Oct 15 12:38:46 PM UTC 24 |
Oct 15 12:38:54 PM UTC 24 |
1261915460 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.315132405 |
|
|
Oct 15 12:38:52 PM UTC 24 |
Oct 15 12:38:54 PM UTC 24 |
12798781 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.445546973 |
|
|
Oct 15 12:38:53 PM UTC 24 |
Oct 15 12:38:55 PM UTC 24 |
66283673 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.1994063404 |
|
|
Oct 15 12:38:27 PM UTC 24 |
Oct 15 12:38:57 PM UTC 24 |
10153681158 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.3091055235 |
|
|
Oct 15 12:38:57 PM UTC 24 |
Oct 15 12:38:59 PM UTC 24 |
106647208 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.3016376970 |
|
|
Oct 15 12:40:33 PM UTC 24 |
Oct 15 12:40:42 PM UTC 24 |
1920642614 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.1460410778 |
|
|
Oct 15 12:38:58 PM UTC 24 |
Oct 15 12:39:02 PM UTC 24 |
770486532 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.1982327583 |
|
|
Oct 15 12:35:13 PM UTC 24 |
Oct 15 12:39:03 PM UTC 24 |
24968752723 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.4287965054 |
|
|
Oct 15 12:39:04 PM UTC 24 |
Oct 15 12:39:09 PM UTC 24 |
83081717 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.4073349661 |
|
|
Oct 15 12:38:35 PM UTC 24 |
Oct 15 12:39:09 PM UTC 24 |
1491789338 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.369953694 |
|
|
Oct 15 12:38:55 PM UTC 24 |
Oct 15 12:39:13 PM UTC 24 |
2897048255 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2657584066 |
|
|
Oct 15 12:38:54 PM UTC 24 |
Oct 15 12:39:16 PM UTC 24 |
8290485576 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.3207508780 |
|
|
Oct 15 12:39:14 PM UTC 24 |
Oct 15 12:39:18 PM UTC 24 |
83163839 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.2488882083 |
|
|
Oct 15 12:39:11 PM UTC 24 |
Oct 15 12:39:19 PM UTC 24 |
680729635 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.4272058676 |
|
|
Oct 15 12:38:46 PM UTC 24 |
Oct 15 12:39:23 PM UTC 24 |
2818603209 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.277778070 |
|
|
Oct 15 12:39:19 PM UTC 24 |
Oct 15 12:39:25 PM UTC 24 |
1437692558 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.3651427314 |
|
|
Oct 15 12:39:10 PM UTC 24 |
Oct 15 12:39:30 PM UTC 24 |
650833075 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.2954028167 |
|
|
Oct 15 12:35:04 PM UTC 24 |
Oct 15 12:39:31 PM UTC 24 |
32723293181 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.2456173365 |
|
|
Oct 15 12:39:00 PM UTC 24 |
Oct 15 12:39:32 PM UTC 24 |
40514382606 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.927961258 |
|
|
Oct 15 12:38:48 PM UTC 24 |
Oct 15 12:39:34 PM UTC 24 |
20155451539 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.3115580953 |
|
|
Oct 15 12:39:31 PM UTC 24 |
Oct 15 12:39:34 PM UTC 24 |
13749612 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.1464313408 |
|
|
Oct 15 12:39:33 PM UTC 24 |
Oct 15 12:39:35 PM UTC 24 |
23773161 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.299727753 |
|
|
Oct 15 12:39:03 PM UTC 24 |
Oct 15 12:39:38 PM UTC 24 |
47989434421 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3289266784 |
|
|
Oct 15 12:39:36 PM UTC 24 |
Oct 15 12:39:39 PM UTC 24 |
62431975 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.1786695435 |
|
|
Oct 15 12:38:20 PM UTC 24 |
Oct 15 12:39:39 PM UTC 24 |
3018466184 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.2113114863 |
|
|
Oct 15 12:39:17 PM UTC 24 |
Oct 15 12:39:42 PM UTC 24 |
1305213631 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.4108833281 |
|
|
Oct 15 12:39:38 PM UTC 24 |
Oct 15 12:39:45 PM UTC 24 |
544937767 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.2128795729 |
|
|
Oct 15 12:39:39 PM UTC 24 |
Oct 15 12:39:45 PM UTC 24 |
277655613 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.2639291437 |
|
|
Oct 15 12:39:43 PM UTC 24 |
Oct 15 12:39:52 PM UTC 24 |
176109286 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.1058534765 |
|
|
Oct 15 12:36:51 PM UTC 24 |
Oct 15 12:39:52 PM UTC 24 |
14613445423 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.3240491000 |
|
|
Oct 15 12:39:19 PM UTC 24 |
Oct 15 12:39:52 PM UTC 24 |
4417961810 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.1478534292 |
|
|
Oct 15 12:40:45 PM UTC 24 |
Oct 15 12:40:48 PM UTC 24 |
41031371 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.3784591793 |
|
|
Oct 15 12:39:50 PM UTC 24 |
Oct 15 12:39:54 PM UTC 24 |
128580077 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.4170869949 |
|
|
Oct 15 12:39:35 PM UTC 24 |
Oct 15 12:39:55 PM UTC 24 |
4346334416 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.896663331 |
|
|
Oct 15 12:39:41 PM UTC 24 |
Oct 15 12:39:55 PM UTC 24 |
11984556335 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1650530592 |
|
|
Oct 15 12:39:24 PM UTC 24 |
Oct 15 12:39:57 PM UTC 24 |
3301984406 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.1979172192 |
|
|
Oct 15 12:37:57 PM UTC 24 |
Oct 15 12:39:59 PM UTC 24 |
8846546790 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.579437961 |
|
|
Oct 15 12:39:53 PM UTC 24 |
Oct 15 12:40:00 PM UTC 24 |
72307439 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.1413839715 |
|
|
Oct 15 12:39:46 PM UTC 24 |
Oct 15 12:40:02 PM UTC 24 |
4002534497 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.1534114523 |
|
|
Oct 15 12:39:35 PM UTC 24 |
Oct 15 12:40:02 PM UTC 24 |
2061225489 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.3764249416 |
|
|
Oct 15 12:40:00 PM UTC 24 |
Oct 15 12:40:03 PM UTC 24 |
12836520 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.2928681615 |
|
|
Oct 15 12:40:01 PM UTC 24 |
Oct 15 12:40:04 PM UTC 24 |
23700912 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.49477208 |
|
|
Oct 15 12:40:04 PM UTC 24 |
Oct 15 12:40:06 PM UTC 24 |
26236653 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.413139256 |
|
|
Oct 15 12:39:46 PM UTC 24 |
Oct 15 12:40:07 PM UTC 24 |
4759182727 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.3476004171 |
|
|
Oct 15 12:40:31 PM UTC 24 |
Oct 15 12:40:42 PM UTC 24 |
2299460825 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.2078927885 |
|
|
Oct 15 12:40:03 PM UTC 24 |
Oct 15 12:40:09 PM UTC 24 |
463408947 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2368417356 |
|
|
Oct 15 12:36:23 PM UTC 24 |
Oct 15 12:40:09 PM UTC 24 |
426350829586 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.1759527013 |
|
|
Oct 15 12:40:05 PM UTC 24 |
Oct 15 12:40:10 PM UTC 24 |
407529976 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.3902067830 |
|
|
Oct 15 12:40:07 PM UTC 24 |
Oct 15 12:40:14 PM UTC 24 |
325587530 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.554062717 |
|
|
Oct 15 12:40:11 PM UTC 24 |
Oct 15 12:40:15 PM UTC 24 |
113055865 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.3549653388 |
|
|
Oct 15 12:40:08 PM UTC 24 |
Oct 15 12:40:15 PM UTC 24 |
1237757569 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.2062872962 |
|
|
Oct 15 12:35:51 PM UTC 24 |
Oct 15 12:40:15 PM UTC 24 |
298670286541 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.1095456576 |
|
|
Oct 15 12:40:09 PM UTC 24 |
Oct 15 12:40:15 PM UTC 24 |
355669178 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.238043210 |
|
|
Oct 15 12:39:54 PM UTC 24 |
Oct 15 12:40:18 PM UTC 24 |
1401531437 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.2399178419 |
|
|
Oct 15 12:40:15 PM UTC 24 |
Oct 15 12:40:19 PM UTC 24 |
174622679 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.233738818 |
|
|
Oct 15 12:38:26 PM UTC 24 |
Oct 15 12:40:21 PM UTC 24 |
4548664725 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.113773074 |
|
|
Oct 15 12:39:26 PM UTC 24 |
Oct 15 12:40:24 PM UTC 24 |
3369444632 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2421816004 |
|
|
Oct 15 12:40:16 PM UTC 24 |
Oct 15 12:40:24 PM UTC 24 |
1584582876 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.2476319824 |
|
|
Oct 15 12:40:11 PM UTC 24 |
Oct 15 12:40:25 PM UTC 24 |
3752911982 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.3023071473 |
|
|
Oct 15 12:37:11 PM UTC 24 |
Oct 15 12:40:25 PM UTC 24 |
16031992078 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.3758184588 |
|
|
Oct 15 12:34:38 PM UTC 24 |
Oct 15 12:40:25 PM UTC 24 |
221888148161 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.1206430087 |
|
|
Oct 15 12:40:25 PM UTC 24 |
Oct 15 12:40:28 PM UTC 24 |
12995082 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.3958908291 |
|
|
Oct 15 12:40:25 PM UTC 24 |
Oct 15 12:40:28 PM UTC 24 |
26233373 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.3877958193 |
|
|
Oct 15 12:40:27 PM UTC 24 |
Oct 15 12:40:29 PM UTC 24 |
43994827 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.1142644685 |
|
|
Oct 15 12:40:03 PM UTC 24 |
Oct 15 12:40:31 PM UTC 24 |
3042191753 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.2662859955 |
|
|
Oct 15 12:40:29 PM UTC 24 |
Oct 15 12:40:31 PM UTC 24 |
263756469 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.1561615775 |
|
|
Oct 15 12:36:41 PM UTC 24 |
Oct 15 12:40:32 PM UTC 24 |
209575090861 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.686544880 |
|
|
Oct 15 12:40:29 PM UTC 24 |
Oct 15 12:40:34 PM UTC 24 |
231205319 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.403067570 |
|
|
Oct 15 12:40:33 PM UTC 24 |
Oct 15 12:40:37 PM UTC 24 |
114913452 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.4097339693 |
|
|
Oct 15 12:40:16 PM UTC 24 |
Oct 15 12:40:38 PM UTC 24 |
1077764030 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1241440320 |
|
|
Oct 15 12:40:25 PM UTC 24 |
Oct 15 12:40:40 PM UTC 24 |
6058887311 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3395151452 |
|
|
Oct 15 12:40:35 PM UTC 24 |
Oct 15 12:40:41 PM UTC 24 |
145767791 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.517019454 |
|
|
Oct 15 12:40:16 PM UTC 24 |
Oct 15 12:40:42 PM UTC 24 |
3159295925 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.358244905 |
|
|
Oct 15 12:40:30 PM UTC 24 |
Oct 15 12:40:44 PM UTC 24 |
11438347609 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.297881447 |
|
|
Oct 15 12:39:54 PM UTC 24 |
Oct 15 12:40:48 PM UTC 24 |
6953386195 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.1983028199 |
|
|
Oct 15 12:40:27 PM UTC 24 |
Oct 15 12:40:51 PM UTC 24 |
58040120901 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.429357448 |
|
|
Oct 15 12:40:49 PM UTC 24 |
Oct 15 12:40:51 PM UTC 24 |
21397224 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.2921100975 |
|
|
Oct 15 12:40:52 PM UTC 24 |
Oct 15 12:40:55 PM UTC 24 |
42164297 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.1543820623 |
|
|
Oct 15 12:40:42 PM UTC 24 |
Oct 15 12:40:56 PM UTC 24 |
1566961857 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.271162326 |
|
|
Oct 15 12:37:10 PM UTC 24 |
Oct 15 12:41:00 PM UTC 24 |
89236360503 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.3832941187 |
|
|
Oct 15 12:40:55 PM UTC 24 |
Oct 15 12:41:02 PM UTC 24 |
541628115 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.2107793474 |
|
|
Oct 15 12:40:49 PM UTC 24 |
Oct 15 12:41:05 PM UTC 24 |
1614386157 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2547044316 |
|
|
Oct 15 12:40:57 PM UTC 24 |
Oct 15 12:41:07 PM UTC 24 |
3880911832 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.3214438421 |
|
|
Oct 15 12:41:02 PM UTC 24 |
Oct 15 12:41:07 PM UTC 24 |
110321739 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.983831021 |
|
|
Oct 15 12:40:52 PM UTC 24 |
Oct 15 12:41:11 PM UTC 24 |
4712490006 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.1129554513 |
|
|
Oct 15 12:41:08 PM UTC 24 |
Oct 15 12:41:12 PM UTC 24 |
105781986 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.3910568541 |
|
|
Oct 15 12:38:25 PM UTC 24 |
Oct 15 12:41:14 PM UTC 24 |
19461677573 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.2760326325 |
|
|
Oct 15 12:40:21 PM UTC 24 |
Oct 15 12:41:17 PM UTC 24 |
3122714668 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.3244663361 |
|
|
Oct 15 12:41:05 PM UTC 24 |
Oct 15 12:41:17 PM UTC 24 |
878379801 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.1580635994 |
|
|
Oct 15 12:41:12 PM UTC 24 |
Oct 15 12:41:20 PM UTC 24 |
104831788 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/21.spi_device_stress_all.479430842 |
|
|
Oct 15 12:39:30 PM UTC 24 |
Oct 15 12:41:21 PM UTC 24 |
10536804740 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.1650983058 |
|
|
Oct 15 12:41:14 PM UTC 24 |
Oct 15 12:41:22 PM UTC 24 |
172141810 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.1356853840 |
|
|
Oct 15 12:41:01 PM UTC 24 |
Oct 15 12:41:24 PM UTC 24 |
34548393582 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.2740978558 |
|
|
Oct 15 12:41:23 PM UTC 24 |
Oct 15 12:41:25 PM UTC 24 |
66973300 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.1475943825 |
|
|
Oct 15 12:41:24 PM UTC 24 |
Oct 15 12:41:27 PM UTC 24 |
14336484 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.2571585127 |
|
|
Oct 15 12:40:16 PM UTC 24 |
Oct 15 12:41:27 PM UTC 24 |
8266823836 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.209104111 |
|
|
Oct 15 12:41:08 PM UTC 24 |
Oct 15 12:41:31 PM UTC 24 |
2047646371 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.1948434989 |
|
|
Oct 15 12:41:29 PM UTC 24 |
Oct 15 12:41:31 PM UTC 24 |
21913397 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.2388712327 |
|
|
Oct 15 12:39:55 PM UTC 24 |
Oct 15 12:41:34 PM UTC 24 |
9471988346 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.1580790602 |
|
|
Oct 15 12:41:27 PM UTC 24 |
Oct 15 12:41:35 PM UTC 24 |
14431440062 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.1037910850 |
|
|
Oct 15 12:41:31 PM UTC 24 |
Oct 15 12:41:36 PM UTC 24 |
2438621013 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.539921139 |
|
|
Oct 15 12:41:35 PM UTC 24 |
Oct 15 12:41:42 PM UTC 24 |
1030042118 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.3024587820 |
|
|
Oct 15 12:41:28 PM UTC 24 |
Oct 15 12:41:43 PM UTC 24 |
850322592 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.590926045 |
|
|
Oct 15 12:41:33 PM UTC 24 |
Oct 15 12:41:45 PM UTC 24 |
5344072224 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.1690419101 |
|
|
Oct 15 12:41:36 PM UTC 24 |
Oct 15 12:41:47 PM UTC 24 |
520953078 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.572302602 |
|
|
Oct 15 12:41:43 PM UTC 24 |
Oct 15 12:41:50 PM UTC 24 |
342316809 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.250367336 |
|
|
Oct 15 12:41:46 PM UTC 24 |
Oct 15 12:41:51 PM UTC 24 |
278851064 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.1335372919 |
|
|
Oct 15 12:40:39 PM UTC 24 |
Oct 15 12:41:51 PM UTC 24 |
14994912966 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.1365410858 |
|
|
Oct 15 12:40:19 PM UTC 24 |
Oct 15 12:41:54 PM UTC 24 |
8960706349 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3013660965 |
|
|
Oct 15 12:41:51 PM UTC 24 |
Oct 15 12:41:58 PM UTC 24 |
682096923 ps |