| T278 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.595874589 |
|
|
Dec 24 01:24:51 PM PST 23 |
Dec 24 01:30:44 PM PST 23 |
18519343041 ps |
| T134 |
/workspace/coverage/default/41.sram_ctrl_regwen.1379467693 |
|
|
Dec 24 01:26:45 PM PST 23 |
Dec 24 01:55:29 PM PST 23 |
31815966713 ps |
| T279 |
/workspace/coverage/default/8.sram_ctrl_regwen.2021820650 |
|
|
Dec 24 01:22:19 PM PST 23 |
Dec 24 01:28:08 PM PST 23 |
7920167562 ps |
| T135 |
/workspace/coverage/default/30.sram_ctrl_regwen.2264730169 |
|
|
Dec 24 01:25:17 PM PST 23 |
Dec 24 01:49:53 PM PST 23 |
35361588234 ps |
| T280 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.4217347543 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 01:25:50 PM PST 23 |
13789720889 ps |
| T281 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1557585583 |
|
|
Dec 24 01:22:03 PM PST 23 |
Dec 24 01:23:13 PM PST 23 |
731661671 ps |
| T7 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1353339882 |
|
|
Dec 24 01:26:51 PM PST 23 |
Dec 24 01:29:05 PM PST 23 |
46010228309 ps |
| T282 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.832969680 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 01:26:13 PM PST 23 |
348757234 ps |
| T283 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.90554351 |
|
|
Dec 24 01:24:48 PM PST 23 |
Dec 24 01:26:14 PM PST 23 |
9348174633 ps |
| T128 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2660836601 |
|
|
Dec 24 01:23:40 PM PST 23 |
Dec 24 01:25:29 PM PST 23 |
4620787790 ps |
| T29 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2530298023 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 02:46:05 PM PST 23 |
1536068085788 ps |
| T284 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.283382335 |
|
|
Dec 24 01:23:29 PM PST 23 |
Dec 24 02:55:02 PM PST 23 |
1278852974 ps |
| T285 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.137609169 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 02:34:28 PM PST 23 |
2277355395 ps |
| T133 |
/workspace/coverage/default/48.sram_ctrl_regwen.2073837501 |
|
|
Dec 24 01:27:28 PM PST 23 |
Dec 24 01:41:46 PM PST 23 |
65859928270 ps |
| T286 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1706402953 |
|
|
Dec 24 01:27:10 PM PST 23 |
Dec 24 01:28:17 PM PST 23 |
2890496279 ps |
| T287 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2613861475 |
|
|
Dec 24 01:26:58 PM PST 23 |
Dec 24 01:31:03 PM PST 23 |
3315552849 ps |
| T118 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1782869569 |
|
|
Dec 24 01:27:01 PM PST 23 |
Dec 24 03:46:18 PM PST 23 |
410176491320 ps |
| T288 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.358078400 |
|
|
Dec 24 01:24:12 PM PST 23 |
Dec 24 01:24:50 PM PST 23 |
1597604456 ps |
| T289 |
/workspace/coverage/default/19.sram_ctrl_regwen.2592161604 |
|
|
Dec 24 01:23:46 PM PST 23 |
Dec 24 01:31:55 PM PST 23 |
5394659151 ps |
| T290 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.1632515105 |
|
|
Dec 24 01:26:48 PM PST 23 |
Dec 24 01:44:27 PM PST 23 |
6717557667 ps |
| T291 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1514049718 |
|
|
Dec 24 01:23:02 PM PST 23 |
Dec 24 02:46:14 PM PST 23 |
3530248925 ps |
| T292 |
/workspace/coverage/default/38.sram_ctrl_alert_test.8287983 |
|
|
Dec 24 01:26:34 PM PST 23 |
Dec 24 01:26:37 PM PST 23 |
52072741 ps |
| T293 |
/workspace/coverage/default/42.sram_ctrl_bijection.1420595026 |
|
|
Dec 24 01:26:46 PM PST 23 |
Dec 24 01:53:24 PM PST 23 |
70566138063 ps |
| T294 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3912831119 |
|
|
Dec 24 01:23:03 PM PST 23 |
Dec 24 01:24:44 PM PST 23 |
788057595 ps |
| T295 |
/workspace/coverage/default/46.sram_ctrl_executable.1311318632 |
|
|
Dec 24 01:27:15 PM PST 23 |
Dec 24 01:34:28 PM PST 23 |
7203077929 ps |
| T296 |
/workspace/coverage/default/14.sram_ctrl_smoke.1342606973 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 01:25:27 PM PST 23 |
4551765345 ps |
| T297 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3499037722 |
|
|
Dec 24 01:23:12 PM PST 23 |
Dec 24 01:28:20 PM PST 23 |
4201918164 ps |
| T298 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1345964936 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 02:51:22 PM PST 23 |
1894135919 ps |
| T299 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2945350128 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 01:24:21 PM PST 23 |
737328337 ps |
| T300 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2366082317 |
|
|
Dec 24 01:24:29 PM PST 23 |
Dec 24 01:26:59 PM PST 23 |
8740230082 ps |
| T301 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.357949357 |
|
|
Dec 24 01:27:42 PM PST 23 |
Dec 24 01:27:50 PM PST 23 |
1054940028 ps |
| T302 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2840599490 |
|
|
Dec 24 01:23:27 PM PST 23 |
Dec 24 01:29:36 PM PST 23 |
9339390188 ps |
| T141 |
/workspace/coverage/default/16.sram_ctrl_stress_all.2899554716 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 03:05:50 PM PST 23 |
1785035462593 ps |
| T303 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.4595110 |
|
|
Dec 24 01:24:27 PM PST 23 |
Dec 24 03:02:49 PM PST 23 |
6781719652 ps |
| T304 |
/workspace/coverage/default/28.sram_ctrl_smoke.967123329 |
|
|
Dec 24 01:24:51 PM PST 23 |
Dec 24 01:24:57 PM PST 23 |
1437183595 ps |
| T305 |
/workspace/coverage/default/28.sram_ctrl_alert_test.259985463 |
|
|
Dec 24 01:26:34 PM PST 23 |
Dec 24 01:26:36 PM PST 23 |
14495354 ps |
| T306 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2621369024 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 01:29:32 PM PST 23 |
4309926157 ps |
| T307 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1170285821 |
|
|
Dec 24 01:26:58 PM PST 23 |
Dec 24 01:29:51 PM PST 23 |
870644227 ps |
| T308 |
/workspace/coverage/default/43.sram_ctrl_executable.1398721088 |
|
|
Dec 24 01:26:47 PM PST 23 |
Dec 24 01:38:08 PM PST 23 |
42777395289 ps |
| T309 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.2134118224 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 01:22:12 PM PST 23 |
365030827 ps |
| T310 |
/workspace/coverage/default/46.sram_ctrl_smoke.1837857529 |
|
|
Dec 24 01:27:13 PM PST 23 |
Dec 24 01:28:59 PM PST 23 |
5603666904 ps |
| T136 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3970541942 |
|
|
Dec 24 01:26:34 PM PST 23 |
Dec 24 01:32:04 PM PST 23 |
27829008287 ps |
| T311 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.4242130715 |
|
|
Dec 24 01:23:29 PM PST 23 |
Dec 24 01:24:00 PM PST 23 |
2689004708 ps |
| T312 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2555082634 |
|
|
Dec 24 01:22:19 PM PST 23 |
Dec 24 01:26:19 PM PST 23 |
3330282711 ps |
| T313 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2804716680 |
|
|
Dec 24 01:24:33 PM PST 23 |
Dec 24 01:24:40 PM PST 23 |
419550972 ps |
| T314 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.2905192196 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 01:31:04 PM PST 23 |
14334867022 ps |
| T315 |
/workspace/coverage/default/13.sram_ctrl_smoke.2022376043 |
|
|
Dec 24 01:23:13 PM PST 23 |
Dec 24 01:23:52 PM PST 23 |
857322270 ps |
| T316 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2758293645 |
|
|
Dec 24 01:26:04 PM PST 23 |
Dec 24 01:33:15 PM PST 23 |
14647235082 ps |
| T317 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1089698279 |
|
|
Dec 24 01:22:17 PM PST 23 |
Dec 24 01:26:31 PM PST 23 |
14467971539 ps |
| T318 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1209699673 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 01:42:17 PM PST 23 |
39557040609 ps |
| T319 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2392494439 |
|
|
Dec 24 01:22:17 PM PST 23 |
Dec 24 01:22:58 PM PST 23 |
2760340544 ps |
| T320 |
/workspace/coverage/default/35.sram_ctrl_bijection.3687920109 |
|
|
Dec 24 01:26:08 PM PST 23 |
Dec 24 01:50:55 PM PST 23 |
215215743777 ps |
| T321 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.3960933382 |
|
|
Dec 24 01:26:08 PM PST 23 |
Dec 24 01:32:53 PM PST 23 |
37784009231 ps |
| T322 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.80910768 |
|
|
Dec 24 01:23:34 PM PST 23 |
Dec 24 01:26:42 PM PST 23 |
1231779784 ps |
| T323 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.753531435 |
|
|
Dec 24 01:24:34 PM PST 23 |
Dec 24 01:28:52 PM PST 23 |
3605111176 ps |
| T324 |
/workspace/coverage/default/11.sram_ctrl_bijection.3116960152 |
|
|
Dec 24 01:22:59 PM PST 23 |
Dec 24 02:05:38 PM PST 23 |
273942273059 ps |
| T325 |
/workspace/coverage/default/3.sram_ctrl_smoke.2745445212 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 01:22:44 PM PST 23 |
27340725187 ps |
| T326 |
/workspace/coverage/default/45.sram_ctrl_smoke.2210150596 |
|
|
Dec 24 01:27:01 PM PST 23 |
Dec 24 01:27:39 PM PST 23 |
11451982981 ps |
| T327 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3555925295 |
|
|
Dec 24 01:26:45 PM PST 23 |
Dec 24 01:27:51 PM PST 23 |
740170324 ps |
| T328 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4109984716 |
|
|
Dec 24 01:22:43 PM PST 23 |
Dec 24 01:23:02 PM PST 23 |
1355522644 ps |
| T329 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.660007455 |
|
|
Dec 24 01:26:15 PM PST 23 |
Dec 24 01:26:43 PM PST 23 |
1915395692 ps |
| T330 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2546445170 |
|
|
Dec 24 01:21:24 PM PST 23 |
Dec 24 01:24:38 PM PST 23 |
2597046487 ps |
| T331 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3810185255 |
|
|
Dec 24 01:24:32 PM PST 23 |
Dec 24 01:27:19 PM PST 23 |
3941275873 ps |
| T332 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3375309733 |
|
|
Dec 24 01:23:46 PM PST 23 |
Dec 24 01:34:39 PM PST 23 |
25844957881 ps |
| T333 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.1576040383 |
|
|
Dec 24 01:22:03 PM PST 23 |
Dec 24 01:23:48 PM PST 23 |
40791499878 ps |
| T334 |
/workspace/coverage/default/39.sram_ctrl_executable.2464623086 |
|
|
Dec 24 01:26:34 PM PST 23 |
Dec 24 01:30:09 PM PST 23 |
3432259165 ps |
| T335 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2407201278 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 02:31:36 PM PST 23 |
1314950236 ps |
| T336 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.687623114 |
|
|
Dec 24 01:26:49 PM PST 23 |
Dec 24 01:44:25 PM PST 23 |
3961820426 ps |
| T337 |
/workspace/coverage/default/9.sram_ctrl_bijection.1866702304 |
|
|
Dec 24 01:22:41 PM PST 23 |
Dec 24 01:44:10 PM PST 23 |
38233065437 ps |
| T338 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.617589301 |
|
|
Dec 24 01:22:06 PM PST 23 |
Dec 24 01:28:08 PM PST 23 |
17648243828 ps |
| T339 |
/workspace/coverage/default/29.sram_ctrl_bijection.1967441920 |
|
|
Dec 24 01:24:51 PM PST 23 |
Dec 24 02:03:35 PM PST 23 |
383542484305 ps |
| T340 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.1277461450 |
|
|
Dec 24 01:27:02 PM PST 23 |
Dec 24 01:31:32 PM PST 23 |
39396321811 ps |
| T341 |
/workspace/coverage/default/5.sram_ctrl_regwen.2765682529 |
|
|
Dec 24 01:22:07 PM PST 23 |
Dec 24 01:32:44 PM PST 23 |
7944357159 ps |
| T342 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3152768369 |
|
|
Dec 24 01:23:34 PM PST 23 |
Dec 24 01:28:53 PM PST 23 |
8531409274 ps |
| T343 |
/workspace/coverage/default/41.sram_ctrl_bijection.3430631209 |
|
|
Dec 24 01:26:49 PM PST 23 |
Dec 24 02:06:39 PM PST 23 |
33491653913 ps |
| T344 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.1908668830 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 01:27:25 PM PST 23 |
3157158737 ps |
| T345 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3313167737 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 03:07:44 PM PST 23 |
249664535542 ps |
| T346 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.744860403 |
|
|
Dec 24 01:27:13 PM PST 23 |
Dec 24 01:31:53 PM PST 23 |
106079188496 ps |
| T347 |
/workspace/coverage/default/24.sram_ctrl_regwen.538371483 |
|
|
Dec 24 01:24:48 PM PST 23 |
Dec 24 01:39:40 PM PST 23 |
6088571733 ps |
| T348 |
/workspace/coverage/default/39.sram_ctrl_stress_all.3996056047 |
|
|
Dec 24 01:26:31 PM PST 23 |
Dec 24 02:40:40 PM PST 23 |
28524304115 ps |
| T349 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4014678380 |
|
|
Dec 24 01:27:40 PM PST 23 |
Dec 24 01:28:56 PM PST 23 |
977088177 ps |
| T350 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.977272504 |
|
|
Dec 24 01:27:12 PM PST 23 |
Dec 24 01:32:07 PM PST 23 |
16980329501 ps |
| T351 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2613014541 |
|
|
Dec 24 01:22:07 PM PST 23 |
Dec 24 01:24:43 PM PST 23 |
1336268492 ps |
| T352 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1209893905 |
|
|
Dec 24 01:25:48 PM PST 23 |
Dec 24 02:00:42 PM PST 23 |
186902651 ps |
| T353 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1843670291 |
|
|
Dec 24 01:27:42 PM PST 23 |
Dec 24 01:38:02 PM PST 23 |
7589868021 ps |
| T354 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.3580305444 |
|
|
Dec 24 01:26:07 PM PST 23 |
Dec 24 01:34:36 PM PST 23 |
42887354474 ps |
| T355 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.3612142996 |
|
|
Dec 24 01:23:40 PM PST 23 |
Dec 24 01:29:27 PM PST 23 |
72803679846 ps |
| T356 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1529521877 |
|
|
Dec 24 01:23:30 PM PST 23 |
Dec 24 01:23:34 PM PST 23 |
34078705 ps |
| T357 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3040100319 |
|
|
Dec 24 01:22:10 PM PST 23 |
Dec 24 01:22:31 PM PST 23 |
367334199 ps |
| T358 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2320803232 |
|
|
Dec 24 01:27:26 PM PST 23 |
Dec 24 01:27:32 PM PST 23 |
632111339 ps |
| T359 |
/workspace/coverage/default/2.sram_ctrl_smoke.1661039551 |
|
|
Dec 24 01:21:58 PM PST 23 |
Dec 24 01:22:17 PM PST 23 |
2064681465 ps |
| T360 |
/workspace/coverage/default/16.sram_ctrl_regwen.1795553859 |
|
|
Dec 24 01:23:29 PM PST 23 |
Dec 24 01:40:16 PM PST 23 |
15822733748 ps |
| T361 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3354085288 |
|
|
Dec 24 01:21:24 PM PST 23 |
Dec 24 02:32:35 PM PST 23 |
388251688487 ps |
| T362 |
/workspace/coverage/default/49.sram_ctrl_partial_access.490068547 |
|
|
Dec 24 01:27:41 PM PST 23 |
Dec 24 01:27:59 PM PST 23 |
910249176 ps |
| T30 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.3068596461 |
|
|
Dec 24 01:24:34 PM PST 23 |
Dec 24 01:25:42 PM PST 23 |
5410373466 ps |
| T31 |
/workspace/coverage/default/25.sram_ctrl_stress_all.357714308 |
|
|
Dec 24 01:24:32 PM PST 23 |
Dec 24 02:33:04 PM PST 23 |
546348113471 ps |
| T363 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2313450978 |
|
|
Dec 24 01:23:00 PM PST 23 |
Dec 24 01:23:42 PM PST 23 |
6430961149 ps |
| T364 |
/workspace/coverage/default/32.sram_ctrl_smoke.3209415704 |
|
|
Dec 24 01:25:51 PM PST 23 |
Dec 24 01:26:08 PM PST 23 |
695674224 ps |
| T365 |
/workspace/coverage/default/47.sram_ctrl_executable.1850391554 |
|
|
Dec 24 01:27:28 PM PST 23 |
Dec 24 01:38:53 PM PST 23 |
18616171935 ps |
| T366 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2148775783 |
|
|
Dec 24 01:24:35 PM PST 23 |
Dec 24 01:24:38 PM PST 23 |
39297080 ps |
| T367 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.1313603013 |
|
|
Dec 24 01:26:12 PM PST 23 |
Dec 24 01:53:58 PM PST 23 |
23002423405 ps |
| T368 |
/workspace/coverage/default/39.sram_ctrl_alert_test.1203421987 |
|
|
Dec 24 01:26:32 PM PST 23 |
Dec 24 01:26:34 PM PST 23 |
52276773 ps |
| T369 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1979099070 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 01:27:34 PM PST 23 |
48718682639 ps |
| T370 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3413282713 |
|
|
Dec 24 01:25:26 PM PST 23 |
Dec 24 01:34:42 PM PST 23 |
26613449520 ps |
| T371 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2392817677 |
|
|
Dec 24 01:24:31 PM PST 23 |
Dec 24 01:29:59 PM PST 23 |
20138345192 ps |
| T372 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.4087832688 |
|
|
Dec 24 01:26:48 PM PST 23 |
Dec 24 01:30:57 PM PST 23 |
3948190370 ps |
| T373 |
/workspace/coverage/default/18.sram_ctrl_stress_all.1265081160 |
|
|
Dec 24 01:23:41 PM PST 23 |
Dec 24 02:39:32 PM PST 23 |
35449904655 ps |
| T374 |
/workspace/coverage/default/4.sram_ctrl_partial_access.3843217628 |
|
|
Dec 24 01:22:03 PM PST 23 |
Dec 24 01:23:22 PM PST 23 |
15654899737 ps |
| T375 |
/workspace/coverage/default/30.sram_ctrl_smoke.2833264792 |
|
|
Dec 24 01:25:32 PM PST 23 |
Dec 24 01:26:18 PM PST 23 |
1974578979 ps |
| T376 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.354321476 |
|
|
Dec 24 01:26:04 PM PST 23 |
Dec 24 03:05:37 PM PST 23 |
2928328403 ps |
| T377 |
/workspace/coverage/default/21.sram_ctrl_partial_access.3259398875 |
|
|
Dec 24 01:24:26 PM PST 23 |
Dec 24 01:25:03 PM PST 23 |
3784028647 ps |
| T378 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.4051835839 |
|
|
Dec 24 01:23:16 PM PST 23 |
Dec 24 01:27:32 PM PST 23 |
48415560616 ps |
| T379 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.2532823070 |
|
|
Dec 24 01:23:39 PM PST 23 |
Dec 24 01:24:53 PM PST 23 |
3951389921 ps |
| T380 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1467396622 |
|
|
Dec 24 01:24:33 PM PST 23 |
Dec 24 01:27:32 PM PST 23 |
3259658276 ps |
| T381 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2740074912 |
|
|
Dec 24 01:22:02 PM PST 23 |
Dec 24 01:24:44 PM PST 23 |
10559360001 ps |
| T382 |
/workspace/coverage/default/35.sram_ctrl_smoke.1884539343 |
|
|
Dec 24 01:26:08 PM PST 23 |
Dec 24 01:26:43 PM PST 23 |
1093764704 ps |
| T383 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.594408416 |
|
|
Dec 24 01:26:33 PM PST 23 |
Dec 24 01:28:16 PM PST 23 |
763666628 ps |
| T384 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1985700700 |
|
|
Dec 24 01:25:32 PM PST 23 |
Dec 24 01:32:49 PM PST 23 |
25233520540 ps |
| T385 |
/workspace/coverage/default/18.sram_ctrl_executable.2256848895 |
|
|
Dec 24 01:23:40 PM PST 23 |
Dec 24 01:45:21 PM PST 23 |
29848523374 ps |
| T386 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3506974911 |
|
|
Dec 24 01:22:20 PM PST 23 |
Dec 24 01:22:25 PM PST 23 |
14253285 ps |
| T387 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.1182082196 |
|
|
Dec 24 01:22:06 PM PST 23 |
Dec 24 01:26:18 PM PST 23 |
65654232954 ps |
| T388 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.467164705 |
|
|
Dec 24 01:27:02 PM PST 23 |
Dec 24 01:34:09 PM PST 23 |
65993739729 ps |
| T389 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.884795195 |
|
|
Dec 24 01:26:47 PM PST 23 |
Dec 24 01:28:23 PM PST 23 |
747425516 ps |
| T390 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.2041763760 |
|
|
Dec 24 01:24:33 PM PST 23 |
Dec 24 01:24:41 PM PST 23 |
4182998162 ps |
| T391 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1746413865 |
|
|
Dec 24 01:22:10 PM PST 23 |
Dec 24 01:23:30 PM PST 23 |
2344075625 ps |
| T392 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.57180984 |
|
|
Dec 24 01:23:38 PM PST 23 |
Dec 24 01:30:14 PM PST 23 |
8925731681 ps |
| T393 |
/workspace/coverage/default/47.sram_ctrl_smoke.1806136677 |
|
|
Dec 24 01:27:07 PM PST 23 |
Dec 24 01:27:29 PM PST 23 |
854970895 ps |
| T394 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.803431999 |
|
|
Dec 24 01:26:51 PM PST 23 |
Dec 24 01:31:51 PM PST 23 |
14346305540 ps |
| T395 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.650647864 |
|
|
Dec 24 01:24:35 PM PST 23 |
Dec 24 01:29:09 PM PST 23 |
11004748241 ps |
| T396 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.572966529 |
|
|
Dec 24 01:23:28 PM PST 23 |
Dec 24 01:26:17 PM PST 23 |
4498713747 ps |
| T397 |
/workspace/coverage/default/6.sram_ctrl_executable.943665241 |
|
|
Dec 24 01:22:10 PM PST 23 |
Dec 24 01:27:16 PM PST 23 |
6171521162 ps |
| T398 |
/workspace/coverage/default/33.sram_ctrl_smoke.77518612 |
|
|
Dec 24 01:25:50 PM PST 23 |
Dec 24 01:26:34 PM PST 23 |
4069926802 ps |
| T399 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2760532900 |
|
|
Dec 24 01:27:26 PM PST 23 |
Dec 24 01:27:33 PM PST 23 |
2398819414 ps |
| T24 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.1285079774 |
|
|
Dec 24 01:21:59 PM PST 23 |
Dec 24 01:22:03 PM PST 23 |
683490999 ps |
| T38 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3221829728 |
|
|
Dec 24 01:21:30 PM PST 23 |
Dec 24 01:22:42 PM PST 23 |
11140403845 ps |
| T39 |
/workspace/coverage/default/26.sram_ctrl_partial_access.3977349990 |
|
|
Dec 24 01:24:32 PM PST 23 |
Dec 24 01:25:09 PM PST 23 |
11718470169 ps |
| T40 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2088999178 |
|
|
Dec 24 01:25:53 PM PST 23 |
Dec 24 01:29:56 PM PST 23 |
9065503548 ps |
| T41 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3837282056 |
|
|
Dec 24 01:27:00 PM PST 23 |
Dec 24 01:27:18 PM PST 23 |
1396037200 ps |
| T42 |
/workspace/coverage/default/20.sram_ctrl_executable.4167148894 |
|
|
Dec 24 01:24:31 PM PST 23 |
Dec 24 01:37:43 PM PST 23 |
16530752019 ps |
| T43 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.1608790768 |
|
|
Dec 24 01:25:51 PM PST 23 |
Dec 24 01:26:22 PM PST 23 |
3020847750 ps |
| T44 |
/workspace/coverage/default/8.sram_ctrl_smoke.503989315 |
|
|
Dec 24 01:22:22 PM PST 23 |
Dec 24 01:22:37 PM PST 23 |
654432958 ps |
| T45 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3322505075 |
|
|
Dec 24 01:26:56 PM PST 23 |
Dec 24 01:39:04 PM PST 23 |
18792852497 ps |
| T46 |
/workspace/coverage/default/43.sram_ctrl_smoke.2761101418 |
|
|
Dec 24 01:26:45 PM PST 23 |
Dec 24 01:27:11 PM PST 23 |
4180476785 ps |
| T400 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1123122602 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 01:28:53 PM PST 23 |
8023233015 ps |
| T401 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2133521693 |
|
|
Dec 24 01:23:00 PM PST 23 |
Dec 24 01:23:40 PM PST 23 |
759336428 ps |
| T402 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.251908565 |
|
|
Dec 24 01:24:27 PM PST 23 |
Dec 24 01:44:15 PM PST 23 |
7981061899 ps |
| T403 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2812175478 |
|
|
Dec 24 01:27:12 PM PST 23 |
Dec 24 01:27:48 PM PST 23 |
708183959 ps |
| T404 |
/workspace/coverage/default/20.sram_ctrl_bijection.1847273128 |
|
|
Dec 24 01:23:33 PM PST 23 |
Dec 24 02:08:02 PM PST 23 |
165892829715 ps |
| T405 |
/workspace/coverage/default/44.sram_ctrl_regwen.952072183 |
|
|
Dec 24 01:27:00 PM PST 23 |
Dec 24 01:30:35 PM PST 23 |
1568681578 ps |
| T406 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.2134854098 |
|
|
Dec 24 01:22:03 PM PST 23 |
Dec 24 01:24:48 PM PST 23 |
26382856239 ps |
| T407 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1009654325 |
|
|
Dec 24 01:22:10 PM PST 23 |
Dec 24 01:37:31 PM PST 23 |
20767702889 ps |
| T408 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3733648171 |
|
|
Dec 24 01:24:49 PM PST 23 |
Dec 24 01:29:51 PM PST 23 |
82165837463 ps |
| T409 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.693271862 |
|
|
Dec 24 01:24:40 PM PST 23 |
Dec 24 01:25:36 PM PST 23 |
1579670000 ps |
| T410 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1681603516 |
|
|
Dec 24 01:27:27 PM PST 23 |
Dec 24 01:28:48 PM PST 23 |
2420343457 ps |
| T411 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.823512892 |
|
|
Dec 24 01:23:49 PM PST 23 |
Dec 24 01:25:48 PM PST 23 |
3430958975 ps |
| T412 |
/workspace/coverage/default/36.sram_ctrl_partial_access.3839733680 |
|
|
Dec 24 01:25:51 PM PST 23 |
Dec 24 01:26:59 PM PST 23 |
3123359370 ps |
| T413 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3282389486 |
|
|
Dec 24 01:22:43 PM PST 23 |
Dec 24 02:38:45 PM PST 23 |
1038965046686 ps |
| T414 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1217999631 |
|
|
Dec 24 01:23:01 PM PST 23 |
Dec 24 01:24:44 PM PST 23 |
44151305145 ps |
| T89 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2411804393 |
|
|
Dec 24 01:25:40 PM PST 23 |
Dec 24 01:28:25 PM PST 23 |
22657319306 ps |
| T415 |
/workspace/coverage/default/27.sram_ctrl_regwen.1770349645 |
|
|
Dec 24 01:24:47 PM PST 23 |
Dec 24 01:32:58 PM PST 23 |
38555508730 ps |
| T416 |
/workspace/coverage/default/29.sram_ctrl_regwen.1014315636 |
|
|
Dec 24 01:24:46 PM PST 23 |
Dec 24 01:30:58 PM PST 23 |
8569847555 ps |
| T417 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1916192662 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 01:57:05 PM PST 23 |
741851566 ps |
| T418 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.298926802 |
|
|
Dec 24 01:27:07 PM PST 23 |
Dec 24 01:31:08 PM PST 23 |
16192047098 ps |
| T419 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3045867773 |
|
|
Dec 24 01:26:58 PM PST 23 |
Dec 24 01:27:44 PM PST 23 |
4158284653 ps |
| T420 |
/workspace/coverage/default/30.sram_ctrl_bijection.73316209 |
|
|
Dec 24 01:25:35 PM PST 23 |
Dec 24 01:40:46 PM PST 23 |
100206329437 ps |
| T421 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2483359786 |
|
|
Dec 24 01:23:30 PM PST 23 |
Dec 24 01:24:49 PM PST 23 |
6518587310 ps |
| T422 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2425938579 |
|
|
Dec 24 01:27:09 PM PST 23 |
Dec 24 01:59:04 PM PST 23 |
13112502550 ps |
| T423 |
/workspace/coverage/default/16.sram_ctrl_alert_test.1788085271 |
|
|
Dec 24 01:23:29 PM PST 23 |
Dec 24 01:23:33 PM PST 23 |
84864987 ps |
| T424 |
/workspace/coverage/default/29.sram_ctrl_stress_all.3127458142 |
|
|
Dec 24 01:25:26 PM PST 23 |
Dec 24 02:34:33 PM PST 23 |
328555149036 ps |
| T425 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.4128462551 |
|
|
Dec 24 01:26:06 PM PST 23 |
Dec 24 01:26:22 PM PST 23 |
717885988 ps |
| T426 |
/workspace/coverage/default/3.sram_ctrl_executable.3276521174 |
|
|
Dec 24 01:22:03 PM PST 23 |
Dec 24 01:34:20 PM PST 23 |
29766641401 ps |
| T427 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2410269146 |
|
|
Dec 24 01:27:27 PM PST 23 |
Dec 24 02:46:06 PM PST 23 |
756065918400 ps |
| T428 |
/workspace/coverage/default/37.sram_ctrl_bijection.1492735783 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 02:03:07 PM PST 23 |
101294092995 ps |
| T429 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1969247324 |
|
|
Dec 24 01:24:34 PM PST 23 |
Dec 24 01:25:05 PM PST 23 |
714468045 ps |
| T430 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2423209717 |
|
|
Dec 24 01:24:32 PM PST 23 |
Dec 24 01:31:08 PM PST 23 |
5012251948 ps |
| T431 |
/workspace/coverage/default/41.sram_ctrl_alert_test.3350219578 |
|
|
Dec 24 01:26:47 PM PST 23 |
Dec 24 01:26:50 PM PST 23 |
23089053 ps |
| T432 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2365477182 |
|
|
Dec 24 01:27:01 PM PST 23 |
Dec 24 01:28:24 PM PST 23 |
2548545511 ps |
| T433 |
/workspace/coverage/default/3.sram_ctrl_regwen.1882351848 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 01:49:28 PM PST 23 |
13477649130 ps |
| T434 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3990978058 |
|
|
Dec 24 01:25:50 PM PST 23 |
Dec 24 01:30:01 PM PST 23 |
8046408125 ps |
| T435 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.1865554518 |
|
|
Dec 24 01:25:37 PM PST 23 |
Dec 24 01:31:42 PM PST 23 |
19896660074 ps |
| T436 |
/workspace/coverage/default/44.sram_ctrl_smoke.2202933524 |
|
|
Dec 24 01:27:01 PM PST 23 |
Dec 24 01:27:14 PM PST 23 |
678234048 ps |
| T437 |
/workspace/coverage/default/48.sram_ctrl_smoke.2639670504 |
|
|
Dec 24 01:27:27 PM PST 23 |
Dec 24 01:28:48 PM PST 23 |
5294424746 ps |
| T25 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.3983446191 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 01:22:09 PM PST 23 |
115574572 ps |
| T438 |
/workspace/coverage/default/39.sram_ctrl_regwen.4237952215 |
|
|
Dec 24 01:26:32 PM PST 23 |
Dec 24 01:59:10 PM PST 23 |
50181757566 ps |
| T439 |
/workspace/coverage/default/22.sram_ctrl_smoke.3031983413 |
|
|
Dec 24 01:24:25 PM PST 23 |
Dec 24 01:24:41 PM PST 23 |
1534070198 ps |
| T440 |
/workspace/coverage/default/43.sram_ctrl_regwen.2953394343 |
|
|
Dec 24 01:26:47 PM PST 23 |
Dec 24 01:49:38 PM PST 23 |
58538119081 ps |
| T441 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.1881845819 |
|
|
Dec 24 01:25:52 PM PST 23 |
Dec 24 01:26:14 PM PST 23 |
1237218387 ps |
| T442 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1479685445 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 01:23:25 PM PST 23 |
9413522869 ps |
| T443 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.4161276290 |
|
|
Dec 24 01:22:19 PM PST 23 |
Dec 24 01:22:55 PM PST 23 |
2729625723 ps |
| T444 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3411826640 |
|
|
Dec 24 01:25:32 PM PST 23 |
Dec 24 02:25:48 PM PST 23 |
1069967539 ps |
| T445 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.418527525 |
|
|
Dec 24 01:22:07 PM PST 23 |
Dec 24 01:24:47 PM PST 23 |
835337383 ps |
| T446 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2853848576 |
|
|
Dec 24 01:25:51 PM PST 23 |
Dec 24 01:25:55 PM PST 23 |
15304481 ps |
| T447 |
/workspace/coverage/default/2.sram_ctrl_stress_all.569132504 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 02:25:39 PM PST 23 |
61633768804 ps |
| T448 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.926654315 |
|
|
Dec 24 01:26:04 PM PST 23 |
Dec 24 01:32:40 PM PST 23 |
5962830634 ps |
| T449 |
/workspace/coverage/default/33.sram_ctrl_bijection.1323940335 |
|
|
Dec 24 01:25:49 PM PST 23 |
Dec 24 01:46:18 PM PST 23 |
76067773100 ps |
| T450 |
/workspace/coverage/default/15.sram_ctrl_smoke.944027029 |
|
|
Dec 24 01:23:27 PM PST 23 |
Dec 24 01:25:14 PM PST 23 |
2601804980 ps |
| T451 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2085501669 |
|
|
Dec 24 01:23:31 PM PST 23 |
Dec 24 01:25:52 PM PST 23 |
14038394766 ps |
| T452 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3217725956 |
|
|
Dec 24 01:22:06 PM PST 23 |
Dec 24 01:22:10 PM PST 23 |
120537089 ps |
| T453 |
/workspace/coverage/default/4.sram_ctrl_stress_all.3274672355 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 02:27:53 PM PST 23 |
142460214333 ps |
| T454 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3704042728 |
|
|
Dec 24 01:27:27 PM PST 23 |
Dec 24 01:28:14 PM PST 23 |
3688109445 ps |
| T26 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.4208280415 |
|
|
Dec 24 01:22:05 PM PST 23 |
Dec 24 01:22:10 PM PST 23 |
487973018 ps |
| T455 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.298140950 |
|
|
Dec 24 01:26:33 PM PST 23 |
Dec 24 01:28:52 PM PST 23 |
29319180758 ps |
| T456 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1606685228 |
|
|
Dec 24 01:23:03 PM PST 23 |
Dec 24 01:23:10 PM PST 23 |
353860674 ps |
| T457 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.805335434 |
|
|
Dec 24 01:23:13 PM PST 23 |
Dec 24 01:24:57 PM PST 23 |
3117004555 ps |
| T458 |
/workspace/coverage/default/11.sram_ctrl_regwen.2675456383 |
|
|
Dec 24 01:23:03 PM PST 23 |
Dec 24 01:34:23 PM PST 23 |
3111251305 ps |
| T459 |
/workspace/coverage/default/17.sram_ctrl_stress_all.3286149228 |
|
|
Dec 24 01:23:32 PM PST 23 |
Dec 24 03:10:34 PM PST 23 |
1574808646430 ps |
| T460 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1403174494 |
|
|
Dec 24 01:23:29 PM PST 23 |
Dec 24 01:30:12 PM PST 23 |
21840174376 ps |
| T139 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4173556938 |
|
|
Dec 24 01:22:08 PM PST 23 |
Dec 24 01:27:43 PM PST 23 |
61332695326 ps |
| T461 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.869352784 |
|
|
Dec 24 01:25:37 PM PST 23 |
Dec 24 01:29:49 PM PST 23 |
42726166841 ps |
| T462 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2148607186 |
|
|
Dec 24 01:21:59 PM PST 23 |
Dec 24 01:23:19 PM PST 23 |
1513091772 ps |
| T463 |
/workspace/coverage/default/9.sram_ctrl_smoke.3774375511 |
|
|
Dec 24 01:22:40 PM PST 23 |
Dec 24 01:23:08 PM PST 23 |
1604571680 ps |
| T464 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.48404111 |
|
|
Dec 24 01:21:57 PM PST 23 |
Dec 24 01:38:27 PM PST 23 |
147515962253 ps |
| T465 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.731903329 |
|
|
Dec 24 01:24:36 PM PST 23 |
Dec 24 01:45:26 PM PST 23 |
9412617444 ps |
| T466 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.1755126728 |
|
|
Dec 24 01:23:27 PM PST 23 |
Dec 24 01:24:11 PM PST 23 |
5251732521 ps |
| T467 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.4007357721 |
|
|
Dec 24 01:24:50 PM PST 23 |
Dec 24 01:26:53 PM PST 23 |
16432625732 ps |
| T468 |
/workspace/coverage/default/19.sram_ctrl_bijection.2298745495 |
|
|
Dec 24 01:23:37 PM PST 23 |
Dec 24 01:40:43 PM PST 23 |
64157041998 ps |
| T469 |
/workspace/coverage/default/3.sram_ctrl_bijection.1138476225 |
|
|
Dec 24 01:22:00 PM PST 23 |
Dec 24 01:50:54 PM PST 23 |
76781030366 ps |
| T470 |
/workspace/coverage/default/42.sram_ctrl_regwen.3915556384 |
|
|
Dec 24 01:26:46 PM PST 23 |
Dec 24 01:29:34 PM PST 23 |
2557045528 ps |
| T471 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3959629100 |
|
|
Dec 24 01:22:00 PM PST 23 |
Dec 24 01:28:01 PM PST 23 |
57751254846 ps |
| T472 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1935091190 |
|
|
Dec 24 01:26:11 PM PST 23 |
Dec 24 01:30:13 PM PST 23 |
12464347201 ps |
| T473 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.1538909599 |
|
|
Dec 24 01:24:33 PM PST 23 |
Dec 24 01:27:05 PM PST 23 |
2825850792 ps |
| T474 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.120548311 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 01:23:22 PM PST 23 |
4118996893 ps |
| T475 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2034509248 |
|
|
Dec 24 01:24:33 PM PST 23 |
Dec 24 01:24:41 PM PST 23 |
666013196 ps |
| T476 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.1498714669 |
|
|
Dec 24 01:25:50 PM PST 23 |
Dec 24 01:55:22 PM PST 23 |
14144688929 ps |
| T477 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.4251727966 |
|
|
Dec 24 01:24:27 PM PST 23 |
Dec 24 01:31:38 PM PST 23 |
39875612001 ps |
| T478 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4234096164 |
|
|
Dec 24 01:27:42 PM PST 23 |
Dec 24 01:28:41 PM PST 23 |
2785252060 ps |
| T479 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1790115531 |
|
|
Dec 24 01:27:26 PM PST 23 |
Dec 24 02:27:41 PM PST 23 |
2129381276 ps |
| T480 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3774279214 |
|
|
Dec 24 01:22:40 PM PST 23 |
Dec 24 02:07:32 PM PST 23 |
836006789 ps |
| T481 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3595690671 |
|
|
Dec 24 01:23:27 PM PST 23 |
Dec 24 02:20:36 PM PST 23 |
5390304682 ps |
| T482 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1678003377 |
|
|
Dec 24 01:24:34 PM PST 23 |
Dec 24 01:46:54 PM PST 23 |
12972849106 ps |
| T483 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3383225237 |
|
|
Dec 24 01:27:27 PM PST 23 |
Dec 24 01:43:31 PM PST 23 |
26191630822 ps |
| T484 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.347981384 |
|
|
Dec 24 01:23:34 PM PST 23 |
Dec 24 01:29:31 PM PST 23 |
21396161540 ps |
| T485 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.131545225 |
|
|
Dec 24 01:22:04 PM PST 23 |
Dec 24 01:22:12 PM PST 23 |
362603387 ps |
| T486 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3969137359 |
|
|
Dec 24 01:25:50 PM PST 23 |
Dec 24 01:25:58 PM PST 23 |
366647372 ps |
| T487 |
/workspace/coverage/default/6.sram_ctrl_regwen.1993164972 |
|
|
Dec 24 01:22:08 PM PST 23 |
Dec 24 01:24:23 PM PST 23 |
3552541041 ps |
| T488 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2093415926 |
|
|
Dec 24 01:24:36 PM PST 23 |
Dec 24 01:27:31 PM PST 23 |
7555970405 ps |
| T489 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.428097888 |
|
|
Dec 24 01:23:31 PM PST 23 |
Dec 24 01:25:56 PM PST 23 |
7048287198 ps |
| T490 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.3733100363 |
|
|
Dec 24 01:26:05 PM PST 23 |
Dec 24 01:41:05 PM PST 23 |
24597491628 ps |
| T491 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2601037996 |
|
|
Dec 24 01:26:57 PM PST 23 |
Dec 24 01:27:05 PM PST 23 |
345585949 ps |
| T492 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.888676996 |
|
|
Dec 24 01:24:40 PM PST 23 |
Dec 24 01:25:09 PM PST 23 |
2473755862 ps |
| T493 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.1942367522 |
|
|
Dec 24 01:25:50 PM PST 23 |
Dec 24 01:31:13 PM PST 23 |
129094667223 ps |
| T494 |
/workspace/coverage/default/35.sram_ctrl_alert_test.678287562 |
|
|
Dec 24 01:25:53 PM PST 23 |
Dec 24 01:25:57 PM PST 23 |
33540783 ps |
| T495 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2486331341 |
|
|
Dec 24 01:23:29 PM PST 23 |
Dec 24 01:44:55 PM PST 23 |
113943885185 ps |
| T496 |
/workspace/coverage/default/28.sram_ctrl_executable.918445660 |
|
|
Dec 24 01:24:48 PM PST 23 |
Dec 24 01:46:55 PM PST 23 |
107932711773 ps |
| T497 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3039747076 |
|
|
Dec 24 01:22:45 PM PST 23 |
Dec 24 02:23:21 PM PST 23 |
1210644275 ps |
| T498 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2062376530 |
|
|
Dec 24 01:25:52 PM PST 23 |
Dec 24 01:51:55 PM PST 23 |
20236320293 ps |
| T499 |
/workspace/coverage/default/13.sram_ctrl_bijection.3230309209 |
|
|
Dec 24 01:23:24 PM PST 23 |
Dec 24 01:31:26 PM PST 23 |
10941126859 ps |
| T500 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1232487032 |
|
|
Dec 24 01:26:06 PM PST 23 |
Dec 24 01:26:15 PM PST 23 |
1409192497 ps |
| T501 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1355311324 |
|
|
Dec 24 01:24:36 PM PST 23 |
Dec 24 01:52:40 PM PST 23 |
4932232747 ps |
| T502 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2843877299 |
|
|
Dec 24 01:24:30 PM PST 23 |
Dec 24 01:30:11 PM PST 23 |
1890212946 ps |