Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.99 99.19 94.27 99.72 100.00 96.03 99.12 97.62


Total tests in report: 1035
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
66.45 66.45 91.09 91.09 61.97 61.97 73.24 73.24 23.81 23.81 77.96 77.96 94.15 94.15 42.96 42.96 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1953436125
84.01 17.55 95.75 4.66 79.74 17.77 93.66 20.42 61.90 38.10 85.78 7.82 95.91 1.75 75.32 32.36 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2283173656
89.22 5.22 97.30 1.55 81.52 1.78 93.80 0.14 90.48 28.57 89.34 3.55 95.91 0.00 76.23 0.91 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3438614046
93.81 4.58 98.53 1.23 86.61 5.09 97.11 3.31 100.00 9.52 94.08 4.74 96.05 0.15 84.28 8.04 /workspace/coverage/default/20.sram_ctrl_stress_all.3233708626
94.80 1.00 98.69 0.16 87.20 0.59 97.31 0.21 100.00 0.00 94.79 0.71 96.05 0.00 89.58 5.30 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2270708865
95.41 0.61 98.86 0.16 89.22 2.01 97.73 0.41 100.00 0.00 95.50 0.71 96.64 0.58 89.95 0.37 /workspace/coverage/default/4.sram_ctrl_sec_cm.948636426
95.86 0.45 98.86 0.00 89.57 0.36 97.73 0.00 100.00 0.00 95.73 0.24 96.64 0.00 92.50 2.56 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2581539615
96.18 0.32 98.86 0.00 90.05 0.47 98.76 1.03 100.00 0.00 95.73 0.00 96.64 0.00 93.24 0.73 /workspace/coverage/default/47.sram_ctrl_alert_test.2728375923
96.49 0.30 98.86 0.00 90.17 0.12 98.76 0.00 100.00 0.00 95.73 0.00 96.64 0.00 95.25 2.01 /workspace/coverage/default/26.sram_ctrl_stress_all.2324486920
96.75 0.26 99.10 0.25 90.64 0.47 98.76 0.00 100.00 0.00 95.97 0.24 96.78 0.15 95.98 0.73 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.386861324
97.01 0.26 99.10 0.00 90.88 0.24 98.83 0.07 100.00 0.00 95.97 0.00 98.10 1.32 96.16 0.18 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1465552181
97.14 0.14 99.10 0.00 90.88 0.00 98.83 0.00 100.00 0.00 96.21 0.24 98.83 0.73 96.16 0.00 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3598111836
97.27 0.13 99.18 0.08 90.88 0.00 99.66 0.83 100.00 0.00 96.21 0.00 98.83 0.00 96.16 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.3451206184
97.38 0.10 99.18 0.00 90.88 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.83 0.00 96.89 0.73 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2891510904
97.44 0.06 99.18 0.00 90.88 0.00 99.72 0.07 100.00 0.00 96.21 0.00 98.83 0.00 97.26 0.37 /workspace/coverage/default/18.sram_ctrl_stress_all.3094129452
97.50 0.06 99.18 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.29 97.26 0.00 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2563724068
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3693611906
97.55 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.62 0.18 /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3812729280

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2262942069
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2387872864
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.699126489
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1512388549
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.35685366
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.390158083
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1356239373
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3700442026
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.664579458
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.4158065467
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2008973827
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3233876800
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1543713591
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2566731338
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.204682081
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3270769285
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4039531849
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.960001102
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.183917739
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2864191980
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2035501597
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2360584518
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1975272084
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.640389442
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4272130700
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2995786351
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2238550874
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1470250039
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.66865025
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3374347317
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3780596705
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1557389785
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.428897026
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4028078767
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4229537121
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3592004735
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.772844150
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3088843689
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1721050519
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.545740634
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2857274797
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1512024936
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2948778083
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3655694246
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3655541988
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4014848879
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2870900399
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.987191868
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1581356011
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1542169501
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.82683407
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.4182363575
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3973219830
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.771344454
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3979682349
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2787778052
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1684671368
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2929629097
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1947782117
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.819371326
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.610610015
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3463372513
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3242777866
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3268186387
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.928861431
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3765573081
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.168644154
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1955893552
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.899178019
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.506034118
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.223838994
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1310134031
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3962426178
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1982045696
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1858659074
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3154287211
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3089981031
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2407075467
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1147676118
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3425225354
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.228406078
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.846567899
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.538604923
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.74528837
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3570108321
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1435452931
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1956897382
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2090581495
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3919693525
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2188278038
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4256897583
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3447844149
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1112222281
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1665591251
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1268247682
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2390933781
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3426124954
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3649512115
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2191654483
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3990675457
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.404886455
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4257182936
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3647604177
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.197875442
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2376157473
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.4160947106
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.110792966
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.319555412
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3870109587
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.374134792
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3778058095
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2358042586
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1469074030
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3015018584
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2737123464
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1812964877
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.4078467834
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.612686667
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2459809675
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.675055792
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2772964769
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1895897493
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2753108797
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2816935017
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3292175415
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.4220434402
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1190760564
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2092192595
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4167013483
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1198163821
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1632054833
/workspace/coverage/default/0.sram_ctrl_alert_test.3076666249
/workspace/coverage/default/0.sram_ctrl_bijection.3454260198
/workspace/coverage/default/0.sram_ctrl_executable.2136084003
/workspace/coverage/default/0.sram_ctrl_lc_escalation.679432845
/workspace/coverage/default/0.sram_ctrl_max_throughput.2305612028
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2782694635
/workspace/coverage/default/0.sram_ctrl_mem_walk.2015424720
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1588491646
/workspace/coverage/default/0.sram_ctrl_partial_access.1683376623
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1131284723
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3377253553
/workspace/coverage/default/0.sram_ctrl_regwen.3110136101
/workspace/coverage/default/0.sram_ctrl_sec_cm.2040583542
/workspace/coverage/default/0.sram_ctrl_smoke.3001100263
/workspace/coverage/default/0.sram_ctrl_stress_all.3228005331
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3843791087
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.457418340
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4058640606
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4022796142
/workspace/coverage/default/1.sram_ctrl_alert_test.1850802393
/workspace/coverage/default/1.sram_ctrl_bijection.3338966020
/workspace/coverage/default/1.sram_ctrl_executable.3383621630
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2015830032
/workspace/coverage/default/1.sram_ctrl_max_throughput.3381686917
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1912655233
/workspace/coverage/default/1.sram_ctrl_mem_walk.388676825
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3508700526
/workspace/coverage/default/1.sram_ctrl_partial_access.2618235077
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1381201939
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2974009968
/workspace/coverage/default/1.sram_ctrl_regwen.3036178807
/workspace/coverage/default/1.sram_ctrl_sec_cm.1723494584
/workspace/coverage/default/1.sram_ctrl_smoke.638155746
/workspace/coverage/default/1.sram_ctrl_stress_all.2447825702
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1707657716
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3283920612
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1891105154
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1453032916
/workspace/coverage/default/10.sram_ctrl_alert_test.3927310203
/workspace/coverage/default/10.sram_ctrl_bijection.3315832196
/workspace/coverage/default/10.sram_ctrl_executable.2742191250
/workspace/coverage/default/10.sram_ctrl_lc_escalation.892690311
/workspace/coverage/default/10.sram_ctrl_max_throughput.3254343733
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3776248629
/workspace/coverage/default/10.sram_ctrl_mem_walk.1227516495
/workspace/coverage/default/10.sram_ctrl_multiple_keys.841884090
/workspace/coverage/default/10.sram_ctrl_partial_access.1538003550
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2811805790
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3156643839
/workspace/coverage/default/10.sram_ctrl_regwen.1668172483
/workspace/coverage/default/10.sram_ctrl_smoke.239928886
/workspace/coverage/default/10.sram_ctrl_stress_all.214960167
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.984932013
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.473029691
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.780458446
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3041299624
/workspace/coverage/default/11.sram_ctrl_alert_test.3452099635
/workspace/coverage/default/11.sram_ctrl_bijection.1429988920
/workspace/coverage/default/11.sram_ctrl_executable.667909965
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1781506247
/workspace/coverage/default/11.sram_ctrl_max_throughput.1383947403
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.156543499
/workspace/coverage/default/11.sram_ctrl_mem_walk.704573121
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1100476675
/workspace/coverage/default/11.sram_ctrl_partial_access.2245331593
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3353920659
/workspace/coverage/default/11.sram_ctrl_regwen.1963793375
/workspace/coverage/default/11.sram_ctrl_smoke.3612163356
/workspace/coverage/default/11.sram_ctrl_stress_all.1622674734
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.365809935
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2998659559
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3265408073
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1048003274
/workspace/coverage/default/12.sram_ctrl_alert_test.3612490794
/workspace/coverage/default/12.sram_ctrl_bijection.1505855952
/workspace/coverage/default/12.sram_ctrl_executable.1728101723
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3454955476
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/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2511449552
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2952528181
/workspace/coverage/default/43.sram_ctrl_alert_test.116657102
/workspace/coverage/default/43.sram_ctrl_bijection.2304587909
/workspace/coverage/default/43.sram_ctrl_executable.1805061858
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2510186043
/workspace/coverage/default/43.sram_ctrl_max_throughput.3014938052
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.497949401
/workspace/coverage/default/43.sram_ctrl_mem_walk.1153605151
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2778022022
/workspace/coverage/default/43.sram_ctrl_partial_access.2834313214
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1388326308
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1754612578
/workspace/coverage/default/43.sram_ctrl_regwen.3028587340
/workspace/coverage/default/43.sram_ctrl_smoke.1040553596
/workspace/coverage/default/43.sram_ctrl_stress_all.3489562673
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3894369617
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1884701478
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1212976170
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.224420360
/workspace/coverage/default/44.sram_ctrl_alert_test.3557867901
/workspace/coverage/default/44.sram_ctrl_bijection.2198754322
/workspace/coverage/default/44.sram_ctrl_executable.1250349403
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3503744661
/workspace/coverage/default/44.sram_ctrl_max_throughput.4055536843
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3734557755
/workspace/coverage/default/44.sram_ctrl_mem_walk.1783395704
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1168798951
/workspace/coverage/default/44.sram_ctrl_partial_access.157752817
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2488847144
/workspace/coverage/default/44.sram_ctrl_ram_cfg.566548875
/workspace/coverage/default/44.sram_ctrl_regwen.1738223514
/workspace/coverage/default/44.sram_ctrl_smoke.801266156
/workspace/coverage/default/44.sram_ctrl_stress_all.3749339529
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1671430415
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2675932374
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3938274762
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1506339986
/workspace/coverage/default/45.sram_ctrl_alert_test.2288132766
/workspace/coverage/default/45.sram_ctrl_bijection.2012172554
/workspace/coverage/default/45.sram_ctrl_executable.2063627377
/workspace/coverage/default/45.sram_ctrl_lc_escalation.471361359
/workspace/coverage/default/45.sram_ctrl_max_throughput.2278573119
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2768694780
/workspace/coverage/default/45.sram_ctrl_mem_walk.358246523
/workspace/coverage/default/45.sram_ctrl_multiple_keys.21504084
/workspace/coverage/default/45.sram_ctrl_partial_access.1152929146
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.904605974
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3380084163
/workspace/coverage/default/45.sram_ctrl_regwen.2347682603
/workspace/coverage/default/45.sram_ctrl_smoke.3818696110
/workspace/coverage/default/45.sram_ctrl_stress_all.1802274961
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.342823155
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2344835467
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.4006547248
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4217187538
/workspace/coverage/default/46.sram_ctrl_alert_test.2588335469
/workspace/coverage/default/46.sram_ctrl_bijection.45248983
/workspace/coverage/default/46.sram_ctrl_executable.2137253840
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1609175047
/workspace/coverage/default/46.sram_ctrl_max_throughput.925736809
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.793576682
/workspace/coverage/default/46.sram_ctrl_mem_walk.1616090369
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1012609074
/workspace/coverage/default/46.sram_ctrl_partial_access.3684364361
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3839834492
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2024861356
/workspace/coverage/default/46.sram_ctrl_regwen.2154357689
/workspace/coverage/default/46.sram_ctrl_smoke.176671382
/workspace/coverage/default/46.sram_ctrl_stress_all.3351628187
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3904773821
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2407817959
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4079687136
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3442103459
/workspace/coverage/default/47.sram_ctrl_bijection.3974319519
/workspace/coverage/default/47.sram_ctrl_lc_escalation.583218394
/workspace/coverage/default/47.sram_ctrl_max_throughput.4188170513
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.202925625
/workspace/coverage/default/47.sram_ctrl_mem_walk.132644004
/workspace/coverage/default/47.sram_ctrl_multiple_keys.794029291
/workspace/coverage/default/47.sram_ctrl_partial_access.1147055690
/workspace/coverage/default/47.sram_ctrl_ram_cfg.858938182
/workspace/coverage/default/47.sram_ctrl_regwen.2140044294
/workspace/coverage/default/47.sram_ctrl_smoke.2699467354
/workspace/coverage/default/47.sram_ctrl_stress_all.1771554647
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1621418727
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2196642693
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2258660307
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3840627038
/workspace/coverage/default/48.sram_ctrl_alert_test.2577434928
/workspace/coverage/default/48.sram_ctrl_bijection.1243472866
/workspace/coverage/default/48.sram_ctrl_executable.775610370
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3591756915
/workspace/coverage/default/48.sram_ctrl_max_throughput.946836505
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4256066190
/workspace/coverage/default/48.sram_ctrl_mem_walk.1597956200
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2140148629
/workspace/coverage/default/48.sram_ctrl_partial_access.1553510859
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.346353103
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1053990310
/workspace/coverage/default/48.sram_ctrl_regwen.3825385143
/workspace/coverage/default/48.sram_ctrl_smoke.3162496665
/workspace/coverage/default/48.sram_ctrl_stress_all.1544161751
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2598242084
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2186247776
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.430751584
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2095020035
/workspace/coverage/default/49.sram_ctrl_alert_test.2210967911
/workspace/coverage/default/49.sram_ctrl_bijection.2741330629
/workspace/coverage/default/49.sram_ctrl_executable.1707676876
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1871007431
/workspace/coverage/default/49.sram_ctrl_max_throughput.879651738
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1073214710
/workspace/coverage/default/49.sram_ctrl_mem_walk.2257630902
/workspace/coverage/default/49.sram_ctrl_multiple_keys.589856325
/workspace/coverage/default/49.sram_ctrl_partial_access.3564039331
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3229506147
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2769415818
/workspace/coverage/default/49.sram_ctrl_regwen.539786320
/workspace/coverage/default/49.sram_ctrl_smoke.3368312590
/workspace/coverage/default/49.sram_ctrl_stress_all.2885502382
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.335030228
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3288425280
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.142997592
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3171284044
/workspace/coverage/default/5.sram_ctrl_alert_test.3871395369
/workspace/coverage/default/5.sram_ctrl_bijection.1833328484
/workspace/coverage/default/5.sram_ctrl_executable.165779977
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3071254813
/workspace/coverage/default/5.sram_ctrl_max_throughput.4146897812
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3545422316
/workspace/coverage/default/5.sram_ctrl_mem_walk.395138767
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4047574808
/workspace/coverage/default/5.sram_ctrl_partial_access.3089488645
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2064665037
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3870424050
/workspace/coverage/default/5.sram_ctrl_regwen.1937807022
/workspace/coverage/default/5.sram_ctrl_smoke.2796904811
/workspace/coverage/default/5.sram_ctrl_stress_all.3849071658
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1039887164
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2902690345
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.229176861
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2102751868
/workspace/coverage/default/6.sram_ctrl_alert_test.1533280141
/workspace/coverage/default/6.sram_ctrl_bijection.234476646
/workspace/coverage/default/6.sram_ctrl_executable.3613749474
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3155592284
/workspace/coverage/default/6.sram_ctrl_max_throughput.2811499401
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1324920453
/workspace/coverage/default/6.sram_ctrl_mem_walk.3553982138
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2950653380
/workspace/coverage/default/6.sram_ctrl_partial_access.2536578212
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.304960569
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4083138901
/workspace/coverage/default/6.sram_ctrl_regwen.2860164597
/workspace/coverage/default/6.sram_ctrl_smoke.2888596462
/workspace/coverage/default/6.sram_ctrl_stress_all.1513804712
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2292300952
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4281967755
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2084771975
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.4100006827
/workspace/coverage/default/7.sram_ctrl_alert_test.1958910814
/workspace/coverage/default/7.sram_ctrl_bijection.2519800523
/workspace/coverage/default/7.sram_ctrl_executable.4090060006
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2572735236
/workspace/coverage/default/7.sram_ctrl_max_throughput.1657112922
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.900669524
/workspace/coverage/default/7.sram_ctrl_mem_walk.1537842832
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1914574378
/workspace/coverage/default/7.sram_ctrl_partial_access.1410240331
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.322381991
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2404593812
/workspace/coverage/default/7.sram_ctrl_regwen.3692819243
/workspace/coverage/default/7.sram_ctrl_smoke.3859568491
/workspace/coverage/default/7.sram_ctrl_stress_all.1609216697
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.552542260
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4184383294
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2041172882
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.265544137
/workspace/coverage/default/8.sram_ctrl_alert_test.113322947
/workspace/coverage/default/8.sram_ctrl_bijection.4076083151
/workspace/coverage/default/8.sram_ctrl_executable.3746706823
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2775289018
/workspace/coverage/default/8.sram_ctrl_max_throughput.3856520494
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2461771441
/workspace/coverage/default/8.sram_ctrl_mem_walk.289845807
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3566715077
/workspace/coverage/default/8.sram_ctrl_partial_access.911022483
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2116617002
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1631881752
/workspace/coverage/default/8.sram_ctrl_regwen.2666599297
/workspace/coverage/default/8.sram_ctrl_smoke.1737652396
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1887531629
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.4292892657
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3375833343
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2759617262
/workspace/coverage/default/9.sram_ctrl_alert_test.4282617854
/workspace/coverage/default/9.sram_ctrl_bijection.3015404684
/workspace/coverage/default/9.sram_ctrl_executable.191456077
/workspace/coverage/default/9.sram_ctrl_lc_escalation.230262283
/workspace/coverage/default/9.sram_ctrl_max_throughput.3210170261
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1176599940
/workspace/coverage/default/9.sram_ctrl_mem_walk.561896772
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3560176674
/workspace/coverage/default/9.sram_ctrl_partial_access.1942242035
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1153935813
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1008341551
/workspace/coverage/default/9.sram_ctrl_regwen.2904312850
/workspace/coverage/default/9.sram_ctrl_smoke.3296994776
/workspace/coverage/default/9.sram_ctrl_stress_all.2616906251
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4285996931
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.673622824
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4072657723



Total test records in report: 1035
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/20.sram_ctrl_multiple_keys.3502802506 Jul 15 06:16:36 PM PDT 24 Jul 15 06:36:47 PM PDT 24 10289308896 ps
T2 /workspace/coverage/default/17.sram_ctrl_mem_walk.1973669655 Jul 15 06:16:22 PM PDT 24 Jul 15 06:20:50 PM PDT 24 8045556404 ps
T3 /workspace/coverage/default/49.sram_ctrl_alert_test.2210967911 Jul 15 06:20:52 PM PDT 24 Jul 15 06:20:53 PM PDT 24 40153935 ps
T4 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1412743034 Jul 15 06:17:44 PM PDT 24 Jul 15 06:17:55 PM PDT 24 1400435220 ps
T5 /workspace/coverage/default/49.sram_ctrl_multiple_keys.589856325 Jul 15 06:20:42 PM PDT 24 Jul 15 06:33:53 PM PDT 24 11375415725 ps
T9 /workspace/coverage/default/48.sram_ctrl_mem_walk.1597956200 Jul 15 06:20:37 PM PDT 24 Jul 15 06:24:01 PM PDT 24 138418906634 ps
T10 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1953436125 Jul 15 06:16:22 PM PDT 24 Jul 15 06:32:41 PM PDT 24 63549083076 ps
T11 /workspace/coverage/default/16.sram_ctrl_max_throughput.152575374 Jul 15 06:16:16 PM PDT 24 Jul 15 06:16:33 PM PDT 24 3156365088 ps
T12 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.606086436 Jul 15 06:17:57 PM PDT 24 Jul 15 06:19:14 PM PDT 24 4811939859 ps
T13 /workspace/coverage/default/36.sram_ctrl_partial_access.2241647239 Jul 15 06:18:29 PM PDT 24 Jul 15 06:19:07 PM PDT 24 5200408640 ps
T25 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3598111836 Jul 15 06:17:32 PM PDT 24 Jul 15 06:18:00 PM PDT 24 2103620927 ps
T48 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.386861324 Jul 15 06:15:59 PM PDT 24 Jul 15 06:19:01 PM PDT 24 12129288609 ps
T45 /workspace/coverage/default/44.sram_ctrl_mem_walk.1783395704 Jul 15 06:19:58 PM PDT 24 Jul 15 06:23:01 PM PDT 24 41422262614 ps
T51 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3201263617 Jul 15 06:16:58 PM PDT 24 Jul 15 06:22:28 PM PDT 24 10277072953 ps
T19 /workspace/coverage/default/41.sram_ctrl_bijection.1340164624 Jul 15 06:19:35 PM PDT 24 Jul 15 06:59:42 PM PDT 24 265059835654 ps
T61 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.1488370117 Jul 15 06:15:40 PM PDT 24 Jul 15 06:19:16 PM PDT 24 3306110351 ps
T14 /workspace/coverage/default/47.sram_ctrl_alert_test.2728375923 Jul 15 06:20:34 PM PDT 24 Jul 15 06:20:35 PM PDT 24 11191701 ps
T46 /workspace/coverage/default/41.sram_ctrl_smoke.2556434412 Jul 15 06:19:35 PM PDT 24 Jul 15 06:19:51 PM PDT 24 3323077950 ps
T79 /workspace/coverage/default/17.sram_ctrl_partial_access.2932744844 Jul 15 06:16:20 PM PDT 24 Jul 15 06:16:34 PM PDT 24 3145077062 ps
T26 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2283173656 Jul 15 06:18:38 PM PDT 24 Jul 15 06:19:10 PM PDT 24 978618367 ps
T27 /workspace/coverage/default/35.sram_ctrl_executable.2107311493 Jul 15 06:18:21 PM PDT 24 Jul 15 06:18:44 PM PDT 24 3656342632 ps
T67 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.908836776 Jul 15 06:19:37 PM PDT 24 Jul 15 06:22:40 PM PDT 24 18895134831 ps
T31 /workspace/coverage/default/20.sram_ctrl_ram_cfg.3750390778 Jul 15 06:16:43 PM PDT 24 Jul 15 06:16:47 PM PDT 24 1352099927 ps
T68 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.4076135138 Jul 15 06:15:29 PM PDT 24 Jul 15 06:17:36 PM PDT 24 1842419955 ps
T69 /workspace/coverage/default/12.sram_ctrl_max_throughput.574189842 Jul 15 06:16:02 PM PDT 24 Jul 15 06:17:17 PM PDT 24 1057368158 ps
T70 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3667222463 Jul 15 06:18:04 PM PDT 24 Jul 15 06:20:04 PM PDT 24 3088453279 ps
T32 /workspace/coverage/default/46.sram_ctrl_ram_cfg.2024861356 Jul 15 06:20:20 PM PDT 24 Jul 15 06:20:24 PM PDT 24 390018402 ps
T71 /workspace/coverage/default/16.sram_ctrl_partial_access.1274985687 Jul 15 06:16:17 PM PDT 24 Jul 15 06:16:40 PM PDT 24 2289882305 ps
T29 /workspace/coverage/default/37.sram_ctrl_executable.2143058343 Jul 15 06:18:51 PM PDT 24 Jul 15 06:45:49 PM PDT 24 9095973196 ps
T47 /workspace/coverage/default/31.sram_ctrl_smoke.2692566100 Jul 15 06:17:57 PM PDT 24 Jul 15 06:18:29 PM PDT 24 751408538 ps
T6 /workspace/coverage/default/40.sram_ctrl_lc_escalation.765989593 Jul 15 06:19:31 PM PDT 24 Jul 15 06:19:57 PM PDT 24 4166192608 ps
T15 /workspace/coverage/default/38.sram_ctrl_alert_test.444325718 Jul 15 06:19:15 PM PDT 24 Jul 15 06:19:17 PM PDT 24 25962495 ps
T30 /workspace/coverage/default/23.sram_ctrl_executable.1902562200 Jul 15 06:16:58 PM PDT 24 Jul 15 06:27:12 PM PDT 24 14856710048 ps
T83 /workspace/coverage/default/4.sram_ctrl_alert_test.1606177662 Jul 15 06:15:34 PM PDT 24 Jul 15 06:15:36 PM PDT 24 42957869 ps
T75 /workspace/coverage/default/35.sram_ctrl_multiple_keys.2085336629 Jul 15 06:18:23 PM PDT 24 Jul 15 06:26:40 PM PDT 24 6294155580 ps
T84 /workspace/coverage/default/45.sram_ctrl_smoke.3818696110 Jul 15 06:19:58 PM PDT 24 Jul 15 06:20:17 PM PDT 24 1659679588 ps
T85 /workspace/coverage/default/11.sram_ctrl_smoke.3612163356 Jul 15 06:15:54 PM PDT 24 Jul 15 06:16:00 PM PDT 24 882571902 ps
T86 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2344835467 Jul 15 06:20:07 PM PDT 24 Jul 15 06:24:24 PM PDT 24 4175668960 ps
T49 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.4217187538 Jul 15 06:20:19 PM PDT 24 Jul 15 06:31:14 PM PDT 24 9280580759 ps
T52 /workspace/coverage/default/49.sram_ctrl_mem_walk.2257630902 Jul 15 06:20:51 PM PDT 24 Jul 15 06:23:19 PM PDT 24 2833017558 ps
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T57 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3545422316 Jul 15 06:15:38 PM PDT 24 Jul 15 06:19:04 PM PDT 24 111131433370 ps
T28 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.112850820 Jul 15 06:16:57 PM PDT 24 Jul 15 06:17:09 PM PDT 24 1123695022 ps
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T81 /workspace/coverage/default/24.sram_ctrl_lc_escalation.3599074498 Jul 15 06:17:04 PM PDT 24 Jul 15 06:17:30 PM PDT 24 15533373909 ps
T101 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.3509956009 Jul 15 06:15:31 PM PDT 24 Jul 15 06:27:49 PM PDT 24 44751348366 ps
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T164 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2258660307 Jul 15 06:20:25 PM PDT 24 Jul 15 06:20:33 PM PDT 24 685487604 ps
T82 /workspace/coverage/default/47.sram_ctrl_stress_all.1771554647 Jul 15 06:20:32 PM PDT 24 Jul 15 07:45:26 PM PDT 24 128529230757 ps
T147 /workspace/coverage/default/32.sram_ctrl_regwen.2872632060 Jul 15 06:18:03 PM PDT 24 Jul 15 06:26:35 PM PDT 24 61647981737 ps
T165 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.1225127239 Jul 15 06:18:00 PM PDT 24 Jul 15 06:37:00 PM PDT 24 50900547251 ps
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T168 /workspace/coverage/default/3.sram_ctrl_lc_escalation.1942991427 Jul 15 06:15:35 PM PDT 24 Jul 15 06:17:35 PM PDT 24 73945227476 ps
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T171 /workspace/coverage/default/11.sram_ctrl_partial_access.2245331593 Jul 15 06:16:00 PM PDT 24 Jul 15 06:16:22 PM PDT 24 1907592905 ps
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T149 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2581539615 Jul 15 06:20:25 PM PDT 24 Jul 15 06:28:05 PM PDT 24 19473099568 ps
T173 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.804034522 Jul 15 06:17:40 PM PDT 24 Jul 15 06:24:19 PM PDT 24 8114187734 ps
T144 /workspace/coverage/default/43.sram_ctrl_regwen.3028587340 Jul 15 06:19:51 PM PDT 24 Jul 15 06:33:32 PM PDT 24 29524509197 ps
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T153 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.202925625 Jul 15 06:20:32 PM PDT 24 Jul 15 06:23:05 PM PDT 24 5206249877 ps
T175 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4072657723 Jul 15 06:15:50 PM PDT 24 Jul 15 06:16:04 PM PDT 24 3463499878 ps
T150 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3428457680 Jul 15 06:17:49 PM PDT 24 Jul 15 06:25:54 PM PDT 24 77147669923 ps
T141 /workspace/coverage/default/18.sram_ctrl_stress_all.3094129452 Jul 15 06:16:30 PM PDT 24 Jul 15 07:00:00 PM PDT 24 243974295022 ps
T176 /workspace/coverage/default/22.sram_ctrl_smoke.42931804 Jul 15 06:16:51 PM PDT 24 Jul 15 06:17:54 PM PDT 24 1093109412 ps
T64 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2563724068 Jul 15 06:16:01 PM PDT 24 Jul 15 06:17:09 PM PDT 24 9819130397 ps
T177 /workspace/coverage/default/25.sram_ctrl_alert_test.1262870381 Jul 15 06:17:22 PM PDT 24 Jul 15 06:17:23 PM PDT 24 22882302 ps
T178 /workspace/coverage/default/9.sram_ctrl_executable.191456077 Jul 15 06:15:51 PM PDT 24 Jul 15 06:29:35 PM PDT 24 34798915586 ps
T179 /workspace/coverage/default/0.sram_ctrl_partial_access.1683376623 Jul 15 06:15:22 PM PDT 24 Jul 15 06:17:13 PM PDT 24 3998386657 ps
T180 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3041299624 Jul 15 06:16:00 PM PDT 24 Jul 15 06:29:47 PM PDT 24 18753154360 ps
T181 /workspace/coverage/default/3.sram_ctrl_alert_test.4123485463 Jul 15 06:15:35 PM PDT 24 Jul 15 06:15:37 PM PDT 24 24584755 ps
T182 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.576468704 Jul 15 06:18:10 PM PDT 24 Jul 15 06:25:37 PM PDT 24 61124778845 ps
T183 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2102751868 Jul 15 06:15:44 PM PDT 24 Jul 15 06:28:00 PM PDT 24 88773084884 ps
T184 /workspace/coverage/default/11.sram_ctrl_executable.667909965 Jul 15 06:15:58 PM PDT 24 Jul 15 06:30:35 PM PDT 24 5867944916 ps
T59 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1895403403 Jul 15 06:18:58 PM PDT 24 Jul 15 06:21:46 PM PDT 24 18634512674 ps
T65 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.4280444350 Jul 15 06:16:03 PM PDT 24 Jul 15 06:18:57 PM PDT 24 23135201371 ps
T53 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1190260672 Jul 15 06:17:04 PM PDT 24 Jul 15 06:17:36 PM PDT 24 13884310099 ps
T185 /workspace/coverage/default/11.sram_ctrl_mem_walk.704573121 Jul 15 06:15:57 PM PDT 24 Jul 15 06:18:46 PM PDT 24 37469788278 ps
T186 /workspace/coverage/default/27.sram_ctrl_partial_access.774119650 Jul 15 06:17:30 PM PDT 24 Jul 15 06:17:47 PM PDT 24 1055731233 ps
T142 /workspace/coverage/default/32.sram_ctrl_stress_all.2266356214 Jul 15 06:18:02 PM PDT 24 Jul 15 06:59:58 PM PDT 24 207707732943 ps
T187 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.2755183677 Jul 15 06:16:50 PM PDT 24 Jul 15 06:21:53 PM PDT 24 15546328314 ps
T188 /workspace/coverage/default/18.sram_ctrl_partial_access.2756388893 Jul 15 06:16:26 PM PDT 24 Jul 15 06:16:53 PM PDT 24 6425403736 ps
T54 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3438614046 Jul 15 06:19:13 PM PDT 24 Jul 15 06:19:58 PM PDT 24 3189255793 ps
T189 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.2616018535 Jul 15 06:18:34 PM PDT 24 Jul 15 06:21:25 PM PDT 24 18816088839 ps
T190 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.2016522701 Jul 15 06:19:07 PM PDT 24 Jul 15 06:27:16 PM PDT 24 36450794193 ps
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T192 /workspace/coverage/default/44.sram_ctrl_smoke.801266156 Jul 15 06:19:59 PM PDT 24 Jul 15 06:20:09 PM PDT 24 3745633882 ps
T193 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.3698323496 Jul 15 06:15:37 PM PDT 24 Jul 15 06:25:16 PM PDT 24 8104831959 ps
T194 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1777222789 Jul 15 06:18:24 PM PDT 24 Jul 15 06:19:03 PM PDT 24 2744174322 ps
T195 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.457418340 Jul 15 06:15:23 PM PDT 24 Jul 15 06:18:53 PM PDT 24 3294145675 ps
T196 /workspace/coverage/default/7.sram_ctrl_regwen.3692819243 Jul 15 06:15:43 PM PDT 24 Jul 15 06:20:53 PM PDT 24 14388624233 ps
T143 /workspace/coverage/default/19.sram_ctrl_executable.239142686 Jul 15 06:16:27 PM PDT 24 Jul 15 06:24:12 PM PDT 24 11100362736 ps
T197 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.2020951491 Jul 15 06:15:38 PM PDT 24 Jul 15 06:16:57 PM PDT 24 10532925019 ps
T198 /workspace/coverage/default/9.sram_ctrl_bijection.3015404684 Jul 15 06:15:48 PM PDT 24 Jul 15 06:58:08 PM PDT 24 168439485036 ps
T199 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1176554832 Jul 15 06:19:23 PM PDT 24 Jul 15 06:20:23 PM PDT 24 1537746379 ps
T200 /workspace/coverage/default/38.sram_ctrl_multiple_keys.2947997169 Jul 15 06:19:00 PM PDT 24 Jul 15 06:38:15 PM PDT 24 16080057957 ps
T201 /workspace/coverage/default/17.sram_ctrl_stress_all.3190507697 Jul 15 06:16:21 PM PDT 24 Jul 15 07:47:44 PM PDT 24 663985812157 ps
T202 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3477961352 Jul 15 06:17:08 PM PDT 24 Jul 15 06:20:47 PM PDT 24 6076778544 ps
T203 /workspace/coverage/default/16.sram_ctrl_bijection.2673419626 Jul 15 06:16:08 PM PDT 24 Jul 15 07:05:23 PM PDT 24 298854213150 ps
T204 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3406546706 Jul 15 06:18:08 PM PDT 24 Jul 15 06:18:19 PM PDT 24 3163686872 ps
T205 /workspace/coverage/default/8.sram_ctrl_executable.3746706823 Jul 15 06:15:51 PM PDT 24 Jul 15 06:27:52 PM PDT 24 34866317583 ps
T206 /workspace/coverage/default/0.sram_ctrl_smoke.3001100263 Jul 15 06:15:25 PM PDT 24 Jul 15 06:17:40 PM PDT 24 5049998721 ps
T207 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.3564697664 Jul 15 06:16:51 PM PDT 24 Jul 15 06:18:57 PM PDT 24 1632083287 ps
T208 /workspace/coverage/default/12.sram_ctrl_regwen.2285076159 Jul 15 06:16:01 PM PDT 24 Jul 15 06:23:57 PM PDT 24 2587049477 ps
T209 /workspace/coverage/default/9.sram_ctrl_stress_all.2616906251 Jul 15 06:15:57 PM PDT 24 Jul 15 07:10:17 PM PDT 24 40790608722 ps
T210 /workspace/coverage/default/21.sram_ctrl_max_throughput.102564225 Jul 15 06:16:51 PM PDT 24 Jul 15 06:18:05 PM PDT 24 2995547854 ps
T211 /workspace/coverage/default/16.sram_ctrl_stress_all.2967017189 Jul 15 06:16:15 PM PDT 24 Jul 15 07:41:19 PM PDT 24 390319022217 ps
T212 /workspace/coverage/default/48.sram_ctrl_bijection.1243472866 Jul 15 06:20:33 PM PDT 24 Jul 15 07:01:11 PM PDT 24 202819688299 ps
T213 /workspace/coverage/default/49.sram_ctrl_regwen.539786320 Jul 15 06:20:49 PM PDT 24 Jul 15 06:46:58 PM PDT 24 75526913240 ps
T214 /workspace/coverage/default/22.sram_ctrl_executable.1158816834 Jul 15 06:16:51 PM PDT 24 Jul 15 06:27:08 PM PDT 24 44248887970 ps
T215 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2245096622 Jul 15 06:15:36 PM PDT 24 Jul 15 06:22:01 PM PDT 24 5639011172 ps
T216 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.696703102 Jul 15 06:17:27 PM PDT 24 Jul 15 06:20:33 PM PDT 24 3993908354 ps
T217 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2426743822 Jul 15 06:16:10 PM PDT 24 Jul 15 06:32:59 PM PDT 24 60418014592 ps
T126 /workspace/coverage/default/30.sram_ctrl_stress_all.2345630827 Jul 15 06:17:55 PM PDT 24 Jul 15 07:37:26 PM PDT 24 254607382733 ps
T218 /workspace/coverage/default/7.sram_ctrl_stress_all.1609216697 Jul 15 06:15:48 PM PDT 24 Jul 15 07:45:20 PM PDT 24 229461403399 ps
T219 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3171284044 Jul 15 06:15:34 PM PDT 24 Jul 15 06:29:54 PM PDT 24 10058738216 ps
T220 /workspace/coverage/default/16.sram_ctrl_smoke.837453149 Jul 15 06:16:10 PM PDT 24 Jul 15 06:17:54 PM PDT 24 2386682117 ps
T221 /workspace/coverage/default/26.sram_ctrl_max_throughput.2024411144 Jul 15 06:17:23 PM PDT 24 Jul 15 06:18:36 PM PDT 24 1024516694 ps
T222 /workspace/coverage/default/18.sram_ctrl_bijection.1910571458 Jul 15 06:16:24 PM PDT 24 Jul 15 06:36:39 PM PDT 24 17749484239 ps
T151 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1794351689 Jul 15 06:17:03 PM PDT 24 Jul 15 06:24:13 PM PDT 24 85106327982 ps
T223 /workspace/coverage/default/29.sram_ctrl_bijection.2143989239 Jul 15 06:17:39 PM PDT 24 Jul 15 06:50:55 PM PDT 24 177154009706 ps
T127 /workspace/coverage/default/2.sram_ctrl_lc_escalation.821532862 Jul 15 06:15:29 PM PDT 24 Jul 15 06:15:47 PM PDT 24 2557010698 ps
T224 /workspace/coverage/default/6.sram_ctrl_alert_test.1533280141 Jul 15 06:15:46 PM PDT 24 Jul 15 06:15:49 PM PDT 24 19936110 ps
T225 /workspace/coverage/default/0.sram_ctrl_executable.2136084003 Jul 15 06:15:27 PM PDT 24 Jul 15 06:25:51 PM PDT 24 16262868976 ps
T226 /workspace/coverage/default/21.sram_ctrl_executable.1910308945 Jul 15 06:16:42 PM PDT 24 Jul 15 06:49:10 PM PDT 24 14209228811 ps
T227 /workspace/coverage/default/0.sram_ctrl_lc_escalation.679432845 Jul 15 06:15:24 PM PDT 24 Jul 15 06:16:18 PM PDT 24 8028762954 ps
T228 /workspace/coverage/default/20.sram_ctrl_partial_access.1661726814 Jul 15 06:16:37 PM PDT 24 Jul 15 06:16:58 PM PDT 24 1353387395 ps
T229 /workspace/coverage/default/9.sram_ctrl_regwen.2904312850 Jul 15 06:15:47 PM PDT 24 Jul 15 06:29:25 PM PDT 24 50703419885 ps
T230 /workspace/coverage/default/8.sram_ctrl_lc_escalation.2775289018 Jul 15 06:15:49 PM PDT 24 Jul 15 06:16:57 PM PDT 24 11009298634 ps
T231 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.1632054833 Jul 15 06:15:27 PM PDT 24 Jul 15 06:23:38 PM PDT 24 12017661514 ps
T232 /workspace/coverage/default/17.sram_ctrl_ram_cfg.863921024 Jul 15 06:16:20 PM PDT 24 Jul 15 06:16:24 PM PDT 24 343950259 ps
T233 /workspace/coverage/default/30.sram_ctrl_multiple_keys.2866983283 Jul 15 06:17:46 PM PDT 24 Jul 15 06:33:13 PM PDT 24 8023549730 ps
T66 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2292300952 Jul 15 06:15:44 PM PDT 24 Jul 15 06:16:15 PM PDT 24 991362834 ps
T55 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.335030228 Jul 15 06:20:49 PM PDT 24 Jul 15 06:21:47 PM PDT 24 7104318932 ps
T234 /workspace/coverage/default/30.sram_ctrl_bijection.1921335178 Jul 15 06:17:50 PM PDT 24 Jul 15 07:00:06 PM PDT 24 110670133446 ps
T235 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.322381991 Jul 15 06:15:43 PM PDT 24 Jul 15 06:19:42 PM PDT 24 77584737264 ps
T236 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2046739555 Jul 15 06:16:42 PM PDT 24 Jul 15 06:25:16 PM PDT 24 9588703869 ps
T237 /workspace/coverage/default/40.sram_ctrl_bijection.396005526 Jul 15 06:19:30 PM PDT 24 Jul 15 06:38:28 PM PDT 24 96264543342 ps
T238 /workspace/coverage/default/20.sram_ctrl_bijection.3227399269 Jul 15 06:16:40 PM PDT 24 Jul 15 06:34:22 PM PDT 24 216067155201 ps
T239 /workspace/coverage/default/11.sram_ctrl_alert_test.3452099635 Jul 15 06:16:00 PM PDT 24 Jul 15 06:16:02 PM PDT 24 26611151 ps
T240 /workspace/coverage/default/49.sram_ctrl_max_throughput.879651738 Jul 15 06:20:44 PM PDT 24 Jul 15 06:23:14 PM PDT 24 1597142855 ps
T241 /workspace/coverage/default/35.sram_ctrl_partial_access.3047866918 Jul 15 06:18:23 PM PDT 24 Jul 15 06:18:48 PM PDT 24 1426529073 ps
T242 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.229176861 Jul 15 06:15:35 PM PDT 24 Jul 15 06:17:18 PM PDT 24 4607512871 ps
T243 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.2124090209 Jul 15 06:19:22 PM PDT 24 Jul 15 06:20:46 PM PDT 24 2617159084 ps
T244 /workspace/coverage/default/4.sram_ctrl_stress_all.3881670136 Jul 15 06:15:39 PM PDT 24 Jul 15 06:37:21 PM PDT 24 379740122960 ps
T245 /workspace/coverage/default/48.sram_ctrl_partial_access.1553510859 Jul 15 06:20:32 PM PDT 24 Jul 15 06:22:14 PM PDT 24 1690880632 ps
T246 /workspace/coverage/default/45.sram_ctrl_executable.2063627377 Jul 15 06:20:07 PM PDT 24 Jul 15 06:33:13 PM PDT 24 27582679696 ps
T247 /workspace/coverage/default/20.sram_ctrl_regwen.3789776845 Jul 15 06:16:49 PM PDT 24 Jul 15 06:19:23 PM PDT 24 4025403865 ps
T128 /workspace/coverage/default/34.sram_ctrl_stress_all.30285031 Jul 15 06:18:15 PM PDT 24 Jul 15 07:00:50 PM PDT 24 195242800711 ps
T248 /workspace/coverage/default/41.sram_ctrl_mem_walk.2560828239 Jul 15 06:19:45 PM PDT 24 Jul 15 06:25:17 PM PDT 24 57706199259 ps
T249 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.355667121 Jul 15 06:19:33 PM PDT 24 Jul 15 06:20:56 PM PDT 24 1456798907 ps
T250 /workspace/coverage/default/37.sram_ctrl_bijection.1232458632 Jul 15 06:18:45 PM PDT 24 Jul 15 06:55:54 PM PDT 24 267443983651 ps
T251 /workspace/coverage/default/15.sram_ctrl_partial_access.2992938302 Jul 15 06:16:08 PM PDT 24 Jul 15 06:16:28 PM PDT 24 1256427627 ps
T252 /workspace/coverage/default/14.sram_ctrl_mem_walk.1860448089 Jul 15 06:16:09 PM PDT 24 Jul 15 06:22:35 PM PDT 24 159045938982 ps
T253 /workspace/coverage/default/29.sram_ctrl_max_throughput.3237037213 Jul 15 06:17:40 PM PDT 24 Jul 15 06:18:27 PM PDT 24 3452398100 ps
T254 /workspace/coverage/default/45.sram_ctrl_partial_access.1152929146 Jul 15 06:20:07 PM PDT 24 Jul 15 06:20:14 PM PDT 24 718749035 ps
T255 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.954313056 Jul 15 06:18:23 PM PDT 24 Jul 15 06:21:38 PM PDT 24 5095664855 ps
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T295 /workspace/coverage/default/11.sram_ctrl_lc_escalation.1781506247 Jul 15 06:15:58 PM PDT 24 Jul 15 06:16:07 PM PDT 24 5747757372 ps
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T297 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3229506147 Jul 15 06:20:43 PM PDT 24 Jul 15 06:28:27 PM PDT 24 18450067403 ps
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T300 /workspace/coverage/default/39.sram_ctrl_alert_test.3488739009 Jul 15 06:19:22 PM PDT 24 Jul 15 06:19:23 PM PDT 24 23066421 ps
T301 /workspace/coverage/default/25.sram_ctrl_executable.75225515 Jul 15 06:17:08 PM PDT 24 Jul 15 06:24:11 PM PDT 24 22968745786 ps
T302 /workspace/coverage/default/4.sram_ctrl_regwen.1812169185 Jul 15 06:15:37 PM PDT 24 Jul 15 06:32:52 PM PDT 24 59549866653 ps
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T304 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2395435960 Jul 15 06:19:35 PM PDT 24 Jul 15 06:24:40 PM PDT 24 12843108513 ps
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T306 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3442103459 Jul 15 06:20:26 PM PDT 24 Jul 15 06:26:51 PM PDT 24 14708555925 ps
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