Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.99 99.19 94.27 99.72 100.00 96.03 99.12 97.62


Total tests in report: 1033
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
73.91 73.91 92.23 92.23 76.54 76.54 92.98 92.98 23.81 23.81 80.33 80.33 94.59 94.59 56.86 56.86 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2510991479
81.41 7.50 94.52 2.29 77.96 1.42 92.98 0.00 66.67 42.86 84.12 3.79 94.74 0.15 58.87 2.01 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2044383310
88.48 7.08 97.47 2.94 83.06 5.09 96.76 3.79 90.48 23.81 90.52 6.40 95.47 0.73 65.63 6.76 /workspace/coverage/default/46.sram_ctrl_stress_all.2875378901
91.75 3.26 98.28 0.82 84.48 1.42 96.76 0.00 100.00 9.52 92.42 1.90 96.05 0.58 74.22 8.59 /workspace/coverage/default/40.sram_ctrl_mem_walk.3583016728
93.54 1.79 98.53 0.25 86.97 2.49 97.80 1.03 100.00 0.00 94.08 1.66 96.05 0.00 81.35 7.13 /workspace/coverage/default/4.sram_ctrl_stress_all.523850910
94.52 0.98 98.69 0.16 87.80 0.83 98.00 0.21 100.00 0.00 94.79 0.71 96.05 0.00 86.29 4.94 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1610901885
95.41 0.90 98.94 0.25 88.63 0.83 98.00 0.00 100.00 0.00 95.50 0.71 96.35 0.29 90.49 4.20 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1195803539
96.12 0.70 99.10 0.16 90.40 1.78 98.76 0.76 100.00 0.00 96.21 0.71 96.93 0.58 91.41 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.307083654
96.38 0.26 99.10 0.00 90.40 0.00 98.76 0.00 100.00 0.00 96.21 0.00 96.93 0.00 93.24 1.83 /workspace/coverage/default/27.sram_ctrl_executable.907746037
96.59 0.21 99.10 0.00 90.40 0.00 98.76 0.00 100.00 0.00 96.21 0.00 96.93 0.00 94.70 1.46 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1157533352
96.78 0.20 99.10 0.00 90.40 0.00 98.83 0.07 100.00 0.00 96.21 0.00 98.25 1.32 94.70 0.00 /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1156515713
96.91 0.13 99.18 0.08 90.40 0.00 99.66 0.83 100.00 0.00 96.21 0.00 98.25 0.00 94.70 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.483923400
97.04 0.13 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.88 94.70 0.00 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3041428509
97.14 0.10 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 95.43 0.73 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2239522171
97.22 0.08 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 95.98 0.55 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4227930282
97.30 0.08 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.53 0.55 /workspace/coverage/default/11.sram_ctrl_stress_all.4203055143
97.38 0.08 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.55 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2284073079
97.44 0.06 99.18 0.00 90.76 0.36 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.00 /workspace/coverage/default/1.sram_ctrl_alert_test.1772751181
97.47 0.03 99.18 0.00 91.00 0.24 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.00 /workspace/coverage/default/16.sram_ctrl_stress_all.1659697876
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1961352762
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3639830132
97.55 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.62 0.18 /workspace/coverage/default/10.sram_ctrl_stress_all.890853806

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.779686805
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1913891493
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1825611088
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1988102950
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1884178382
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1491324814
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2730840078
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2167155935
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.254713176
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3151810092
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4047503124
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1718158395
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.383345312
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2670196029
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.4179933844
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1627226924
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1637860748
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1542854020
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1766732135
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2686118766
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.132141307
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4189651205
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3413488868
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2105106778
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2493963063
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1879791751
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.195240540
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3966916363
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2763964274
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.204204264
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1445369580
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.734320
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3264328180
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1320139728
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3559345764
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1847521087
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3595599366
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2878469524
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.101539347
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3595364827
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2611220518
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3775119799
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3945633032
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.176794463
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2612910743
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2017026076
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2070766948
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3575395256
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3839345768
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.4182647960
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1439891094
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.605746693
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1811289886
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4122627608
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3580820651
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2012300802
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3600083688
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.169478678
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1550815908
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.649530949
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.114044763
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.88675609
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4246233571
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.584006097
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1286460583
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1210040784
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.838326711
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3698407423
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3590626765
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1773117722
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2865794178
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3728426559
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.820549941
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.551698855
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3422091521
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2571783795
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.103439358
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.385907861
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2489524251
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1461359854
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2441860461
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1367226787
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3778661395
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2608589316
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4213432023
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.146354513
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2254262206
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3814323235
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.127156868
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2132396886
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2602097480
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1359680939
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.882133946
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2874028006
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.318797890
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1483832797
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4149779107
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4120453830
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2557962896
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3884131028
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.212976680
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.484506020
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.4289975792
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.803512683
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3784883052
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1898120348
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3526907317
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3432465452
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3735982885
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3488645010
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.330540626
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3056512614
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1151969
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2509954905
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.790515675
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3069826413
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3693088510
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1527707900
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4193907564
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.630322124
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.786452379
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1458332921
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2338419321
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.979463963
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1224154466
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2054032962
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3228891823
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3739295668
/workspace/coverage/default/0.sram_ctrl_alert_test.3026459812
/workspace/coverage/default/0.sram_ctrl_bijection.3495334429
/workspace/coverage/default/0.sram_ctrl_executable.3349876336
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3940458310
/workspace/coverage/default/0.sram_ctrl_max_throughput.4192223959
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.959878391
/workspace/coverage/default/0.sram_ctrl_mem_walk.3117044035
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3808162431
/workspace/coverage/default/0.sram_ctrl_partial_access.2185038362
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1671433770
/workspace/coverage/default/0.sram_ctrl_regwen.2731740275
/workspace/coverage/default/0.sram_ctrl_sec_cm.2666764921
/workspace/coverage/default/0.sram_ctrl_smoke.1556642929
/workspace/coverage/default/0.sram_ctrl_stress_all.2394242217
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2666438252
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3317927497
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2464167335
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2284673617
/workspace/coverage/default/1.sram_ctrl_bijection.3170870328
/workspace/coverage/default/1.sram_ctrl_executable.3537643725
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3782545501
/workspace/coverage/default/1.sram_ctrl_max_throughput.344727818
/workspace/coverage/default/1.sram_ctrl_mem_walk.1315773190
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4023283812
/workspace/coverage/default/1.sram_ctrl_partial_access.1476351021
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1155840453
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2629983097
/workspace/coverage/default/1.sram_ctrl_regwen.817492168
/workspace/coverage/default/1.sram_ctrl_sec_cm.2147354758
/workspace/coverage/default/1.sram_ctrl_smoke.1434617131
/workspace/coverage/default/1.sram_ctrl_stress_all.2633534849
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.194014074
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2845790679
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3828440323
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4107032737
/workspace/coverage/default/10.sram_ctrl_alert_test.4204048293
/workspace/coverage/default/10.sram_ctrl_bijection.2015151295
/workspace/coverage/default/10.sram_ctrl_executable.1087149448
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2954060383
/workspace/coverage/default/10.sram_ctrl_max_throughput.3193732787
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3349827439
/workspace/coverage/default/10.sram_ctrl_mem_walk.2550990076
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1961054706
/workspace/coverage/default/10.sram_ctrl_partial_access.3062200360
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.101495272
/workspace/coverage/default/10.sram_ctrl_ram_cfg.898582851
/workspace/coverage/default/10.sram_ctrl_regwen.2985811652
/workspace/coverage/default/10.sram_ctrl_smoke.1365165720
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.463375755
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3449595944
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2185664386
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3705019945
/workspace/coverage/default/11.sram_ctrl_alert_test.1261641370
/workspace/coverage/default/11.sram_ctrl_bijection.2751065724
/workspace/coverage/default/11.sram_ctrl_executable.944417389
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1016430641
/workspace/coverage/default/11.sram_ctrl_max_throughput.2126509397
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3938875048
/workspace/coverage/default/11.sram_ctrl_mem_walk.3944554374
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4266677448
/workspace/coverage/default/11.sram_ctrl_partial_access.1898412331
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3880551746
/workspace/coverage/default/11.sram_ctrl_ram_cfg.176417418
/workspace/coverage/default/11.sram_ctrl_regwen.2133879207
/workspace/coverage/default/11.sram_ctrl_smoke.54483181
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2303388969
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2902943484
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1344661614
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.4090496527
/workspace/coverage/default/12.sram_ctrl_alert_test.206559212
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/workspace/coverage/default/42.sram_ctrl_stress_all.113380173
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.327173877
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1588694748
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2865108498
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3193076260
/workspace/coverage/default/43.sram_ctrl_alert_test.1147233104
/workspace/coverage/default/43.sram_ctrl_bijection.1260640659
/workspace/coverage/default/43.sram_ctrl_executable.3606591547
/workspace/coverage/default/43.sram_ctrl_lc_escalation.145366324
/workspace/coverage/default/43.sram_ctrl_max_throughput.2362891255
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.509976638
/workspace/coverage/default/43.sram_ctrl_mem_walk.928724159
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3126901585
/workspace/coverage/default/43.sram_ctrl_partial_access.3520290077
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3405456831
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3065900140
/workspace/coverage/default/43.sram_ctrl_regwen.3479530039
/workspace/coverage/default/43.sram_ctrl_smoke.4145918323
/workspace/coverage/default/43.sram_ctrl_stress_all.1591552971
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.799711147
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3986503145
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1712021086
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.645731645
/workspace/coverage/default/44.sram_ctrl_alert_test.606546260
/workspace/coverage/default/44.sram_ctrl_bijection.2134237593
/workspace/coverage/default/44.sram_ctrl_executable.630878776
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1393800721
/workspace/coverage/default/44.sram_ctrl_max_throughput.3702156368
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.389638677
/workspace/coverage/default/44.sram_ctrl_mem_walk.2386646576
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3379549435
/workspace/coverage/default/44.sram_ctrl_partial_access.680794890
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1023847096
/workspace/coverage/default/44.sram_ctrl_regwen.3876805565
/workspace/coverage/default/44.sram_ctrl_smoke.3519391648
/workspace/coverage/default/44.sram_ctrl_stress_all.2973523286
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1430625563
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4153961096
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.620900831
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3957688103
/workspace/coverage/default/45.sram_ctrl_alert_test.767694910
/workspace/coverage/default/45.sram_ctrl_bijection.1043365110
/workspace/coverage/default/45.sram_ctrl_executable.3486096381
/workspace/coverage/default/45.sram_ctrl_lc_escalation.712917501
/workspace/coverage/default/45.sram_ctrl_max_throughput.4144600207
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2226370201
/workspace/coverage/default/45.sram_ctrl_mem_walk.2738557196
/workspace/coverage/default/45.sram_ctrl_multiple_keys.731355724
/workspace/coverage/default/45.sram_ctrl_partial_access.3232251046
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2532428873
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3062039608
/workspace/coverage/default/45.sram_ctrl_regwen.1036085411
/workspace/coverage/default/45.sram_ctrl_smoke.2832872176
/workspace/coverage/default/45.sram_ctrl_stress_all.1083023451
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.958618215
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2518006757
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3452925860
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2488455624
/workspace/coverage/default/46.sram_ctrl_alert_test.760569120
/workspace/coverage/default/46.sram_ctrl_bijection.2534737751
/workspace/coverage/default/46.sram_ctrl_executable.1905596676
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1341759707
/workspace/coverage/default/46.sram_ctrl_max_throughput.82768604
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.754482176
/workspace/coverage/default/46.sram_ctrl_mem_walk.3215864113
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1852102439
/workspace/coverage/default/46.sram_ctrl_partial_access.1589763900
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.720149579
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2334983922
/workspace/coverage/default/46.sram_ctrl_regwen.3823538211
/workspace/coverage/default/46.sram_ctrl_smoke.2628909902
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1136508049
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2905947965
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3223187414
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2746349870
/workspace/coverage/default/47.sram_ctrl_alert_test.4049191591
/workspace/coverage/default/47.sram_ctrl_bijection.795511357
/workspace/coverage/default/47.sram_ctrl_executable.561073872
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3138955978
/workspace/coverage/default/47.sram_ctrl_max_throughput.2724159105
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.131429777
/workspace/coverage/default/47.sram_ctrl_mem_walk.3744153312
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1218431520
/workspace/coverage/default/47.sram_ctrl_partial_access.2797396279
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1005196011
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2249859540
/workspace/coverage/default/47.sram_ctrl_regwen.2017289835
/workspace/coverage/default/47.sram_ctrl_smoke.2677464356
/workspace/coverage/default/47.sram_ctrl_stress_all.2990758800
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2780308864
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.774431156
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.592592179
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2199134049
/workspace/coverage/default/48.sram_ctrl_alert_test.2029097895
/workspace/coverage/default/48.sram_ctrl_bijection.304560168
/workspace/coverage/default/48.sram_ctrl_executable.3681628586
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1687016501
/workspace/coverage/default/48.sram_ctrl_max_throughput.4013965400
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2894976982
/workspace/coverage/default/48.sram_ctrl_mem_walk.3205425089
/workspace/coverage/default/48.sram_ctrl_multiple_keys.238595917
/workspace/coverage/default/48.sram_ctrl_partial_access.3027804372
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3139489314
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3949584956
/workspace/coverage/default/48.sram_ctrl_regwen.1621864748
/workspace/coverage/default/48.sram_ctrl_smoke.4259425527
/workspace/coverage/default/48.sram_ctrl_stress_all.3518665939
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2299981251
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3105098022
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3550380769
/workspace/coverage/default/49.sram_ctrl_alert_test.1114384876
/workspace/coverage/default/49.sram_ctrl_bijection.3772117557
/workspace/coverage/default/49.sram_ctrl_executable.2317030321
/workspace/coverage/default/49.sram_ctrl_lc_escalation.212975659
/workspace/coverage/default/49.sram_ctrl_max_throughput.1807820560
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1877184999
/workspace/coverage/default/49.sram_ctrl_mem_walk.1688145726
/workspace/coverage/default/49.sram_ctrl_multiple_keys.863026931
/workspace/coverage/default/49.sram_ctrl_partial_access.2007697025
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2911204
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3859781277
/workspace/coverage/default/49.sram_ctrl_regwen.2349216489
/workspace/coverage/default/49.sram_ctrl_smoke.51778438
/workspace/coverage/default/49.sram_ctrl_stress_all.3031847202
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1888497455
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3642066276
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3267711674
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.856413112
/workspace/coverage/default/5.sram_ctrl_alert_test.1446011349
/workspace/coverage/default/5.sram_ctrl_bijection.1065533805
/workspace/coverage/default/5.sram_ctrl_executable.1180429319
/workspace/coverage/default/5.sram_ctrl_lc_escalation.800220439
/workspace/coverage/default/5.sram_ctrl_max_throughput.315691976
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1832951298
/workspace/coverage/default/5.sram_ctrl_mem_walk.232269731
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3908977160
/workspace/coverage/default/5.sram_ctrl_partial_access.3359945979
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1825054827
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3545991090
/workspace/coverage/default/5.sram_ctrl_regwen.3906495401
/workspace/coverage/default/5.sram_ctrl_smoke.1887468647
/workspace/coverage/default/5.sram_ctrl_stress_all.3268652983
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.923767670
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3606356425
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1930091574
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2512250538
/workspace/coverage/default/6.sram_ctrl_alert_test.3744080627
/workspace/coverage/default/6.sram_ctrl_bijection.2226978301
/workspace/coverage/default/6.sram_ctrl_executable.3228607997
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1595602048
/workspace/coverage/default/6.sram_ctrl_max_throughput.2652733377
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4038348253
/workspace/coverage/default/6.sram_ctrl_mem_walk.183626693
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1590308507
/workspace/coverage/default/6.sram_ctrl_partial_access.2599451562
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2348709316
/workspace/coverage/default/6.sram_ctrl_ram_cfg.514827170
/workspace/coverage/default/6.sram_ctrl_regwen.2984158399
/workspace/coverage/default/6.sram_ctrl_smoke.3688734429
/workspace/coverage/default/6.sram_ctrl_stress_all.507810322
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3359287723
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.178529718
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.285194930
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1041489752
/workspace/coverage/default/7.sram_ctrl_alert_test.124941886
/workspace/coverage/default/7.sram_ctrl_bijection.1862244340
/workspace/coverage/default/7.sram_ctrl_executable.2316723135
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1234280302
/workspace/coverage/default/7.sram_ctrl_max_throughput.2570899243
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1989782245
/workspace/coverage/default/7.sram_ctrl_mem_walk.548398737
/workspace/coverage/default/7.sram_ctrl_multiple_keys.239182311
/workspace/coverage/default/7.sram_ctrl_partial_access.2245721093
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1989720921
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2376353751
/workspace/coverage/default/7.sram_ctrl_regwen.3354393014
/workspace/coverage/default/7.sram_ctrl_smoke.3647959137
/workspace/coverage/default/7.sram_ctrl_stress_all.760390777
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3944204293
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.18080344
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.873934162
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.424773164
/workspace/coverage/default/8.sram_ctrl_alert_test.2667625096
/workspace/coverage/default/8.sram_ctrl_bijection.920557382
/workspace/coverage/default/8.sram_ctrl_executable.3569564789
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2689388817
/workspace/coverage/default/8.sram_ctrl_max_throughput.1939478237
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1662660898
/workspace/coverage/default/8.sram_ctrl_mem_walk.1855608263
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3507242936
/workspace/coverage/default/8.sram_ctrl_partial_access.849617267
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1278242717
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4172196761
/workspace/coverage/default/8.sram_ctrl_regwen.3425430177
/workspace/coverage/default/8.sram_ctrl_smoke.1060197843
/workspace/coverage/default/8.sram_ctrl_stress_all.106220499
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.646359041
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3348236503
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.38352029
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4208076421
/workspace/coverage/default/9.sram_ctrl_alert_test.2714334603
/workspace/coverage/default/9.sram_ctrl_bijection.993696170
/workspace/coverage/default/9.sram_ctrl_executable.2227332635
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1193158219
/workspace/coverage/default/9.sram_ctrl_max_throughput.4094844933
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1156315391
/workspace/coverage/default/9.sram_ctrl_mem_walk.3342891601
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2502118813
/workspace/coverage/default/9.sram_ctrl_partial_access.1188809308
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3297199012
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2507886210
/workspace/coverage/default/9.sram_ctrl_regwen.676260912
/workspace/coverage/default/9.sram_ctrl_smoke.29940661
/workspace/coverage/default/9.sram_ctrl_stress_all.3458573163
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4275748744
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2268530927
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3362490564



Total test records in report: 1033
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3041428509 Jul 28 06:51:08 PM PDT 24 Jul 28 06:52:24 PM PDT 24 2379649381 ps
T2 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2339086978 Jul 28 06:58:39 PM PDT 24 Jul 28 06:59:53 PM PDT 24 1449448731 ps
T3 /workspace/coverage/default/40.sram_ctrl_mem_walk.3583016728 Jul 28 07:00:05 PM PDT 24 Jul 28 07:06:11 PM PDT 24 62689832513 ps
T4 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1195803539 Jul 28 06:54:14 PM PDT 24 Jul 28 06:59:48 PM PDT 24 50812966652 ps
T5 /workspace/coverage/default/34.sram_ctrl_max_throughput.2463391868 Jul 28 06:58:33 PM PDT 24 Jul 28 06:58:40 PM PDT 24 2781102696 ps
T9 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2510991479 Jul 28 06:57:52 PM PDT 24 Jul 28 06:58:14 PM PDT 24 1473427435 ps
T10 /workspace/coverage/default/40.sram_ctrl_executable.3524815638 Jul 28 07:00:03 PM PDT 24 Jul 28 07:16:10 PM PDT 24 38318472706 ps
T11 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2268530927 Jul 28 06:52:53 PM PDT 24 Jul 28 06:57:00 PM PDT 24 3785965410 ps
T12 /workspace/coverage/default/9.sram_ctrl_mem_walk.3342891601 Jul 28 06:53:01 PM PDT 24 Jul 28 06:58:45 PM PDT 24 74780189338 ps
T13 /workspace/coverage/default/21.sram_ctrl_mem_walk.1462759902 Jul 28 06:55:41 PM PDT 24 Jul 28 07:00:18 PM PDT 24 39395812464 ps
T31 /workspace/coverage/default/8.sram_ctrl_ram_cfg.4172196761 Jul 28 06:52:45 PM PDT 24 Jul 28 06:52:49 PM PDT 24 1467326289 ps
T45 /workspace/coverage/default/39.sram_ctrl_smoke.61396157 Jul 28 06:59:31 PM PDT 24 Jul 28 07:01:19 PM PDT 24 804893760 ps
T50 /workspace/coverage/default/13.sram_ctrl_max_throughput.2493145454 Jul 28 06:53:47 PM PDT 24 Jul 28 06:54:35 PM PDT 24 736765415 ps
T28 /workspace/coverage/default/18.sram_ctrl_executable.3336458336 Jul 28 06:55:02 PM PDT 24 Jul 28 07:03:53 PM PDT 24 39828082214 ps
T59 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.664623137 Jul 28 06:51:26 PM PDT 24 Jul 28 06:52:48 PM PDT 24 11221692332 ps
T6 /workspace/coverage/default/46.sram_ctrl_stress_all.2875378901 Jul 28 07:01:39 PM PDT 24 Jul 28 07:02:45 PM PDT 24 36292405091 ps
T58 /workspace/coverage/default/22.sram_ctrl_mem_walk.3998123094 Jul 28 06:55:55 PM PDT 24 Jul 28 07:00:57 PM PDT 24 14553630947 ps
T60 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.345576454 Jul 28 06:58:21 PM PDT 24 Jul 28 07:04:22 PM PDT 24 30416532220 ps
T20 /workspace/coverage/default/20.sram_ctrl_bijection.3119950996 Jul 28 06:55:19 PM PDT 24 Jul 28 07:15:12 PM PDT 24 17425814338 ps
T81 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.3966448467 Jul 28 06:59:15 PM PDT 24 Jul 28 07:01:19 PM PDT 24 6373156869 ps
T27 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4275748744 Jul 28 06:53:04 PM PDT 24 Jul 28 06:53:19 PM PDT 24 1919420936 ps
T30 /workspace/coverage/default/6.sram_ctrl_executable.3228607997 Jul 28 06:52:17 PM PDT 24 Jul 28 07:05:10 PM PDT 24 58609222604 ps
T29 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.463375755 Jul 28 06:53:12 PM PDT 24 Jul 28 06:53:24 PM PDT 24 1486801467 ps
T21 /workspace/coverage/default/0.sram_ctrl_bijection.3495334429 Jul 28 06:50:43 PM PDT 24 Jul 28 07:24:35 PM PDT 24 75313146736 ps
T82 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3404690263 Jul 28 06:59:00 PM PDT 24 Jul 28 06:59:14 PM PDT 24 1480567473 ps
T109 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3642066276 Jul 28 07:02:10 PM PDT 24 Jul 28 07:06:25 PM PDT 24 19481058777 ps
T143 /workspace/coverage/default/38.sram_ctrl_multiple_keys.3950999891 Jul 28 06:59:26 PM PDT 24 Jul 28 07:25:35 PM PDT 24 150067553868 ps
T152 /workspace/coverage/default/23.sram_ctrl_smoke.3757058827 Jul 28 06:55:58 PM PDT 24 Jul 28 06:56:11 PM PDT 24 712470628 ps
T61 /workspace/coverage/default/23.sram_ctrl_mem_walk.2568149545 Jul 28 06:56:06 PM PDT 24 Jul 28 07:00:55 PM PDT 24 35002516338 ps
T62 /workspace/coverage/default/26.sram_ctrl_mem_walk.2820655561 Jul 28 06:56:52 PM PDT 24 Jul 28 06:59:44 PM PDT 24 28815684003 ps
T49 /workspace/coverage/default/42.sram_ctrl_regwen.2396278309 Jul 28 07:00:34 PM PDT 24 Jul 28 07:12:50 PM PDT 24 20471440462 ps
T153 /workspace/coverage/default/5.sram_ctrl_bijection.1065533805 Jul 28 06:51:57 PM PDT 24 Jul 28 07:32:59 PM PDT 24 504363139343 ps
T150 /workspace/coverage/default/21.sram_ctrl_bijection.2360109260 Jul 28 06:55:33 PM PDT 24 Jul 28 07:24:13 PM PDT 24 103700057733 ps
T147 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.53122295 Jul 28 06:54:32 PM PDT 24 Jul 28 06:55:42 PM PDT 24 945668057 ps
T14 /workspace/coverage/default/37.sram_ctrl_alert_test.926634813 Jul 28 06:59:27 PM PDT 24 Jul 28 06:59:28 PM PDT 24 29824771 ps
T149 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3452925860 Jul 28 07:01:22 PM PDT 24 Jul 28 07:03:41 PM PDT 24 806903344 ps
T110 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2803258592 Jul 28 06:57:11 PM PDT 24 Jul 28 07:02:45 PM PDT 24 6499502894 ps
T148 /workspace/coverage/default/40.sram_ctrl_bijection.855158357 Jul 28 06:59:54 PM PDT 24 Jul 28 07:13:27 PM PDT 24 154658244615 ps
T154 /workspace/coverage/default/25.sram_ctrl_partial_access.327708634 Jul 28 06:56:25 PM PDT 24 Jul 28 06:56:38 PM PDT 24 9904714757 ps
T111 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2284073079 Jul 28 07:01:02 PM PDT 24 Jul 28 07:06:50 PM PDT 24 31869432529 ps
T151 /workspace/coverage/default/36.sram_ctrl_max_throughput.3421662592 Jul 28 06:58:58 PM PDT 24 Jul 28 06:59:59 PM PDT 24 761617308 ps
T155 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2464167335 Jul 28 06:50:48 PM PDT 24 Jul 28 06:52:27 PM PDT 24 1596520827 ps
T112 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2473692800 Jul 28 06:51:35 PM PDT 24 Jul 28 06:55:01 PM PDT 24 16309602755 ps
T137 /workspace/coverage/default/27.sram_ctrl_executable.907746037 Jul 28 06:56:58 PM PDT 24 Jul 28 07:07:45 PM PDT 24 17149985592 ps
T113 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1278563809 Jul 28 06:54:00 PM PDT 24 Jul 28 07:00:17 PM PDT 24 67010332910 ps
T156 /workspace/coverage/default/35.sram_ctrl_partial_access.3651099330 Jul 28 06:58:46 PM PDT 24 Jul 28 06:59:01 PM PDT 24 1084225723 ps
T46 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.1468581745 Jul 28 06:57:47 PM PDT 24 Jul 28 07:10:27 PM PDT 24 13641021392 ps
T144 /workspace/coverage/default/12.sram_ctrl_multiple_keys.2166970740 Jul 28 06:53:31 PM PDT 24 Jul 28 06:58:23 PM PDT 24 12065974139 ps
T71 /workspace/coverage/default/36.sram_ctrl_regwen.3035685680 Jul 28 06:59:01 PM PDT 24 Jul 28 07:11:18 PM PDT 24 69301923832 ps
T114 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.4291671148 Jul 28 06:54:27 PM PDT 24 Jul 28 06:57:49 PM PDT 24 3351344872 ps
T7 /workspace/coverage/default/4.sram_ctrl_stress_all.523850910 Jul 28 06:51:59 PM PDT 24 Jul 28 08:11:19 PM PDT 24 41018361168 ps
T8 /workspace/coverage/default/24.sram_ctrl_lc_escalation.963118403 Jul 28 06:56:16 PM PDT 24 Jul 28 06:57:35 PM PDT 24 136455839528 ps
T25 /workspace/coverage/default/45.sram_ctrl_stress_all.1083023451 Jul 28 07:01:28 PM PDT 24 Jul 28 07:46:59 PM PDT 24 38720917599 ps
T47 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.489227105 Jul 28 06:55:08 PM PDT 24 Jul 28 07:14:13 PM PDT 24 58318945797 ps
T157 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.841901307 Jul 28 06:57:52 PM PDT 24 Jul 28 06:58:34 PM PDT 24 736727255 ps
T158 /workspace/coverage/default/6.sram_ctrl_partial_access.2599451562 Jul 28 06:52:12 PM PDT 24 Jul 28 06:52:55 PM PDT 24 3839948685 ps
T32 /workspace/coverage/default/30.sram_ctrl_ram_cfg.2691372077 Jul 28 06:57:47 PM PDT 24 Jul 28 06:57:51 PM PDT 24 1876479828 ps
T159 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.612008707 Jul 28 06:58:58 PM PDT 24 Jul 28 07:04:28 PM PDT 24 4920205058 ps
T145 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2125090848 Jul 28 06:55:27 PM PDT 24 Jul 28 07:00:33 PM PDT 24 50895539916 ps
T160 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1825054827 Jul 28 06:51:58 PM PDT 24 Jul 28 06:58:04 PM PDT 24 29901252558 ps
T161 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3494798737 Jul 28 06:53:46 PM PDT 24 Jul 28 06:54:19 PM PDT 24 1496314880 ps
T162 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1321159592 Jul 28 06:54:07 PM PDT 24 Jul 28 07:12:06 PM PDT 24 102225217112 ps
T163 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3139489314 Jul 28 07:02:02 PM PDT 24 Jul 28 07:12:16 PM PDT 24 118293396730 ps
T164 /workspace/coverage/default/15.sram_ctrl_bijection.4074724850 Jul 28 06:54:10 PM PDT 24 Jul 28 07:12:41 PM PDT 24 248992499649 ps
T165 /workspace/coverage/default/31.sram_ctrl_partial_access.3320705940 Jul 28 06:57:54 PM PDT 24 Jul 28 06:58:18 PM PDT 24 8179444776 ps
T166 /workspace/coverage/default/47.sram_ctrl_bijection.795511357 Jul 28 07:01:43 PM PDT 24 Jul 28 07:37:40 PM PDT 24 30503134754 ps
T33 /workspace/coverage/default/43.sram_ctrl_ram_cfg.3065900140 Jul 28 07:00:54 PM PDT 24 Jul 28 07:00:58 PM PDT 24 350417282 ps
T15 /workspace/coverage/default/5.sram_ctrl_alert_test.1446011349 Jul 28 06:52:08 PM PDT 24 Jul 28 06:52:09 PM PDT 24 21907304 ps
T22 /workspace/coverage/default/21.sram_ctrl_regwen.351679170 Jul 28 06:55:38 PM PDT 24 Jul 28 07:05:32 PM PDT 24 7507411656 ps
T167 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3862506849 Jul 28 06:59:52 PM PDT 24 Jul 28 07:02:16 PM PDT 24 2311294066 ps
T168 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3223187414 Jul 28 07:01:31 PM PDT 24 Jul 28 07:02:03 PM PDT 24 2899232899 ps
T169 /workspace/coverage/default/37.sram_ctrl_ram_cfg.2667386238 Jul 28 06:59:21 PM PDT 24 Jul 28 06:59:25 PM PDT 24 353863852 ps
T23 /workspace/coverage/default/13.sram_ctrl_regwen.3127022575 Jul 28 06:53:44 PM PDT 24 Jul 28 07:05:25 PM PDT 24 11994954280 ps
T79 /workspace/coverage/default/24.sram_ctrl_stress_all.3890545467 Jul 28 06:56:21 PM PDT 24 Jul 28 08:32:12 PM PDT 24 230706336245 ps
T170 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2688123081 Jul 28 06:54:18 PM PDT 24 Jul 28 06:54:28 PM PDT 24 1404806148 ps
T171 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3063121997 Jul 28 06:51:43 PM PDT 24 Jul 28 06:57:32 PM PDT 24 14156999371 ps
T80 /workspace/coverage/default/32.sram_ctrl_regwen.2383872118 Jul 28 06:58:09 PM PDT 24 Jul 28 07:02:24 PM PDT 24 7583753755 ps
T48 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.3956496118 Jul 28 06:51:48 PM PDT 24 Jul 28 07:10:45 PM PDT 24 17368947091 ps
T16 /workspace/coverage/default/24.sram_ctrl_alert_test.728200126 Jul 28 06:56:22 PM PDT 24 Jul 28 06:56:23 PM PDT 24 15277629 ps
T146 /workspace/coverage/default/7.sram_ctrl_stress_all.760390777 Jul 28 06:52:38 PM PDT 24 Jul 28 07:41:49 PM PDT 24 204135250319 ps
T172 /workspace/coverage/default/35.sram_ctrl_max_throughput.3597366954 Jul 28 06:58:47 PM PDT 24 Jul 28 06:58:54 PM PDT 24 2734106689 ps
T173 /workspace/coverage/default/13.sram_ctrl_multiple_keys.914438973 Jul 28 06:53:42 PM PDT 24 Jul 28 07:13:41 PM PDT 24 8388083646 ps
T174 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3599572424 Jul 28 06:57:59 PM PDT 24 Jul 28 07:14:34 PM PDT 24 32808834749 ps
T97 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.3943136526 Jul 28 06:54:59 PM PDT 24 Jul 28 06:55:24 PM PDT 24 2511245715 ps
T26 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3077227407 Jul 28 06:57:41 PM PDT 24 Jul 28 06:58:56 PM PDT 24 49584333697 ps
T175 /workspace/coverage/default/27.sram_ctrl_ram_cfg.976561541 Jul 28 06:57:04 PM PDT 24 Jul 28 06:57:07 PM PDT 24 707288629 ps
T24 /workspace/coverage/default/18.sram_ctrl_regwen.1058477101 Jul 28 06:55:00 PM PDT 24 Jul 28 07:02:22 PM PDT 24 2797515380 ps
T176 /workspace/coverage/default/39.sram_ctrl_alert_test.904144054 Jul 28 06:59:54 PM PDT 24 Jul 28 06:59:55 PM PDT 24 20355452 ps
T98 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.1642985193 Jul 28 06:51:39 PM PDT 24 Jul 28 07:10:53 PM PDT 24 64351360537 ps
T177 /workspace/coverage/default/20.sram_ctrl_max_throughput.2201821650 Jul 28 06:55:22 PM PDT 24 Jul 28 06:55:44 PM PDT 24 4108095117 ps
T72 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.778627182 Jul 28 06:57:16 PM PDT 24 Jul 28 06:57:38 PM PDT 24 808355514 ps
T141 /workspace/coverage/default/23.sram_ctrl_regwen.2647322938 Jul 28 06:56:07 PM PDT 24 Jul 28 07:11:43 PM PDT 24 118293934059 ps
T178 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1365419216 Jul 28 06:58:02 PM PDT 24 Jul 28 06:59:14 PM PDT 24 1759995911 ps
T54 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1157533352 Jul 28 06:51:45 PM PDT 24 Jul 28 06:52:37 PM PDT 24 8416658053 ps
T63 /workspace/coverage/default/18.sram_ctrl_mem_walk.2725218225 Jul 28 06:55:02 PM PDT 24 Jul 28 06:59:59 PM PDT 24 14188051495 ps
T179 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3297199012 Jul 28 06:52:53 PM PDT 24 Jul 28 06:58:49 PM PDT 24 33595772245 ps
T55 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.4038348253 Jul 28 06:52:25 PM PDT 24 Jul 28 06:54:51 PM PDT 24 3297730443 ps
T76 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1136508049 Jul 28 07:01:38 PM PDT 24 Jul 28 07:01:58 PM PDT 24 478188308 ps
T56 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.131429777 Jul 28 07:01:56 PM PDT 24 Jul 28 07:03:23 PM PDT 24 3590140188 ps
T180 /workspace/coverage/default/24.sram_ctrl_mem_walk.1131974578 Jul 28 06:56:17 PM PDT 24 Jul 28 06:59:00 PM PDT 24 7212796245 ps
T181 /workspace/coverage/default/20.sram_ctrl_smoke.3883921545 Jul 28 06:55:15 PM PDT 24 Jul 28 06:55:32 PM PDT 24 1967536182 ps
T182 /workspace/coverage/default/37.sram_ctrl_partial_access.2228927281 Jul 28 06:59:09 PM PDT 24 Jul 28 06:59:28 PM PDT 24 907048415 ps
T183 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.3349827439 Jul 28 06:53:11 PM PDT 24 Jul 28 06:54:34 PM PDT 24 20337117748 ps
T184 /workspace/coverage/default/21.sram_ctrl_smoke.2339574776 Jul 28 06:55:33 PM PDT 24 Jul 28 06:55:49 PM PDT 24 701603721 ps
T77 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3944204293 Jul 28 06:52:35 PM PDT 24 Jul 28 06:52:52 PM PDT 24 2033684170 ps
T185 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3472392539 Jul 28 06:58:17 PM PDT 24 Jul 28 07:00:09 PM PDT 24 791749450 ps
T186 /workspace/coverage/default/32.sram_ctrl_max_throughput.2003624912 Jul 28 06:57:59 PM PDT 24 Jul 28 06:58:08 PM PDT 24 2536391279 ps
T187 /workspace/coverage/default/13.sram_ctrl_lc_escalation.4019030930 Jul 28 06:53:45 PM PDT 24 Jul 28 06:54:47 PM PDT 24 9673224097 ps
T188 /workspace/coverage/default/20.sram_ctrl_multiple_keys.207281651 Jul 28 06:55:19 PM PDT 24 Jul 28 07:21:23 PM PDT 24 42722550805 ps
T189 /workspace/coverage/default/3.sram_ctrl_bijection.3739889442 Jul 28 06:51:31 PM PDT 24 Jul 28 07:13:42 PM PDT 24 61246297357 ps
T190 /workspace/coverage/default/4.sram_ctrl_lc_escalation.112878247 Jul 28 06:51:48 PM PDT 24 Jul 28 06:52:24 PM PDT 24 23890989835 ps
T191 /workspace/coverage/default/31.sram_ctrl_executable.1490960242 Jul 28 06:57:54 PM PDT 24 Jul 28 06:58:20 PM PDT 24 6536189673 ps
T192 /workspace/coverage/default/15.sram_ctrl_mem_walk.2079187143 Jul 28 06:54:21 PM PDT 24 Jul 28 07:00:13 PM PDT 24 115211154136 ps
T193 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2469427574 Jul 28 06:59:57 PM PDT 24 Jul 28 07:19:20 PM PDT 24 37331755809 ps
T194 /workspace/coverage/default/15.sram_ctrl_ram_cfg.1897365394 Jul 28 06:54:21 PM PDT 24 Jul 28 06:54:24 PM PDT 24 688083267 ps
T195 /workspace/coverage/default/1.sram_ctrl_alert_test.1772751181 Jul 28 06:51:12 PM PDT 24 Jul 28 06:51:12 PM PDT 24 11830700 ps
T196 /workspace/coverage/default/20.sram_ctrl_ram_cfg.615236381 Jul 28 06:55:27 PM PDT 24 Jul 28 06:55:30 PM PDT 24 2798051586 ps
T197 /workspace/coverage/default/17.sram_ctrl_mem_walk.1119000554 Jul 28 06:54:46 PM PDT 24 Jul 28 06:57:25 PM PDT 24 8452096683 ps
T198 /workspace/coverage/default/18.sram_ctrl_partial_access.1945174076 Jul 28 06:54:50 PM PDT 24 Jul 28 06:55:16 PM PDT 24 1715894872 ps
T199 /workspace/coverage/default/2.sram_ctrl_regwen.4016664794 Jul 28 06:51:25 PM PDT 24 Jul 28 07:19:45 PM PDT 24 4363185328 ps
T122 /workspace/coverage/default/8.sram_ctrl_lc_escalation.2689388817 Jul 28 06:52:46 PM PDT 24 Jul 28 06:54:21 PM PDT 24 54420814971 ps
T200 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1930091574 Jul 28 06:52:04 PM PDT 24 Jul 28 06:53:36 PM PDT 24 1587226770 ps
T201 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2797702074 Jul 28 06:56:43 PM PDT 24 Jul 28 07:04:17 PM PDT 24 17947147805 ps
T202 /workspace/coverage/default/32.sram_ctrl_smoke.1084013980 Jul 28 06:58:00 PM PDT 24 Jul 28 06:58:16 PM PDT 24 2745643023 ps
T57 /workspace/coverage/default/5.sram_ctrl_mem_walk.232269731 Jul 28 06:52:02 PM PDT 24 Jul 28 06:54:48 PM PDT 24 10343383205 ps
T203 /workspace/coverage/default/9.sram_ctrl_bijection.993696170 Jul 28 06:52:53 PM PDT 24 Jul 28 07:26:59 PM PDT 24 121571641471 ps
T204 /workspace/coverage/default/41.sram_ctrl_mem_walk.2187696575 Jul 28 07:00:28 PM PDT 24 Jul 28 07:06:25 PM PDT 24 21809891435 ps
T78 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.110058570 Jul 28 07:00:13 PM PDT 24 Jul 28 07:00:56 PM PDT 24 3751806681 ps
T205 /workspace/coverage/default/3.sram_ctrl_partial_access.2967292128 Jul 28 06:51:29 PM PDT 24 Jul 28 06:52:04 PM PDT 24 2145926887 ps
T206 /workspace/coverage/default/38.sram_ctrl_mem_walk.833016053 Jul 28 06:59:31 PM PDT 24 Jul 28 07:01:31 PM PDT 24 2085836512 ps
T207 /workspace/coverage/default/12.sram_ctrl_mem_walk.2929600177 Jul 28 06:53:35 PM PDT 24 Jul 28 06:56:10 PM PDT 24 6928503252 ps
T140 /workspace/coverage/default/10.sram_ctrl_regwen.2985811652 Jul 28 06:53:12 PM PDT 24 Jul 28 07:02:44 PM PDT 24 10945546528 ps
T208 /workspace/coverage/default/14.sram_ctrl_bijection.979543761 Jul 28 06:53:54 PM PDT 24 Jul 28 07:32:09 PM PDT 24 179451604286 ps
T51 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2044383310 Jul 28 07:02:06 PM PDT 24 Jul 28 07:03:17 PM PDT 24 4789400154 ps
T17 /workspace/coverage/default/4.sram_ctrl_sec_cm.307083654 Jul 28 06:51:58 PM PDT 24 Jul 28 06:52:01 PM PDT 24 859832040 ps
T36 /workspace/coverage/default/11.sram_ctrl_regwen.2133879207 Jul 28 06:53:20 PM PDT 24 Jul 28 06:55:52 PM PDT 24 2789359496 ps
T37 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.213256815 Jul 28 07:00:20 PM PDT 24 Jul 28 07:07:12 PM PDT 24 82530375551 ps
T38 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.611019495 Jul 28 06:57:16 PM PDT 24 Jul 28 06:58:52 PM PDT 24 29764240426 ps
T39 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2303388969 Jul 28 06:53:25 PM PDT 24 Jul 28 06:54:18 PM PDT 24 1807704217 ps
T40 /workspace/coverage/default/19.sram_ctrl_alert_test.1602127792 Jul 28 06:55:15 PM PDT 24 Jul 28 06:55:15 PM PDT 24 13082049 ps
T41 /workspace/coverage/default/1.sram_ctrl_partial_access.1476351021 Jul 28 06:51:02 PM PDT 24 Jul 28 06:51:25 PM PDT 24 1934239834 ps
T42 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2144931955 Jul 28 06:58:27 PM PDT 24 Jul 28 07:05:39 PM PDT 24 17365663946 ps
T43 /workspace/coverage/default/31.sram_ctrl_ram_cfg.2564702918 Jul 28 06:57:56 PM PDT 24 Jul 28 06:57:59 PM PDT 24 487875141 ps
T44 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3025987461 Jul 28 07:00:35 PM PDT 24 Jul 28 07:07:41 PM PDT 24 16757831462 ps
T209 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1347346008 Jul 28 06:55:27 PM PDT 24 Jul 28 07:10:24 PM PDT 24 45836433709 ps
T210 /workspace/coverage/default/22.sram_ctrl_bijection.3915789630 Jul 28 06:55:43 PM PDT 24 Jul 28 07:09:46 PM PDT 24 601515633171 ps
T138 /workspace/coverage/default/18.sram_ctrl_stress_all.3071188152 Jul 28 06:54:59 PM PDT 24 Jul 28 07:52:06 PM PDT 24 441023317726 ps
T211 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1793801373 Jul 28 06:54:34 PM PDT 24 Jul 28 06:57:21 PM PDT 24 5117963927 ps
T64 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2124413215 Jul 28 06:55:26 PM PDT 24 Jul 28 06:56:54 PM PDT 24 3075966203 ps
T212 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2199134049 Jul 28 07:02:01 PM PDT 24 Jul 28 07:06:09 PM PDT 24 5896462092 ps
T213 /workspace/coverage/default/36.sram_ctrl_smoke.2583748269 Jul 28 06:58:56 PM PDT 24 Jul 28 06:59:11 PM PDT 24 2090016442 ps
T214 /workspace/coverage/default/8.sram_ctrl_executable.3569564789 Jul 28 06:52:46 PM PDT 24 Jul 28 07:12:40 PM PDT 24 113020408445 ps
T215 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3880551746 Jul 28 06:53:20 PM PDT 24 Jul 28 06:57:10 PM PDT 24 7782157095 ps
T216 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2270238548 Jul 28 06:55:04 PM PDT 24 Jul 28 06:57:25 PM PDT 24 4503329651 ps
T217 /workspace/coverage/default/15.sram_ctrl_executable.12427574 Jul 28 06:54:22 PM PDT 24 Jul 28 07:13:30 PM PDT 24 11971193335 ps
T218 /workspace/coverage/default/38.sram_ctrl_regwen.284791147 Jul 28 06:59:32 PM PDT 24 Jul 28 07:07:11 PM PDT 24 124929636065 ps
T219 /workspace/coverage/default/40.sram_ctrl_smoke.2208493012 Jul 28 06:59:52 PM PDT 24 Jul 28 07:00:05 PM PDT 24 11309961324 ps
T220 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1671433770 Jul 28 06:50:43 PM PDT 24 Jul 28 06:57:29 PM PDT 24 93074407885 ps
T221 /workspace/coverage/default/1.sram_ctrl_regwen.817492168 Jul 28 06:51:06 PM PDT 24 Jul 28 07:23:20 PM PDT 24 25926615434 ps
T222 /workspace/coverage/default/10.sram_ctrl_executable.1087149448 Jul 28 06:53:14 PM PDT 24 Jul 28 06:55:22 PM PDT 24 6440938245 ps
T223 /workspace/coverage/default/15.sram_ctrl_max_throughput.1792953403 Jul 28 06:54:19 PM PDT 24 Jul 28 06:55:41 PM PDT 24 770074398 ps
T224 /workspace/coverage/default/15.sram_ctrl_partial_access.2876336426 Jul 28 06:54:13 PM PDT 24 Jul 28 06:54:50 PM PDT 24 764838103 ps
T225 /workspace/coverage/default/33.sram_ctrl_smoke.4198290778 Jul 28 06:58:14 PM PDT 24 Jul 28 06:58:28 PM PDT 24 1570528994 ps
T65 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.921285715 Jul 28 06:54:04 PM PDT 24 Jul 28 06:55:37 PM PDT 24 5362378225 ps
T226 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1712021086 Jul 28 07:00:49 PM PDT 24 Jul 28 07:01:30 PM PDT 24 780080024 ps
T227 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.1592502089 Jul 28 06:55:26 PM PDT 24 Jul 28 07:00:27 PM PDT 24 19454831320 ps
T228 /workspace/coverage/default/5.sram_ctrl_stress_all.3268652983 Jul 28 06:52:08 PM PDT 24 Jul 28 07:17:14 PM PDT 24 268192482610 ps
T229 /workspace/coverage/default/32.sram_ctrl_bijection.2922074342 Jul 28 06:57:59 PM PDT 24 Jul 28 07:15:11 PM PDT 24 174245016450 ps
T139 /workspace/coverage/default/11.sram_ctrl_stress_all.4203055143 Jul 28 06:53:25 PM PDT 24 Jul 28 08:06:40 PM PDT 24 328144718159 ps
T230 /workspace/coverage/default/4.sram_ctrl_alert_test.294861231 Jul 28 06:51:58 PM PDT 24 Jul 28 06:51:59 PM PDT 24 105659136 ps
T231 /workspace/coverage/default/8.sram_ctrl_stress_all.106220499 Jul 28 06:52:48 PM PDT 24 Jul 28 07:55:23 PM PDT 24 222714481954 ps
T232 /workspace/coverage/default/33.sram_ctrl_executable.2003896443 Jul 28 06:58:21 PM PDT 24 Jul 28 06:59:10 PM PDT 24 5779818154 ps
T233 /workspace/coverage/default/14.sram_ctrl_partial_access.2290506203 Jul 28 06:54:00 PM PDT 24 Jul 28 06:55:36 PM PDT 24 3332403280 ps
T234 /workspace/coverage/default/0.sram_ctrl_ram_cfg.483923400 Jul 28 06:50:47 PM PDT 24 Jul 28 06:50:50 PM PDT 24 2400088963 ps
T235 /workspace/coverage/default/12.sram_ctrl_lc_escalation.832186145 Jul 28 06:53:35 PM PDT 24 Jul 28 06:54:50 PM PDT 24 43154994719 ps
T236 /workspace/coverage/default/12.sram_ctrl_stress_all.2632371827 Jul 28 06:53:36 PM PDT 24 Jul 28 08:46:11 PM PDT 24 2264648647194 ps
T237 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.856413112 Jul 28 06:52:04 PM PDT 24 Jul 28 06:52:37 PM PDT 24 15349449275 ps
T238 /workspace/coverage/default/3.sram_ctrl_executable.4157433191 Jul 28 06:51:39 PM PDT 24 Jul 28 06:55:35 PM PDT 24 43459629646 ps
T239 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2629983097 Jul 28 06:51:06 PM PDT 24 Jul 28 06:51:09 PM PDT 24 680075290 ps
T240 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.1029412494 Jul 28 07:00:29 PM PDT 24 Jul 28 07:09:37 PM PDT 24 40687532393 ps
T241 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.2299981251 Jul 28 07:01:59 PM PDT 24 Jul 28 07:08:37 PM PDT 24 16984363933 ps
T242 /workspace/coverage/default/45.sram_ctrl_smoke.2832872176 Jul 28 07:01:15 PM PDT 24 Jul 28 07:01:23 PM PDT 24 1630089472 ps
T243 /workspace/coverage/default/40.sram_ctrl_multiple_keys.1396110846 Jul 28 06:59:52 PM PDT 24 Jul 28 07:14:49 PM PDT 24 17434157696 ps
T244 /workspace/coverage/default/17.sram_ctrl_alert_test.2746530782 Jul 28 06:54:49 PM PDT 24 Jul 28 06:54:50 PM PDT 24 14519504 ps
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