| T557 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_partial_access_b2b.247705788 |
|
|
Aug 23 02:16:28 PM UTC 24 |
Aug 23 02:24:32 PM UTC 24 |
39922490223 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_max_throughput.2024710304 |
|
|
Aug 23 02:24:33 PM UTC 24 |
Aug 23 02:24:58 PM UTC 24 |
739472564 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_executable.2758729692 |
|
|
Aug 23 02:14:09 PM UTC 24 |
Aug 23 02:25:09 PM UTC 24 |
12528460841 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_throughput_w_partial_write.3806294463 |
|
|
Aug 23 02:24:59 PM UTC 24 |
Aug 23 02:25:09 PM UTC 24 |
712694558 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_stress_pipeline.148697306 |
|
|
Aug 23 02:18:47 PM UTC 24 |
Aug 23 02:25:19 PM UTC 24 |
26326333947 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_lc_escalation.2789989749 |
|
|
Aug 23 02:25:09 PM UTC 24 |
Aug 23 02:25:23 PM UTC 24 |
5875041730 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_bijection.1286119677 |
|
|
Aug 23 01:59:08 PM UTC 24 |
Aug 23 02:25:44 PM UTC 24 |
27409460748 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_ram_cfg.3033810681 |
|
|
Aug 23 02:25:45 PM UTC 24 |
Aug 23 02:25:49 PM UTC 24 |
347025992 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_access_during_key_req.2978741762 |
|
|
Aug 23 02:25:10 PM UTC 24 |
Aug 23 02:26:27 PM UTC 24 |
19210813360 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_executable.733787544 |
|
|
Aug 23 02:20:25 PM UTC 24 |
Aug 23 02:26:28 PM UTC 24 |
21964252950 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_mem_partial_access.763559807 |
|
|
Aug 23 02:26:28 PM UTC 24 |
Aug 23 02:27:23 PM UTC 24 |
1158730496 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.734126845 |
|
|
Aug 23 02:26:29 PM UTC 24 |
Aug 23 02:27:29 PM UTC 24 |
1869285727 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_alert_test.3732837916 |
|
|
Aug 23 02:27:29 PM UTC 24 |
Aug 23 02:27:31 PM UTC 24 |
13231274 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_executable.2720525576 |
|
|
Aug 23 02:17:03 PM UTC 24 |
Aug 23 02:27:54 PM UTC 24 |
18162725482 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_mem_walk.1175469137 |
|
|
Aug 23 02:25:50 PM UTC 24 |
Aug 23 02:28:04 PM UTC 24 |
5483819854 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_smoke.2856263589 |
|
|
Aug 23 02:27:31 PM UTC 24 |
Aug 23 02:28:25 PM UTC 24 |
2761970680 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_pipeline.2887218235 |
|
|
Aug 23 02:23:55 PM UTC 24 |
Aug 23 02:28:43 PM UTC 24 |
8361276004 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_partial_access.4283026114 |
|
|
Aug 23 02:28:44 PM UTC 24 |
Aug 23 02:28:52 PM UTC 24 |
583476087 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_regwen.2676359494 |
|
|
Aug 23 02:20:45 PM UTC 24 |
Aug 23 02:28:54 PM UTC 24 |
7433485226 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_max_throughput.883869693 |
|
|
Aug 23 02:28:55 PM UTC 24 |
Aug 23 02:29:02 PM UTC 24 |
678844234 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_stress_all.4034449660 |
|
|
Aug 23 01:58:40 PM UTC 24 |
Aug 23 02:29:04 PM UTC 24 |
374954880429 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_bijection.865882406 |
|
|
Aug 23 02:07:09 PM UTC 24 |
Aug 23 02:29:10 PM UTC 24 |
21383699556 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_throughput_w_partial_write.3068239087 |
|
|
Aug 23 02:29:04 PM UTC 24 |
Aug 23 02:29:10 PM UTC 24 |
1390253163 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/4.sram_ctrl_stress_all.2147145847 |
|
|
Aug 23 12:59:03 PM UTC 24 |
Aug 23 02:29:38 PM UTC 24 |
466066650070 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_access_during_key_req.3679278936 |
|
|
Aug 23 02:16:58 PM UTC 24 |
Aug 23 02:29:39 PM UTC 24 |
17112340684 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_ram_cfg.3326507647 |
|
|
Aug 23 02:29:40 PM UTC 24 |
Aug 23 02:29:44 PM UTC 24 |
692381555 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_bijection.2387872264 |
|
|
Aug 23 02:18:18 PM UTC 24 |
Aug 23 02:30:22 PM UTC 24 |
24793223340 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_lc_escalation.2634197886 |
|
|
Aug 23 02:29:05 PM UTC 24 |
Aug 23 02:30:26 PM UTC 24 |
51545229314 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_mem_partial_access.492201245 |
|
|
Aug 23 02:30:23 PM UTC 24 |
Aug 23 02:31:20 PM UTC 24 |
4018411002 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_regwen.4273596255 |
|
|
Aug 23 02:25:24 PM UTC 24 |
Aug 23 02:31:23 PM UTC 24 |
3036099256 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_alert_test.4031103252 |
|
|
Aug 23 02:31:24 PM UTC 24 |
Aug 23 02:31:25 PM UTC 24 |
27513793 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_mem_walk.3320482921 |
|
|
Aug 23 02:29:45 PM UTC 24 |
Aug 23 02:31:34 PM UTC 24 |
4039820321 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_smoke.3024555522 |
|
|
Aug 23 02:31:26 PM UTC 24 |
Aug 23 02:31:35 PM UTC 24 |
845617694 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_partial_access_b2b.3462592051 |
|
|
Aug 23 02:24:27 PM UTC 24 |
Aug 23 02:32:00 PM UTC 24 |
25308046398 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1388077259 |
|
|
Aug 23 02:30:26 PM UTC 24 |
Aug 23 02:32:06 PM UTC 24 |
8608448542 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_partial_access.2435935533 |
|
|
Aug 23 02:32:07 PM UTC 24 |
Aug 23 02:32:39 PM UTC 24 |
1801608846 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_bijection.3254115687 |
|
|
Aug 23 02:12:18 PM UTC 24 |
Aug 23 02:32:43 PM UTC 24 |
200120531007 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_pipeline.3709250329 |
|
|
Aug 23 02:28:26 PM UTC 24 |
Aug 23 02:32:56 PM UTC 24 |
11294585457 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_max_throughput.1988982264 |
|
|
Aug 23 02:32:43 PM UTC 24 |
Aug 23 02:33:03 PM UTC 24 |
4158879615 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_throughput_w_partial_write.2354628112 |
|
|
Aug 23 02:32:57 PM UTC 24 |
Aug 23 02:33:06 PM UTC 24 |
1388204085 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_lc_escalation.2132293293 |
|
|
Aug 23 02:33:03 PM UTC 24 |
Aug 23 02:33:21 PM UTC 24 |
2360641856 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_executable.1868037134 |
|
|
Aug 23 02:25:21 PM UTC 24 |
Aug 23 02:33:31 PM UTC 24 |
23816236568 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_multiple_keys.2084437242 |
|
|
Aug 23 02:17:55 PM UTC 24 |
Aug 23 02:33:31 PM UTC 24 |
98831471127 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_ram_cfg.952507383 |
|
|
Aug 23 02:33:32 PM UTC 24 |
Aug 23 02:33:37 PM UTC 24 |
1197694845 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_partial_access_b2b.283630911 |
|
|
Aug 23 02:28:53 PM UTC 24 |
Aug 23 02:33:57 PM UTC 24 |
54154639649 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_all.486239622 |
|
|
Aug 23 02:27:23 PM UTC 24 |
Aug 23 02:34:34 PM UTC 24 |
118972059307 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_regwen.4035116169 |
|
|
Aug 23 02:29:38 PM UTC 24 |
Aug 23 02:34:51 PM UTC 24 |
38035051219 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_pipeline.1652154653 |
|
|
Aug 23 02:32:00 PM UTC 24 |
Aug 23 02:35:26 PM UTC 24 |
6256951624 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_alert_test.2937760682 |
|
|
Aug 23 02:35:26 PM UTC 24 |
Aug 23 02:35:28 PM UTC 24 |
12258723 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_smoke.632790382 |
|
|
Aug 23 02:35:28 PM UTC 24 |
Aug 23 02:35:38 PM UTC 24 |
2412175925 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2041530272 |
|
|
Aug 23 02:34:35 PM UTC 24 |
Aug 23 02:35:42 PM UTC 24 |
1555629653 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_mem_partial_access.873719249 |
|
|
Aug 23 02:33:59 PM UTC 24 |
Aug 23 02:35:51 PM UTC 24 |
3359905651 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_partial_access_b2b.2037379625 |
|
|
Aug 23 02:32:40 PM UTC 24 |
Aug 23 02:36:16 PM UTC 24 |
9869162099 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_stress_all.2664848171 |
|
|
Aug 23 02:11:47 PM UTC 24 |
Aug 23 02:36:19 PM UTC 24 |
45197336735 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_partial_access.3744356078 |
|
|
Aug 23 02:36:17 PM UTC 24 |
Aug 23 02:36:32 PM UTC 24 |
5068177579 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_max_throughput.407721751 |
|
|
Aug 23 02:36:34 PM UTC 24 |
Aug 23 02:36:56 PM UTC 24 |
758528991 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_throughput_w_partial_write.1125631907 |
|
|
Aug 23 02:36:57 PM UTC 24 |
Aug 23 02:37:23 PM UTC 24 |
797598469 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_access_during_key_req.2813330558 |
|
|
Aug 23 02:33:07 PM UTC 24 |
Aug 23 02:37:28 PM UTC 24 |
15560456661 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_multiple_keys.2986297558 |
|
|
Aug 23 02:27:55 PM UTC 24 |
Aug 23 02:38:15 PM UTC 24 |
19217630831 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_mem_walk.3182059719 |
|
|
Aug 23 02:33:37 PM UTC 24 |
Aug 23 02:38:17 PM UTC 24 |
28235493370 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_executable.488142189 |
|
|
Aug 23 02:29:11 PM UTC 24 |
Aug 23 02:38:23 PM UTC 24 |
13451608648 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_ram_cfg.2169778024 |
|
|
Aug 23 02:38:24 PM UTC 24 |
Aug 23 02:38:28 PM UTC 24 |
345872440 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_lc_escalation.910133628 |
|
|
Aug 23 02:37:24 PM UTC 24 |
Aug 23 02:38:31 PM UTC 24 |
12788011584 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_multiple_keys.2787314153 |
|
|
Aug 23 02:23:44 PM UTC 24 |
Aug 23 02:38:55 PM UTC 24 |
52615130821 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3189236515 |
|
|
Aug 23 02:38:56 PM UTC 24 |
Aug 23 02:39:12 PM UTC 24 |
1032835178 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_regwen.430427539 |
|
|
Aug 23 02:38:18 PM UTC 24 |
Aug 23 02:39:59 PM UTC 24 |
1129624349 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_alert_test.69517734 |
|
|
Aug 23 02:40:01 PM UTC 24 |
Aug 23 02:40:02 PM UTC 24 |
39793782 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_smoke.85294979 |
|
|
Aug 23 02:40:03 PM UTC 24 |
Aug 23 02:40:18 PM UTC 24 |
1586065315 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_stress_all.3049196061 |
|
|
Aug 23 01:51:03 PM UTC 24 |
Aug 23 02:40:21 PM UTC 24 |
258886316038 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_mem_partial_access.983120165 |
|
|
Aug 23 02:38:32 PM UTC 24 |
Aug 23 02:41:02 PM UTC 24 |
5235103298 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_mem_walk.3908273121 |
|
|
Aug 23 02:38:29 PM UTC 24 |
Aug 23 02:41:04 PM UTC 24 |
20272278758 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_stress_all.3496379017 |
|
|
Aug 23 01:32:55 PM UTC 24 |
Aug 23 02:41:05 PM UTC 24 |
214168231284 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_pipeline.3396120548 |
|
|
Aug 23 02:35:52 PM UTC 24 |
Aug 23 02:41:16 PM UTC 24 |
5196210844 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_partial_access.502567439 |
|
|
Aug 23 02:41:04 PM UTC 24 |
Aug 23 02:41:19 PM UTC 24 |
981651995 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_throughput_w_partial_write.4014749793 |
|
|
Aug 23 02:41:19 PM UTC 24 |
Aug 23 02:41:34 PM UTC 24 |
2932498495 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_max_throughput.3034757283 |
|
|
Aug 23 02:41:16 PM UTC 24 |
Aug 23 02:41:53 PM UTC 24 |
756387442 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_partial_access_b2b.4042316389 |
|
|
Aug 23 02:36:19 PM UTC 24 |
Aug 23 02:42:04 PM UTC 24 |
14304477502 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_lc_escalation.3980273423 |
|
|
Aug 23 02:41:34 PM UTC 24 |
Aug 23 02:42:29 PM UTC 24 |
35123848844 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_multiple_keys.700262372 |
|
|
Aug 23 02:35:38 PM UTC 24 |
Aug 23 02:42:44 PM UTC 24 |
25191550370 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_ram_cfg.3951844161 |
|
|
Aug 23 02:42:45 PM UTC 24 |
Aug 23 02:42:49 PM UTC 24 |
548553808 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_executable.2347944195 |
|
|
Aug 23 02:33:22 PM UTC 24 |
Aug 23 02:43:12 PM UTC 24 |
58802788316 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_regwen.1751995975 |
|
|
Aug 23 02:33:31 PM UTC 24 |
Aug 23 02:43:33 PM UTC 24 |
61791771919 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_executable.1475593849 |
|
|
Aug 23 02:38:16 PM UTC 24 |
Aug 23 02:43:33 PM UTC 24 |
47277709037 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_bijection.1945907059 |
|
|
Aug 23 02:31:36 PM UTC 24 |
Aug 23 02:43:36 PM UTC 24 |
303287251372 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_alert_test.3124306361 |
|
|
Aug 23 02:43:37 PM UTC 24 |
Aug 23 02:43:39 PM UTC 24 |
33615690 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.436044845 |
|
|
Aug 23 02:43:34 PM UTC 24 |
Aug 23 02:43:44 PM UTC 24 |
291276460 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_smoke.2904154655 |
|
|
Aug 23 02:43:39 PM UTC 24 |
Aug 23 02:43:53 PM UTC 24 |
7448953566 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_bijection.2940971411 |
|
|
Aug 23 02:09:57 PM UTC 24 |
Aug 23 02:44:10 PM UTC 24 |
374947331869 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_pipeline.916994838 |
|
|
Aug 23 02:41:03 PM UTC 24 |
Aug 23 02:44:29 PM UTC 24 |
15689067252 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_mem_walk.2692822372 |
|
|
Aug 23 02:42:50 PM UTC 24 |
Aug 23 02:44:43 PM UTC 24 |
2062938199 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_partial_access.4101344117 |
|
|
Aug 23 02:44:30 PM UTC 24 |
Aug 23 02:44:48 PM UTC 24 |
5450856846 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_max_throughput.668531195 |
|
|
Aug 23 02:44:50 PM UTC 24 |
Aug 23 02:44:59 PM UTC 24 |
687818780 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_throughput_w_partial_write.485685737 |
|
|
Aug 23 02:45:00 PM UTC 24 |
Aug 23 02:45:08 PM UTC 24 |
3392829004 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_partial_access_b2b.3181027070 |
|
|
Aug 23 02:41:06 PM UTC 24 |
Aug 23 02:45:14 PM UTC 24 |
15024500205 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_access_during_key_req.3573124085 |
|
|
Aug 23 02:37:29 PM UTC 24 |
Aug 23 02:45:22 PM UTC 24 |
10776506355 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_mem_partial_access.2748993520 |
|
|
Aug 23 02:43:13 PM UTC 24 |
Aug 23 02:45:36 PM UTC 24 |
12583682700 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_access_during_key_req.1457170503 |
|
|
Aug 23 02:29:11 PM UTC 24 |
Aug 23 02:45:57 PM UTC 24 |
18574528831 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_ram_cfg.218383120 |
|
|
Aug 23 02:45:57 PM UTC 24 |
Aug 23 02:46:01 PM UTC 24 |
1876831773 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_multiple_keys.2452376739 |
|
|
Aug 23 02:31:35 PM UTC 24 |
Aug 23 02:46:05 PM UTC 24 |
22555174794 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_lc_escalation.320279480 |
|
|
Aug 23 02:45:09 PM UTC 24 |
Aug 23 02:46:08 PM UTC 24 |
38582343714 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_pipeline.4027772243 |
|
|
Aug 23 02:44:10 PM UTC 24 |
Aug 23 02:46:12 PM UTC 24 |
2344740620 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1770046352 |
|
|
Aug 23 02:46:08 PM UTC 24 |
Aug 23 02:48:02 PM UTC 24 |
14128749319 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_alert_test.1295025813 |
|
|
Aug 23 02:48:03 PM UTC 24 |
Aug 23 02:48:05 PM UTC 24 |
14628106 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_mem_partial_access.3784765062 |
|
|
Aug 23 02:46:05 PM UTC 24 |
Aug 23 02:48:06 PM UTC 24 |
2635177832 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_bijection.4236279907 |
|
|
Aug 23 02:15:59 PM UTC 24 |
Aug 23 02:48:15 PM UTC 24 |
137970220540 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_smoke.4132919792 |
|
|
Aug 23 02:48:05 PM UTC 24 |
Aug 23 02:48:25 PM UTC 24 |
1590274806 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_executable.3486150593 |
|
|
Aug 23 02:42:05 PM UTC 24 |
Aug 23 02:49:35 PM UTC 24 |
46317545476 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_mem_walk.2012300636 |
|
|
Aug 23 02:46:02 PM UTC 24 |
Aug 23 02:49:44 PM UTC 24 |
7884932390 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_access_during_key_req.3518913212 |
|
|
Aug 23 02:41:55 PM UTC 24 |
Aug 23 02:50:13 PM UTC 24 |
30114001789 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_partial_access.2410374446 |
|
|
Aug 23 02:49:36 PM UTC 24 |
Aug 23 02:50:17 PM UTC 24 |
1176251494 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_max_throughput.2352141805 |
|
|
Aug 23 02:50:14 PM UTC 24 |
Aug 23 02:50:27 PM UTC 24 |
709679928 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_multiple_keys.3862207142 |
|
|
Aug 23 02:40:19 PM UTC 24 |
Aug 23 02:50:29 PM UTC 24 |
79885979819 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_throughput_w_partial_write.3731342943 |
|
|
Aug 23 02:50:18 PM UTC 24 |
Aug 23 02:50:37 PM UTC 24 |
734683301 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_pipeline.176234641 |
|
|
Aug 23 02:48:25 PM UTC 24 |
Aug 23 02:50:41 PM UTC 24 |
6268449173 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_regwen.1602014997 |
|
|
Aug 23 02:42:30 PM UTC 24 |
Aug 23 02:50:47 PM UTC 24 |
10876864475 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_ram_cfg.2482739088 |
|
|
Aug 23 02:50:48 PM UTC 24 |
Aug 23 02:50:52 PM UTC 24 |
363759635 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_partial_access_b2b.681146977 |
|
|
Aug 23 02:44:44 PM UTC 24 |
Aug 23 02:51:11 PM UTC 24 |
29692563291 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_lc_escalation.2037612005 |
|
|
Aug 23 02:50:28 PM UTC 24 |
Aug 23 02:51:17 PM UTC 24 |
8274667893 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_executable.1046759571 |
|
|
Aug 23 02:50:38 PM UTC 24 |
Aug 23 02:51:47 PM UTC 24 |
2054412023 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3468493932 |
|
|
Aug 23 02:51:18 PM UTC 24 |
Aug 23 02:51:49 PM UTC 24 |
1930633818 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_alert_test.3569374804 |
|
|
Aug 23 02:51:50 PM UTC 24 |
Aug 23 02:51:52 PM UTC 24 |
66439863 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_access_during_key_req.1804233027 |
|
|
Aug 23 02:45:15 PM UTC 24 |
Aug 23 02:52:09 PM UTC 24 |
94336001483 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_smoke.2737980813 |
|
|
Aug 23 02:51:52 PM UTC 24 |
Aug 23 02:52:23 PM UTC 24 |
875061523 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_mem_partial_access.611494094 |
|
|
Aug 23 02:51:12 PM UTC 24 |
Aug 23 02:52:24 PM UTC 24 |
10922266091 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_multiple_keys.382902602 |
|
|
Aug 23 02:43:45 PM UTC 24 |
Aug 23 02:53:01 PM UTC 24 |
9400202442 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_regwen.1856043838 |
|
|
Aug 23 02:45:37 PM UTC 24 |
Aug 23 02:53:09 PM UTC 24 |
3233301588 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_partial_access.2341919857 |
|
|
Aug 23 02:53:02 PM UTC 24 |
Aug 23 02:53:56 PM UTC 24 |
2238068063 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_stress_all.1996174618 |
|
|
Aug 23 01:48:41 PM UTC 24 |
Aug 23 02:54:36 PM UTC 24 |
1311968191998 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_max_throughput.124863335 |
|
|
Aug 23 02:53:57 PM UTC 24 |
Aug 23 02:54:50 PM UTC 24 |
3051092070 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_executable.2495510305 |
|
|
Aug 23 02:45:23 PM UTC 24 |
Aug 23 02:55:17 PM UTC 24 |
35254813062 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_throughput_w_partial_write.88172359 |
|
|
Aug 23 02:54:37 PM UTC 24 |
Aug 23 02:55:34 PM UTC 24 |
3123266626 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_lc_escalation.1740000311 |
|
|
Aug 23 02:54:51 PM UTC 24 |
Aug 23 02:55:43 PM UTC 24 |
31501031807 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_bijection.2333927701 |
|
|
Aug 23 02:23:52 PM UTC 24 |
Aug 23 02:56:09 PM UTC 24 |
219758929078 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_ram_cfg.11457753 |
|
|
Aug 23 02:56:09 PM UTC 24 |
Aug 23 02:56:14 PM UTC 24 |
1467029694 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_pipeline.1753546550 |
|
|
Aug 23 02:52:25 PM UTC 24 |
Aug 23 02:57:12 PM UTC 24 |
9679294147 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_all.1737348372 |
|
|
Aug 23 02:31:20 PM UTC 24 |
Aug 23 02:57:21 PM UTC 24 |
103918758093 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_multiple_keys.1181515938 |
|
|
Aug 23 02:48:07 PM UTC 24 |
Aug 23 02:57:38 PM UTC 24 |
71981969829 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.641107236 |
|
|
Aug 23 02:57:22 PM UTC 24 |
Aug 23 02:57:42 PM UTC 24 |
2434187807 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_mem_walk.2714077812 |
|
|
Aug 23 02:50:53 PM UTC 24 |
Aug 23 02:57:43 PM UTC 24 |
345213500412 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_alert_test.4285267881 |
|
|
Aug 23 02:57:43 PM UTC 24 |
Aug 23 02:57:45 PM UTC 24 |
25567382 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_partial_access_b2b.1391376837 |
|
|
Aug 23 02:49:44 PM UTC 24 |
Aug 23 02:57:50 PM UTC 24 |
86199437482 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_bijection.1501918919 |
|
|
Aug 23 02:28:05 PM UTC 24 |
Aug 23 02:57:56 PM UTC 24 |
90233664308 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_mem_partial_access.1446748292 |
|
|
Aug 23 02:57:13 PM UTC 24 |
Aug 23 02:58:16 PM UTC 24 |
1430278133 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_all.3298823452 |
|
|
Aug 23 02:34:52 PM UTC 24 |
Aug 23 02:58:23 PM UTC 24 |
344622540302 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_smoke.1258555939 |
|
|
Aug 23 02:57:44 PM UTC 24 |
Aug 23 02:58:47 PM UTC 24 |
962204004 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_max_throughput.2176197124 |
|
|
Aug 23 02:58:47 PM UTC 24 |
Aug 23 02:58:56 PM UTC 24 |
2802834201 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_partial_access.2364678985 |
|
|
Aug 23 02:58:16 PM UTC 24 |
Aug 23 02:59:04 PM UTC 24 |
940139198 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_partial_access_b2b.720044888 |
|
|
Aug 23 02:53:10 PM UTC 24 |
Aug 23 02:59:07 PM UTC 24 |
67666154222 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_stress_all.545631753 |
|
|
Aug 23 01:40:53 PM UTC 24 |
Aug 23 02:59:34 PM UTC 24 |
390324552036 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_lc_escalation.2592358802 |
|
|
Aug 23 02:59:04 PM UTC 24 |
Aug 23 02:59:50 PM UTC 24 |
15670772982 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_mem_walk.1363767034 |
|
|
Aug 23 02:56:15 PM UTC 24 |
Aug 23 02:59:56 PM UTC 24 |
20737196316 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_throughput_w_partial_write.3803023507 |
|
|
Aug 23 02:58:56 PM UTC 24 |
Aug 23 02:59:57 PM UTC 24 |
3273683567 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_ram_cfg.1770466990 |
|
|
Aug 23 02:59:57 PM UTC 24 |
Aug 23 03:00:01 PM UTC 24 |
599896454 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_regwen.105712824 |
|
|
Aug 23 02:50:42 PM UTC 24 |
Aug 23 03:00:26 PM UTC 24 |
33267835870 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_multiple_keys.3933986600 |
|
|
Aug 23 02:52:09 PM UTC 24 |
Aug 23 03:00:32 PM UTC 24 |
9898270840 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_executable.1517341957 |
|
|
Aug 23 02:55:34 PM UTC 24 |
Aug 23 03:01:25 PM UTC 24 |
14925134941 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_alert_test.2453833419 |
|
|
Aug 23 03:01:26 PM UTC 24 |
Aug 23 03:01:28 PM UTC 24 |
10502469 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_smoke.3833544635 |
|
|
Aug 23 03:01:29 PM UTC 24 |
Aug 23 03:01:38 PM UTC 24 |
8664324008 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_regwen.593883665 |
|
|
Aug 23 02:55:43 PM UTC 24 |
Aug 23 03:01:49 PM UTC 24 |
36860672524 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_access_during_key_req.312796143 |
|
|
Aug 23 02:50:30 PM UTC 24 |
Aug 23 03:01:53 PM UTC 24 |
77584422413 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_mem_partial_access.4122853427 |
|
|
Aug 23 03:00:10 PM UTC 24 |
Aug 23 03:02:00 PM UTC 24 |
6367321450 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_partial_access.3300607026 |
|
|
Aug 23 03:01:53 PM UTC 24 |
Aug 23 03:02:08 PM UTC 24 |
1672006082 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_stress_pipeline.3742719955 |
|
|
Aug 23 02:57:56 PM UTC 24 |
Aug 23 03:02:28 PM UTC 24 |
45933959597 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/6.sram_ctrl_stress_all.1545495700 |
|
|
Aug 23 01:03:57 PM UTC 24 |
Aug 23 03:02:31 PM UTC 24 |
2059675673774 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_max_throughput.1729726328 |
|
|
Aug 23 03:02:09 PM UTC 24 |
Aug 23 03:02:46 PM UTC 24 |
2702524046 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_executable.2259847523 |
|
|
Aug 23 02:59:35 PM UTC 24 |
Aug 23 03:02:52 PM UTC 24 |
15912927902 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_lc_escalation.2912887979 |
|
|
Aug 23 03:02:32 PM UTC 24 |
Aug 23 03:03:12 PM UTC 24 |
13628089163 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_throughput_w_partial_write.2369087266 |
|
|
Aug 23 03:02:30 PM UTC 24 |
Aug 23 03:03:25 PM UTC 24 |
15580099563 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_ram_cfg.455277003 |
|
|
Aug 23 03:03:26 PM UTC 24 |
Aug 23 03:03:31 PM UTC 24 |
1342836715 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_stress_all.961724198 |
|
|
Aug 23 02:09:28 PM UTC 24 |
Aug 23 03:03:35 PM UTC 24 |
173518751542 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_mem_walk.1785580600 |
|
|
Aug 23 02:59:58 PM UTC 24 |
Aug 23 03:04:03 PM UTC 24 |
5315912971 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_pipeline.3070965830 |
|
|
Aug 23 03:01:49 PM UTC 24 |
Aug 23 03:04:12 PM UTC 24 |
10691348791 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1834552721 |
|
|
Aug 23 03:04:04 PM UTC 24 |
Aug 23 03:04:15 PM UTC 24 |
3057901553 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_alert_test.278967748 |
|
|
Aug 23 03:04:15 PM UTC 24 |
Aug 23 03:04:17 PM UTC 24 |
25964123 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_smoke.3496633294 |
|
|
Aug 23 03:04:17 PM UTC 24 |
Aug 23 03:04:30 PM UTC 24 |
3025154844 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_access_during_key_req.2385889666 |
|
|
Aug 23 02:55:17 PM UTC 24 |
Aug 23 03:04:33 PM UTC 24 |
10375449185 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_mem_partial_access.3628650444 |
|
|
Aug 23 03:03:35 PM UTC 24 |
Aug 23 03:04:42 PM UTC 24 |
1448720921 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_regwen.2502586147 |
|
|
Aug 23 02:59:51 PM UTC 24 |
Aug 23 03:04:49 PM UTC 24 |
8331662530 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_access_during_key_req.2340321453 |
|
|
Aug 23 03:02:47 PM UTC 24 |
Aug 23 03:04:55 PM UTC 24 |
12004533609 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_partial_access.1878210669 |
|
|
Aug 23 03:04:50 PM UTC 24 |
Aug 23 03:05:44 PM UTC 24 |
16421583257 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_mem_walk.1175942761 |
|
|
Aug 23 03:03:31 PM UTC 24 |
Aug 23 03:05:54 PM UTC 24 |
14400201778 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_regwen.3197208575 |
|
|
Aug 23 03:03:13 PM UTC 24 |
Aug 23 03:06:02 PM UTC 24 |
17504417733 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_max_throughput.1571792055 |
|
|
Aug 23 03:05:45 PM UTC 24 |
Aug 23 03:06:14 PM UTC 24 |
2920388898 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_throughput_w_partial_write.3746081578 |
|
|
Aug 23 03:05:55 PM UTC 24 |
Aug 23 03:06:27 PM UTC 24 |
767807413 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_access_during_key_req.2805791242 |
|
|
Aug 23 02:59:07 PM UTC 24 |
Aug 23 03:06:29 PM UTC 24 |
22348108459 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_lc_escalation.2286526414 |
|
|
Aug 23 03:06:03 PM UTC 24 |
Aug 23 03:07:09 PM UTC 24 |
36921578566 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_ram_cfg.2484920664 |
|
|
Aug 23 03:07:10 PM UTC 24 |
Aug 23 03:07:14 PM UTC 24 |
349195843 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_partial_access_b2b.2969254401 |
|
|
Aug 23 02:58:24 PM UTC 24 |
Aug 23 03:07:16 PM UTC 24 |
128673335497 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_partial_access_b2b.2535756234 |
|
|
Aug 23 03:04:56 PM UTC 24 |
Aug 23 03:08:24 PM UTC 24 |
19298247382 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_stress_all.3839847526 |
|
|
Aug 23 02:06:31 PM UTC 24 |
Aug 23 03:08:25 PM UTC 24 |
178263745223 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_mem_partial_access.2368344322 |
|
|
Aug 23 03:07:17 PM UTC 24 |
Aug 23 03:08:34 PM UTC 24 |
11681462480 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_alert_test.2101602895 |
|
|
Aug 23 03:08:35 PM UTC 24 |
Aug 23 03:08:37 PM UTC 24 |
33790833 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_partial_access_b2b.4267072766 |
|
|
Aug 23 03:02:01 PM UTC 24 |
Aug 23 03:08:52 PM UTC 24 |
7363909386 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_executable.2100772271 |
|
|
Aug 23 03:02:53 PM UTC 24 |
Aug 23 03:08:56 PM UTC 24 |
58018148088 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3669697713 |
|
|
Aug 23 03:08:25 PM UTC 24 |
Aug 23 03:09:06 PM UTC 24 |
6713040986 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_pipeline.3566999637 |
|
|
Aug 23 03:04:43 PM UTC 24 |
Aug 23 03:09:11 PM UTC 24 |
4437750677 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_multiple_keys.1436810931 |
|
|
Aug 23 03:04:31 PM UTC 24 |
Aug 23 03:09:32 PM UTC 24 |
10805603600 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_partial_access.3278615348 |
|
|
Aug 23 03:09:11 PM UTC 24 |
Aug 23 03:09:33 PM UTC 24 |
1477007188 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_regwen.4214361359 |
|
|
Aug 23 03:06:30 PM UTC 24 |
Aug 23 03:09:38 PM UTC 24 |
12481685720 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_smoke.1392051760 |
|
|
Aug 23 03:08:37 PM UTC 24 |
Aug 23 03:09:39 PM UTC 24 |
14543356157 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_mem_walk.3778852850 |
|
|
Aug 23 03:07:15 PM UTC 24 |
Aug 23 03:09:45 PM UTC 24 |
9076394686 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_bijection.1577000666 |
|
|
Aug 23 02:35:43 PM UTC 24 |
Aug 23 03:09:58 PM UTC 24 |
386779622545 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_max_throughput.837853357 |
|
|
Aug 23 03:09:35 PM UTC 24 |
Aug 23 03:10:04 PM UTC 24 |
764324054 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_bijection.2847197573 |
|
|
Aug 23 02:43:54 PM UTC 24 |
Aug 23 03:10:20 PM UTC 24 |
86573308076 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_ram_cfg.4058557252 |
|
|
Aug 23 03:10:21 PM UTC 24 |
Aug 23 03:10:25 PM UTC 24 |
1040348525 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_access_during_key_req.2166097545 |
|
|
Aug 23 03:09:46 PM UTC 24 |
Aug 23 03:10:30 PM UTC 24 |
4251756873 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_throughput_w_partial_write.3667887076 |
|
|
Aug 23 03:09:39 PM UTC 24 |
Aug 23 03:10:38 PM UTC 24 |
2301819862 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_lc_escalation.597848962 |
|
|
Aug 23 03:09:40 PM UTC 24 |
Aug 23 03:10:39 PM UTC 24 |
11623894299 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_executable.2196146730 |
|
|
Aug 23 03:06:27 PM UTC 24 |
Aug 23 03:10:40 PM UTC 24 |
3286882444 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_alert_test.3795872899 |
|
|
Aug 23 03:10:41 PM UTC 24 |
Aug 23 03:10:43 PM UTC 24 |
24002617 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_smoke.4118498906 |
|
|
Aug 23 03:10:43 PM UTC 24 |
Aug 23 03:10:53 PM UTC 24 |
873067021 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_pipeline.2477962594 |
|
|
Aug 23 03:09:06 PM UTC 24 |
Aug 23 03:11:43 PM UTC 24 |
5049503253 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_mem_partial_access.1937819394 |
|
|
Aug 23 03:10:31 PM UTC 24 |
Aug 23 03:11:45 PM UTC 24 |
17334516139 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.245703104 |
|
|
Aug 23 03:10:39 PM UTC 24 |
Aug 23 03:11:52 PM UTC 24 |
2397498437 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_partial_access.3715650605 |
|
|
Aug 23 03:11:53 PM UTC 24 |
Aug 23 03:12:16 PM UTC 24 |
15499188126 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_access_during_key_req.3020911220 |
|
|
Aug 23 03:06:14 PM UTC 24 |
Aug 23 03:12:45 PM UTC 24 |
30310508603 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_partial_access_b2b.4217631185 |
|
|
Aug 23 03:09:32 PM UTC 24 |
Aug 23 03:13:05 PM UTC 24 |
4896640750 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_max_throughput.2996630222 |
|
|
Aug 23 03:12:46 PM UTC 24 |
Aug 23 03:13:19 PM UTC 24 |
1502679566 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_throughput_w_partial_write.1621809583 |
|
|
Aug 23 03:13:06 PM UTC 24 |
Aug 23 03:13:27 PM UTC 24 |
760407929 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_bijection.1195675827 |
|
|
Aug 23 02:52:23 PM UTC 24 |
Aug 23 03:13:43 PM UTC 24 |
22477057097 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_bijection.1398727583 |
|
|
Aug 23 02:40:22 PM UTC 24 |
Aug 23 03:14:00 PM UTC 24 |
105501426321 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_multiple_keys.3109091037 |
|
|
Aug 23 03:01:29 PM UTC 24 |
Aug 23 03:14:34 PM UTC 24 |
82102090278 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_pipeline.1255443712 |
|
|
Aug 23 03:11:46 PM UTC 24 |
Aug 23 03:14:36 PM UTC 24 |
35628656662 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_ram_cfg.1706306428 |
|
|
Aug 23 03:14:35 PM UTC 24 |
Aug 23 03:14:39 PM UTC 24 |
1403356664 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_multiple_keys.3870541191 |
|
|
Aug 23 02:57:45 PM UTC 24 |
Aug 23 03:14:50 PM UTC 24 |
48013005467 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_lc_escalation.1231039427 |
|
|
Aug 23 03:13:20 PM UTC 24 |
Aug 23 03:14:52 PM UTC 24 |
93900750335 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_mem_walk.2921693741 |
|
|
Aug 23 03:10:26 PM UTC 24 |
Aug 23 03:15:05 PM UTC 24 |
13973509637 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_alert_test.2921206944 |
|
|
Aug 23 03:15:06 PM UTC 24 |
Aug 23 03:15:08 PM UTC 24 |
21559128 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.96921376 |
|
|
Aug 23 03:14:51 PM UTC 24 |
Aug 23 03:15:27 PM UTC 24 |
2494221096 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_smoke.754957979 |
|
|
Aug 23 03:15:09 PM UTC 24 |
Aug 23 03:15:37 PM UTC 24 |
4234173118 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_mem_partial_access.3882470442 |
|
|
Aug 23 03:14:40 PM UTC 24 |
Aug 23 03:16:44 PM UTC 24 |
4959213044 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_mem_walk.1431281294 |
|
|
Aug 23 03:14:37 PM UTC 24 |
Aug 23 03:16:59 PM UTC 24 |
15693657438 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_partial_access.2480617450 |
|
|
Aug 23 03:16:59 PM UTC 24 |
Aug 23 03:17:16 PM UTC 24 |
4990184473 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_multiple_keys.1874703512 |
|
|
Aug 23 03:10:53 PM UTC 24 |
Aug 23 03:17:19 PM UTC 24 |
7207718034 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_regwen.3607645758 |
|
|
Aug 23 03:10:04 PM UTC 24 |
Aug 23 03:17:53 PM UTC 24 |
53004264087 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_throughput_w_partial_write.95012621 |
|
|
Aug 23 03:17:54 PM UTC 24 |
Aug 23 03:18:07 PM UTC 24 |
723295955 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_max_throughput.852628713 |
|
|
Aug 23 03:17:20 PM UTC 24 |
Aug 23 03:18:18 PM UTC 24 |
3058653249 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_lc_escalation.524131191 |
|
|
Aug 23 03:18:08 PM UTC 24 |
Aug 23 03:19:14 PM UTC 24 |
36011578236 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_regwen.1853628683 |
|
|
Aug 23 03:14:00 PM UTC 24 |
Aug 23 03:19:15 PM UTC 24 |
11017645075 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_bijection.525218134 |
|
|
Aug 23 03:01:38 PM UTC 24 |
Aug 23 03:19:56 PM UTC 24 |
203155707722 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_ram_cfg.3338294299 |
|
|
Aug 23 03:19:57 PM UTC 24 |
Aug 23 03:20:02 PM UTC 24 |
1163676500 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_multiple_keys.1014543179 |
|
|
Aug 23 03:08:52 PM UTC 24 |
Aug 23 03:20:23 PM UTC 24 |
43139292031 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_all.282659157 |
|
|
Aug 23 03:04:13 PM UTC 24 |
Aug 23 03:20:49 PM UTC 24 |
17999366482 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_partial_access_b2b.912129065 |
|
|
Aug 23 03:12:17 PM UTC 24 |
Aug 23 03:20:57 PM UTC 24 |
141444243191 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_pipeline.2634155202 |
|
|
Aug 23 03:16:45 PM UTC 24 |
Aug 23 03:20:59 PM UTC 24 |
25109299759 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_alert_test.3364006771 |
|
|
Aug 23 03:21:00 PM UTC 24 |
Aug 23 03:21:01 PM UTC 24 |
41295739 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_smoke.554821945 |
|
|
Aug 23 03:21:02 PM UTC 24 |
Aug 23 03:21:20 PM UTC 24 |
5388097521 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.574169782 |
|
|
Aug 23 03:20:50 PM UTC 24 |
Aug 23 03:21:56 PM UTC 24 |
6254020234 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_partial_access_b2b.621265271 |
|
|
Aug 23 03:17:18 PM UTC 24 |
Aug 23 03:22:21 PM UTC 24 |
31422523364 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_22/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_executable.455897466 |
|
|
Aug 23 03:19:14 PM UTC 24 |
Aug 23 03:22:53 PM UTC 24 |
7841239908 ps |