| T550 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_pipeline.246522927 |
|
|
Aug 29 01:48:48 AM UTC 24 |
Aug 29 01:52:40 AM UTC 24 |
7030015674 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_bijection.554633389 |
|
|
Aug 29 01:07:42 AM UTC 24 |
Aug 29 01:53:13 AM UTC 24 |
101317992272 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_max_throughput.3575959319 |
|
|
Aug 29 01:51:53 AM UTC 24 |
Aug 29 01:53:34 AM UTC 24 |
3210885531 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_ram_cfg.954746702 |
|
|
Aug 29 01:53:35 AM UTC 24 |
Aug 29 01:53:42 AM UTC 24 |
346843039 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_multiple_keys.364532863 |
|
|
Aug 29 01:41:29 AM UTC 24 |
Aug 29 01:54:00 AM UTC 24 |
25755868874 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_regwen.1668206332 |
|
|
Aug 29 01:43:51 AM UTC 24 |
Aug 29 01:54:13 AM UTC 24 |
19743246938 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_mem_partial_access.1571958038 |
|
|
Aug 29 01:50:42 AM UTC 24 |
Aug 29 01:54:27 AM UTC 24 |
5139617844 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_bijection.2998475852 |
|
|
Aug 29 01:30:28 AM UTC 24 |
Aug 29 01:54:41 AM UTC 24 |
58434801338 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_alert_test.429650368 |
|
|
Aug 29 01:54:43 AM UTC 24 |
Aug 29 01:54:45 AM UTC 24 |
31658193 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_partial_access_b2b.807509616 |
|
|
Aug 29 01:51:53 AM UTC 24 |
Aug 29 01:55:02 AM UTC 24 |
9832859459 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_bijection.2115892215 |
|
|
Aug 29 01:20:10 AM UTC 24 |
Aug 29 01:55:13 AM UTC 24 |
95772991206 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1513623019 |
|
|
Aug 29 01:54:14 AM UTC 24 |
Aug 29 01:55:21 AM UTC 24 |
7443100070 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_smoke.1418142365 |
|
|
Aug 29 01:54:46 AM UTC 24 |
Aug 29 01:55:22 AM UTC 24 |
3036006756 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_stress_all.487599717 |
|
|
Aug 29 01:07:27 AM UTC 24 |
Aug 29 01:55:35 AM UTC 24 |
52852087991 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_partial_access_b2b.2280313401 |
|
|
Aug 29 01:45:14 AM UTC 24 |
Aug 29 01:55:48 AM UTC 24 |
64730015502 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_mem_partial_access.1651462557 |
|
|
Aug 29 01:54:00 AM UTC 24 |
Aug 29 01:55:57 AM UTC 24 |
6269916314 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_partial_access.2905290151 |
|
|
Aug 29 01:55:23 AM UTC 24 |
Aug 29 01:55:58 AM UTC 24 |
4666924081 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_max_throughput.2562668991 |
|
|
Aug 29 01:55:49 AM UTC 24 |
Aug 29 01:56:14 AM UTC 24 |
706676944 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_lc_escalation.1538177078 |
|
|
Aug 29 01:55:59 AM UTC 24 |
Aug 29 01:56:23 AM UTC 24 |
12435103960 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_throughput_w_partial_write.3922174512 |
|
|
Aug 29 01:55:58 AM UTC 24 |
Aug 29 01:56:40 AM UTC 24 |
748622000 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_executable.2731613141 |
|
|
Aug 29 01:43:47 AM UTC 24 |
Aug 29 01:57:00 AM UTC 24 |
26497026860 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_ram_cfg.3385248176 |
|
|
Aug 29 01:57:01 AM UTC 24 |
Aug 29 01:57:08 AM UTC 24 |
358825266 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_mem_walk.1636611786 |
|
|
Aug 29 01:46:28 AM UTC 24 |
Aug 29 01:57:16 AM UTC 24 |
295367759211 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_bijection.1321742656 |
|
|
Aug 29 01:17:17 AM UTC 24 |
Aug 29 01:57:27 AM UTC 24 |
43555575672 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_mem_walk.3708326615 |
|
|
Aug 29 01:50:42 AM UTC 24 |
Aug 29 01:57:28 AM UTC 24 |
82675722383 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/7.sram_ctrl_stress_all.1317757029 |
|
|
Aug 29 12:40:10 AM UTC 24 |
Aug 29 01:57:49 AM UTC 24 |
463323243970 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_alert_test.424389112 |
|
|
Aug 29 01:57:50 AM UTC 24 |
Aug 29 01:57:52 AM UTC 24 |
36237765 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_smoke.1324521405 |
|
|
Aug 29 01:57:53 AM UTC 24 |
Aug 29 01:58:07 AM UTC 24 |
2916200671 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_pipeline.3088503019 |
|
|
Aug 29 01:51:42 AM UTC 24 |
Aug 29 01:58:14 AM UTC 24 |
4509514411 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_multiple_keys.554907413 |
|
|
Aug 29 01:55:03 AM UTC 24 |
Aug 29 01:58:21 AM UTC 24 |
7857983355 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.330932292 |
|
|
Aug 29 01:57:28 AM UTC 24 |
Aug 29 01:59:11 AM UTC 24 |
1240632887 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_partial_access.2852778446 |
|
|
Aug 29 01:59:13 AM UTC 24 |
Aug 29 01:59:25 AM UTC 24 |
563638477 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_executable.3865428167 |
|
|
Aug 29 01:50:29 AM UTC 24 |
Aug 29 01:59:42 AM UTC 24 |
6016430116 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_partial_access_b2b.2322837699 |
|
|
Aug 29 01:49:24 AM UTC 24 |
Aug 29 02:00:03 AM UTC 24 |
31652304764 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_regwen.1556852391 |
|
|
Aug 29 01:50:29 AM UTC 24 |
Aug 29 02:00:07 AM UTC 24 |
27163034254 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_regwen.1719713598 |
|
|
Aug 29 01:53:14 AM UTC 24 |
Aug 29 02:00:09 AM UTC 24 |
14152504631 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_access_during_key_req.540716565 |
|
|
Aug 29 01:37:21 AM UTC 24 |
Aug 29 02:00:11 AM UTC 24 |
135665318903 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_multiple_keys.2365805061 |
|
|
Aug 29 01:51:30 AM UTC 24 |
Aug 29 02:00:28 AM UTC 24 |
19346511177 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_mem_partial_access.1323030092 |
|
|
Aug 29 01:57:17 AM UTC 24 |
Aug 29 02:00:42 AM UTC 24 |
17578539684 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_executable.218425981 |
|
|
Aug 29 01:40:25 AM UTC 24 |
Aug 29 02:00:45 AM UTC 24 |
58510173500 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_access_during_key_req.3390323843 |
|
|
Aug 29 01:50:20 AM UTC 24 |
Aug 29 02:00:48 AM UTC 24 |
10944251718 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_ram_cfg.3489906053 |
|
|
Aug 29 02:00:43 AM UTC 24 |
Aug 29 02:00:50 AM UTC 24 |
355730768 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_throughput_w_partial_write.2268652519 |
|
|
Aug 29 02:00:06 AM UTC 24 |
Aug 29 02:00:54 AM UTC 24 |
779618271 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_partial_access_b2b.1408615955 |
|
|
Aug 29 01:55:35 AM UTC 24 |
Aug 29 02:00:57 AM UTC 24 |
12404050065 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_alert_test.1846683933 |
|
|
Aug 29 02:00:58 AM UTC 24 |
Aug 29 02:01:00 AM UTC 24 |
17288457 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_lc_escalation.3361393285 |
|
|
Aug 29 02:00:08 AM UTC 24 |
Aug 29 02:01:03 AM UTC 24 |
6287527528 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_pipeline.3398969562 |
|
|
Aug 29 01:55:21 AM UTC 24 |
Aug 29 02:01:06 AM UTC 24 |
10783957034 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_mem_walk.2235310036 |
|
|
Aug 29 01:53:42 AM UTC 24 |
Aug 29 02:01:15 AM UTC 24 |
28180424354 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_max_throughput.2726363722 |
|
|
Aug 29 01:59:43 AM UTC 24 |
Aug 29 02:01:18 AM UTC 24 |
1568624962 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_access_during_key_req.2778950195 |
|
|
Aug 29 01:45:56 AM UTC 24 |
Aug 29 02:01:24 AM UTC 24 |
17339562718 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_smoke.3007035723 |
|
|
Aug 29 02:01:01 AM UTC 24 |
Aug 29 02:01:24 AM UTC 24 |
3371199449 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_partial_access.1742609002 |
|
|
Aug 29 02:01:19 AM UTC 24 |
Aug 29 02:01:29 AM UTC 24 |
1534562075 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.86520054 |
|
|
Aug 29 02:00:51 AM UTC 24 |
Aug 29 02:02:02 AM UTC 24 |
5826195966 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/13.sram_ctrl_stress_all.2480639019 |
|
|
Aug 29 12:57:11 AM UTC 24 |
Aug 29 02:02:13 AM UTC 24 |
173133505403 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_multiple_keys.1360126911 |
|
|
Aug 29 01:58:08 AM UTC 24 |
Aug 29 02:02:24 AM UTC 24 |
2984154109 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_bijection.2767785732 |
|
|
Aug 29 01:27:44 AM UTC 24 |
Aug 29 02:02:36 AM UTC 24 |
737159071515 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_bijection.3859328452 |
|
|
Aug 29 01:24:18 AM UTC 24 |
Aug 29 02:02:40 AM UTC 24 |
206937146328 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_max_throughput.671063443 |
|
|
Aug 29 02:01:25 AM UTC 24 |
Aug 29 02:02:43 AM UTC 24 |
3142084331 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_ram_cfg.880802850 |
|
|
Aug 29 02:02:41 AM UTC 24 |
Aug 29 02:02:50 AM UTC 24 |
3743511104 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_throughput_w_partial_write.4078214996 |
|
|
Aug 29 02:01:30 AM UTC 24 |
Aug 29 02:03:05 AM UTC 24 |
808991926 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.4123902590 |
|
|
Aug 29 02:03:06 AM UTC 24 |
Aug 29 02:03:20 AM UTC 24 |
553612242 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_partial_access_b2b.2478836095 |
|
|
Aug 29 01:59:26 AM UTC 24 |
Aug 29 02:03:23 AM UTC 24 |
18979387823 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_alert_test.2559468581 |
|
|
Aug 29 02:03:24 AM UTC 24 |
Aug 29 02:03:26 AM UTC 24 |
15250876 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_mem_partial_access.2949341126 |
|
|
Aug 29 02:00:49 AM UTC 24 |
Aug 29 02:03:41 AM UTC 24 |
5138270538 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_mem_walk.2947441822 |
|
|
Aug 29 01:57:09 AM UTC 24 |
Aug 29 02:04:04 AM UTC 24 |
43039691488 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_executable.100710933 |
|
|
Aug 29 01:52:41 AM UTC 24 |
Aug 29 02:04:22 AM UTC 24 |
13471111572 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_access_during_key_req.2192467992 |
|
|
Aug 29 01:52:36 AM UTC 24 |
Aug 29 02:04:28 AM UTC 24 |
25937959252 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_executable.671190542 |
|
|
Aug 29 02:00:12 AM UTC 24 |
Aug 29 02:04:48 AM UTC 24 |
3534939470 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_bijection.1567131590 |
|
|
Aug 29 01:44:58 AM UTC 24 |
Aug 29 02:04:48 AM UTC 24 |
93149732851 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_max_throughput.2254433814 |
|
|
Aug 29 02:04:49 AM UTC 24 |
Aug 29 02:05:03 AM UTC 24 |
2824271520 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_smoke.201098543 |
|
|
Aug 29 02:03:27 AM UTC 24 |
Aug 29 02:05:06 AM UTC 24 |
1278729898 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_regwen.425527449 |
|
|
Aug 29 02:02:37 AM UTC 24 |
Aug 29 02:05:10 AM UTC 24 |
1163100624 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_mem_partial_access.2442183566 |
|
|
Aug 29 02:02:51 AM UTC 24 |
Aug 29 02:05:21 AM UTC 24 |
1800598675 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_lc_escalation.1538070232 |
|
|
Aug 29 02:02:03 AM UTC 24 |
Aug 29 02:05:25 AM UTC 24 |
52593204220 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_throughput_w_partial_write.1483410586 |
|
|
Aug 29 02:05:04 AM UTC 24 |
Aug 29 02:05:30 AM UTC 24 |
5041301306 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_ram_cfg.2555022567 |
|
|
Aug 29 02:05:31 AM UTC 24 |
Aug 29 02:05:37 AM UTC 24 |
516735748 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_bijection.1221382506 |
|
|
Aug 29 01:51:34 AM UTC 24 |
Aug 29 02:06:14 AM UTC 24 |
33783359187 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_partial_access.2700878949 |
|
|
Aug 29 02:04:29 AM UTC 24 |
Aug 29 02:06:19 AM UTC 24 |
1001417399 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_bijection.3562449163 |
|
|
Aug 29 01:38:56 AM UTC 24 |
Aug 29 02:06:25 AM UTC 24 |
120776613627 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_pipeline.167929984 |
|
|
Aug 29 02:01:16 AM UTC 24 |
Aug 29 02:06:42 AM UTC 24 |
3971530812 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_alert_test.3960250211 |
|
|
Aug 29 02:06:42 AM UTC 24 |
Aug 29 02:06:45 AM UTC 24 |
43308621 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1040527498 |
|
|
Aug 29 02:06:20 AM UTC 24 |
Aug 29 02:06:45 AM UTC 24 |
1834531796 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_bijection.3410447801 |
|
|
Aug 29 01:41:40 AM UTC 24 |
Aug 29 02:06:55 AM UTC 24 |
15062553208 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_partial_access_b2b.3395071849 |
|
|
Aug 29 02:01:25 AM UTC 24 |
Aug 29 02:07:02 AM UTC 24 |
5049192066 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_lc_escalation.3403902241 |
|
|
Aug 29 02:05:07 AM UTC 24 |
Aug 29 02:07:10 AM UTC 24 |
12237242238 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_mem_walk.3623953668 |
|
|
Aug 29 02:00:46 AM UTC 24 |
Aug 29 02:07:13 AM UTC 24 |
20740124906 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_smoke.4157607384 |
|
|
Aug 29 02:06:46 AM UTC 24 |
Aug 29 02:07:14 AM UTC 24 |
1082261230 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_partial_access.2591745300 |
|
|
Aug 29 02:07:11 AM UTC 24 |
Aug 29 02:07:30 AM UTC 24 |
2842780238 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_max_throughput.3805729750 |
|
|
Aug 29 02:07:15 AM UTC 24 |
Aug 29 02:07:39 AM UTC 24 |
2886837839 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_throughput_w_partial_write.776909266 |
|
|
Aug 29 02:07:31 AM UTC 24 |
Aug 29 02:07:46 AM UTC 24 |
3522996471 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_pipeline.808938160 |
|
|
Aug 29 01:58:21 AM UTC 24 |
Aug 29 02:07:58 AM UTC 24 |
5277375299 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_mem_partial_access.2514993875 |
|
|
Aug 29 02:06:15 AM UTC 24 |
Aug 29 02:08:30 AM UTC 24 |
23723325912 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_multiple_keys.646865291 |
|
|
Aug 29 02:01:04 AM UTC 24 |
Aug 29 02:09:11 AM UTC 24 |
13563708216 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_ram_cfg.915783969 |
|
|
Aug 29 02:09:11 AM UTC 24 |
Aug 29 02:09:19 AM UTC 24 |
1355564637 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_mem_walk.3601300263 |
|
|
Aug 29 02:05:38 AM UTC 24 |
Aug 29 02:09:26 AM UTC 24 |
38408135047 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_lc_escalation.1577052808 |
|
|
Aug 29 02:07:40 AM UTC 24 |
Aug 29 02:09:41 AM UTC 24 |
18171112685 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_multiple_keys.236220615 |
|
|
Aug 29 01:48:12 AM UTC 24 |
Aug 29 02:09:51 AM UTC 24 |
21321292492 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1359754144 |
|
|
Aug 29 02:09:42 AM UTC 24 |
Aug 29 02:09:51 AM UTC 24 |
250592233 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_alert_test.1241180246 |
|
|
Aug 29 02:09:52 AM UTC 24 |
Aug 29 02:09:54 AM UTC 24 |
21336101 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_pipeline.2149520169 |
|
|
Aug 29 02:04:23 AM UTC 24 |
Aug 29 02:10:13 AM UTC 24 |
15851911418 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_access_during_key_req.2971331013 |
|
|
Aug 29 02:00:09 AM UTC 24 |
Aug 29 02:10:29 AM UTC 24 |
13007005416 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_access_during_key_req.99165763 |
|
|
Aug 29 01:43:33 AM UTC 24 |
Aug 29 02:10:30 AM UTC 24 |
35663009779 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_stress_all.1658420765 |
|
|
Aug 29 01:14:07 AM UTC 24 |
Aug 29 02:10:34 AM UTC 24 |
51356628232 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_mem_walk.1949289122 |
|
|
Aug 29 02:02:44 AM UTC 24 |
Aug 29 02:10:35 AM UTC 24 |
43044631921 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_smoke.796636404 |
|
|
Aug 29 02:09:55 AM UTC 24 |
Aug 29 02:10:49 AM UTC 24 |
421187544 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_executable.451686417 |
|
|
Aug 29 01:56:24 AM UTC 24 |
Aug 29 02:10:54 AM UTC 24 |
24973165969 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_partial_access_b2b.785156185 |
|
|
Aug 29 02:04:49 AM UTC 24 |
Aug 29 02:10:55 AM UTC 24 |
14671125810 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_throughput_w_partial_write.4131845012 |
|
|
Aug 29 02:10:55 AM UTC 24 |
Aug 29 02:11:11 AM UTC 24 |
700230872 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_max_throughput.335581057 |
|
|
Aug 29 02:10:50 AM UTC 24 |
Aug 29 02:11:16 AM UTC 24 |
755064332 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_partial_access.4199552187 |
|
|
Aug 29 02:10:35 AM UTC 24 |
Aug 29 02:11:43 AM UTC 24 |
970590254 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_mem_partial_access.395769284 |
|
|
Aug 29 02:09:27 AM UTC 24 |
Aug 29 02:12:10 AM UTC 24 |
10121942978 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_ram_cfg.3667206641 |
|
|
Aug 29 02:12:12 AM UTC 24 |
Aug 29 02:12:19 AM UTC 24 |
357674501 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_stress_all.729134565 |
|
|
Aug 29 01:04:05 AM UTC 24 |
Aug 29 02:12:37 AM UTC 24 |
116275932447 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_bijection.269471738 |
|
|
Aug 29 01:55:14 AM UTC 24 |
Aug 29 02:12:52 AM UTC 24 |
171573989502 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_pipeline.2978106040 |
|
|
Aug 29 02:07:03 AM UTC 24 |
Aug 29 02:12:57 AM UTC 24 |
4431650323 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_lc_escalation.4116724132 |
|
|
Aug 29 02:10:56 AM UTC 24 |
Aug 29 02:13:07 AM UTC 24 |
99515916192 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_alert_test.691640618 |
|
|
Aug 29 02:13:08 AM UTC 24 |
Aug 29 02:13:10 AM UTC 24 |
16457819 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_smoke.2167945875 |
|
|
Aug 29 02:13:11 AM UTC 24 |
Aug 29 02:13:33 AM UTC 24 |
10157638814 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_pipeline.768025133 |
|
|
Aug 29 02:10:31 AM UTC 24 |
Aug 29 02:13:37 AM UTC 24 |
1892104360 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_executable.465164201 |
|
|
Aug 29 02:07:59 AM UTC 24 |
Aug 29 02:13:45 AM UTC 24 |
7377026974 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_partial_access_b2b.591105082 |
|
|
Aug 29 02:07:14 AM UTC 24 |
Aug 29 02:13:52 AM UTC 24 |
15040849886 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.4128439271 |
|
|
Aug 29 02:12:53 AM UTC 24 |
Aug 29 02:14:20 AM UTC 24 |
1149561422 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_partial_access.3603439492 |
|
|
Aug 29 02:13:53 AM UTC 24 |
Aug 29 02:14:20 AM UTC 24 |
1629029086 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_mem_partial_access.2183028117 |
|
|
Aug 29 02:12:39 AM UTC 24 |
Aug 29 02:14:26 AM UTC 24 |
10943434989 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_max_throughput.1664619924 |
|
|
Aug 29 02:14:21 AM UTC 24 |
Aug 29 02:14:35 AM UTC 24 |
2672810925 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_access_during_key_req.730225746 |
|
|
Aug 29 02:05:10 AM UTC 24 |
Aug 29 02:14:53 AM UTC 24 |
49603559878 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_mem_walk.246405170 |
|
|
Aug 29 02:12:20 AM UTC 24 |
Aug 29 02:15:25 AM UTC 24 |
41418881087 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_bijection.1068645869 |
|
|
Aug 29 01:48:16 AM UTC 24 |
Aug 29 02:15:48 AM UTC 24 |
35511018838 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_lc_escalation.2828275415 |
|
|
Aug 29 02:14:36 AM UTC 24 |
Aug 29 02:15:59 AM UTC 24 |
24955408984 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_ram_cfg.1575977391 |
|
|
Aug 29 02:16:00 AM UTC 24 |
Aug 29 02:16:07 AM UTC 24 |
1396727452 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_executable.912945005 |
|
|
Aug 29 02:02:25 AM UTC 24 |
Aug 29 02:16:08 AM UTC 24 |
57749939805 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_throughput_w_partial_write.776372011 |
|
|
Aug 29 02:14:27 AM UTC 24 |
Aug 29 02:16:13 AM UTC 24 |
6472501183 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_regwen.318528753 |
|
|
Aug 29 02:00:28 AM UTC 24 |
Aug 29 02:16:22 AM UTC 24 |
6609406825 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4152090809 |
|
|
Aug 29 02:16:14 AM UTC 24 |
Aug 29 02:16:56 AM UTC 24 |
8702696039 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_alert_test.3934557536 |
|
|
Aug 29 02:16:56 AM UTC 24 |
Aug 29 02:16:59 AM UTC 24 |
30077803 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_access_during_key_req.883561384 |
|
|
Aug 29 01:56:15 AM UTC 24 |
Aug 29 02:17:26 AM UTC 24 |
65802445480 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_stress_pipeline.2653967754 |
|
|
Aug 29 02:13:46 AM UTC 24 |
Aug 29 02:17:56 AM UTC 24 |
3211509315 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_mem_walk.1928189382 |
|
|
Aug 29 02:09:19 AM UTC 24 |
Aug 29 02:17:56 AM UTC 24 |
49351258750 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_stress_all.3041111401 |
|
|
Aug 29 01:16:57 AM UTC 24 |
Aug 29 02:18:31 AM UTC 24 |
118389665946 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_bijection.1361394495 |
|
|
Aug 29 02:01:06 AM UTC 24 |
Aug 29 02:18:36 AM UTC 24 |
42391664310 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_smoke.4053872924 |
|
|
Aug 29 02:17:00 AM UTC 24 |
Aug 29 02:18:54 AM UTC 24 |
3947295168 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_mem_partial_access.1033738751 |
|
|
Aug 29 02:16:09 AM UTC 24 |
Aug 29 02:18:55 AM UTC 24 |
5020052524 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_partial_access.910429313 |
|
|
Aug 29 02:18:31 AM UTC 24 |
Aug 29 02:19:06 AM UTC 24 |
7392463247 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_max_throughput.3013662862 |
|
|
Aug 29 02:18:54 AM UTC 24 |
Aug 29 02:19:22 AM UTC 24 |
732401733 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_partial_access_b2b.3892760578 |
|
|
Aug 29 02:14:20 AM UTC 24 |
Aug 29 02:19:24 AM UTC 24 |
4911753352 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/12.sram_ctrl_stress_all.2205922926 |
|
|
Aug 29 12:55:07 AM UTC 24 |
Aug 29 02:19:35 AM UTC 24 |
215937305839 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_access_during_key_req.2549493691 |
|
|
Aug 29 02:14:54 AM UTC 24 |
Aug 29 02:19:45 AM UTC 24 |
27483809117 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_access_during_key_req.436195516 |
|
|
Aug 29 02:07:47 AM UTC 24 |
Aug 29 02:19:47 AM UTC 24 |
13432927577 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_throughput_w_partial_write.673705707 |
|
|
Aug 29 02:18:56 AM UTC 24 |
Aug 29 02:19:53 AM UTC 24 |
764629149 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_ram_cfg.368980655 |
|
|
Aug 29 02:19:45 AM UTC 24 |
Aug 29 02:19:53 AM UTC 24 |
3721011524 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_stress_all.2440329232 |
|
|
Aug 29 01:29:42 AM UTC 24 |
Aug 29 02:20:06 AM UTC 24 |
48087846925 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2853750645 |
|
|
Aug 29 02:19:54 AM UTC 24 |
Aug 29 02:20:13 AM UTC 24 |
271335435 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_alert_test.218398203 |
|
|
Aug 29 02:20:14 AM UTC 24 |
Aug 29 02:20:16 AM UTC 24 |
49242714 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_lc_escalation.3932346886 |
|
|
Aug 29 02:19:07 AM UTC 24 |
Aug 29 02:20:23 AM UTC 24 |
51325505180 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_regwen.304773182 |
|
|
Aug 29 01:56:41 AM UTC 24 |
Aug 29 02:20:25 AM UTC 24 |
22932145997 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_multiple_keys.865154719 |
|
|
Aug 29 02:13:33 AM UTC 24 |
Aug 29 02:21:36 AM UTC 24 |
40119189529 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_smoke.568193492 |
|
|
Aug 29 02:20:17 AM UTC 24 |
Aug 29 02:22:05 AM UTC 24 |
2536815890 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_mem_walk.766105556 |
|
|
Aug 29 02:16:08 AM UTC 24 |
Aug 29 02:22:15 AM UTC 24 |
13984250208 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_partial_access_b2b.411783505 |
|
|
Aug 29 02:10:36 AM UTC 24 |
Aug 29 02:22:23 AM UTC 24 |
43031403929 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_mem_partial_access.2059740774 |
|
|
Aug 29 02:19:53 AM UTC 24 |
Aug 29 02:22:45 AM UTC 24 |
5107408822 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_mem_walk.886153999 |
|
|
Aug 29 02:19:47 AM UTC 24 |
Aug 29 02:23:03 AM UTC 24 |
52533906964 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_throughput_w_partial_write.592892618 |
|
|
Aug 29 02:22:46 AM UTC 24 |
Aug 29 02:23:13 AM UTC 24 |
2806006548 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_access_during_key_req.1145496274 |
|
|
Aug 29 02:02:14 AM UTC 24 |
Aug 29 02:23:14 AM UTC 24 |
46610154031 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_regwen.514418950 |
|
|
Aug 29 02:15:49 AM UTC 24 |
Aug 29 02:23:15 AM UTC 24 |
3875569403 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_executable.2008094322 |
|
|
Aug 29 02:15:27 AM UTC 24 |
Aug 29 02:23:18 AM UTC 24 |
84266822930 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_ram_cfg.2293473591 |
|
|
Aug 29 02:23:19 AM UTC 24 |
Aug 29 02:23:24 AM UTC 24 |
710353761 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_partial_access.3174238357 |
|
|
Aug 29 02:22:06 AM UTC 24 |
Aug 29 02:23:32 AM UTC 24 |
1783773605 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_multiple_keys.1441530698 |
|
|
Aug 29 02:17:27 AM UTC 24 |
Aug 29 02:23:37 AM UTC 24 |
33495227391 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_multiple_keys.148532132 |
|
|
Aug 29 02:10:13 AM UTC 24 |
Aug 29 02:23:43 AM UTC 24 |
39395085149 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_max_throughput.1110669303 |
|
|
Aug 29 02:22:24 AM UTC 24 |
Aug 29 02:23:49 AM UTC 24 |
799992867 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_alert_test.3846131960 |
|
|
Aug 29 02:23:50 AM UTC 24 |
Aug 29 02:23:52 AM UTC 24 |
49142104 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/1.sram_ctrl_stress_all.2790986468 |
|
|
Aug 29 12:27:29 AM UTC 24 |
Aug 29 02:23:56 AM UTC 24 |
174814399496 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_access_during_key_req.2693501032 |
|
|
Aug 29 02:11:12 AM UTC 24 |
Aug 29 02:24:19 AM UTC 24 |
16624996991 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_smoke.1554156629 |
|
|
Aug 29 02:23:53 AM UTC 24 |
Aug 29 02:24:19 AM UTC 24 |
3726103174 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1237987765 |
|
|
Aug 29 02:23:37 AM UTC 24 |
Aug 29 02:24:34 AM UTC 24 |
7508840609 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_partial_access.1826188067 |
|
|
Aug 29 02:24:35 AM UTC 24 |
Aug 29 02:25:05 AM UTC 24 |
1923107864 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_mem_partial_access.3831270433 |
|
|
Aug 29 02:23:33 AM UTC 24 |
Aug 29 02:25:09 AM UTC 24 |
7428655025 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_regwen.557145170 |
|
|
Aug 29 02:05:26 AM UTC 24 |
Aug 29 02:25:19 AM UTC 24 |
88679365985 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_lc_escalation.3026060756 |
|
|
Aug 29 02:23:04 AM UTC 24 |
Aug 29 02:25:25 AM UTC 24 |
198990055571 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_pipeline.80112289 |
|
|
Aug 29 02:17:57 AM UTC 24 |
Aug 29 02:25:38 AM UTC 24 |
6286957182 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_stress_all.1025172259 |
|
|
Aug 29 01:34:31 AM UTC 24 |
Aug 29 02:25:49 AM UTC 24 |
130434933379 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_throughput_w_partial_write.699607555 |
|
|
Aug 29 02:25:20 AM UTC 24 |
Aug 29 02:25:51 AM UTC 24 |
8733904244 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_partial_access_b2b.3286869085 |
|
|
Aug 29 02:18:37 AM UTC 24 |
Aug 29 02:26:04 AM UTC 24 |
252338844199 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_ram_cfg.3326680750 |
|
|
Aug 29 02:26:05 AM UTC 24 |
Aug 29 02:26:12 AM UTC 24 |
1871120135 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_max_throughput.890736282 |
|
|
Aug 29 02:25:09 AM UTC 24 |
Aug 29 02:26:24 AM UTC 24 |
813084420 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_mem_walk.2946321525 |
|
|
Aug 29 02:23:25 AM UTC 24 |
Aug 29 02:26:24 AM UTC 24 |
138549064990 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_executable.4098076408 |
|
|
Aug 29 02:05:23 AM UTC 24 |
Aug 29 02:26:38 AM UTC 24 |
103427670829 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.273464340 |
|
|
Aug 29 02:26:25 AM UTC 24 |
Aug 29 02:26:44 AM UTC 24 |
3971414827 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_lc_escalation.2323720539 |
|
|
Aug 29 02:25:25 AM UTC 24 |
Aug 29 02:26:48 AM UTC 24 |
94428419765 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_alert_test.1246889080 |
|
|
Aug 29 02:26:46 AM UTC 24 |
Aug 29 02:26:48 AM UTC 24 |
46818684 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_regwen.1731585675 |
|
|
Aug 29 02:11:44 AM UTC 24 |
Aug 29 02:27:07 AM UTC 24 |
29224318081 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_pipeline.3354158240 |
|
|
Aug 29 02:21:38 AM UTC 24 |
Aug 29 02:27:11 AM UTC 24 |
35805540204 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_multiple_keys.92677585 |
|
|
Aug 29 02:03:42 AM UTC 24 |
Aug 29 02:27:27 AM UTC 24 |
132668969448 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_partial_access.1559901480 |
|
|
Aug 29 02:27:28 AM UTC 24 |
Aug 29 02:27:42 AM UTC 24 |
884981747 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_pipeline.240465281 |
|
|
Aug 29 02:24:20 AM UTC 24 |
Aug 29 02:28:16 AM UTC 24 |
10183322681 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_smoke.4122289945 |
|
|
Aug 29 02:26:49 AM UTC 24 |
Aug 29 02:28:16 AM UTC 24 |
437763740 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_mem_partial_access.2431616740 |
|
|
Aug 29 02:26:24 AM UTC 24 |
Aug 29 02:28:35 AM UTC 24 |
10043733071 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_access_during_key_req.3419764258 |
|
|
Aug 29 02:19:23 AM UTC 24 |
Aug 29 02:29:42 AM UTC 24 |
10680097288 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_partial_access_b2b.3656555199 |
|
|
Aug 29 02:22:16 AM UTC 24 |
Aug 29 02:29:48 AM UTC 24 |
7387106134 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_max_throughput.2650853850 |
|
|
Aug 29 02:28:17 AM UTC 24 |
Aug 29 02:29:52 AM UTC 24 |
963875423 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_throughput_w_partial_write.2523110658 |
|
|
Aug 29 02:28:17 AM UTC 24 |
Aug 29 02:29:55 AM UTC 24 |
812706694 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_ram_cfg.2648454496 |
|
|
Aug 29 02:29:56 AM UTC 24 |
Aug 29 02:30:02 AM UTC 24 |
709887533 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_bijection.3030690502 |
|
|
Aug 29 01:58:15 AM UTC 24 |
Aug 29 02:30:03 AM UTC 24 |
46442109084 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_lc_escalation.1545128379 |
|
|
Aug 29 02:28:36 AM UTC 24 |
Aug 29 02:30:09 AM UTC 24 |
19483470676 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3971489664 |
|
|
Aug 29 02:30:10 AM UTC 24 |
Aug 29 02:30:25 AM UTC 24 |
1104917241 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_regwen.27301096 |
|
|
Aug 29 02:08:30 AM UTC 24 |
Aug 29 02:31:17 AM UTC 24 |
22625195419 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_alert_test.1911321380 |
|
|
Aug 29 02:31:18 AM UTC 24 |
Aug 29 02:31:20 AM UTC 24 |
14933434 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_pipeline.2558826842 |
|
|
Aug 29 02:27:12 AM UTC 24 |
Aug 29 02:31:23 AM UTC 24 |
21138010831 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_mem_walk.2001293369 |
|
|
Aug 29 02:26:13 AM UTC 24 |
Aug 29 02:31:24 AM UTC 24 |
5258052425 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_executable.2102058056 |
|
|
Aug 29 02:19:25 AM UTC 24 |
Aug 29 02:31:45 AM UTC 24 |
10421131096 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_regwen.3265574342 |
|
|
Aug 29 02:23:16 AM UTC 24 |
Aug 29 02:32:34 AM UTC 24 |
27370673227 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_smoke.2636186753 |
|
|
Aug 29 02:31:21 AM UTC 24 |
Aug 29 02:32:34 AM UTC 24 |
3857856288 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_multiple_keys.3775685133 |
|
|
Aug 29 02:06:46 AM UTC 24 |
Aug 29 02:32:43 AM UTC 24 |
58044871635 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_mem_partial_access.3211989913 |
|
|
Aug 29 02:30:04 AM UTC 24 |
Aug 29 02:32:54 AM UTC 24 |
6548323723 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_all.59369256 |
|
|
Aug 29 02:03:20 AM UTC 24 |
Aug 29 02:33:02 AM UTC 24 |
234944544622 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_partial_access.1857107761 |
|
|
Aug 29 02:32:36 AM UTC 24 |
Aug 29 02:33:05 AM UTC 24 |
1218189751 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_executable.4089180853 |
|
|
Aug 29 02:23:15 AM UTC 24 |
Aug 29 02:33:21 AM UTC 24 |
23028262428 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_executable.817408222 |
|
|
Aug 29 02:11:17 AM UTC 24 |
Aug 29 02:33:31 AM UTC 24 |
21882313946 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_executable.2030494187 |
|
|
Aug 29 02:25:50 AM UTC 24 |
Aug 29 02:33:40 AM UTC 24 |
39813723555 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_multiple_keys.285345225 |
|
|
Aug 29 02:31:24 AM UTC 24 |
Aug 29 02:33:45 AM UTC 24 |
1568867909 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_ram_cfg.244829789 |
|
|
Aug 29 02:33:41 AM UTC 24 |
Aug 29 02:33:48 AM UTC 24 |
1347652084 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_max_throughput.871465849 |
|
|
Aug 29 02:32:44 AM UTC 24 |
Aug 29 02:33:59 AM UTC 24 |
3137138987 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_mem_walk.694023612 |
|
|
Aug 29 02:30:03 AM UTC 24 |
Aug 29 02:34:03 AM UTC 24 |
9175026619 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_multiple_keys.1348113458 |
|
|
Aug 29 02:23:56 AM UTC 24 |
Aug 29 02:34:03 AM UTC 24 |
8092299544 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_alert_test.1046623293 |
|
|
Aug 29 02:34:04 AM UTC 24 |
Aug 29 02:34:06 AM UTC 24 |
24478519 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_lc_escalation.518940926 |
|
|
Aug 29 02:33:03 AM UTC 24 |
Aug 29 02:34:13 AM UTC 24 |
17662091645 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_multiple_keys.2638982786 |
|
|
Aug 29 02:26:49 AM UTC 24 |
Aug 29 02:34:21 AM UTC 24 |
31935828467 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_smoke.3160592415 |
|
|
Aug 29 02:34:07 AM UTC 24 |
Aug 29 02:34:25 AM UTC 24 |
954736640 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_throughput_w_partial_write.23578763 |
|
|
Aug 29 02:32:55 AM UTC 24 |
Aug 29 02:34:29 AM UTC 24 |
804005290 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2581946805 |
|
|
Aug 29 02:34:00 AM UTC 24 |
Aug 29 02:34:35 AM UTC 24 |
782115315 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_partial_access.259958320 |
|
|
Aug 29 02:34:30 AM UTC 24 |
Aug 29 02:35:01 AM UTC 24 |
1368270937 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_max_throughput.200686601 |
|
|
Aug 29 02:35:01 AM UTC 24 |
Aug 29 02:35:12 AM UTC 24 |
1377452868 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_bijection.378435704 |
|
|
Aug 29 02:04:05 AM UTC 24 |
Aug 29 02:35:20 AM UTC 24 |
507117846795 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_throughput_w_partial_write.659658930 |
|
|
Aug 29 02:35:13 AM UTC 24 |
Aug 29 02:35:26 AM UTC 24 |
719532213 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_partial_access_b2b.215442141 |
|
|
Aug 29 02:27:43 AM UTC 24 |
Aug 29 02:35:34 AM UTC 24 |
32614712654 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_partial_access_b2b.4240587664 |
|
|
Aug 29 02:25:06 AM UTC 24 |
Aug 29 02:35:42 AM UTC 24 |
8275519819 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_lc_escalation.1671018305 |
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|
Aug 29 02:35:21 AM UTC 24 |
Aug 29 02:37:24 AM UTC 24 |
9614127994 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_ram_cfg.84597778 |
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|
Aug 29 02:37:25 AM UTC 24 |
Aug 29 02:37:32 AM UTC 24 |
357717980 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_executable.1913720089 |
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|
Aug 29 02:29:49 AM UTC 24 |
Aug 29 02:37:35 AM UTC 24 |
30603147195 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_regwen.1251738194 |
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Aug 29 02:33:31 AM UTC 24 |
Aug 29 02:37:56 AM UTC 24 |
4678011069 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_pipeline.2680525514 |
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Aug 29 02:31:45 AM UTC 24 |
Aug 29 02:38:02 AM UTC 24 |
4925922254 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_mem_walk.174846691 |
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Aug 29 02:33:46 AM UTC 24 |
Aug 29 02:38:17 AM UTC 24 |
10890955008 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_alert_test.2995903824 |
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Aug 29 02:38:18 AM UTC 24 |
Aug 29 02:38:20 AM UTC 24 |
21127987 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3743469865 |
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Aug 29 02:37:58 AM UTC 24 |
Aug 29 02:38:26 AM UTC 24 |
599694641 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_regwen.586217832 |
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Aug 29 02:35:43 AM UTC 24 |
Aug 29 02:38:34 AM UTC 24 |
904114897 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_mem_partial_access.1107802695 |
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Aug 29 02:33:49 AM UTC 24 |
Aug 29 02:38:43 AM UTC 24 |
42770666977 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_smoke.1008892232 |
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Aug 29 02:38:21 AM UTC 24 |
Aug 29 02:39:43 AM UTC 24 |
3407927958 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_multiple_keys.2584493818 |
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Aug 29 02:20:24 AM UTC 24 |
Aug 29 02:39:50 AM UTC 24 |
22092444848 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_access_during_key_req.2223792377 |
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Aug 29 02:25:40 AM UTC 24 |
Aug 29 02:39:50 AM UTC 24 |
64891896363 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_28/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_stress_pipeline.3219191579 |
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Aug 29 02:34:26 AM UTC 24 |
Aug 29 02:40:21 AM UTC 24 |
16609036488 ps |