| T310 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3438891006 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 01:01:36 PM PDT 24 |
43171973612 ps |
| T311 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2874763095 |
|
|
Mar 17 12:46:58 PM PDT 24 |
Mar 17 12:47:07 PM PDT 24 |
138571169 ps |
| T312 |
/workspace/coverage/default/15.sram_ctrl_regwen.1849977970 |
|
|
Mar 17 12:47:29 PM PDT 24 |
Mar 17 12:53:42 PM PDT 24 |
15659006178 ps |
| T313 |
/workspace/coverage/default/19.sram_ctrl_regwen.2356816748 |
|
|
Mar 17 12:47:23 PM PDT 24 |
Mar 17 12:47:45 PM PDT 24 |
377490771 ps |
| T314 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3159244790 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:47:32 PM PDT 24 |
971605380 ps |
| T315 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.488597722 |
|
|
Mar 17 12:47:53 PM PDT 24 |
Mar 17 12:49:19 PM PDT 24 |
525195785 ps |
| T316 |
/workspace/coverage/default/39.sram_ctrl_bijection.424852954 |
|
|
Mar 17 12:48:42 PM PDT 24 |
Mar 17 12:49:37 PM PDT 24 |
6130769197 ps |
| T317 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1320252050 |
|
|
Mar 17 12:47:56 PM PDT 24 |
Mar 17 12:49:32 PM PDT 24 |
1434099962 ps |
| T318 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2923435171 |
|
|
Mar 17 12:47:05 PM PDT 24 |
Mar 17 12:47:08 PM PDT 24 |
980040904 ps |
| T319 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.70109836 |
|
|
Mar 17 12:49:34 PM PDT 24 |
Mar 17 12:49:36 PM PDT 24 |
122824491 ps |
| T320 |
/workspace/coverage/default/37.sram_ctrl_stress_all.3853518823 |
|
|
Mar 17 12:48:36 PM PDT 24 |
Mar 17 01:05:20 PM PDT 24 |
34211881498 ps |
| T321 |
/workspace/coverage/default/45.sram_ctrl_regwen.3123403291 |
|
|
Mar 17 12:49:09 PM PDT 24 |
Mar 17 12:58:50 PM PDT 24 |
1696634421 ps |
| T322 |
/workspace/coverage/default/29.sram_ctrl_smoke.4226834519 |
|
|
Mar 17 12:47:58 PM PDT 24 |
Mar 17 12:48:08 PM PDT 24 |
1610601280 ps |
| T323 |
/workspace/coverage/default/48.sram_ctrl_bijection.4016028006 |
|
|
Mar 17 12:49:28 PM PDT 24 |
Mar 17 12:50:12 PM PDT 24 |
2122832743 ps |
| T324 |
/workspace/coverage/default/20.sram_ctrl_partial_access.214600317 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:48:30 PM PDT 24 |
496184789 ps |
| T325 |
/workspace/coverage/default/45.sram_ctrl_executable.3375822804 |
|
|
Mar 17 12:49:08 PM PDT 24 |
Mar 17 01:05:43 PM PDT 24 |
11376478958 ps |
| T326 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.947264939 |
|
|
Mar 17 12:47:58 PM PDT 24 |
Mar 17 12:56:27 PM PDT 24 |
3319449596 ps |
| T327 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.1415205413 |
|
|
Mar 17 12:48:11 PM PDT 24 |
Mar 17 12:48:14 PM PDT 24 |
853516969 ps |
| T328 |
/workspace/coverage/default/6.sram_ctrl_bijection.583028659 |
|
|
Mar 17 12:47:14 PM PDT 24 |
Mar 17 12:47:38 PM PDT 24 |
1592158364 ps |
| T329 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2563490246 |
|
|
Mar 17 12:48:17 PM PDT 24 |
Mar 17 12:56:11 PM PDT 24 |
1483104703 ps |
| T330 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.2091234237 |
|
|
Mar 17 12:48:11 PM PDT 24 |
Mar 17 12:48:16 PM PDT 24 |
151620650 ps |
| T331 |
/workspace/coverage/default/17.sram_ctrl_executable.3325309372 |
|
|
Mar 17 12:47:23 PM PDT 24 |
Mar 17 12:54:12 PM PDT 24 |
6172631935 ps |
| T332 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.3452343079 |
|
|
Mar 17 12:46:32 PM PDT 24 |
Mar 17 12:49:54 PM PDT 24 |
4447365632 ps |
| T333 |
/workspace/coverage/default/18.sram_ctrl_smoke.4177228037 |
|
|
Mar 17 12:47:30 PM PDT 24 |
Mar 17 12:47:39 PM PDT 24 |
1661505075 ps |
| T334 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.1084672799 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:47:27 PM PDT 24 |
243731868 ps |
| T335 |
/workspace/coverage/default/43.sram_ctrl_bijection.3909773459 |
|
|
Mar 17 12:48:58 PM PDT 24 |
Mar 17 12:50:11 PM PDT 24 |
13250696191 ps |
| T336 |
/workspace/coverage/default/24.sram_ctrl_regwen.292237561 |
|
|
Mar 17 12:47:38 PM PDT 24 |
Mar 17 12:56:33 PM PDT 24 |
7100906778 ps |
| T337 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1668251333 |
|
|
Mar 17 12:47:22 PM PDT 24 |
Mar 17 12:47:32 PM PDT 24 |
2405420234 ps |
| T338 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1017447923 |
|
|
Mar 17 12:48:43 PM PDT 24 |
Mar 17 12:51:42 PM PDT 24 |
1966423431 ps |
| T339 |
/workspace/coverage/default/2.sram_ctrl_regwen.1713716583 |
|
|
Mar 17 12:46:30 PM PDT 24 |
Mar 17 12:50:05 PM PDT 24 |
1694587410 ps |
| T340 |
/workspace/coverage/default/32.sram_ctrl_smoke.1172861042 |
|
|
Mar 17 12:48:14 PM PDT 24 |
Mar 17 12:50:16 PM PDT 24 |
170514670 ps |
| T341 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3305243299 |
|
|
Mar 17 12:47:58 PM PDT 24 |
Mar 17 12:51:43 PM PDT 24 |
2645643480 ps |
| T342 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.730588225 |
|
|
Mar 17 12:48:58 PM PDT 24 |
Mar 17 12:49:06 PM PDT 24 |
210770546 ps |
| T343 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1893122625 |
|
|
Mar 17 12:48:50 PM PDT 24 |
Mar 17 12:49:06 PM PDT 24 |
1693902073 ps |
| T344 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.660882831 |
|
|
Mar 17 12:47:11 PM PDT 24 |
Mar 17 12:47:16 PM PDT 24 |
62142818 ps |
| T345 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.434705517 |
|
|
Mar 17 12:48:43 PM PDT 24 |
Mar 17 12:49:14 PM PDT 24 |
5144787864 ps |
| T346 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2450114444 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:47:47 PM PDT 24 |
294276048 ps |
| T347 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2469717367 |
|
|
Mar 17 12:48:59 PM PDT 24 |
Mar 17 12:54:44 PM PDT 24 |
7130167097 ps |
| T348 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3878787007 |
|
|
Mar 17 12:47:24 PM PDT 24 |
Mar 17 12:47:25 PM PDT 24 |
77263761 ps |
| T349 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.3603634375 |
|
|
Mar 17 12:48:43 PM PDT 24 |
Mar 17 12:48:49 PM PDT 24 |
547409841 ps |
| T350 |
/workspace/coverage/default/26.sram_ctrl_smoke.3217813789 |
|
|
Mar 17 12:48:00 PM PDT 24 |
Mar 17 12:48:14 PM PDT 24 |
961356611 ps |
| T351 |
/workspace/coverage/default/42.sram_ctrl_stress_all.309477143 |
|
|
Mar 17 12:48:55 PM PDT 24 |
Mar 17 01:24:03 PM PDT 24 |
56992487332 ps |
| T352 |
/workspace/coverage/default/25.sram_ctrl_bijection.3965708444 |
|
|
Mar 17 12:47:39 PM PDT 24 |
Mar 17 12:48:19 PM PDT 24 |
694959165 ps |
| T353 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3853128461 |
|
|
Mar 17 12:47:31 PM PDT 24 |
Mar 17 12:47:53 PM PDT 24 |
877431996 ps |
| T354 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.439842957 |
|
|
Mar 17 12:47:28 PM PDT 24 |
Mar 17 12:47:29 PM PDT 24 |
48589187 ps |
| T355 |
/workspace/coverage/default/24.sram_ctrl_smoke.2394075661 |
|
|
Mar 17 12:47:23 PM PDT 24 |
Mar 17 12:47:27 PM PDT 24 |
413221606 ps |
| T356 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.215279158 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:47:24 PM PDT 24 |
206804651 ps |
| T357 |
/workspace/coverage/default/45.sram_ctrl_alert_test.34582663 |
|
|
Mar 17 12:49:18 PM PDT 24 |
Mar 17 12:49:19 PM PDT 24 |
15671132 ps |
| T358 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3884709395 |
|
|
Mar 17 12:49:17 PM PDT 24 |
Mar 17 12:49:20 PM PDT 24 |
169072672 ps |
| T359 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1956433538 |
|
|
Mar 17 12:49:31 PM PDT 24 |
Mar 17 12:49:55 PM PDT 24 |
303082710 ps |
| T360 |
/workspace/coverage/default/21.sram_ctrl_smoke.2322181241 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:49:33 PM PDT 24 |
162270110 ps |
| T361 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.147575117 |
|
|
Mar 17 12:47:24 PM PDT 24 |
Mar 17 01:10:46 PM PDT 24 |
54774158066 ps |
| T362 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1237300712 |
|
|
Mar 17 12:47:54 PM PDT 24 |
Mar 17 01:01:03 PM PDT 24 |
5136543126 ps |
| T363 |
/workspace/coverage/default/40.sram_ctrl_stress_all.4185093286 |
|
|
Mar 17 12:48:59 PM PDT 24 |
Mar 17 01:19:05 PM PDT 24 |
35209363082 ps |
| T364 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.182461839 |
|
|
Mar 17 12:48:28 PM PDT 24 |
Mar 17 12:48:37 PM PDT 24 |
67810628 ps |
| T365 |
/workspace/coverage/default/43.sram_ctrl_executable.616490599 |
|
|
Mar 17 12:48:59 PM PDT 24 |
Mar 17 01:01:10 PM PDT 24 |
3844690081 ps |
| T366 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2081913104 |
|
|
Mar 17 12:48:32 PM PDT 24 |
Mar 17 01:26:10 PM PDT 24 |
21825509087 ps |
| T367 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1165131040 |
|
|
Mar 17 12:49:32 PM PDT 24 |
Mar 17 01:07:52 PM PDT 24 |
12527715883 ps |
| T368 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3251011471 |
|
|
Mar 17 12:49:30 PM PDT 24 |
Mar 17 01:38:02 PM PDT 24 |
155305584942 ps |
| T369 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1036599033 |
|
|
Mar 17 12:48:11 PM PDT 24 |
Mar 17 12:55:58 PM PDT 24 |
19508843509 ps |
| T370 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1592807288 |
|
|
Mar 17 12:49:03 PM PDT 24 |
Mar 17 01:09:49 PM PDT 24 |
3199931985 ps |
| T371 |
/workspace/coverage/default/33.sram_ctrl_executable.243787151 |
|
|
Mar 17 12:48:13 PM PDT 24 |
Mar 17 12:51:09 PM PDT 24 |
15446631263 ps |
| T372 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3182588123 |
|
|
Mar 17 12:48:06 PM PDT 24 |
Mar 17 12:49:52 PM PDT 24 |
167086928 ps |
| T373 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.937100072 |
|
|
Mar 17 12:48:56 PM PDT 24 |
Mar 17 12:48:59 PM PDT 24 |
182412013 ps |
| T374 |
/workspace/coverage/default/48.sram_ctrl_smoke.2513524679 |
|
|
Mar 17 12:49:27 PM PDT 24 |
Mar 17 12:50:30 PM PDT 24 |
257747616 ps |
| T375 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4115246352 |
|
|
Mar 17 12:47:12 PM PDT 24 |
Mar 17 12:47:20 PM PDT 24 |
502992366 ps |
| T376 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2979205548 |
|
|
Mar 17 12:49:36 PM PDT 24 |
Mar 17 01:14:42 PM PDT 24 |
4101123935 ps |
| T377 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1395766489 |
|
|
Mar 17 12:49:33 PM PDT 24 |
Mar 17 12:49:42 PM PDT 24 |
1687299935 ps |
| T378 |
/workspace/coverage/default/34.sram_ctrl_regwen.4219334836 |
|
|
Mar 17 12:48:18 PM PDT 24 |
Mar 17 12:57:42 PM PDT 24 |
29604284363 ps |
| T379 |
/workspace/coverage/default/39.sram_ctrl_regwen.3167007415 |
|
|
Mar 17 12:48:51 PM PDT 24 |
Mar 17 01:02:37 PM PDT 24 |
42243113478 ps |
| T380 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.339569014 |
|
|
Mar 17 12:48:12 PM PDT 24 |
Mar 17 12:53:03 PM PDT 24 |
12617363630 ps |
| T381 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.226597529 |
|
|
Mar 17 12:49:05 PM PDT 24 |
Mar 17 12:51:06 PM PDT 24 |
5649442062 ps |
| T382 |
/workspace/coverage/default/40.sram_ctrl_bijection.224030981 |
|
|
Mar 17 12:48:50 PM PDT 24 |
Mar 17 12:49:34 PM PDT 24 |
3081166707 ps |
| T383 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.4006448094 |
|
|
Mar 17 12:48:54 PM PDT 24 |
Mar 17 12:56:12 PM PDT 24 |
9608087543 ps |
| T384 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.3099141355 |
|
|
Mar 17 12:48:03 PM PDT 24 |
Mar 17 12:57:56 PM PDT 24 |
8559486013 ps |
| T385 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3209067543 |
|
|
Mar 17 12:49:09 PM PDT 24 |
Mar 17 12:51:39 PM PDT 24 |
13117594303 ps |
| T386 |
/workspace/coverage/default/20.sram_ctrl_bijection.1420289992 |
|
|
Mar 17 12:47:22 PM PDT 24 |
Mar 17 12:48:45 PM PDT 24 |
13833907449 ps |
| T387 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.481099403 |
|
|
Mar 17 12:48:24 PM PDT 24 |
Mar 17 12:55:19 PM PDT 24 |
35733096878 ps |
| T388 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3438377281 |
|
|
Mar 17 12:46:29 PM PDT 24 |
Mar 17 12:46:36 PM PDT 24 |
388076089 ps |
| T389 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.390875958 |
|
|
Mar 17 12:46:30 PM PDT 24 |
Mar 17 12:56:03 PM PDT 24 |
1814413715 ps |
| T390 |
/workspace/coverage/default/19.sram_ctrl_stress_all.766550960 |
|
|
Mar 17 12:47:34 PM PDT 24 |
Mar 17 12:57:36 PM PDT 24 |
12089503579 ps |
| T391 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2235899937 |
|
|
Mar 17 12:47:34 PM PDT 24 |
Mar 17 12:49:02 PM PDT 24 |
5786438529 ps |
| T392 |
/workspace/coverage/default/38.sram_ctrl_partial_access.452329507 |
|
|
Mar 17 12:48:30 PM PDT 24 |
Mar 17 12:48:36 PM PDT 24 |
127115907 ps |
| T393 |
/workspace/coverage/default/8.sram_ctrl_stress_all.4203054942 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 01:49:50 PM PDT 24 |
161009874179 ps |
| T394 |
/workspace/coverage/default/43.sram_ctrl_smoke.4071259631 |
|
|
Mar 17 12:49:00 PM PDT 24 |
Mar 17 12:51:01 PM PDT 24 |
598382070 ps |
| T395 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3907619886 |
|
|
Mar 17 12:48:00 PM PDT 24 |
Mar 17 12:48:00 PM PDT 24 |
15058178 ps |
| T396 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.879828043 |
|
|
Mar 17 12:47:19 PM PDT 24 |
Mar 17 01:06:27 PM PDT 24 |
3912062898 ps |
| T397 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.4036169298 |
|
|
Mar 17 12:47:14 PM PDT 24 |
Mar 17 12:51:18 PM PDT 24 |
5154187601 ps |
| T398 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.97785200 |
|
|
Mar 17 12:47:25 PM PDT 24 |
Mar 17 12:58:06 PM PDT 24 |
19477079371 ps |
| T399 |
/workspace/coverage/default/16.sram_ctrl_executable.2798508850 |
|
|
Mar 17 12:47:24 PM PDT 24 |
Mar 17 01:01:59 PM PDT 24 |
103054731854 ps |
| T400 |
/workspace/coverage/default/2.sram_ctrl_smoke.2707019341 |
|
|
Mar 17 12:46:27 PM PDT 24 |
Mar 17 12:46:43 PM PDT 24 |
461305278 ps |
| T401 |
/workspace/coverage/default/46.sram_ctrl_executable.94898083 |
|
|
Mar 17 12:49:15 PM PDT 24 |
Mar 17 01:01:57 PM PDT 24 |
89848067792 ps |
| T402 |
/workspace/coverage/default/44.sram_ctrl_executable.1659039345 |
|
|
Mar 17 12:49:05 PM PDT 24 |
Mar 17 01:04:15 PM PDT 24 |
10968691038 ps |
| T403 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.45296378 |
|
|
Mar 17 12:47:25 PM PDT 24 |
Mar 17 12:47:28 PM PDT 24 |
160081948 ps |
| T404 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1107076565 |
|
|
Mar 17 12:47:13 PM PDT 24 |
Mar 17 12:59:18 PM PDT 24 |
4498183020 ps |
| T405 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.4000603777 |
|
|
Mar 17 12:47:30 PM PDT 24 |
Mar 17 12:47:30 PM PDT 24 |
141562756 ps |
| T406 |
/workspace/coverage/default/44.sram_ctrl_partial_access.901292310 |
|
|
Mar 17 12:49:18 PM PDT 24 |
Mar 17 12:51:10 PM PDT 24 |
796581467 ps |
| T407 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.3400400615 |
|
|
Mar 17 12:48:18 PM PDT 24 |
Mar 17 12:52:13 PM PDT 24 |
3190994059 ps |
| T408 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3632272298 |
|
|
Mar 17 12:48:09 PM PDT 24 |
Mar 17 12:48:13 PM PDT 24 |
50050383 ps |
| T409 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.2450387919 |
|
|
Mar 17 12:49:01 PM PDT 24 |
Mar 17 12:49:12 PM PDT 24 |
298810146 ps |
| T410 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1782688622 |
|
|
Mar 17 12:47:18 PM PDT 24 |
Mar 17 12:48:11 PM PDT 24 |
126573531 ps |
| T411 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.2157350927 |
|
|
Mar 17 12:48:04 PM PDT 24 |
Mar 17 01:08:10 PM PDT 24 |
75096490808 ps |
| T412 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2736703716 |
|
|
Mar 17 12:47:24 PM PDT 24 |
Mar 17 01:09:59 PM PDT 24 |
10781521781 ps |
| T413 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3591228731 |
|
|
Mar 17 12:47:18 PM PDT 24 |
Mar 17 12:47:22 PM PDT 24 |
40037289 ps |
| T414 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3737063529 |
|
|
Mar 17 12:46:35 PM PDT 24 |
Mar 17 12:46:36 PM PDT 24 |
31384674 ps |
| T415 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.292637073 |
|
|
Mar 17 12:49:27 PM PDT 24 |
Mar 17 12:49:38 PM PDT 24 |
2719796399 ps |
| T416 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.2737645498 |
|
|
Mar 17 12:48:08 PM PDT 24 |
Mar 17 12:48:16 PM PDT 24 |
2700556706 ps |
| T417 |
/workspace/coverage/default/4.sram_ctrl_bijection.1560557317 |
|
|
Mar 17 12:47:19 PM PDT 24 |
Mar 17 12:47:42 PM PDT 24 |
1257078936 ps |
| T418 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1637918308 |
|
|
Mar 17 12:47:02 PM PDT 24 |
Mar 17 12:47:34 PM PDT 24 |
92881484 ps |
| T105 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.836037902 |
|
|
Mar 17 12:46:57 PM PDT 24 |
Mar 17 12:47:43 PM PDT 24 |
3143479889 ps |
| T419 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3474952399 |
|
|
Mar 17 12:47:00 PM PDT 24 |
Mar 17 01:07:08 PM PDT 24 |
17963439294 ps |
| T420 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3482061152 |
|
|
Mar 17 12:47:34 PM PDT 24 |
Mar 17 12:53:14 PM PDT 24 |
34896179096 ps |
| T421 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1044234784 |
|
|
Mar 17 12:47:01 PM PDT 24 |
Mar 17 12:47:03 PM PDT 24 |
44214223 ps |
| T422 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.536874459 |
|
|
Mar 17 12:48:11 PM PDT 24 |
Mar 17 12:49:56 PM PDT 24 |
1910622542 ps |
| T423 |
/workspace/coverage/default/47.sram_ctrl_partial_access.111596341 |
|
|
Mar 17 12:49:19 PM PDT 24 |
Mar 17 12:49:21 PM PDT 24 |
417417336 ps |
| T424 |
/workspace/coverage/default/14.sram_ctrl_executable.4230187550 |
|
|
Mar 17 12:47:22 PM PDT 24 |
Mar 17 01:13:01 PM PDT 24 |
52599049210 ps |
| T425 |
/workspace/coverage/default/28.sram_ctrl_regwen.293426264 |
|
|
Mar 17 12:47:59 PM PDT 24 |
Mar 17 12:57:30 PM PDT 24 |
5179926842 ps |
| T426 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2927314625 |
|
|
Mar 17 12:47:30 PM PDT 24 |
Mar 17 12:47:48 PM PDT 24 |
106979986 ps |
| T427 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1554868936 |
|
|
Mar 17 12:48:54 PM PDT 24 |
Mar 17 12:49:23 PM PDT 24 |
3415367088 ps |
| T428 |
/workspace/coverage/default/37.sram_ctrl_alert_test.365996693 |
|
|
Mar 17 12:48:32 PM PDT 24 |
Mar 17 12:48:32 PM PDT 24 |
15841405 ps |
| T429 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3581745549 |
|
|
Mar 17 12:47:59 PM PDT 24 |
Mar 17 12:48:07 PM PDT 24 |
80863136 ps |
| T430 |
/workspace/coverage/default/28.sram_ctrl_alert_test.3865984217 |
|
|
Mar 17 12:48:04 PM PDT 24 |
Mar 17 12:48:04 PM PDT 24 |
25874628 ps |
| T431 |
/workspace/coverage/default/31.sram_ctrl_bijection.2288335551 |
|
|
Mar 17 12:48:08 PM PDT 24 |
Mar 17 12:48:54 PM PDT 24 |
10391966628 ps |
| T432 |
/workspace/coverage/default/33.sram_ctrl_alert_test.1875828147 |
|
|
Mar 17 12:48:15 PM PDT 24 |
Mar 17 12:48:18 PM PDT 24 |
143909292 ps |
| T433 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2956470113 |
|
|
Mar 17 12:49:04 PM PDT 24 |
Mar 17 12:49:09 PM PDT 24 |
322436267 ps |
| T434 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.2855022414 |
|
|
Mar 17 12:48:03 PM PDT 24 |
Mar 17 12:50:35 PM PDT 24 |
217987831 ps |
| T435 |
/workspace/coverage/default/38.sram_ctrl_bijection.4245491712 |
|
|
Mar 17 12:48:36 PM PDT 24 |
Mar 17 12:48:59 PM PDT 24 |
4222046712 ps |
| T436 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2977838395 |
|
|
Mar 17 12:46:29 PM PDT 24 |
Mar 17 12:56:50 PM PDT 24 |
11092381605 ps |
| T437 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1742824715 |
|
|
Mar 17 12:48:58 PM PDT 24 |
Mar 17 12:54:09 PM PDT 24 |
25062718072 ps |
| T438 |
/workspace/coverage/default/12.sram_ctrl_alert_test.329115283 |
|
|
Mar 17 12:48:39 PM PDT 24 |
Mar 17 12:48:41 PM PDT 24 |
24071958 ps |
| T439 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.545206427 |
|
|
Mar 17 12:48:13 PM PDT 24 |
Mar 17 01:06:32 PM PDT 24 |
26010264662 ps |
| T440 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.2838812701 |
|
|
Mar 17 12:48:10 PM PDT 24 |
Mar 17 12:48:14 PM PDT 24 |
201731304 ps |
| T441 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3821871176 |
|
|
Mar 17 12:47:02 PM PDT 24 |
Mar 17 12:47:07 PM PDT 24 |
517739185 ps |
| T442 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1896284977 |
|
|
Mar 17 12:47:12 PM PDT 24 |
Mar 17 12:47:16 PM PDT 24 |
76024797 ps |
| T443 |
/workspace/coverage/default/13.sram_ctrl_bijection.3445620103 |
|
|
Mar 17 12:47:24 PM PDT 24 |
Mar 17 12:48:14 PM PDT 24 |
2368402871 ps |
| T444 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.544912639 |
|
|
Mar 17 12:48:04 PM PDT 24 |
Mar 17 01:02:37 PM PDT 24 |
13618039422 ps |
| T445 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.3766305044 |
|
|
Mar 17 12:48:42 PM PDT 24 |
Mar 17 01:04:58 PM PDT 24 |
12206361116 ps |
| T446 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3163131805 |
|
|
Mar 17 12:49:36 PM PDT 24 |
Mar 17 12:49:37 PM PDT 24 |
28500167 ps |
| T447 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2151827789 |
|
|
Mar 17 12:48:01 PM PDT 24 |
Mar 17 12:48:05 PM PDT 24 |
67767316 ps |
| T448 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.1893207635 |
|
|
Mar 17 12:48:25 PM PDT 24 |
Mar 17 12:48:26 PM PDT 24 |
28930975 ps |
| T449 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3931533287 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:52:14 PM PDT 24 |
22897832342 ps |
| T450 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3788653692 |
|
|
Mar 17 12:48:40 PM PDT 24 |
Mar 17 12:54:19 PM PDT 24 |
24204036144 ps |
| T451 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.3893907067 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:47:23 PM PDT 24 |
55781060 ps |
| T452 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3260012035 |
|
|
Mar 17 12:47:43 PM PDT 24 |
Mar 17 12:48:40 PM PDT 24 |
370690534 ps |
| T453 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2411390436 |
|
|
Mar 17 12:49:29 PM PDT 24 |
Mar 17 12:49:38 PM PDT 24 |
8238036072 ps |
| T454 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.512884266 |
|
|
Mar 17 12:47:28 PM PDT 24 |
Mar 17 12:48:28 PM PDT 24 |
390398509 ps |
| T455 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.111927705 |
|
|
Mar 17 12:48:10 PM PDT 24 |
Mar 17 01:05:30 PM PDT 24 |
55813907399 ps |
| T456 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2990674307 |
|
|
Mar 17 12:47:34 PM PDT 24 |
Mar 17 12:52:54 PM PDT 24 |
19184812589 ps |
| T457 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1575663864 |
|
|
Mar 17 12:48:17 PM PDT 24 |
Mar 17 12:48:18 PM PDT 24 |
46877436 ps |
| T458 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.3501911297 |
|
|
Mar 17 12:48:50 PM PDT 24 |
Mar 17 01:10:43 PM PDT 24 |
19065107869 ps |
| T459 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2540508647 |
|
|
Mar 17 12:49:12 PM PDT 24 |
Mar 17 12:49:47 PM PDT 24 |
329109707 ps |
| T460 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.1713604162 |
|
|
Mar 17 12:48:52 PM PDT 24 |
Mar 17 12:48:58 PM PDT 24 |
595407757 ps |
| T461 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1470002380 |
|
|
Mar 17 12:49:01 PM PDT 24 |
Mar 17 12:52:09 PM PDT 24 |
2003707214 ps |
| T462 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2202172881 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:51:34 PM PDT 24 |
916145830 ps |
| T463 |
/workspace/coverage/default/6.sram_ctrl_smoke.4208512444 |
|
|
Mar 17 12:47:19 PM PDT 24 |
Mar 17 12:47:30 PM PDT 24 |
542635928 ps |
| T464 |
/workspace/coverage/default/47.sram_ctrl_stress_all.77255443 |
|
|
Mar 17 12:49:28 PM PDT 24 |
Mar 17 02:07:25 PM PDT 24 |
192028318679 ps |
| T465 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.483597789 |
|
|
Mar 17 12:48:19 PM PDT 24 |
Mar 17 12:55:37 PM PDT 24 |
20217398412 ps |
| T466 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2393935626 |
|
|
Mar 17 12:48:13 PM PDT 24 |
Mar 17 12:48:53 PM PDT 24 |
123046570 ps |
| T106 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.678351843 |
|
|
Mar 17 12:48:02 PM PDT 24 |
Mar 17 12:51:37 PM PDT 24 |
8062126472 ps |
| T467 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.95664947 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:47:38 PM PDT 24 |
95214173 ps |
| T468 |
/workspace/coverage/default/10.sram_ctrl_regwen.1586072623 |
|
|
Mar 17 12:48:39 PM PDT 24 |
Mar 17 12:50:03 PM PDT 24 |
11472936351 ps |
| T469 |
/workspace/coverage/default/30.sram_ctrl_partial_access.2296800963 |
|
|
Mar 17 12:48:08 PM PDT 24 |
Mar 17 12:48:24 PM PDT 24 |
3032878375 ps |
| T470 |
/workspace/coverage/default/44.sram_ctrl_smoke.834216123 |
|
|
Mar 17 12:49:18 PM PDT 24 |
Mar 17 12:49:25 PM PDT 24 |
135625581 ps |
| T471 |
/workspace/coverage/default/19.sram_ctrl_alert_test.2808414455 |
|
|
Mar 17 12:47:29 PM PDT 24 |
Mar 17 12:47:30 PM PDT 24 |
12873256 ps |
| T472 |
/workspace/coverage/default/15.sram_ctrl_partial_access.359460408 |
|
|
Mar 17 12:47:23 PM PDT 24 |
Mar 17 12:47:38 PM PDT 24 |
2174356589 ps |
| T473 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.765408571 |
|
|
Mar 17 12:48:48 PM PDT 24 |
Mar 17 12:48:53 PM PDT 24 |
958617862 ps |
| T474 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2798355129 |
|
|
Mar 17 12:47:22 PM PDT 24 |
Mar 17 12:47:24 PM PDT 24 |
292951649 ps |
| T475 |
/workspace/coverage/default/15.sram_ctrl_executable.3999730056 |
|
|
Mar 17 12:47:25 PM PDT 24 |
Mar 17 12:59:27 PM PDT 24 |
104756060091 ps |
| T476 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.3927970971 |
|
|
Mar 17 12:47:31 PM PDT 24 |
Mar 17 12:56:35 PM PDT 24 |
9889694441 ps |
| T477 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.2365427198 |
|
|
Mar 17 12:47:36 PM PDT 24 |
Mar 17 01:05:53 PM PDT 24 |
17102456654 ps |
| T478 |
/workspace/coverage/default/27.sram_ctrl_alert_test.3710585409 |
|
|
Mar 17 12:47:53 PM PDT 24 |
Mar 17 12:47:54 PM PDT 24 |
17835484 ps |
| T479 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.3616880222 |
|
|
Mar 17 12:47:53 PM PDT 24 |
Mar 17 12:47:56 PM PDT 24 |
87203705 ps |
| T480 |
/workspace/coverage/default/3.sram_ctrl_executable.1494536418 |
|
|
Mar 17 12:46:59 PM PDT 24 |
Mar 17 12:59:32 PM PDT 24 |
12804803224 ps |
| T481 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.2402596293 |
|
|
Mar 17 12:48:11 PM PDT 24 |
Mar 17 12:49:20 PM PDT 24 |
1214974805 ps |
| T482 |
/workspace/coverage/default/14.sram_ctrl_partial_access.78260211 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:50:01 PM PDT 24 |
224133539 ps |
| T483 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3723772026 |
|
|
Mar 17 12:47:07 PM PDT 24 |
Mar 17 12:54:50 PM PDT 24 |
80405972298 ps |
| T484 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.17760315 |
|
|
Mar 17 12:47:15 PM PDT 24 |
Mar 17 01:00:05 PM PDT 24 |
48176161049 ps |
| T485 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2416579713 |
|
|
Mar 17 12:48:50 PM PDT 24 |
Mar 17 12:49:03 PM PDT 24 |
1223552872 ps |
| T486 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.121161583 |
|
|
Mar 17 12:49:32 PM PDT 24 |
Mar 17 12:52:13 PM PDT 24 |
25122575135 ps |
| T487 |
/workspace/coverage/default/46.sram_ctrl_regwen.2363272033 |
|
|
Mar 17 12:49:15 PM PDT 24 |
Mar 17 12:57:11 PM PDT 24 |
34254260842 ps |
| T488 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.2423263375 |
|
|
Mar 17 12:47:31 PM PDT 24 |
Mar 17 12:47:41 PM PDT 24 |
3697856334 ps |
| T489 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.775834627 |
|
|
Mar 17 12:47:26 PM PDT 24 |
Mar 17 12:53:23 PM PDT 24 |
4115652223 ps |
| T107 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3825175916 |
|
|
Mar 17 12:48:52 PM PDT 24 |
Mar 17 12:49:00 PM PDT 24 |
583949796 ps |
| T490 |
/workspace/coverage/default/35.sram_ctrl_smoke.1172743311 |
|
|
Mar 17 12:48:16 PM PDT 24 |
Mar 17 12:48:20 PM PDT 24 |
89523234 ps |
| T491 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3637647408 |
|
|
Mar 17 12:47:01 PM PDT 24 |
Mar 17 12:47:02 PM PDT 24 |
71505143 ps |
| T492 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1591814371 |
|
|
Mar 17 12:48:30 PM PDT 24 |
Mar 17 12:48:54 PM PDT 24 |
194630075 ps |
| T493 |
/workspace/coverage/default/35.sram_ctrl_partial_access.2702042992 |
|
|
Mar 17 12:48:16 PM PDT 24 |
Mar 17 12:49:15 PM PDT 24 |
1886174704 ps |
| T494 |
/workspace/coverage/default/2.sram_ctrl_bijection.486743048 |
|
|
Mar 17 12:46:29 PM PDT 24 |
Mar 17 12:47:12 PM PDT 24 |
8478576495 ps |
| T495 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2489892212 |
|
|
Mar 17 12:49:34 PM PDT 24 |
Mar 17 12:55:07 PM PDT 24 |
7261790043 ps |
| T496 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2194756952 |
|
|
Mar 17 12:47:26 PM PDT 24 |
Mar 17 12:59:13 PM PDT 24 |
9133082103 ps |
| T497 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1790672103 |
|
|
Mar 17 12:48:52 PM PDT 24 |
Mar 17 12:48:54 PM PDT 24 |
48556197 ps |
| T498 |
/workspace/coverage/default/24.sram_ctrl_stress_all.512549843 |
|
|
Mar 17 12:47:49 PM PDT 24 |
Mar 17 01:10:35 PM PDT 24 |
15825829698 ps |
| T499 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1341800920 |
|
|
Mar 17 12:47:29 PM PDT 24 |
Mar 17 12:47:30 PM PDT 24 |
14698324 ps |
| T500 |
/workspace/coverage/default/4.sram_ctrl_executable.99264789 |
|
|
Mar 17 12:47:11 PM PDT 24 |
Mar 17 12:57:02 PM PDT 24 |
2257122929 ps |
| T501 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3448195554 |
|
|
Mar 17 12:48:08 PM PDT 24 |
Mar 17 01:27:54 PM PDT 24 |
84173180651 ps |
| T502 |
/workspace/coverage/default/16.sram_ctrl_bijection.1102430513 |
|
|
Mar 17 12:47:25 PM PDT 24 |
Mar 17 12:48:26 PM PDT 24 |
993553791 ps |
| T503 |
/workspace/coverage/default/46.sram_ctrl_alert_test.800376330 |
|
|
Mar 17 12:49:14 PM PDT 24 |
Mar 17 12:49:15 PM PDT 24 |
14655740 ps |
| T504 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.537376382 |
|
|
Mar 17 12:46:42 PM PDT 24 |
Mar 17 12:46:45 PM PDT 24 |
50190306 ps |
| T505 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.693044291 |
|
|
Mar 17 12:46:38 PM PDT 24 |
Mar 17 12:51:46 PM PDT 24 |
17329895665 ps |
| T506 |
/workspace/coverage/default/22.sram_ctrl_stress_all.2230072193 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 01:28:29 PM PDT 24 |
56095742420 ps |
| T108 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1684792872 |
|
|
Mar 17 12:49:09 PM PDT 24 |
Mar 17 12:51:34 PM PDT 24 |
3656892232 ps |
| T507 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2322539261 |
|
|
Mar 17 12:47:05 PM PDT 24 |
Mar 17 12:47:12 PM PDT 24 |
228417168 ps |
| T508 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3291135575 |
|
|
Mar 17 12:48:11 PM PDT 24 |
Mar 17 12:53:17 PM PDT 24 |
9060434696 ps |
| T509 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2636813825 |
|
|
Mar 17 12:49:14 PM PDT 24 |
Mar 17 12:52:35 PM PDT 24 |
29987807718 ps |
| T510 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.4177342622 |
|
|
Mar 17 12:47:44 PM PDT 24 |
Mar 17 12:47:49 PM PDT 24 |
1111416064 ps |
| T511 |
/workspace/coverage/default/42.sram_ctrl_regwen.3509914457 |
|
|
Mar 17 12:48:57 PM PDT 24 |
Mar 17 12:51:14 PM PDT 24 |
1401704482 ps |
| T512 |
/workspace/coverage/default/27.sram_ctrl_bijection.1912392610 |
|
|
Mar 17 12:47:52 PM PDT 24 |
Mar 17 12:48:51 PM PDT 24 |
4030651298 ps |
| T513 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.647992069 |
|
|
Mar 17 12:47:29 PM PDT 24 |
Mar 17 12:47:35 PM PDT 24 |
407378541 ps |
| T514 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3744135068 |
|
|
Mar 17 12:48:03 PM PDT 24 |
Mar 17 12:48:08 PM PDT 24 |
395466802 ps |
| T515 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3593965217 |
|
|
Mar 17 12:48:17 PM PDT 24 |
Mar 17 12:48:53 PM PDT 24 |
107792710 ps |
| T516 |
/workspace/coverage/default/42.sram_ctrl_executable.3363632946 |
|
|
Mar 17 12:48:57 PM PDT 24 |
Mar 17 01:02:49 PM PDT 24 |
11817781407 ps |
| T517 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2514153861 |
|
|
Mar 17 12:49:05 PM PDT 24 |
Mar 17 12:50:22 PM PDT 24 |
426880752 ps |
| T518 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2896382069 |
|
|
Mar 17 12:49:02 PM PDT 24 |
Mar 17 12:54:01 PM PDT 24 |
24178845558 ps |
| T519 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1352209495 |
|
|
Mar 17 12:47:15 PM PDT 24 |
Mar 17 12:49:55 PM PDT 24 |
2758963138 ps |
| T520 |
/workspace/coverage/default/40.sram_ctrl_regwen.2372065015 |
|
|
Mar 17 12:48:58 PM PDT 24 |
Mar 17 12:56:13 PM PDT 24 |
1771189608 ps |
| T521 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2655739232 |
|
|
Mar 17 12:47:44 PM PDT 24 |
Mar 17 12:47:45 PM PDT 24 |
90400099 ps |
| T522 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2728570155 |
|
|
Mar 17 12:47:54 PM PDT 24 |
Mar 17 12:47:58 PM PDT 24 |
67578439 ps |
| T523 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1842278735 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:48:17 PM PDT 24 |
2781008029 ps |
| T524 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4201308326 |
|
|
Mar 17 12:48:39 PM PDT 24 |
Mar 17 12:48:42 PM PDT 24 |
463921488 ps |
| T525 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.1570473052 |
|
|
Mar 17 12:47:34 PM PDT 24 |
Mar 17 12:47:40 PM PDT 24 |
2801782758 ps |
| T526 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.3417464369 |
|
|
Mar 17 12:47:21 PM PDT 24 |
Mar 17 12:48:57 PM PDT 24 |
247734357 ps |
| T527 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2457428773 |
|
|
Mar 17 12:46:28 PM PDT 24 |
Mar 17 12:46:29 PM PDT 24 |
14899569 ps |
| T528 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1635902098 |
|
|
Mar 17 12:49:11 PM PDT 24 |
Mar 17 12:52:53 PM PDT 24 |
2360498212 ps |
| T529 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3950494866 |
|
|
Mar 17 12:48:13 PM PDT 24 |
Mar 17 12:53:49 PM PDT 24 |
1203300438 ps |
| T530 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.247917781 |
|
|
Mar 17 12:47:20 PM PDT 24 |
Mar 17 12:50:52 PM PDT 24 |
8181040845 ps |
| T531 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3570288090 |
|
|
Mar 17 12:48:26 PM PDT 24 |
Mar 17 12:51:55 PM PDT 24 |
5251538583 ps |
| T532 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3351252045 |
|
|
Mar 17 12:49:32 PM PDT 24 |
Mar 17 12:49:33 PM PDT 24 |
36675332 ps |
| T533 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2816666528 |
|
|
Mar 17 12:48:53 PM PDT 24 |
Mar 17 12:49:06 PM PDT 24 |
80016373 ps |
| T534 |
/workspace/coverage/default/29.sram_ctrl_alert_test.89633811 |
|
|
Mar 17 12:48:15 PM PDT 24 |
Mar 17 12:48:18 PM PDT 24 |
16425758 ps |
| T535 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.710285219 |
|
|
Mar 17 12:49:11 PM PDT 24 |
Mar 17 12:56:15 PM PDT 24 |
114661015657 ps |
| T536 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.628283346 |
|
|
Mar 17 12:47:03 PM PDT 24 |
Mar 17 12:48:58 PM PDT 24 |
140939114 ps |
| T537 |
/workspace/coverage/default/37.sram_ctrl_executable.3695520519 |
|
|
Mar 17 12:48:25 PM PDT 24 |
Mar 17 01:08:20 PM PDT 24 |
16748511408 ps |
| T538 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2110899370 |
|
|
Mar 17 12:48:03 PM PDT 24 |
Mar 17 12:48:11 PM PDT 24 |
355573788 ps |
| T539 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2536416637 |
|
|
Mar 17 12:48:50 PM PDT 24 |
Mar 17 12:48:53 PM PDT 24 |
174184124 ps |
| T540 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2192037322 |
|
|
Mar 17 12:49:15 PM PDT 24 |
Mar 17 12:50:37 PM PDT 24 |
367232981 ps |
| T541 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.4192325678 |
|
|
Mar 17 12:47:39 PM PDT 24 |
Mar 17 12:51:05 PM PDT 24 |
2253690353 ps |
| T542 |
/workspace/coverage/default/17.sram_ctrl_bijection.400583059 |
|
|
Mar 17 12:47:24 PM PDT 24 |
Mar 17 12:47:47 PM PDT 24 |
703327318 ps |
| T79 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3265069020 |
|
|
Mar 17 12:47:48 PM PDT 24 |
Mar 17 12:47:51 PM PDT 24 |
195332099 ps |
| T543 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1287197319 |
|
|
Mar 17 12:48:54 PM PDT 24 |
Mar 17 01:07:47 PM PDT 24 |
13158146691 ps |
| T544 |
/workspace/coverage/default/34.sram_ctrl_stress_all.3206115711 |
|
|
Mar 17 12:48:19 PM PDT 24 |
Mar 17 01:31:53 PM PDT 24 |
132035854081 ps |
| T545 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3024427467 |
|
|
Mar 17 12:48:06 PM PDT 24 |
Mar 17 12:48:16 PM PDT 24 |
73092944 ps |
| T546 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.194632760 |
|
|
Mar 17 12:48:09 PM PDT 24 |
Mar 17 12:49:49 PM PDT 24 |
509436258 ps |
| T547 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.2757337387 |
|
|
Mar 17 12:48:10 PM PDT 24 |
Mar 17 12:49:28 PM PDT 24 |
909635262 ps |
| T548 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.752127240 |
|
|
Mar 17 12:47:01 PM PDT 24 |
Mar 17 12:56:05 PM PDT 24 |
2260796591 ps |
| T549 |
/workspace/coverage/default/44.sram_ctrl_alert_test.391691585 |
|
|
Mar 17 12:49:04 PM PDT 24 |
Mar 17 12:49:05 PM PDT 24 |
12018407 ps |
| T550 |
/workspace/coverage/default/42.sram_ctrl_alert_test.3492421915 |
|
|
Mar 17 12:48:57 PM PDT 24 |
Mar 17 12:48:58 PM PDT 24 |
17842990 ps |
| T551 |
/workspace/coverage/default/3.sram_ctrl_bijection.3009290388 |
|
|
Mar 17 12:46:37 PM PDT 24 |
Mar 17 12:47:29 PM PDT 24 |
3660799344 ps |
| T552 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1377790856 |
|
|
Mar 17 12:47:13 PM PDT 24 |
Mar 17 12:52:30 PM PDT 24 |
1372661839 ps |
| T553 |
/workspace/coverage/default/2.sram_ctrl_stress_all.652937690 |
|
|
Mar 17 12:46:28 PM PDT 24 |
Mar 17 01:00:20 PM PDT 24 |
7313492993 ps |
| T554 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.231554883 |
|
|
Mar 17 12:48:03 PM PDT 24 |
Mar 17 12:49:27 PM PDT 24 |
129756948 ps |