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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.10 99.81 97.10 100.00 100.00 98.58 99.70 98.52


Total test records in report: 1032
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T309 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2766127951 Mar 24 01:17:26 PM PDT 24 Mar 24 01:17:30 PM PDT 24 65389236 ps
T310 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2613592919 Mar 24 01:19:03 PM PDT 24 Mar 24 01:20:13 PM PDT 24 2735004078 ps
T311 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2662465300 Mar 24 01:17:30 PM PDT 24 Mar 24 01:21:42 PM PDT 24 19683077929 ps
T312 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.4059094060 Mar 24 01:16:59 PM PDT 24 Mar 24 01:17:02 PM PDT 24 88568897 ps
T313 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3261317321 Mar 24 01:17:36 PM PDT 24 Mar 24 01:18:23 PM PDT 24 3646697065 ps
T314 /workspace/coverage/default/46.sram_ctrl_partial_access.525805835 Mar 24 01:19:47 PM PDT 24 Mar 24 01:20:14 PM PDT 24 803635755 ps
T315 /workspace/coverage/default/0.sram_ctrl_stress_all.3157034406 Mar 24 01:16:42 PM PDT 24 Mar 24 02:06:19 PM PDT 24 9768775168 ps
T316 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3034055984 Mar 24 01:17:32 PM PDT 24 Mar 24 01:21:31 PM PDT 24 2588283734 ps
T317 /workspace/coverage/default/5.sram_ctrl_mem_walk.362011139 Mar 24 01:17:15 PM PDT 24 Mar 24 01:17:20 PM PDT 24 356045519 ps
T138 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.583187773 Mar 24 01:19:02 PM PDT 24 Mar 24 01:25:00 PM PDT 24 33219085537 ps
T318 /workspace/coverage/default/25.sram_ctrl_partial_access.4280020240 Mar 24 01:18:10 PM PDT 24 Mar 24 01:18:22 PM PDT 24 370303499 ps
T319 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1439266173 Mar 24 01:19:37 PM PDT 24 Mar 24 01:19:42 PM PDT 24 588236197 ps
T320 /workspace/coverage/default/31.sram_ctrl_smoke.1196712672 Mar 24 01:18:30 PM PDT 24 Mar 24 01:18:32 PM PDT 24 37433959 ps
T321 /workspace/coverage/default/34.sram_ctrl_lc_escalation.1287590660 Mar 24 01:18:48 PM PDT 24 Mar 24 01:18:55 PM PDT 24 530737347 ps
T322 /workspace/coverage/default/10.sram_ctrl_alert_test.2799200550 Mar 24 01:17:26 PM PDT 24 Mar 24 01:17:27 PM PDT 24 13687558 ps
T323 /workspace/coverage/default/40.sram_ctrl_mem_walk.2249140780 Mar 24 01:19:12 PM PDT 24 Mar 24 01:19:16 PM PDT 24 76544709 ps
T324 /workspace/coverage/default/29.sram_ctrl_max_throughput.2351959211 Mar 24 01:18:22 PM PDT 24 Mar 24 01:18:35 PM PDT 24 280410078 ps
T325 /workspace/coverage/default/17.sram_ctrl_lc_escalation.342309350 Mar 24 01:17:38 PM PDT 24 Mar 24 01:17:40 PM PDT 24 191498110 ps
T326 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3572688222 Mar 24 01:16:47 PM PDT 24 Mar 24 01:16:48 PM PDT 24 192221662 ps
T327 /workspace/coverage/default/13.sram_ctrl_partial_access.2883386217 Mar 24 01:17:30 PM PDT 24 Mar 24 01:17:45 PM PDT 24 3433982574 ps
T328 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.942944159 Mar 24 01:17:22 PM PDT 24 Mar 24 01:25:29 PM PDT 24 22527566695 ps
T329 /workspace/coverage/default/25.sram_ctrl_max_throughput.817992315 Mar 24 01:18:10 PM PDT 24 Mar 24 01:18:12 PM PDT 24 126549216 ps
T330 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.313263307 Mar 24 01:19:32 PM PDT 24 Mar 24 01:20:07 PM PDT 24 672602208 ps
T331 /workspace/coverage/default/44.sram_ctrl_ram_cfg.4217649285 Mar 24 01:19:37 PM PDT 24 Mar 24 01:19:38 PM PDT 24 81524169 ps
T332 /workspace/coverage/default/0.sram_ctrl_partial_access.1805101744 Mar 24 01:16:40 PM PDT 24 Mar 24 01:16:57 PM PDT 24 2713674786 ps
T333 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.839970385 Mar 24 01:18:18 PM PDT 24 Mar 24 01:18:34 PM PDT 24 541704333 ps
T334 /workspace/coverage/default/2.sram_ctrl_executable.751437510 Mar 24 01:16:57 PM PDT 24 Mar 24 01:19:25 PM PDT 24 16033452289 ps
T335 /workspace/coverage/default/9.sram_ctrl_regwen.2590933211 Mar 24 01:17:27 PM PDT 24 Mar 24 01:30:49 PM PDT 24 47810458982 ps
T336 /workspace/coverage/default/5.sram_ctrl_smoke.484766576 Mar 24 01:17:13 PM PDT 24 Mar 24 01:17:26 PM PDT 24 1451086949 ps
T337 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1624124549 Mar 24 01:17:25 PM PDT 24 Mar 24 01:20:47 PM PDT 24 8290742864 ps
T338 /workspace/coverage/default/43.sram_ctrl_max_throughput.3134621363 Mar 24 01:19:29 PM PDT 24 Mar 24 01:20:45 PM PDT 24 1708576420 ps
T339 /workspace/coverage/default/33.sram_ctrl_mem_walk.2108732092 Mar 24 01:18:46 PM PDT 24 Mar 24 01:18:52 PM PDT 24 287216319 ps
T340 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2787929964 Mar 24 01:18:46 PM PDT 24 Mar 24 01:18:49 PM PDT 24 45912996 ps
T341 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3580894755 Mar 24 01:18:47 PM PDT 24 Mar 24 01:27:25 PM PDT 24 46648524068 ps
T342 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.311959525 Mar 24 01:17:37 PM PDT 24 Mar 24 01:25:35 PM PDT 24 61859621804 ps
T343 /workspace/coverage/default/30.sram_ctrl_bijection.523759323 Mar 24 01:18:30 PM PDT 24 Mar 24 01:19:10 PM PDT 24 1381388834 ps
T344 /workspace/coverage/default/5.sram_ctrl_lc_escalation.3358611622 Mar 24 01:17:21 PM PDT 24 Mar 24 01:17:27 PM PDT 24 723187492 ps
T345 /workspace/coverage/default/42.sram_ctrl_max_throughput.2972143175 Mar 24 01:19:22 PM PDT 24 Mar 24 01:20:35 PM PDT 24 647119341 ps
T346 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.4119882407 Mar 24 01:18:40 PM PDT 24 Mar 24 01:18:43 PM PDT 24 492234218 ps
T347 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.1029282151 Mar 24 01:17:43 PM PDT 24 Mar 24 01:22:41 PM PDT 24 3141321256 ps
T348 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3314590464 Mar 24 01:17:36 PM PDT 24 Mar 24 01:17:37 PM PDT 24 27917120 ps
T349 /workspace/coverage/default/26.sram_ctrl_executable.2689860965 Mar 24 01:18:13 PM PDT 24 Mar 24 01:30:04 PM PDT 24 9285398442 ps
T350 /workspace/coverage/default/17.sram_ctrl_multiple_keys.3890017471 Mar 24 01:17:38 PM PDT 24 Mar 24 01:29:21 PM PDT 24 49462031795 ps
T351 /workspace/coverage/default/37.sram_ctrl_alert_test.3129486980 Mar 24 01:19:01 PM PDT 24 Mar 24 01:19:02 PM PDT 24 14071428 ps
T352 /workspace/coverage/default/2.sram_ctrl_partial_access.2436737341 Mar 24 01:16:46 PM PDT 24 Mar 24 01:17:05 PM PDT 24 1169477842 ps
T353 /workspace/coverage/default/41.sram_ctrl_stress_all.1662068208 Mar 24 01:19:19 PM PDT 24 Mar 24 02:02:08 PM PDT 24 49895841211 ps
T354 /workspace/coverage/default/30.sram_ctrl_alert_test.644236958 Mar 24 01:18:31 PM PDT 24 Mar 24 01:18:33 PM PDT 24 20253088 ps
T112 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1306302642 Mar 24 01:19:14 PM PDT 24 Mar 24 01:23:09 PM PDT 24 7242339487 ps
T355 /workspace/coverage/default/20.sram_ctrl_max_throughput.100165929 Mar 24 01:17:55 PM PDT 24 Mar 24 01:18:10 PM PDT 24 77684154 ps
T113 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.675663442 Mar 24 01:17:23 PM PDT 24 Mar 24 01:19:08 PM PDT 24 4571154838 ps
T356 /workspace/coverage/default/4.sram_ctrl_mem_walk.905196318 Mar 24 01:17:15 PM PDT 24 Mar 24 01:17:20 PM PDT 24 71819524 ps
T357 /workspace/coverage/default/35.sram_ctrl_max_throughput.2833189216 Mar 24 01:18:58 PM PDT 24 Mar 24 01:19:03 PM PDT 24 214712902 ps
T358 /workspace/coverage/default/16.sram_ctrl_mem_walk.1212668087 Mar 24 01:17:37 PM PDT 24 Mar 24 01:17:47 PM PDT 24 3265161235 ps
T359 /workspace/coverage/default/15.sram_ctrl_max_throughput.3472256324 Mar 24 01:17:29 PM PDT 24 Mar 24 01:17:57 PM PDT 24 470511132 ps
T360 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1366504880 Mar 24 01:16:56 PM PDT 24 Mar 24 01:17:07 PM PDT 24 372330911 ps
T361 /workspace/coverage/default/24.sram_ctrl_multiple_keys.4010916094 Mar 24 01:18:10 PM PDT 24 Mar 24 01:31:21 PM PDT 24 53633967850 ps
T362 /workspace/coverage/default/43.sram_ctrl_executable.1318296215 Mar 24 01:19:27 PM PDT 24 Mar 24 01:27:34 PM PDT 24 1558057935 ps
T363 /workspace/coverage/default/26.sram_ctrl_mem_walk.2825697252 Mar 24 01:18:13 PM PDT 24 Mar 24 01:18:23 PM PDT 24 466233480 ps
T364 /workspace/coverage/default/49.sram_ctrl_mem_walk.3120823870 Mar 24 01:20:00 PM PDT 24 Mar 24 01:20:05 PM PDT 24 84549388 ps
T365 /workspace/coverage/default/27.sram_ctrl_executable.1867410000 Mar 24 01:18:16 PM PDT 24 Mar 24 01:34:13 PM PDT 24 13739046637 ps
T366 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2188274793 Mar 24 01:19:10 PM PDT 24 Mar 24 01:21:47 PM PDT 24 9756359072 ps
T367 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.360880865 Mar 24 01:17:35 PM PDT 24 Mar 24 01:20:46 PM PDT 24 3898189375 ps
T368 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3238501380 Mar 24 01:18:51 PM PDT 24 Mar 24 01:33:49 PM PDT 24 17536085985 ps
T369 /workspace/coverage/default/16.sram_ctrl_smoke.1406052557 Mar 24 01:17:31 PM PDT 24 Mar 24 01:17:39 PM PDT 24 1807300641 ps
T370 /workspace/coverage/default/37.sram_ctrl_executable.1432428795 Mar 24 01:19:06 PM PDT 24 Mar 24 01:34:50 PM PDT 24 7753239152 ps
T371 /workspace/coverage/default/30.sram_ctrl_lc_escalation.914685524 Mar 24 01:18:32 PM PDT 24 Mar 24 01:18:40 PM PDT 24 1213229707 ps
T372 /workspace/coverage/default/39.sram_ctrl_multiple_keys.431802 Mar 24 01:19:07 PM PDT 24 Mar 24 01:40:02 PM PDT 24 14971953377 ps
T373 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.414550675 Mar 24 01:18:32 PM PDT 24 Mar 24 01:18:35 PM PDT 24 82386829 ps
T374 /workspace/coverage/default/7.sram_ctrl_alert_test.509750738 Mar 24 01:17:25 PM PDT 24 Mar 24 01:17:26 PM PDT 24 36057213 ps
T375 /workspace/coverage/default/43.sram_ctrl_multiple_keys.1260361297 Mar 24 01:19:25 PM PDT 24 Mar 24 01:30:21 PM PDT 24 34960984522 ps
T376 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1459139306 Mar 24 01:18:12 PM PDT 24 Mar 24 01:19:38 PM PDT 24 262311300 ps
T377 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.2823989394 Mar 24 01:17:15 PM PDT 24 Mar 24 01:21:33 PM PDT 24 2681554962 ps
T378 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2797728093 Mar 24 01:17:16 PM PDT 24 Mar 24 01:18:32 PM PDT 24 138744559 ps
T379 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.476479081 Mar 24 01:19:51 PM PDT 24 Mar 24 01:20:04 PM PDT 24 3725356060 ps
T380 /workspace/coverage/default/16.sram_ctrl_multiple_keys.1693422869 Mar 24 01:17:33 PM PDT 24 Mar 24 01:28:07 PM PDT 24 54014592840 ps
T381 /workspace/coverage/default/7.sram_ctrl_multiple_keys.443707442 Mar 24 01:17:22 PM PDT 24 Mar 24 01:26:40 PM PDT 24 34893683007 ps
T382 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.3965265103 Mar 24 01:16:46 PM PDT 24 Mar 24 01:21:12 PM PDT 24 2789030969 ps
T383 /workspace/coverage/default/36.sram_ctrl_max_throughput.1860967018 Mar 24 01:18:57 PM PDT 24 Mar 24 01:21:38 PM PDT 24 844950156 ps
T384 /workspace/coverage/default/38.sram_ctrl_smoke.2614299467 Mar 24 01:19:06 PM PDT 24 Mar 24 01:19:09 PM PDT 24 38085064 ps
T385 /workspace/coverage/default/29.sram_ctrl_smoke.3487192856 Mar 24 01:18:26 PM PDT 24 Mar 24 01:19:02 PM PDT 24 753410741 ps
T386 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2140387760 Mar 24 01:20:06 PM PDT 24 Mar 24 01:22:31 PM PDT 24 4178773681 ps
T387 /workspace/coverage/default/46.sram_ctrl_executable.1018966182 Mar 24 01:19:48 PM PDT 24 Mar 24 01:32:52 PM PDT 24 7909798462 ps
T388 /workspace/coverage/default/49.sram_ctrl_alert_test.3727561647 Mar 24 01:20:00 PM PDT 24 Mar 24 01:20:01 PM PDT 24 36446497 ps
T389 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.3634917948 Mar 24 01:19:38 PM PDT 24 Mar 24 01:24:27 PM PDT 24 6256063277 ps
T390 /workspace/coverage/default/45.sram_ctrl_regwen.3522099858 Mar 24 01:19:40 PM PDT 24 Mar 24 01:34:23 PM PDT 24 53654334887 ps
T391 /workspace/coverage/default/21.sram_ctrl_smoke.3812465980 Mar 24 01:17:59 PM PDT 24 Mar 24 01:19:10 PM PDT 24 536487111 ps
T392 /workspace/coverage/default/7.sram_ctrl_stress_all.2470059406 Mar 24 01:17:23 PM PDT 24 Mar 24 02:10:05 PM PDT 24 43922747003 ps
T393 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3477354628 Mar 24 01:17:22 PM PDT 24 Mar 24 01:22:15 PM PDT 24 11172195062 ps
T394 /workspace/coverage/default/45.sram_ctrl_executable.1159007930 Mar 24 01:19:40 PM PDT 24 Mar 24 01:34:06 PM PDT 24 39533331207 ps
T395 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.526253945 Mar 24 01:18:04 PM PDT 24 Mar 24 01:18:42 PM PDT 24 814205923 ps
T396 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3845775991 Mar 24 01:17:10 PM PDT 24 Mar 24 01:17:18 PM PDT 24 3052064628 ps
T397 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1202677515 Mar 24 01:17:25 PM PDT 24 Mar 24 01:19:54 PM PDT 24 6538535365 ps
T398 /workspace/coverage/default/45.sram_ctrl_ram_cfg.3717514385 Mar 24 01:19:41 PM PDT 24 Mar 24 01:19:42 PM PDT 24 76678514 ps
T399 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1612797470 Mar 24 01:17:43 PM PDT 24 Mar 24 01:35:45 PM PDT 24 4603478824 ps
T400 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2860183475 Mar 24 01:17:30 PM PDT 24 Mar 24 01:18:06 PM PDT 24 238751491 ps
T401 /workspace/coverage/default/18.sram_ctrl_lc_escalation.691078125 Mar 24 01:17:42 PM PDT 24 Mar 24 01:17:45 PM PDT 24 247299172 ps
T402 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.3955117652 Mar 24 01:17:54 PM PDT 24 Mar 24 01:22:54 PM PDT 24 3357943583 ps
T403 /workspace/coverage/default/21.sram_ctrl_regwen.2836368978 Mar 24 01:18:01 PM PDT 24 Mar 24 01:24:15 PM PDT 24 23379351623 ps
T404 /workspace/coverage/default/31.sram_ctrl_stress_all.1599243426 Mar 24 01:18:35 PM PDT 24 Mar 24 01:56:47 PM PDT 24 50116539294 ps
T405 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3005646794 Mar 24 01:17:28 PM PDT 24 Mar 24 01:17:34 PM PDT 24 171489785 ps
T406 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.4123990551 Mar 24 01:17:43 PM PDT 24 Mar 24 01:17:54 PM PDT 24 167432489 ps
T407 /workspace/coverage/default/6.sram_ctrl_max_throughput.1384588708 Mar 24 01:17:19 PM PDT 24 Mar 24 01:19:04 PM PDT 24 133353832 ps
T408 /workspace/coverage/default/3.sram_ctrl_partial_access.1611336915 Mar 24 01:16:53 PM PDT 24 Mar 24 01:16:56 PM PDT 24 190610817 ps
T409 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1043323168 Mar 24 01:19:04 PM PDT 24 Mar 24 01:23:31 PM PDT 24 5407964580 ps
T114 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2719022561 Mar 24 01:18:03 PM PDT 24 Mar 24 01:20:46 PM PDT 24 9323542344 ps
T410 /workspace/coverage/default/49.sram_ctrl_lc_escalation.2551373975 Mar 24 01:20:08 PM PDT 24 Mar 24 01:20:14 PM PDT 24 556565883 ps
T411 /workspace/coverage/default/7.sram_ctrl_executable.788757992 Mar 24 01:17:25 PM PDT 24 Mar 24 01:26:46 PM PDT 24 2064031123 ps
T412 /workspace/coverage/default/21.sram_ctrl_multiple_keys.532732215 Mar 24 01:18:00 PM PDT 24 Mar 24 01:26:52 PM PDT 24 3886523261 ps
T413 /workspace/coverage/default/1.sram_ctrl_bijection.3937346498 Mar 24 01:16:49 PM PDT 24 Mar 24 01:17:12 PM PDT 24 1532628070 ps
T414 /workspace/coverage/default/31.sram_ctrl_mem_walk.3899347820 Mar 24 01:18:33 PM PDT 24 Mar 24 01:18:43 PM PDT 24 2446694918 ps
T415 /workspace/coverage/default/44.sram_ctrl_partial_access.774103930 Mar 24 01:19:32 PM PDT 24 Mar 24 01:19:46 PM PDT 24 279032258 ps
T416 /workspace/coverage/default/28.sram_ctrl_partial_access.1877555 Mar 24 01:18:16 PM PDT 24 Mar 24 01:18:18 PM PDT 24 54850468 ps
T417 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2081297856 Mar 24 01:18:14 PM PDT 24 Mar 24 01:18:16 PM PDT 24 135563934 ps
T418 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4231717369 Mar 24 01:17:20 PM PDT 24 Mar 24 01:18:27 PM PDT 24 155471559 ps
T419 /workspace/coverage/default/36.sram_ctrl_smoke.3181629702 Mar 24 01:18:54 PM PDT 24 Mar 24 01:19:11 PM PDT 24 1415506864 ps
T420 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.394018892 Mar 24 01:17:26 PM PDT 24 Mar 24 01:18:40 PM PDT 24 6304880017 ps
T421 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3041119312 Mar 24 01:19:57 PM PDT 24 Mar 24 01:34:26 PM PDT 24 78152489220 ps
T422 /workspace/coverage/default/36.sram_ctrl_multiple_keys.2257134498 Mar 24 01:18:58 PM PDT 24 Mar 24 01:31:44 PM PDT 24 12253522278 ps
T423 /workspace/coverage/default/10.sram_ctrl_executable.755759408 Mar 24 01:17:27 PM PDT 24 Mar 24 01:40:52 PM PDT 24 7882251341 ps
T424 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2861193936 Mar 24 01:19:54 PM PDT 24 Mar 24 01:20:29 PM PDT 24 195281512 ps
T425 /workspace/coverage/default/43.sram_ctrl_lc_escalation.3565241453 Mar 24 01:19:30 PM PDT 24 Mar 24 01:19:34 PM PDT 24 421397414 ps
T426 /workspace/coverage/default/24.sram_ctrl_ram_cfg.1753769727 Mar 24 01:18:12 PM PDT 24 Mar 24 01:18:13 PM PDT 24 87167786 ps
T427 /workspace/coverage/default/49.sram_ctrl_regwen.4095180339 Mar 24 01:20:08 PM PDT 24 Mar 24 01:42:49 PM PDT 24 70352556035 ps
T428 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.2207865314 Mar 24 01:18:18 PM PDT 24 Mar 24 01:18:21 PM PDT 24 408566981 ps
T429 /workspace/coverage/default/25.sram_ctrl_executable.1109401926 Mar 24 01:18:14 PM PDT 24 Mar 24 01:42:57 PM PDT 24 19122750180 ps
T430 /workspace/coverage/default/44.sram_ctrl_max_throughput.1289519585 Mar 24 01:19:35 PM PDT 24 Mar 24 01:19:38 PM PDT 24 144293097 ps
T431 /workspace/coverage/default/10.sram_ctrl_mem_walk.1259702006 Mar 24 01:17:22 PM PDT 24 Mar 24 01:17:27 PM PDT 24 131260579 ps
T432 /workspace/coverage/default/21.sram_ctrl_stress_all.1595996058 Mar 24 01:18:02 PM PDT 24 Mar 24 01:53:15 PM PDT 24 9673341980 ps
T433 /workspace/coverage/default/13.sram_ctrl_stress_all.563707275 Mar 24 01:17:33 PM PDT 24 Mar 24 01:26:13 PM PDT 24 4250723147 ps
T115 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3473887972 Mar 24 01:18:36 PM PDT 24 Mar 24 01:21:01 PM PDT 24 13512482162 ps
T434 /workspace/coverage/default/38.sram_ctrl_multiple_keys.3240356077 Mar 24 01:19:05 PM PDT 24 Mar 24 01:40:15 PM PDT 24 2933583488 ps
T435 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.280619001 Mar 24 01:19:04 PM PDT 24 Mar 24 01:25:20 PM PDT 24 5286548538 ps
T436 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.220325987 Mar 24 01:17:10 PM PDT 24 Mar 24 01:17:30 PM PDT 24 685602281 ps
T437 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.609936767 Mar 24 01:17:35 PM PDT 24 Mar 24 01:27:10 PM PDT 24 103475404308 ps
T438 /workspace/coverage/default/1.sram_ctrl_mem_walk.1628621017 Mar 24 01:16:45 PM PDT 24 Mar 24 01:16:55 PM PDT 24 3270923643 ps
T439 /workspace/coverage/default/45.sram_ctrl_max_throughput.1474047708 Mar 24 01:19:38 PM PDT 24 Mar 24 01:21:34 PM PDT 24 138169165 ps
T440 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3918362929 Mar 24 01:17:24 PM PDT 24 Mar 24 01:17:32 PM PDT 24 9212251998 ps
T441 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2231352533 Mar 24 01:17:32 PM PDT 24 Mar 24 01:18:09 PM PDT 24 1400607263 ps
T442 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1464936457 Mar 24 01:17:56 PM PDT 24 Mar 24 01:17:57 PM PDT 24 102963864 ps
T443 /workspace/coverage/default/22.sram_ctrl_ram_cfg.4085260526 Mar 24 01:18:06 PM PDT 24 Mar 24 01:18:07 PM PDT 24 158694129 ps
T444 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1573341805 Mar 24 01:19:08 PM PDT 24 Mar 24 01:28:21 PM PDT 24 7175634457 ps
T445 /workspace/coverage/default/18.sram_ctrl_partial_access.2921099041 Mar 24 01:17:42 PM PDT 24 Mar 24 01:18:15 PM PDT 24 701995946 ps
T446 /workspace/coverage/default/40.sram_ctrl_smoke.715938312 Mar 24 01:19:11 PM PDT 24 Mar 24 01:21:21 PM PDT 24 8536921956 ps
T447 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.4045231520 Mar 24 01:18:43 PM PDT 24 Mar 24 01:24:51 PM PDT 24 1002328253 ps
T448 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.4070776467 Mar 24 01:17:47 PM PDT 24 Mar 24 01:22:47 PM PDT 24 4457582067 ps
T449 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3481912370 Mar 24 01:16:58 PM PDT 24 Mar 24 01:17:08 PM PDT 24 1178899897 ps
T450 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2975849765 Mar 24 01:18:04 PM PDT 24 Mar 24 01:18:04 PM PDT 24 48928529 ps
T35 /workspace/coverage/default/4.sram_ctrl_sec_cm.3728516267 Mar 24 01:17:17 PM PDT 24 Mar 24 01:17:19 PM PDT 24 162659900 ps
T451 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1946368901 Mar 24 01:17:33 PM PDT 24 Mar 24 01:22:06 PM PDT 24 3652775205 ps
T452 /workspace/coverage/default/18.sram_ctrl_ram_cfg.2708193162 Mar 24 01:17:40 PM PDT 24 Mar 24 01:17:41 PM PDT 24 28449266 ps
T453 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.1067780094 Mar 24 01:19:47 PM PDT 24 Mar 24 01:24:41 PM PDT 24 6247504467 ps
T454 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3589126867 Mar 24 01:18:07 PM PDT 24 Mar 24 01:18:08 PM PDT 24 74195288 ps
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T458 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3123073779 Mar 24 01:18:47 PM PDT 24 Mar 24 01:33:07 PM PDT 24 10340783865 ps
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T466 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2881695653 Mar 24 01:19:15 PM PDT 24 Mar 24 01:19:27 PM PDT 24 156836290 ps
T467 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3264033101 Mar 24 01:17:24 PM PDT 24 Mar 24 01:27:42 PM PDT 24 12674782304 ps
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T475 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2366149760 Mar 24 01:19:36 PM PDT 24 Mar 24 01:22:55 PM PDT 24 384139352 ps
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T484 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1495810507 Mar 24 01:17:24 PM PDT 24 Mar 24 01:18:56 PM PDT 24 277116204 ps
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T495 /workspace/coverage/default/38.sram_ctrl_regwen.4144484529 Mar 24 01:19:09 PM PDT 24 Mar 24 01:22:03 PM PDT 24 438595619 ps
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T497 /workspace/coverage/default/2.sram_ctrl_bijection.4054485379 Mar 24 01:16:44 PM PDT 24 Mar 24 01:17:31 PM PDT 24 2125300087 ps
T498 /workspace/coverage/default/32.sram_ctrl_smoke.3481399753 Mar 24 01:18:35 PM PDT 24 Mar 24 01:18:49 PM PDT 24 835985626 ps
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T509 /workspace/coverage/default/29.sram_ctrl_bijection.2907331287 Mar 24 01:18:22 PM PDT 24 Mar 24 01:19:03 PM PDT 24 2372889417 ps
T510 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4138032585 Mar 24 01:18:34 PM PDT 24 Mar 24 01:26:16 PM PDT 24 3785123682 ps
T511 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3677740502 Mar 24 01:18:04 PM PDT 24 Mar 24 01:18:09 PM PDT 24 810154407 ps
T512 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3664260821 Mar 24 01:19:50 PM PDT 24 Mar 24 01:21:50 PM PDT 24 179647063 ps
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T514 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2239236113 Mar 24 01:16:41 PM PDT 24 Mar 24 01:22:55 PM PDT 24 5213005972 ps
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T516 /workspace/coverage/default/0.sram_ctrl_lc_escalation.2447678008 Mar 24 01:16:50 PM PDT 24 Mar 24 01:16:59 PM PDT 24 1390533765 ps
T517 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1079391237 Mar 24 01:18:12 PM PDT 24 Mar 24 01:18:17 PM PDT 24 1802361874 ps
T518 /workspace/coverage/default/9.sram_ctrl_ram_cfg.96569249 Mar 24 01:17:25 PM PDT 24 Mar 24 01:17:26 PM PDT 24 135764713 ps
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T520 /workspace/coverage/default/12.sram_ctrl_multiple_keys.4163445462 Mar 24 01:17:25 PM PDT 24 Mar 24 01:33:26 PM PDT 24 9680488319 ps
T521 /workspace/coverage/default/9.sram_ctrl_bijection.111749912 Mar 24 01:17:26 PM PDT 24 Mar 24 01:18:39 PM PDT 24 19881124841 ps
T522 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2504680947 Mar 24 01:18:23 PM PDT 24 Mar 24 01:22:21 PM PDT 24 2054626074 ps
T523 /workspace/coverage/default/15.sram_ctrl_stress_all.786604890 Mar 24 01:17:38 PM PDT 24 Mar 24 02:44:29 PM PDT 24 230707765276 ps
T524 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.1715657835 Mar 24 01:18:18 PM PDT 24 Mar 24 01:30:19 PM PDT 24 3518542512 ps
T525 /workspace/coverage/default/37.sram_ctrl_ram_cfg.1585821170 Mar 24 01:19:02 PM PDT 24 Mar 24 01:19:03 PM PDT 24 179378349 ps
T526 /workspace/coverage/default/14.sram_ctrl_partial_access.733455695 Mar 24 01:17:34 PM PDT 24 Mar 24 01:18:13 PM PDT 24 942454390 ps
T527 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.333019837 Mar 24 01:18:08 PM PDT 24 Mar 24 01:18:11 PM PDT 24 71318862 ps
T528 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.4064372913 Mar 24 01:17:52 PM PDT 24 Mar 24 01:37:40 PM PDT 24 6814934271 ps
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T530 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3567701227 Mar 24 01:17:34 PM PDT 24 Mar 24 01:22:44 PM PDT 24 13197243996 ps
T531 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.195935410 Mar 24 01:17:07 PM PDT 24 Mar 24 01:24:11 PM PDT 24 19301938805 ps
T532 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1705494877 Mar 24 01:19:12 PM PDT 24 Mar 24 01:19:18 PM PDT 24 592366539 ps
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T536 /workspace/coverage/default/13.sram_ctrl_mem_walk.3783946370 Mar 24 01:17:33 PM PDT 24 Mar 24 01:17:38 PM PDT 24 907374295 ps
T537 /workspace/coverage/default/0.sram_ctrl_alert_test.3504365468 Mar 24 01:16:43 PM PDT 24 Mar 24 01:16:44 PM PDT 24 43735013 ps
T538 /workspace/coverage/default/47.sram_ctrl_ram_cfg.711351614 Mar 24 01:19:52 PM PDT 24 Mar 24 01:19:53 PM PDT 24 31865460 ps
T539 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4001926162 Mar 24 01:19:28 PM PDT 24 Mar 24 01:20:39 PM PDT 24 130080110 ps
T540 /workspace/coverage/default/18.sram_ctrl_mem_walk.2379925063 Mar 24 01:17:40 PM PDT 24 Mar 24 01:17:49 PM PDT 24 1813855623 ps
T541 /workspace/coverage/default/43.sram_ctrl_smoke.164216207 Mar 24 01:19:22 PM PDT 24 Mar 24 01:19:38 PM PDT 24 740091316 ps
T542 /workspace/coverage/default/43.sram_ctrl_alert_test.2292884458 Mar 24 01:19:32 PM PDT 24 Mar 24 01:19:33 PM PDT 24 104783287 ps
T543 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3042829190 Mar 24 01:19:18 PM PDT 24 Mar 24 01:21:21 PM PDT 24 2564456417 ps
T544 /workspace/coverage/default/39.sram_ctrl_alert_test.915681147 Mar 24 01:19:13 PM PDT 24 Mar 24 01:19:13 PM PDT 24 49127422 ps
T545 /workspace/coverage/default/22.sram_ctrl_lc_escalation.2891941802 Mar 24 01:18:06 PM PDT 24 Mar 24 01:18:15 PM PDT 24 5710846689 ps
T546 /workspace/coverage/default/11.sram_ctrl_lc_escalation.2420940279 Mar 24 01:17:30 PM PDT 24 Mar 24 01:17:33 PM PDT 24 152368270 ps
T547 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.652414455 Mar 24 01:17:40 PM PDT 24 Mar 24 01:22:02 PM PDT 24 12317466957 ps
T548 /workspace/coverage/default/12.sram_ctrl_partial_access.3589293121 Mar 24 01:17:25 PM PDT 24 Mar 24 01:17:27 PM PDT 24 615745776 ps
T549 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2692472573 Mar 24 01:18:32 PM PDT 24 Mar 24 01:30:11 PM PDT 24 10820546213 ps
T550 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4242010977 Mar 24 01:17:18 PM PDT 24 Mar 24 01:18:20 PM PDT 24 903250439 ps
T551 /workspace/coverage/default/11.sram_ctrl_executable.3898573251 Mar 24 01:17:23 PM PDT 24 Mar 24 01:33:16 PM PDT 24 58989433707 ps
T552 /workspace/coverage/default/43.sram_ctrl_regwen.660369245 Mar 24 01:19:28 PM PDT 24 Mar 24 01:24:59 PM PDT 24 9547815315 ps
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