Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.81 97.02 100.00 100.00 98.58 99.70 98.52


Total test records in report: 1019
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T309 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.1265026880 Mar 28 03:08:06 PM PDT 24 Mar 28 03:20:15 PM PDT 24 8695921309 ps
T310 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1964144689 Mar 28 03:11:38 PM PDT 24 Mar 28 03:11:41 PM PDT 24 617997732 ps
T311 /workspace/coverage/default/16.sram_ctrl_executable.687064715 Mar 28 03:09:18 PM PDT 24 Mar 28 03:18:45 PM PDT 24 4249515544 ps
T312 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.334950804 Mar 28 03:10:27 PM PDT 24 Mar 28 03:15:48 PM PDT 24 51293263387 ps
T313 /workspace/coverage/default/30.sram_ctrl_smoke.556783796 Mar 28 03:11:04 PM PDT 24 Mar 28 03:11:17 PM PDT 24 206028124 ps
T314 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1266572097 Mar 28 03:11:09 PM PDT 24 Mar 28 03:18:02 PM PDT 24 5792053319 ps
T315 /workspace/coverage/default/16.sram_ctrl_multiple_keys.745221081 Mar 28 03:09:04 PM PDT 24 Mar 28 03:25:31 PM PDT 24 11508620304 ps
T316 /workspace/coverage/default/11.sram_ctrl_lc_escalation.1538177732 Mar 28 03:08:44 PM PDT 24 Mar 28 03:08:48 PM PDT 24 336935367 ps
T317 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.809050537 Mar 28 03:08:15 PM PDT 24 Mar 28 03:15:43 PM PDT 24 33899789956 ps
T48 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.149765650 Mar 28 03:12:17 PM PDT 24 Mar 28 03:16:51 PM PDT 24 1317856989 ps
T318 /workspace/coverage/default/2.sram_ctrl_ram_cfg.4075164266 Mar 28 03:07:46 PM PDT 24 Mar 28 03:07:47 PM PDT 24 46674866 ps
T319 /workspace/coverage/default/23.sram_ctrl_stress_all.487560905 Mar 28 03:10:07 PM PDT 24 Mar 28 04:29:02 PM PDT 24 182214299196 ps
T320 /workspace/coverage/default/15.sram_ctrl_stress_all.2121190593 Mar 28 03:09:05 PM PDT 24 Mar 28 03:35:14 PM PDT 24 5806805437 ps
T321 /workspace/coverage/default/17.sram_ctrl_multiple_keys.3479754246 Mar 28 03:09:16 PM PDT 24 Mar 28 03:16:36 PM PDT 24 13836459117 ps
T322 /workspace/coverage/default/14.sram_ctrl_multiple_keys.1190508277 Mar 28 03:09:06 PM PDT 24 Mar 28 03:23:45 PM PDT 24 11254241440 ps
T323 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.142642909 Mar 28 03:11:20 PM PDT 24 Mar 28 03:11:23 PM PDT 24 91232143 ps
T324 /workspace/coverage/default/18.sram_ctrl_mem_walk.1761337236 Mar 28 03:09:21 PM PDT 24 Mar 28 03:09:25 PM PDT 24 293358530 ps
T325 /workspace/coverage/default/41.sram_ctrl_regwen.735174214 Mar 28 03:12:37 PM PDT 24 Mar 28 03:26:52 PM PDT 24 27244432819 ps
T49 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3328581901 Mar 28 03:07:47 PM PDT 24 Mar 28 03:08:56 PM PDT 24 6905925921 ps
T50 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1937055992 Mar 28 03:08:13 PM PDT 24 Mar 28 03:09:09 PM PDT 24 279888228 ps
T326 /workspace/coverage/default/18.sram_ctrl_bijection.346764936 Mar 28 03:09:24 PM PDT 24 Mar 28 03:09:53 PM PDT 24 18679365684 ps
T327 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3126155291 Mar 28 03:12:00 PM PDT 24 Mar 28 03:12:01 PM PDT 24 96673179 ps
T328 /workspace/coverage/default/24.sram_ctrl_multiple_keys.532393520 Mar 28 03:10:07 PM PDT 24 Mar 28 03:21:11 PM PDT 24 4345154959 ps
T329 /workspace/coverage/default/0.sram_ctrl_max_throughput.3738806467 Mar 28 03:07:14 PM PDT 24 Mar 28 03:07:44 PM PDT 24 263069322 ps
T330 /workspace/coverage/default/37.sram_ctrl_partial_access.2393502791 Mar 28 03:12:02 PM PDT 24 Mar 28 03:13:28 PM PDT 24 586302477 ps
T331 /workspace/coverage/default/28.sram_ctrl_lc_escalation.426825854 Mar 28 03:10:46 PM PDT 24 Mar 28 03:10:52 PM PDT 24 1091916113 ps
T332 /workspace/coverage/default/22.sram_ctrl_lc_escalation.4015977200 Mar 28 03:09:54 PM PDT 24 Mar 28 03:10:02 PM PDT 24 590995277 ps
T333 /workspace/coverage/default/8.sram_ctrl_ram_cfg.645170933 Mar 28 03:08:07 PM PDT 24 Mar 28 03:08:08 PM PDT 24 27688133 ps
T334 /workspace/coverage/default/31.sram_ctrl_mem_walk.2123512204 Mar 28 03:11:10 PM PDT 24 Mar 28 03:11:20 PM PDT 24 1010760439 ps
T335 /workspace/coverage/default/18.sram_ctrl_regwen.1639215116 Mar 28 03:09:18 PM PDT 24 Mar 28 03:27:01 PM PDT 24 11086901910 ps
T336 /workspace/coverage/default/39.sram_ctrl_regwen.443103177 Mar 28 03:12:17 PM PDT 24 Mar 28 03:28:33 PM PDT 24 8621488975 ps
T337 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1729332405 Mar 28 03:11:38 PM PDT 24 Mar 28 03:15:08 PM PDT 24 19830416945 ps
T338 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.857702079 Mar 28 03:09:02 PM PDT 24 Mar 28 03:09:15 PM PDT 24 75315320 ps
T339 /workspace/coverage/default/27.sram_ctrl_executable.2334195732 Mar 28 03:10:48 PM PDT 24 Mar 28 03:19:18 PM PDT 24 58272148059 ps
T340 /workspace/coverage/default/37.sram_ctrl_stress_all.1411638162 Mar 28 03:12:02 PM PDT 24 Mar 28 04:17:53 PM PDT 24 34923345737 ps
T341 /workspace/coverage/default/41.sram_ctrl_alert_test.720117283 Mar 28 03:12:40 PM PDT 24 Mar 28 03:12:41 PM PDT 24 24958543 ps
T342 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2556721926 Mar 28 03:13:19 PM PDT 24 Mar 28 03:19:21 PM PDT 24 18185822624 ps
T343 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1566562646 Mar 28 03:07:51 PM PDT 24 Mar 28 03:08:26 PM PDT 24 693589257 ps
T344 /workspace/coverage/default/1.sram_ctrl_bijection.2340639898 Mar 28 03:07:14 PM PDT 24 Mar 28 03:07:39 PM PDT 24 824194325 ps
T345 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2658700525 Mar 28 03:11:06 PM PDT 24 Mar 28 03:11:13 PM PDT 24 2348998909 ps
T346 /workspace/coverage/default/46.sram_ctrl_ram_cfg.3782004058 Mar 28 03:13:49 PM PDT 24 Mar 28 03:13:50 PM PDT 24 56888906 ps
T347 /workspace/coverage/default/9.sram_ctrl_partial_access.3110610159 Mar 28 03:08:20 PM PDT 24 Mar 28 03:08:38 PM PDT 24 788286822 ps
T348 /workspace/coverage/default/25.sram_ctrl_alert_test.3954217579 Mar 28 03:10:24 PM PDT 24 Mar 28 03:10:25 PM PDT 24 12317071 ps
T349 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3827422856 Mar 28 03:09:02 PM PDT 24 Mar 28 03:14:13 PM PDT 24 4612152489 ps
T350 /workspace/coverage/default/12.sram_ctrl_mem_walk.275132264 Mar 28 03:08:43 PM PDT 24 Mar 28 03:08:47 PM PDT 24 284239842 ps
T104 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.958287029 Mar 28 03:07:08 PM PDT 24 Mar 28 03:08:47 PM PDT 24 1354569491 ps
T351 /workspace/coverage/default/10.sram_ctrl_executable.274902838 Mar 28 03:08:29 PM PDT 24 Mar 28 03:15:25 PM PDT 24 7463185407 ps
T352 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.3025853699 Mar 28 03:09:01 PM PDT 24 Mar 28 03:09:04 PM PDT 24 99421576 ps
T353 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2498187814 Mar 28 03:10:07 PM PDT 24 Mar 28 03:12:52 PM PDT 24 12513542393 ps
T354 /workspace/coverage/default/23.sram_ctrl_partial_access.4217963645 Mar 28 03:10:08 PM PDT 24 Mar 28 03:10:12 PM PDT 24 188902104 ps
T355 /workspace/coverage/default/19.sram_ctrl_executable.1309723048 Mar 28 03:09:36 PM PDT 24 Mar 28 03:27:40 PM PDT 24 12743177905 ps
T356 /workspace/coverage/default/26.sram_ctrl_partial_access.854272866 Mar 28 03:10:24 PM PDT 24 Mar 28 03:10:27 PM PDT 24 105298054 ps
T357 /workspace/coverage/default/13.sram_ctrl_regwen.3578112421 Mar 28 03:09:02 PM PDT 24 Mar 28 03:19:46 PM PDT 24 10984128308 ps
T358 /workspace/coverage/default/0.sram_ctrl_executable.2985109230 Mar 28 03:07:07 PM PDT 24 Mar 28 03:08:06 PM PDT 24 2273831364 ps
T359 /workspace/coverage/default/2.sram_ctrl_partial_access.3137199221 Mar 28 03:07:48 PM PDT 24 Mar 28 03:07:59 PM PDT 24 187186825 ps
T360 /workspace/coverage/default/14.sram_ctrl_regwen.2579155520 Mar 28 03:09:01 PM PDT 24 Mar 28 03:27:09 PM PDT 24 18827993546 ps
T361 /workspace/coverage/default/8.sram_ctrl_bijection.59387847 Mar 28 03:08:16 PM PDT 24 Mar 28 03:09:04 PM PDT 24 2539692149 ps
T362 /workspace/coverage/default/46.sram_ctrl_alert_test.1794294241 Mar 28 03:13:49 PM PDT 24 Mar 28 03:13:50 PM PDT 24 26164519 ps
T363 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3035654413 Mar 28 03:11:39 PM PDT 24 Mar 28 03:13:05 PM PDT 24 143307336 ps
T364 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.1320902505 Mar 28 03:07:45 PM PDT 24 Mar 28 03:12:00 PM PDT 24 1660670342 ps
T365 /workspace/coverage/default/15.sram_ctrl_ram_cfg.3602660286 Mar 28 03:09:01 PM PDT 24 Mar 28 03:09:02 PM PDT 24 79238134 ps
T366 /workspace/coverage/default/19.sram_ctrl_stress_all.2878853607 Mar 28 03:09:36 PM PDT 24 Mar 28 04:30:11 PM PDT 24 88757201739 ps
T367 /workspace/coverage/default/24.sram_ctrl_executable.167825300 Mar 28 03:10:06 PM PDT 24 Mar 28 03:31:05 PM PDT 24 10989906084 ps
T368 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.19776021 Mar 28 03:08:03 PM PDT 24 Mar 28 03:08:08 PM PDT 24 173112458 ps
T369 /workspace/coverage/default/42.sram_ctrl_lc_escalation.2471898571 Mar 28 03:12:35 PM PDT 24 Mar 28 03:12:44 PM PDT 24 3173708585 ps
T370 /workspace/coverage/default/32.sram_ctrl_ram_cfg.3632789840 Mar 28 03:11:33 PM PDT 24 Mar 28 03:11:34 PM PDT 24 83359660 ps
T371 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.159794512 Mar 28 03:12:01 PM PDT 24 Mar 28 03:12:04 PM PDT 24 179473147 ps
T372 /workspace/coverage/default/32.sram_ctrl_smoke.1917433261 Mar 28 03:11:35 PM PDT 24 Mar 28 03:11:49 PM PDT 24 2571610971 ps
T373 /workspace/coverage/default/20.sram_ctrl_mem_walk.1821880448 Mar 28 03:09:35 PM PDT 24 Mar 28 03:09:41 PM PDT 24 573907756 ps
T374 /workspace/coverage/default/9.sram_ctrl_bijection.1320917512 Mar 28 03:08:21 PM PDT 24 Mar 28 03:09:43 PM PDT 24 7944461456 ps
T375 /workspace/coverage/default/16.sram_ctrl_regwen.488738317 Mar 28 03:09:19 PM PDT 24 Mar 28 03:10:44 PM PDT 24 10030103394 ps
T376 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1023113196 Mar 28 03:09:02 PM PDT 24 Mar 28 03:13:58 PM PDT 24 5990439840 ps
T377 /workspace/coverage/default/42.sram_ctrl_mem_walk.1842855573 Mar 28 03:12:52 PM PDT 24 Mar 28 03:13:02 PM PDT 24 1177375100 ps
T378 /workspace/coverage/default/35.sram_ctrl_bijection.2778391111 Mar 28 03:11:38 PM PDT 24 Mar 28 03:12:07 PM PDT 24 6997754521 ps
T379 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2566734317 Mar 28 03:12:00 PM PDT 24 Mar 28 03:12:35 PM PDT 24 403493092 ps
T380 /workspace/coverage/default/19.sram_ctrl_partial_access.1561544917 Mar 28 03:09:33 PM PDT 24 Mar 28 03:12:01 PM PDT 24 3309461602 ps
T381 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1485987899 Mar 28 03:14:01 PM PDT 24 Mar 28 03:15:01 PM PDT 24 126187396 ps
T382 /workspace/coverage/default/32.sram_ctrl_lc_escalation.3216836653 Mar 28 03:11:33 PM PDT 24 Mar 28 03:11:45 PM PDT 24 1676880394 ps
T383 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1811928855 Mar 28 03:09:53 PM PDT 24 Mar 28 03:10:55 PM PDT 24 397485248 ps
T384 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2856131307 Mar 28 03:09:34 PM PDT 24 Mar 28 03:09:41 PM PDT 24 104455378 ps
T385 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.4024033460 Mar 28 03:12:37 PM PDT 24 Mar 28 03:12:42 PM PDT 24 63494638 ps
T386 /workspace/coverage/default/36.sram_ctrl_mem_walk.255263112 Mar 28 03:12:00 PM PDT 24 Mar 28 03:12:09 PM PDT 24 465059118 ps
T387 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3675843194 Mar 28 03:12:03 PM PDT 24 Mar 28 03:16:54 PM PDT 24 22943262305 ps
T388 /workspace/coverage/default/32.sram_ctrl_stress_all.3051052899 Mar 28 03:11:26 PM PDT 24 Mar 28 04:55:56 PM PDT 24 706417065895 ps
T389 /workspace/coverage/default/21.sram_ctrl_mem_walk.2948282099 Mar 28 03:09:53 PM PDT 24 Mar 28 03:09:59 PM PDT 24 1714339199 ps
T390 /workspace/coverage/default/10.sram_ctrl_bijection.1428155016 Mar 28 03:08:14 PM PDT 24 Mar 28 03:08:32 PM PDT 24 4464927674 ps
T391 /workspace/coverage/default/23.sram_ctrl_mem_walk.1302657979 Mar 28 03:10:08 PM PDT 24 Mar 28 03:10:18 PM PDT 24 440886488 ps
T392 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1125151292 Mar 28 03:07:12 PM PDT 24 Mar 28 03:07:17 PM PDT 24 316587079 ps
T393 /workspace/coverage/default/11.sram_ctrl_partial_access.3871013245 Mar 28 03:08:32 PM PDT 24 Mar 28 03:08:47 PM PDT 24 95792039 ps
T394 /workspace/coverage/default/13.sram_ctrl_stress_all.2286617611 Mar 28 03:09:02 PM PDT 24 Mar 28 03:34:52 PM PDT 24 20161859818 ps
T395 /workspace/coverage/default/27.sram_ctrl_partial_access.736029851 Mar 28 03:10:46 PM PDT 24 Mar 28 03:10:50 PM PDT 24 168443660 ps
T396 /workspace/coverage/default/21.sram_ctrl_bijection.1513715447 Mar 28 03:09:54 PM PDT 24 Mar 28 03:11:05 PM PDT 24 18971918813 ps
T397 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3680672766 Mar 28 03:07:46 PM PDT 24 Mar 28 03:11:19 PM PDT 24 641828058 ps
T398 /workspace/coverage/default/44.sram_ctrl_partial_access.756261137 Mar 28 03:12:52 PM PDT 24 Mar 28 03:12:59 PM PDT 24 1926783251 ps
T399 /workspace/coverage/default/41.sram_ctrl_executable.1923965722 Mar 28 03:12:46 PM PDT 24 Mar 28 03:29:08 PM PDT 24 6281416791 ps
T400 /workspace/coverage/default/49.sram_ctrl_ram_cfg.453346355 Mar 28 03:14:01 PM PDT 24 Mar 28 03:14:02 PM PDT 24 28731876 ps
T401 /workspace/coverage/default/6.sram_ctrl_mem_walk.2532172920 Mar 28 03:08:15 PM PDT 24 Mar 28 03:08:20 PM PDT 24 144459257 ps
T402 /workspace/coverage/default/30.sram_ctrl_lc_escalation.404175432 Mar 28 03:11:04 PM PDT 24 Mar 28 03:11:10 PM PDT 24 445267856 ps
T403 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2940856382 Mar 28 03:11:09 PM PDT 24 Mar 28 03:15:48 PM PDT 24 7871289938 ps
T404 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2765713816 Mar 28 03:10:27 PM PDT 24 Mar 28 03:14:06 PM PDT 24 2168016417 ps
T405 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3561073802 Mar 28 03:07:08 PM PDT 24 Mar 28 03:09:44 PM PDT 24 1675904143 ps
T406 /workspace/coverage/default/15.sram_ctrl_alert_test.3395836783 Mar 28 03:09:02 PM PDT 24 Mar 28 03:09:03 PM PDT 24 39536400 ps
T407 /workspace/coverage/default/35.sram_ctrl_max_throughput.2578912059 Mar 28 03:11:38 PM PDT 24 Mar 28 03:13:07 PM PDT 24 129188007 ps
T408 /workspace/coverage/default/15.sram_ctrl_executable.1229683518 Mar 28 03:09:02 PM PDT 24 Mar 28 03:21:16 PM PDT 24 1943338485 ps
T409 /workspace/coverage/default/13.sram_ctrl_alert_test.2318907640 Mar 28 03:09:01 PM PDT 24 Mar 28 03:09:02 PM PDT 24 15150953 ps
T410 /workspace/coverage/default/49.sram_ctrl_bijection.2861874487 Mar 28 03:13:58 PM PDT 24 Mar 28 03:14:50 PM PDT 24 2454433277 ps
T411 /workspace/coverage/default/7.sram_ctrl_regwen.177470620 Mar 28 03:08:07 PM PDT 24 Mar 28 03:16:38 PM PDT 24 13343285365 ps
T412 /workspace/coverage/default/17.sram_ctrl_regwen.3691353027 Mar 28 03:09:20 PM PDT 24 Mar 28 03:33:25 PM PDT 24 14090798183 ps
T413 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.856533318 Mar 28 03:09:02 PM PDT 24 Mar 28 03:15:28 PM PDT 24 8269134836 ps
T414 /workspace/coverage/default/32.sram_ctrl_regwen.3818432625 Mar 28 03:11:33 PM PDT 24 Mar 28 03:29:37 PM PDT 24 13769075882 ps
T415 /workspace/coverage/default/7.sram_ctrl_executable.441006569 Mar 28 03:08:07 PM PDT 24 Mar 28 03:28:16 PM PDT 24 7434904042 ps
T416 /workspace/coverage/default/8.sram_ctrl_alert_test.3155832797 Mar 28 03:08:08 PM PDT 24 Mar 28 03:08:09 PM PDT 24 35781606 ps
T417 /workspace/coverage/default/3.sram_ctrl_partial_access.1529418836 Mar 28 03:07:49 PM PDT 24 Mar 28 03:08:06 PM PDT 24 311226068 ps
T105 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2945012849 Mar 28 03:12:36 PM PDT 24 Mar 28 03:15:40 PM PDT 24 1975364486 ps
T418 /workspace/coverage/default/11.sram_ctrl_max_throughput.3656646050 Mar 28 03:08:44 PM PDT 24 Mar 28 03:08:46 PM PDT 24 447838546 ps
T419 /workspace/coverage/default/39.sram_ctrl_multiple_keys.3550434398 Mar 28 03:12:18 PM PDT 24 Mar 28 03:21:38 PM PDT 24 15440813004 ps
T420 /workspace/coverage/default/9.sram_ctrl_smoke.1516789384 Mar 28 03:08:14 PM PDT 24 Mar 28 03:08:21 PM PDT 24 57292170 ps
T421 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1338349125 Mar 28 03:12:53 PM PDT 24 Mar 28 03:27:07 PM PDT 24 12057072886 ps
T422 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2594845067 Mar 28 03:12:01 PM PDT 24 Mar 28 03:12:20 PM PDT 24 324550180 ps
T423 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3393864208 Mar 28 03:12:36 PM PDT 24 Mar 28 03:15:47 PM PDT 24 4046365103 ps
T424 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3968022803 Mar 28 03:10:46 PM PDT 24 Mar 28 03:10:47 PM PDT 24 124155675 ps
T425 /workspace/coverage/default/44.sram_ctrl_ram_cfg.3272689275 Mar 28 03:12:54 PM PDT 24 Mar 28 03:12:56 PM PDT 24 77410481 ps
T426 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1873023946 Mar 28 03:13:21 PM PDT 24 Mar 28 03:13:26 PM PDT 24 89934830 ps
T427 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3577649370 Mar 28 03:09:24 PM PDT 24 Mar 28 03:11:17 PM PDT 24 160876610 ps
T428 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.919780788 Mar 28 03:08:10 PM PDT 24 Mar 28 03:12:49 PM PDT 24 3124399520 ps
T429 /workspace/coverage/default/6.sram_ctrl_max_throughput.2127789065 Mar 28 03:08:04 PM PDT 24 Mar 28 03:08:28 PM PDT 24 79157316 ps
T430 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.4186418874 Mar 28 03:07:14 PM PDT 24 Mar 28 03:08:28 PM PDT 24 4636132470 ps
T431 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.4049492172 Mar 28 03:09:03 PM PDT 24 Mar 28 03:13:08 PM PDT 24 37428855854 ps
T432 /workspace/coverage/default/2.sram_ctrl_smoke.4040592640 Mar 28 03:07:48 PM PDT 24 Mar 28 03:09:00 PM PDT 24 1007009437 ps
T433 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2991470310 Mar 28 03:10:25 PM PDT 24 Mar 28 03:10:34 PM PDT 24 71094281 ps
T434 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1363444581 Mar 28 03:10:46 PM PDT 24 Mar 28 03:20:07 PM PDT 24 24234518016 ps
T435 /workspace/coverage/default/16.sram_ctrl_smoke.3518578150 Mar 28 03:09:06 PM PDT 24 Mar 28 03:09:40 PM PDT 24 96298076 ps
T436 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3683858922 Mar 28 03:12:17 PM PDT 24 Mar 28 03:32:34 PM PDT 24 36051325331 ps
T437 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1877680750 Mar 28 03:10:45 PM PDT 24 Mar 28 03:10:47 PM PDT 24 92103181 ps
T438 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1671087970 Mar 28 03:11:39 PM PDT 24 Mar 28 03:14:53 PM PDT 24 5393738150 ps
T439 /workspace/coverage/default/28.sram_ctrl_executable.1157562993 Mar 28 03:10:46 PM PDT 24 Mar 28 03:19:13 PM PDT 24 1949551832 ps
T440 /workspace/coverage/default/3.sram_ctrl_executable.1528708681 Mar 28 03:07:49 PM PDT 24 Mar 28 03:21:29 PM PDT 24 37225333708 ps
T441 /workspace/coverage/default/18.sram_ctrl_ram_cfg.2966119555 Mar 28 03:09:20 PM PDT 24 Mar 28 03:09:21 PM PDT 24 41374993 ps
T442 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.72078427 Mar 28 03:09:37 PM PDT 24 Mar 28 03:16:45 PM PDT 24 8026962203 ps
T443 /workspace/coverage/default/33.sram_ctrl_lc_escalation.612976697 Mar 28 03:11:20 PM PDT 24 Mar 28 03:11:22 PM PDT 24 266269162 ps
T444 /workspace/coverage/default/44.sram_ctrl_lc_escalation.3654195671 Mar 28 03:12:55 PM PDT 24 Mar 28 03:12:57 PM PDT 24 225587696 ps
T445 /workspace/coverage/default/19.sram_ctrl_smoke.4213254272 Mar 28 03:09:34 PM PDT 24 Mar 28 03:09:42 PM PDT 24 756207929 ps
T446 /workspace/coverage/default/6.sram_ctrl_executable.690724635 Mar 28 03:08:05 PM PDT 24 Mar 28 03:23:55 PM PDT 24 32703565343 ps
T447 /workspace/coverage/default/36.sram_ctrl_bijection.59533735 Mar 28 03:12:01 PM PDT 24 Mar 28 03:12:44 PM PDT 24 5852087761 ps
T448 /workspace/coverage/default/43.sram_ctrl_ram_cfg.2982618705 Mar 28 03:12:54 PM PDT 24 Mar 28 03:12:55 PM PDT 24 82766989 ps
T449 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.192286405 Mar 28 03:12:19 PM PDT 24 Mar 28 03:12:28 PM PDT 24 541299831 ps
T450 /workspace/coverage/default/25.sram_ctrl_max_throughput.3402975750 Mar 28 03:10:30 PM PDT 24 Mar 28 03:10:32 PM PDT 24 56373007 ps
T451 /workspace/coverage/default/30.sram_ctrl_mem_walk.530072230 Mar 28 03:11:05 PM PDT 24 Mar 28 03:11:13 PM PDT 24 135627862 ps
T452 /workspace/coverage/default/26.sram_ctrl_mem_walk.1675125045 Mar 28 03:10:26 PM PDT 24 Mar 28 03:10:31 PM PDT 24 143919970 ps
T453 /workspace/coverage/default/6.sram_ctrl_lc_escalation.1021828548 Mar 28 03:08:04 PM PDT 24 Mar 28 03:08:08 PM PDT 24 585097075 ps
T454 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.3699620274 Mar 28 03:10:46 PM PDT 24 Mar 28 03:13:39 PM PDT 24 670452918 ps
T455 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3554997444 Mar 28 03:12:54 PM PDT 24 Mar 28 03:20:51 PM PDT 24 25560745459 ps
T456 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4086216546 Mar 28 03:12:02 PM PDT 24 Mar 28 03:13:01 PM PDT 24 1120683689 ps
T457 /workspace/coverage/default/7.sram_ctrl_max_throughput.214905703 Mar 28 03:08:15 PM PDT 24 Mar 28 03:10:12 PM PDT 24 511781916 ps
T458 /workspace/coverage/default/0.sram_ctrl_regwen.2379265675 Mar 28 03:07:08 PM PDT 24 Mar 28 03:19:22 PM PDT 24 33578131160 ps
T459 /workspace/coverage/default/43.sram_ctrl_regwen.2526713287 Mar 28 03:12:54 PM PDT 24 Mar 28 03:14:03 PM PDT 24 1571760980 ps
T460 /workspace/coverage/default/38.sram_ctrl_smoke.1318428908 Mar 28 03:12:22 PM PDT 24 Mar 28 03:12:31 PM PDT 24 889396686 ps
T461 /workspace/coverage/default/2.sram_ctrl_lc_escalation.2592792313 Mar 28 03:07:48 PM PDT 24 Mar 28 03:07:56 PM PDT 24 1979201551 ps
T462 /workspace/coverage/default/33.sram_ctrl_multiple_keys.767831146 Mar 28 03:11:18 PM PDT 24 Mar 28 03:23:37 PM PDT 24 8329444075 ps
T463 /workspace/coverage/default/39.sram_ctrl_bijection.1137470979 Mar 28 03:12:17 PM PDT 24 Mar 28 03:13:27 PM PDT 24 31607821505 ps
T464 /workspace/coverage/default/46.sram_ctrl_lc_escalation.1780326584 Mar 28 03:13:24 PM PDT 24 Mar 28 03:13:30 PM PDT 24 946625743 ps
T465 /workspace/coverage/default/19.sram_ctrl_mem_walk.3001871192 Mar 28 03:09:33 PM PDT 24 Mar 28 03:09:43 PM PDT 24 684894670 ps
T466 /workspace/coverage/default/16.sram_ctrl_lc_escalation.3058780709 Mar 28 03:09:02 PM PDT 24 Mar 28 03:09:11 PM PDT 24 3372689804 ps
T467 /workspace/coverage/default/42.sram_ctrl_multiple_keys.580881190 Mar 28 03:12:37 PM PDT 24 Mar 28 03:17:43 PM PDT 24 3073465255 ps
T468 /workspace/coverage/default/13.sram_ctrl_multiple_keys.2196666447 Mar 28 03:08:49 PM PDT 24 Mar 28 03:17:33 PM PDT 24 19871610157 ps
T469 /workspace/coverage/default/40.sram_ctrl_regwen.988158625 Mar 28 03:12:39 PM PDT 24 Mar 28 03:19:31 PM PDT 24 1375262072 ps
T470 /workspace/coverage/default/19.sram_ctrl_multiple_keys.499005699 Mar 28 03:09:28 PM PDT 24 Mar 28 03:39:34 PM PDT 24 4748559271 ps
T471 /workspace/coverage/default/33.sram_ctrl_executable.1850864465 Mar 28 03:11:20 PM PDT 24 Mar 28 03:33:00 PM PDT 24 99642800463 ps
T472 /workspace/coverage/default/5.sram_ctrl_smoke.1666011412 Mar 28 03:08:16 PM PDT 24 Mar 28 03:08:30 PM PDT 24 833064725 ps
T473 /workspace/coverage/default/3.sram_ctrl_lc_escalation.2375571849 Mar 28 03:07:46 PM PDT 24 Mar 28 03:07:49 PM PDT 24 332805540 ps
T474 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1782098480 Mar 28 03:13:58 PM PDT 24 Mar 28 03:18:04 PM PDT 24 53464521803 ps
T475 /workspace/coverage/default/42.sram_ctrl_ram_cfg.4017944127 Mar 28 03:12:56 PM PDT 24 Mar 28 03:12:57 PM PDT 24 41028996 ps
T476 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2669830059 Mar 28 03:09:01 PM PDT 24 Mar 28 03:12:08 PM PDT 24 8269350522 ps
T477 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.4004278795 Mar 28 03:08:07 PM PDT 24 Mar 28 03:14:44 PM PDT 24 7023076135 ps
T478 /workspace/coverage/default/46.sram_ctrl_executable.2083525997 Mar 28 03:13:42 PM PDT 24 Mar 28 03:21:27 PM PDT 24 1230672923 ps
T479 /workspace/coverage/default/27.sram_ctrl_alert_test.805747296 Mar 28 03:10:43 PM PDT 24 Mar 28 03:10:44 PM PDT 24 15585375 ps
T480 /workspace/coverage/default/28.sram_ctrl_partial_access.1382421978 Mar 28 03:10:46 PM PDT 24 Mar 28 03:11:02 PM PDT 24 896251652 ps
T481 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1490090737 Mar 28 03:09:38 PM PDT 24 Mar 28 03:09:41 PM PDT 24 44082571 ps
T482 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2927011850 Mar 28 03:12:22 PM PDT 24 Mar 28 03:17:30 PM PDT 24 8152444680 ps
T483 /workspace/coverage/default/42.sram_ctrl_smoke.2129904666 Mar 28 03:12:39 PM PDT 24 Mar 28 03:13:03 PM PDT 24 580490101 ps
T484 /workspace/coverage/default/37.sram_ctrl_multiple_keys.1866782024 Mar 28 03:11:59 PM PDT 24 Mar 28 03:15:38 PM PDT 24 12747793668 ps
T485 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2069492493 Mar 28 03:13:47 PM PDT 24 Mar 28 03:13:53 PM PDT 24 838958846 ps
T486 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2145742200 Mar 28 03:11:19 PM PDT 24 Mar 28 03:11:31 PM PDT 24 71263370 ps
T487 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2060404835 Mar 28 03:12:02 PM PDT 24 Mar 28 03:17:42 PM PDT 24 17335888443 ps
T488 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2019132979 Mar 28 03:12:20 PM PDT 24 Mar 28 03:15:33 PM PDT 24 114844979390 ps
T106 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.95602703 Mar 28 03:12:53 PM PDT 24 Mar 28 03:13:06 PM PDT 24 2377874182 ps
T489 /workspace/coverage/default/11.sram_ctrl_alert_test.119358544 Mar 28 03:08:41 PM PDT 24 Mar 28 03:08:41 PM PDT 24 24612507 ps
T490 /workspace/coverage/default/30.sram_ctrl_alert_test.3380878222 Mar 28 03:11:05 PM PDT 24 Mar 28 03:11:06 PM PDT 24 13871336 ps
T491 /workspace/coverage/default/35.sram_ctrl_partial_access.2066761111 Mar 28 03:11:37 PM PDT 24 Mar 28 03:11:44 PM PDT 24 963134711 ps
T492 /workspace/coverage/default/16.sram_ctrl_alert_test.1736570840 Mar 28 03:09:21 PM PDT 24 Mar 28 03:09:22 PM PDT 24 13426945 ps
T493 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2600101611 Mar 28 03:08:15 PM PDT 24 Mar 28 03:08:18 PM PDT 24 104026779 ps
T494 /workspace/coverage/default/5.sram_ctrl_regwen.3260647057 Mar 28 03:08:04 PM PDT 24 Mar 28 03:23:37 PM PDT 24 7256321299 ps
T495 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2577185186 Mar 28 03:09:04 PM PDT 24 Mar 28 03:09:05 PM PDT 24 50048698 ps
T496 /workspace/coverage/default/12.sram_ctrl_stress_all.3332758934 Mar 28 03:08:46 PM PDT 24 Mar 28 03:32:27 PM PDT 24 49118047989 ps
T497 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1855525047 Mar 28 03:11:19 PM PDT 24 Mar 28 03:16:53 PM PDT 24 13057771671 ps
T498 /workspace/coverage/default/29.sram_ctrl_bijection.3960651425 Mar 28 03:10:46 PM PDT 24 Mar 28 03:11:40 PM PDT 24 8587986375 ps
T499 /workspace/coverage/default/1.sram_ctrl_smoke.2338247863 Mar 28 03:07:07 PM PDT 24 Mar 28 03:07:14 PM PDT 24 1024895105 ps
T500 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.589955989 Mar 28 03:08:05 PM PDT 24 Mar 28 03:08:07 PM PDT 24 43304709 ps
T501 /workspace/coverage/default/10.sram_ctrl_multiple_keys.3572232552 Mar 28 03:08:19 PM PDT 24 Mar 28 03:17:36 PM PDT 24 12758573914 ps
T502 /workspace/coverage/default/34.sram_ctrl_regwen.3832892241 Mar 28 03:11:37 PM PDT 24 Mar 28 03:14:38 PM PDT 24 2694445502 ps
T503 /workspace/coverage/default/21.sram_ctrl_executable.709881640 Mar 28 03:09:57 PM PDT 24 Mar 28 03:19:13 PM PDT 24 10895793143 ps
T504 /workspace/coverage/default/34.sram_ctrl_mem_walk.412410783 Mar 28 03:11:38 PM PDT 24 Mar 28 03:11:42 PM PDT 24 296570847 ps
T505 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.421713114 Mar 28 03:12:00 PM PDT 24 Mar 28 03:12:03 PM PDT 24 60883404 ps
T506 /workspace/coverage/default/13.sram_ctrl_smoke.1133745010 Mar 28 03:08:42 PM PDT 24 Mar 28 03:10:27 PM PDT 24 130135231 ps
T507 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1501815773 Mar 28 03:10:45 PM PDT 24 Mar 28 03:10:48 PM PDT 24 389847184 ps
T80 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.754533887 Mar 28 03:09:04 PM PDT 24 Mar 28 03:09:07 PM PDT 24 173862341 ps
T508 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1531136085 Mar 28 03:11:05 PM PDT 24 Mar 28 03:13:09 PM PDT 24 618031568 ps
T509 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.4143674447 Mar 28 03:12:39 PM PDT 24 Mar 28 03:19:55 PM PDT 24 184157635986 ps
T510 /workspace/coverage/default/20.sram_ctrl_multiple_keys.1295090951 Mar 28 03:09:37 PM PDT 24 Mar 28 03:27:52 PM PDT 24 6400968442 ps
T511 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4117559360 Mar 28 03:08:11 PM PDT 24 Mar 28 03:10:43 PM PDT 24 8577045527 ps
T512 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.4093040346 Mar 28 03:09:01 PM PDT 24 Mar 28 03:10:03 PM PDT 24 1352405425 ps
T513 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1924719306 Mar 28 03:12:01 PM PDT 24 Mar 28 03:12:06 PM PDT 24 123556653 ps
T514 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2303183141 Mar 28 03:08:42 PM PDT 24 Mar 28 03:15:18 PM PDT 24 11175046934 ps
T515 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2958201573 Mar 28 03:11:04 PM PDT 24 Mar 28 03:30:55 PM PDT 24 9673734032 ps
T516 /workspace/coverage/default/17.sram_ctrl_alert_test.638741384 Mar 28 03:09:22 PM PDT 24 Mar 28 03:09:23 PM PDT 24 18635724 ps
T517 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.461359852 Mar 28 03:07:47 PM PDT 24 Mar 28 03:10:21 PM PDT 24 1638001085 ps
T518 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2457238009 Mar 28 03:10:27 PM PDT 24 Mar 28 03:15:20 PM PDT 24 6057463313 ps
T519 /workspace/coverage/default/22.sram_ctrl_ram_cfg.3305993673 Mar 28 03:09:53 PM PDT 24 Mar 28 03:09:54 PM PDT 24 80855608 ps
T520 /workspace/coverage/default/48.sram_ctrl_alert_test.2315192790 Mar 28 03:13:45 PM PDT 24 Mar 28 03:13:46 PM PDT 24 19686930 ps
T521 /workspace/coverage/default/8.sram_ctrl_multiple_keys.4207606257 Mar 28 03:08:15 PM PDT 24 Mar 28 03:23:26 PM PDT 24 5853325429 ps
T522 /workspace/coverage/default/0.sram_ctrl_multiple_keys.2495897567 Mar 28 03:07:10 PM PDT 24 Mar 28 03:10:51 PM PDT 24 12914887798 ps
T523 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2406774872 Mar 28 03:10:08 PM PDT 24 Mar 28 03:10:11 PM PDT 24 632421823 ps
T524 /workspace/coverage/default/42.sram_ctrl_stress_all.180686528 Mar 28 03:13:01 PM PDT 24 Mar 28 04:03:24 PM PDT 24 38677334720 ps
T525 /workspace/coverage/default/15.sram_ctrl_regwen.4094474225 Mar 28 03:09:04 PM PDT 24 Mar 28 03:29:13 PM PDT 24 7025072185 ps
T526 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3861918475 Mar 28 03:09:02 PM PDT 24 Mar 28 03:09:27 PM PDT 24 198832101 ps
T527 /workspace/coverage/default/49.sram_ctrl_max_throughput.2955719107 Mar 28 03:13:57 PM PDT 24 Mar 28 03:14:49 PM PDT 24 391873885 ps
T528 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2538603247 Mar 28 03:12:35 PM PDT 24 Mar 28 03:12:37 PM PDT 24 52792818 ps
T529 /workspace/coverage/default/2.sram_ctrl_alert_test.2459179380 Mar 28 03:07:45 PM PDT 24 Mar 28 03:07:46 PM PDT 24 21255989 ps
T530 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.2270548831 Mar 28 03:09:07 PM PDT 24 Mar 28 03:20:49 PM PDT 24 7580478356 ps
T531 /workspace/coverage/default/44.sram_ctrl_smoke.3267541478 Mar 28 03:12:53 PM PDT 24 Mar 28 03:12:59 PM PDT 24 476070860 ps
T532 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3870495179 Mar 28 03:13:57 PM PDT 24 Mar 28 03:32:28 PM PDT 24 87117016859 ps
T533 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1831693173 Mar 28 03:10:11 PM PDT 24 Mar 28 03:16:08 PM PDT 24 2209226247 ps
T534 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2373537654 Mar 28 03:09:33 PM PDT 24 Mar 28 03:09:34 PM PDT 24 229749192 ps
T535 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.134493529 Mar 28 03:09:02 PM PDT 24 Mar 28 03:09:31 PM PDT 24 965817408 ps
T536 /workspace/coverage/default/20.sram_ctrl_regwen.899368710 Mar 28 03:09:35 PM PDT 24 Mar 28 03:24:47 PM PDT 24 11356839010 ps
T537 /workspace/coverage/default/29.sram_ctrl_regwen.13152792 Mar 28 03:11:14 PM PDT 24 Mar 28 03:22:11 PM PDT 24 11876146777 ps
T538 /workspace/coverage/default/11.sram_ctrl_multiple_keys.2946831063 Mar 28 03:08:22 PM PDT 24 Mar 28 03:23:15 PM PDT 24 44049508780 ps
T539 /workspace/coverage/default/11.sram_ctrl_smoke.1922149573 Mar 28 03:08:21 PM PDT 24 Mar 28 03:09:14 PM PDT 24 416428112 ps
T540 /workspace/coverage/default/8.sram_ctrl_mem_walk.2772481603 Mar 28 03:08:16 PM PDT 24 Mar 28 03:08:27 PM PDT 24 684609746 ps
T107 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3499954011 Mar 28 03:09:55 PM PDT 24 Mar 28 03:12:21 PM PDT 24 6514315047 ps
T541 /workspace/coverage/default/22.sram_ctrl_regwen.2718553359 Mar 28 03:09:56 PM PDT 24 Mar 28 03:10:30 PM PDT 24 6995247602 ps
T542 /workspace/coverage/default/41.sram_ctrl_mem_walk.3430182598 Mar 28 03:12:37 PM PDT 24 Mar 28 03:12:41 PM PDT 24 272540193 ps
T543 /workspace/coverage/default/13.sram_ctrl_max_throughput.228695745 Mar 28 03:09:02 PM PDT 24 Mar 28 03:09:43 PM PDT 24 95039649 ps
T544 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3820241960 Mar 28 03:09:22 PM PDT 24 Mar 28 03:11:45 PM PDT 24 1387475578 ps
T545 /workspace/coverage/default/25.sram_ctrl_stress_all.1418758767 Mar 28 03:10:25 PM PDT 24 Mar 28 03:23:38 PM PDT 24 8948974056 ps
T546 /workspace/coverage/default/27.sram_ctrl_regwen.646253451 Mar 28 03:10:46 PM PDT 24 Mar 28 03:18:12 PM PDT 24 11171021855 ps
T547 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1606266079 Mar 28 03:08:04 PM PDT 24 Mar 28 03:16:15 PM PDT 24 76319434893 ps
T548 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.3127688888 Mar 28 03:10:46 PM PDT 24 Mar 28 03:15:55 PM PDT 24 3306086452 ps
T549 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.4094997154 Mar 28 03:08:09 PM PDT 24 Mar 28 03:09:27 PM PDT 24 192672569 ps
T550 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.383816323 Mar 28 03:10:46 PM PDT 24 Mar 28 03:10:50 PM PDT 24 192081473 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%