| T551 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2624303812 |
|
|
Mar 28 03:11:16 PM PDT 24 |
Mar 28 03:13:20 PM PDT 24 |
530338611 ps |
| T552 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1195694018 |
|
|
Mar 28 03:13:47 PM PDT 24 |
Mar 28 03:16:03 PM PDT 24 |
203748461 ps |
| T553 |
/workspace/coverage/default/49.sram_ctrl_alert_test.439761207 |
|
|
Mar 28 03:13:58 PM PDT 24 |
Mar 28 03:13:59 PM PDT 24 |
14024818 ps |
| T554 |
/workspace/coverage/default/46.sram_ctrl_stress_all.964339119 |
|
|
Mar 28 03:13:43 PM PDT 24 |
Mar 28 03:59:49 PM PDT 24 |
8968063870 ps |
| T555 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2744108198 |
|
|
Mar 28 03:12:36 PM PDT 24 |
Mar 28 03:12:39 PM PDT 24 |
105634567 ps |
| T556 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.2715122210 |
|
|
Mar 28 03:09:19 PM PDT 24 |
Mar 28 03:27:29 PM PDT 24 |
16323734050 ps |
| T557 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.2408725536 |
|
|
Mar 28 03:07:51 PM PDT 24 |
Mar 28 03:36:19 PM PDT 24 |
66299108416 ps |
| T558 |
/workspace/coverage/default/46.sram_ctrl_bijection.660034099 |
|
|
Mar 28 03:13:20 PM PDT 24 |
Mar 28 03:13:55 PM PDT 24 |
1131601789 ps |
| T559 |
/workspace/coverage/default/18.sram_ctrl_smoke.1494493680 |
|
|
Mar 28 03:09:21 PM PDT 24 |
Mar 28 03:10:18 PM PDT 24 |
1719232276 ps |
| T560 |
/workspace/coverage/default/32.sram_ctrl_bijection.3177960685 |
|
|
Mar 28 03:11:19 PM PDT 24 |
Mar 28 03:12:07 PM PDT 24 |
797228240 ps |
| T561 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3370411935 |
|
|
Mar 28 03:12:46 PM PDT 24 |
Mar 28 03:13:45 PM PDT 24 |
524460100 ps |
| T562 |
/workspace/coverage/default/43.sram_ctrl_bijection.689398354 |
|
|
Mar 28 03:12:54 PM PDT 24 |
Mar 28 03:14:08 PM PDT 24 |
6142232609 ps |
| T563 |
/workspace/coverage/default/38.sram_ctrl_partial_access.521663074 |
|
|
Mar 28 03:12:21 PM PDT 24 |
Mar 28 03:12:39 PM PDT 24 |
3325186840 ps |
| T564 |
/workspace/coverage/default/47.sram_ctrl_smoke.3250478416 |
|
|
Mar 28 03:13:44 PM PDT 24 |
Mar 28 03:13:59 PM PDT 24 |
1610522606 ps |
| T565 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.1817595210 |
|
|
Mar 28 03:11:40 PM PDT 24 |
Mar 28 03:12:23 PM PDT 24 |
92174475 ps |
| T566 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2147833850 |
|
|
Mar 28 03:08:22 PM PDT 24 |
Mar 28 03:08:31 PM PDT 24 |
62542714 ps |
| T567 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3149381489 |
|
|
Mar 28 03:09:01 PM PDT 24 |
Mar 28 03:48:14 PM PDT 24 |
41027614950 ps |
| T568 |
/workspace/coverage/default/3.sram_ctrl_bijection.3664059117 |
|
|
Mar 28 03:07:46 PM PDT 24 |
Mar 28 03:08:10 PM PDT 24 |
7286988159 ps |
| T569 |
/workspace/coverage/default/4.sram_ctrl_partial_access.407186529 |
|
|
Mar 28 03:07:48 PM PDT 24 |
Mar 28 03:09:05 PM PDT 24 |
610989159 ps |
| T570 |
/workspace/coverage/default/28.sram_ctrl_bijection.2571081163 |
|
|
Mar 28 03:10:46 PM PDT 24 |
Mar 28 03:11:15 PM PDT 24 |
579843124 ps |
| T571 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1034165768 |
|
|
Mar 28 03:13:44 PM PDT 24 |
Mar 28 03:15:28 PM PDT 24 |
116115632 ps |
| T572 |
/workspace/coverage/default/34.sram_ctrl_partial_access.4215230169 |
|
|
Mar 28 03:11:39 PM PDT 24 |
Mar 28 03:11:57 PM PDT 24 |
1063750487 ps |
| T573 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3802273772 |
|
|
Mar 28 03:13:00 PM PDT 24 |
Mar 28 03:26:46 PM PDT 24 |
8938357145 ps |
| T574 |
/workspace/coverage/default/40.sram_ctrl_alert_test.99902042 |
|
|
Mar 28 03:12:41 PM PDT 24 |
Mar 28 03:12:42 PM PDT 24 |
39359215 ps |
| T575 |
/workspace/coverage/default/34.sram_ctrl_smoke.4258252097 |
|
|
Mar 28 03:11:39 PM PDT 24 |
Mar 28 03:11:41 PM PDT 24 |
180393696 ps |
| T576 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2317659509 |
|
|
Mar 28 03:12:21 PM PDT 24 |
Mar 28 03:12:27 PM PDT 24 |
328728609 ps |
| T577 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3757802390 |
|
|
Mar 28 03:12:55 PM PDT 24 |
Mar 28 03:13:02 PM PDT 24 |
1235471037 ps |
| T578 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1328498265 |
|
|
Mar 28 03:08:06 PM PDT 24 |
Mar 28 03:08:10 PM PDT 24 |
358157492 ps |
| T579 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.3423993968 |
|
|
Mar 28 03:11:06 PM PDT 24 |
Mar 28 03:11:13 PM PDT 24 |
171358543 ps |
| T580 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2599050882 |
|
|
Mar 28 03:11:37 PM PDT 24 |
Mar 28 03:21:05 PM PDT 24 |
2487891295 ps |
| T581 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1936623788 |
|
|
Mar 28 03:13:49 PM PDT 24 |
Mar 28 03:14:31 PM PDT 24 |
416985671 ps |
| T582 |
/workspace/coverage/default/22.sram_ctrl_smoke.2435458591 |
|
|
Mar 28 03:09:54 PM PDT 24 |
Mar 28 03:10:21 PM PDT 24 |
298557663 ps |
| T583 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2025156559 |
|
|
Mar 28 03:12:55 PM PDT 24 |
Mar 28 03:16:04 PM PDT 24 |
7898125801 ps |
| T584 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.682838005 |
|
|
Mar 28 03:13:57 PM PDT 24 |
Mar 28 03:14:02 PM PDT 24 |
1334179780 ps |
| T585 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3333802932 |
|
|
Mar 28 03:13:24 PM PDT 24 |
Mar 28 03:13:36 PM PDT 24 |
81895402 ps |
| T586 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.3727728837 |
|
|
Mar 28 03:11:18 PM PDT 24 |
Mar 28 03:11:21 PM PDT 24 |
166232588 ps |
| T587 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.1595260943 |
|
|
Mar 28 03:12:16 PM PDT 24 |
Mar 28 03:16:49 PM PDT 24 |
760488778 ps |
| T588 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.2795864853 |
|
|
Mar 28 03:10:27 PM PDT 24 |
Mar 28 03:14:18 PM PDT 24 |
10004380951 ps |
| T589 |
/workspace/coverage/default/29.sram_ctrl_stress_all.1595066484 |
|
|
Mar 28 03:11:14 PM PDT 24 |
Mar 28 03:29:56 PM PDT 24 |
4147115445 ps |
| T590 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.614029439 |
|
|
Mar 28 03:08:49 PM PDT 24 |
Mar 28 03:08:55 PM PDT 24 |
1867600088 ps |
| T591 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1801807834 |
|
|
Mar 28 03:09:06 PM PDT 24 |
Mar 28 03:09:55 PM PDT 24 |
2528770543 ps |
| T592 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3160254001 |
|
|
Mar 28 03:11:38 PM PDT 24 |
Mar 28 03:11:39 PM PDT 24 |
75693237 ps |
| T593 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2109892974 |
|
|
Mar 28 03:12:22 PM PDT 24 |
Mar 28 03:12:28 PM PDT 24 |
341642050 ps |
| T594 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3961105554 |
|
|
Mar 28 03:12:18 PM PDT 24 |
Mar 28 03:19:55 PM PDT 24 |
40777677279 ps |
| T595 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1185131592 |
|
|
Mar 28 03:08:32 PM PDT 24 |
Mar 28 03:08:32 PM PDT 24 |
25428139 ps |
| T596 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2321362981 |
|
|
Mar 28 03:08:16 PM PDT 24 |
Mar 28 03:08:17 PM PDT 24 |
82552423 ps |
| T597 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.4266056336 |
|
|
Mar 28 03:12:00 PM PDT 24 |
Mar 28 03:12:01 PM PDT 24 |
81762218 ps |
| T598 |
/workspace/coverage/default/35.sram_ctrl_executable.839693350 |
|
|
Mar 28 03:11:38 PM PDT 24 |
Mar 28 03:26:04 PM PDT 24 |
13799246998 ps |
| T599 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1291920156 |
|
|
Mar 28 03:08:03 PM PDT 24 |
Mar 28 03:08:40 PM PDT 24 |
334343043 ps |
| T600 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.1537540522 |
|
|
Mar 28 03:11:09 PM PDT 24 |
Mar 28 03:29:04 PM PDT 24 |
26379116694 ps |
| T601 |
/workspace/coverage/default/24.sram_ctrl_regwen.3928769240 |
|
|
Mar 28 03:10:07 PM PDT 24 |
Mar 28 03:18:00 PM PDT 24 |
1609678389 ps |
| T602 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.4270533438 |
|
|
Mar 28 03:12:19 PM PDT 24 |
Mar 28 03:16:53 PM PDT 24 |
11686619707 ps |
| T603 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.590700624 |
|
|
Mar 28 03:08:43 PM PDT 24 |
Mar 28 03:10:45 PM PDT 24 |
2654184916 ps |
| T604 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1170894942 |
|
|
Mar 28 03:12:56 PM PDT 24 |
Mar 28 03:19:22 PM PDT 24 |
62101066148 ps |
| T605 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.165500058 |
|
|
Mar 28 03:09:17 PM PDT 24 |
Mar 28 03:09:18 PM PDT 24 |
33698092 ps |
| T606 |
/workspace/coverage/default/22.sram_ctrl_bijection.1012825696 |
|
|
Mar 28 03:09:54 PM PDT 24 |
Mar 28 03:11:23 PM PDT 24 |
20790270800 ps |
| T607 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.3702803698 |
|
|
Mar 28 03:10:08 PM PDT 24 |
Mar 28 03:14:26 PM PDT 24 |
10422861362 ps |
| T608 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.200126594 |
|
|
Mar 28 03:12:17 PM PDT 24 |
Mar 28 03:12:18 PM PDT 24 |
34179142 ps |
| T609 |
/workspace/coverage/default/0.sram_ctrl_partial_access.3871043474 |
|
|
Mar 28 03:07:06 PM PDT 24 |
Mar 28 03:07:14 PM PDT 24 |
472380719 ps |
| T610 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.984180543 |
|
|
Mar 28 03:09:54 PM PDT 24 |
Mar 28 03:09:55 PM PDT 24 |
83390619 ps |
| T611 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3249311078 |
|
|
Mar 28 03:12:38 PM PDT 24 |
Mar 28 03:15:46 PM PDT 24 |
905099066 ps |
| T612 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1108109834 |
|
|
Mar 28 03:14:00 PM PDT 24 |
Mar 28 03:38:44 PM PDT 24 |
22990748173 ps |
| T613 |
/workspace/coverage/default/25.sram_ctrl_executable.3206197350 |
|
|
Mar 28 03:10:24 PM PDT 24 |
Mar 28 03:30:02 PM PDT 24 |
81340112966 ps |
| T614 |
/workspace/coverage/default/44.sram_ctrl_executable.1792774794 |
|
|
Mar 28 03:12:55 PM PDT 24 |
Mar 28 03:22:54 PM PDT 24 |
48914428407 ps |
| T615 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1041397352 |
|
|
Mar 28 03:08:04 PM PDT 24 |
Mar 28 03:08:09 PM PDT 24 |
663237975 ps |
| T616 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.3361773342 |
|
|
Mar 28 03:12:18 PM PDT 24 |
Mar 28 03:12:23 PM PDT 24 |
574190126 ps |
| T617 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.246898254 |
|
|
Mar 28 03:12:55 PM PDT 24 |
Mar 28 03:24:03 PM PDT 24 |
2405688243 ps |
| T618 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.401951566 |
|
|
Mar 28 03:10:06 PM PDT 24 |
Mar 28 03:12:36 PM PDT 24 |
133223013 ps |
| T619 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.498978654 |
|
|
Mar 28 03:13:43 PM PDT 24 |
Mar 28 03:13:50 PM PDT 24 |
6829743079 ps |
| T620 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1539502766 |
|
|
Mar 28 03:08:15 PM PDT 24 |
Mar 28 03:19:52 PM PDT 24 |
5762023026 ps |
| T621 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3675223110 |
|
|
Mar 28 03:11:05 PM PDT 24 |
Mar 28 03:11:09 PM PDT 24 |
291250767 ps |
| T622 |
/workspace/coverage/default/34.sram_ctrl_alert_test.791235274 |
|
|
Mar 28 03:11:41 PM PDT 24 |
Mar 28 03:11:42 PM PDT 24 |
35876488 ps |
| T623 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2449622637 |
|
|
Mar 28 03:10:48 PM PDT 24 |
Mar 28 03:10:54 PM PDT 24 |
165111361 ps |
| T624 |
/workspace/coverage/default/6.sram_ctrl_alert_test.999186561 |
|
|
Mar 28 03:08:10 PM PDT 24 |
Mar 28 03:08:11 PM PDT 24 |
30462835 ps |
| T625 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3462000486 |
|
|
Mar 28 03:08:14 PM PDT 24 |
Mar 28 03:08:16 PM PDT 24 |
81759912 ps |
| T626 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3307849807 |
|
|
Mar 28 03:12:39 PM PDT 24 |
Mar 28 03:12:48 PM PDT 24 |
849381443 ps |
| T627 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3723250326 |
|
|
Mar 28 03:10:08 PM PDT 24 |
Mar 28 03:10:14 PM PDT 24 |
1581822270 ps |
| T628 |
/workspace/coverage/default/29.sram_ctrl_alert_test.91075973 |
|
|
Mar 28 03:11:07 PM PDT 24 |
Mar 28 03:11:07 PM PDT 24 |
14333230 ps |
| T629 |
/workspace/coverage/default/5.sram_ctrl_partial_access.897592211 |
|
|
Mar 28 03:08:03 PM PDT 24 |
Mar 28 03:08:18 PM PDT 24 |
262420466 ps |
| T630 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.4278280578 |
|
|
Mar 28 03:10:26 PM PDT 24 |
Mar 28 03:12:30 PM PDT 24 |
148091403 ps |
| T631 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1187554047 |
|
|
Mar 28 03:10:27 PM PDT 24 |
Mar 28 03:16:15 PM PDT 24 |
1496691622 ps |
| T632 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1973593575 |
|
|
Mar 28 03:09:06 PM PDT 24 |
Mar 28 03:12:04 PM PDT 24 |
9479286532 ps |
| T633 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.406593286 |
|
|
Mar 28 03:09:36 PM PDT 24 |
Mar 28 03:10:31 PM PDT 24 |
184377717 ps |
| T634 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.2761441400 |
|
|
Mar 28 03:10:48 PM PDT 24 |
Mar 28 03:15:49 PM PDT 24 |
3175180906 ps |
| T635 |
/workspace/coverage/default/22.sram_ctrl_executable.3583444873 |
|
|
Mar 28 03:09:54 PM PDT 24 |
Mar 28 03:15:58 PM PDT 24 |
1309816636 ps |
| T636 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.4026999110 |
|
|
Mar 28 03:09:35 PM PDT 24 |
Mar 28 03:09:36 PM PDT 24 |
26320172 ps |
| T637 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.4029169359 |
|
|
Mar 28 03:09:24 PM PDT 24 |
Mar 28 03:09:25 PM PDT 24 |
80178832 ps |
| T638 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.673678293 |
|
|
Mar 28 03:13:45 PM PDT 24 |
Mar 28 03:30:08 PM PDT 24 |
14357576001 ps |
| T108 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2147184457 |
|
|
Mar 28 03:08:20 PM PDT 24 |
Mar 28 03:09:39 PM PDT 24 |
5157754675 ps |
| T639 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2708779434 |
|
|
Mar 28 03:12:20 PM PDT 24 |
Mar 28 03:12:22 PM PDT 24 |
74439854 ps |
| T640 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1598878387 |
|
|
Mar 28 03:08:03 PM PDT 24 |
Mar 28 04:03:19 PM PDT 24 |
43329303343 ps |
| T641 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.2527152621 |
|
|
Mar 28 03:11:23 PM PDT 24 |
Mar 28 03:16:57 PM PDT 24 |
6745747433 ps |
| T642 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.881115190 |
|
|
Mar 28 03:07:48 PM PDT 24 |
Mar 28 03:07:56 PM PDT 24 |
265676037 ps |
| T643 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2348982731 |
|
|
Mar 28 03:09:20 PM PDT 24 |
Mar 28 03:12:41 PM PDT 24 |
9398642396 ps |
| T644 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1739144037 |
|
|
Mar 28 03:13:20 PM PDT 24 |
Mar 28 03:13:21 PM PDT 24 |
36174668 ps |
| T645 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2263202902 |
|
|
Mar 28 03:08:14 PM PDT 24 |
Mar 28 03:11:21 PM PDT 24 |
1976760070 ps |
| T646 |
/workspace/coverage/default/35.sram_ctrl_regwen.3992305117 |
|
|
Mar 28 03:12:03 PM PDT 24 |
Mar 28 03:13:53 PM PDT 24 |
338472615 ps |
| T647 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.400004898 |
|
|
Mar 28 03:08:22 PM PDT 24 |
Mar 28 03:08:26 PM PDT 24 |
379196705 ps |
| T648 |
/workspace/coverage/default/33.sram_ctrl_regwen.391256755 |
|
|
Mar 28 03:11:19 PM PDT 24 |
Mar 28 03:30:05 PM PDT 24 |
8421968317 ps |
| T649 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2982840813 |
|
|
Mar 28 03:13:45 PM PDT 24 |
Mar 28 03:18:08 PM PDT 24 |
135698683217 ps |
| T650 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.1533015538 |
|
|
Mar 28 03:12:53 PM PDT 24 |
Mar 28 03:13:08 PM PDT 24 |
73548413 ps |
| T651 |
/workspace/coverage/default/4.sram_ctrl_bijection.4101999591 |
|
|
Mar 28 03:07:47 PM PDT 24 |
Mar 28 03:08:32 PM PDT 24 |
2894516890 ps |
| T652 |
/workspace/coverage/default/12.sram_ctrl_regwen.1324186381 |
|
|
Mar 28 03:08:48 PM PDT 24 |
Mar 28 03:28:00 PM PDT 24 |
10674208912 ps |
| T653 |
/workspace/coverage/default/17.sram_ctrl_smoke.3652008878 |
|
|
Mar 28 03:09:17 PM PDT 24 |
Mar 28 03:10:04 PM PDT 24 |
1896994792 ps |
| T654 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3797371736 |
|
|
Mar 28 03:11:59 PM PDT 24 |
Mar 28 03:12:02 PM PDT 24 |
142349255 ps |
| T655 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3963682686 |
|
|
Mar 28 03:12:02 PM PDT 24 |
Mar 28 03:12:09 PM PDT 24 |
181668922 ps |
| T656 |
/workspace/coverage/default/33.sram_ctrl_smoke.1372144891 |
|
|
Mar 28 03:11:22 PM PDT 24 |
Mar 28 03:11:34 PM PDT 24 |
2088932585 ps |
| T657 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.38069602 |
|
|
Mar 28 03:12:01 PM PDT 24 |
Mar 28 03:15:59 PM PDT 24 |
2569817310 ps |
| T658 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.148367627 |
|
|
Mar 28 03:09:56 PM PDT 24 |
Mar 28 03:24:16 PM PDT 24 |
14762417147 ps |
| T659 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1636267095 |
|
|
Mar 28 03:11:03 PM PDT 24 |
Mar 28 03:11:08 PM PDT 24 |
319705271 ps |
| T660 |
/workspace/coverage/default/0.sram_ctrl_bijection.1212651796 |
|
|
Mar 28 03:07:07 PM PDT 24 |
Mar 28 03:07:26 PM PDT 24 |
1538885869 ps |
| T661 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3494793676 |
|
|
Mar 28 03:09:55 PM PDT 24 |
Mar 28 03:29:04 PM PDT 24 |
43267754384 ps |
| T662 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2937348702 |
|
|
Mar 28 03:08:41 PM PDT 24 |
Mar 28 03:11:09 PM PDT 24 |
619334590 ps |
| T663 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3137505037 |
|
|
Mar 28 03:13:59 PM PDT 24 |
Mar 28 03:14:02 PM PDT 24 |
196133214 ps |
| T21 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2681981899 |
|
|
Mar 28 03:07:08 PM PDT 24 |
Mar 28 03:07:12 PM PDT 24 |
469923093 ps |
| T664 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2280586423 |
|
|
Mar 28 03:11:33 PM PDT 24 |
Mar 28 03:11:34 PM PDT 24 |
11867358 ps |
| T665 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.187640299 |
|
|
Mar 28 03:09:17 PM PDT 24 |
Mar 28 03:12:37 PM PDT 24 |
1971717554 ps |
| T666 |
/workspace/coverage/default/26.sram_ctrl_stress_all.921215963 |
|
|
Mar 28 03:10:23 PM PDT 24 |
Mar 28 04:18:32 PM PDT 24 |
13618521842 ps |
| T667 |
/workspace/coverage/default/33.sram_ctrl_bijection.1769056850 |
|
|
Mar 28 03:11:19 PM PDT 24 |
Mar 28 03:11:36 PM PDT 24 |
2943113088 ps |
| T668 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1685830492 |
|
|
Mar 28 03:09:06 PM PDT 24 |
Mar 28 03:13:04 PM PDT 24 |
2565783492 ps |
| T669 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2009813341 |
|
|
Mar 28 03:08:05 PM PDT 24 |
Mar 28 03:08:06 PM PDT 24 |
85548149 ps |
| T670 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3586475144 |
|
|
Mar 28 03:13:46 PM PDT 24 |
Mar 28 03:20:49 PM PDT 24 |
32019249246 ps |
| T671 |
/workspace/coverage/default/12.sram_ctrl_smoke.346947589 |
|
|
Mar 28 03:08:43 PM PDT 24 |
Mar 28 03:08:57 PM PDT 24 |
754019074 ps |
| T672 |
/workspace/coverage/default/20.sram_ctrl_stress_all.3752501236 |
|
|
Mar 28 03:09:37 PM PDT 24 |
Mar 28 03:24:51 PM PDT 24 |
64432452488 ps |
| T673 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3206308930 |
|
|
Mar 28 03:10:26 PM PDT 24 |
Mar 28 03:10:29 PM PDT 24 |
327518446 ps |
| T674 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1559044979 |
|
|
Mar 28 03:08:06 PM PDT 24 |
Mar 28 03:08:07 PM PDT 24 |
87308932 ps |
| T675 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.3781789471 |
|
|
Mar 28 03:09:37 PM PDT 24 |
Mar 28 03:12:30 PM PDT 24 |
3756152719 ps |
| T676 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2388184377 |
|
|
Mar 28 03:11:39 PM PDT 24 |
Mar 28 03:19:21 PM PDT 24 |
20550711482 ps |
| T109 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.18057132 |
|
|
Mar 28 03:08:08 PM PDT 24 |
Mar 28 03:10:10 PM PDT 24 |
2738962049 ps |
| T677 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3677115031 |
|
|
Mar 28 03:12:55 PM PDT 24 |
Mar 28 03:14:43 PM PDT 24 |
161485790 ps |
| T678 |
/workspace/coverage/default/2.sram_ctrl_bijection.488281390 |
|
|
Mar 28 03:07:48 PM PDT 24 |
Mar 28 03:09:11 PM PDT 24 |
8387243814 ps |
| T679 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4031298213 |
|
|
Mar 28 03:08:41 PM PDT 24 |
Mar 28 03:09:22 PM PDT 24 |
142365764 ps |
| T680 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1995415718 |
|
|
Mar 28 03:12:17 PM PDT 24 |
Mar 28 03:35:06 PM PDT 24 |
3803567109 ps |
| T681 |
/workspace/coverage/default/11.sram_ctrl_bijection.190206587 |
|
|
Mar 28 03:08:19 PM PDT 24 |
Mar 28 03:09:07 PM PDT 24 |
2583284043 ps |
| T682 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.85094966 |
|
|
Mar 28 03:13:18 PM PDT 24 |
Mar 28 03:44:40 PM PDT 24 |
7626535162 ps |
| T683 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2074259356 |
|
|
Mar 28 03:12:19 PM PDT 24 |
Mar 28 03:13:30 PM PDT 24 |
465437196 ps |
| T684 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3023022696 |
|
|
Mar 28 03:13:20 PM PDT 24 |
Mar 28 03:13:28 PM PDT 24 |
72120634 ps |
| T685 |
/workspace/coverage/default/4.sram_ctrl_alert_test.887569148 |
|
|
Mar 28 03:08:06 PM PDT 24 |
Mar 28 03:08:06 PM PDT 24 |
86646843 ps |
| T686 |
/workspace/coverage/default/23.sram_ctrl_bijection.2314831838 |
|
|
Mar 28 03:10:08 PM PDT 24 |
Mar 28 03:10:25 PM PDT 24 |
2620487634 ps |
| T687 |
/workspace/coverage/default/47.sram_ctrl_regwen.1677331756 |
|
|
Mar 28 03:13:45 PM PDT 24 |
Mar 28 03:22:07 PM PDT 24 |
111576938245 ps |
| T688 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2349439668 |
|
|
Mar 28 03:08:29 PM PDT 24 |
Mar 28 03:08:34 PM PDT 24 |
349930611 ps |
| T689 |
/workspace/coverage/default/47.sram_ctrl_executable.1053361416 |
|
|
Mar 28 03:13:47 PM PDT 24 |
Mar 28 03:37:56 PM PDT 24 |
26119505439 ps |
| T690 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3529800267 |
|
|
Mar 28 03:10:27 PM PDT 24 |
Mar 28 03:13:00 PM PDT 24 |
139289599 ps |
| T691 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3822100741 |
|
|
Mar 28 03:12:22 PM PDT 24 |
Mar 28 03:12:23 PM PDT 24 |
41642723 ps |
| T692 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.400254118 |
|
|
Mar 28 03:08:06 PM PDT 24 |
Mar 28 03:08:09 PM PDT 24 |
48061330 ps |
| T693 |
/workspace/coverage/default/10.sram_ctrl_smoke.4202920847 |
|
|
Mar 28 03:08:16 PM PDT 24 |
Mar 28 03:08:45 PM PDT 24 |
1714703943 ps |
| T694 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2175201471 |
|
|
Mar 28 03:08:42 PM PDT 24 |
Mar 28 03:08:43 PM PDT 24 |
24255254 ps |
| T695 |
/workspace/coverage/default/21.sram_ctrl_stress_all.2750288936 |
|
|
Mar 28 03:09:55 PM PDT 24 |
Mar 28 03:51:24 PM PDT 24 |
33362671728 ps |
| T696 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2743548788 |
|
|
Mar 28 03:08:16 PM PDT 24 |
Mar 28 03:11:53 PM PDT 24 |
4610523058 ps |
| T110 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.982268398 |
|
|
Mar 28 03:09:33 PM PDT 24 |
Mar 28 03:10:24 PM PDT 24 |
575728676 ps |
| T697 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2881041615 |
|
|
Mar 28 03:08:14 PM PDT 24 |
Mar 28 03:14:25 PM PDT 24 |
19435076019 ps |
| T698 |
/workspace/coverage/default/11.sram_ctrl_stress_all.1308086476 |
|
|
Mar 28 03:08:44 PM PDT 24 |
Mar 28 04:38:41 PM PDT 24 |
203385775016 ps |
| T699 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3713776593 |
|
|
Mar 28 03:09:34 PM PDT 24 |
Mar 28 03:09:36 PM PDT 24 |
510238619 ps |
| T700 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.763130621 |
|
|
Mar 28 03:09:02 PM PDT 24 |
Mar 28 03:09:07 PM PDT 24 |
451106742 ps |
| T701 |
/workspace/coverage/default/36.sram_ctrl_executable.2389927930 |
|
|
Mar 28 03:12:00 PM PDT 24 |
Mar 28 03:26:53 PM PDT 24 |
12778375125 ps |
| T702 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.734862917 |
|
|
Mar 28 03:13:22 PM PDT 24 |
Mar 28 03:21:30 PM PDT 24 |
72469207644 ps |
| T703 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.304192879 |
|
|
Mar 28 03:08:04 PM PDT 24 |
Mar 28 03:21:40 PM PDT 24 |
2329484434 ps |
| T704 |
/workspace/coverage/default/6.sram_ctrl_bijection.547757317 |
|
|
Mar 28 03:08:07 PM PDT 24 |
Mar 28 03:09:02 PM PDT 24 |
24588451491 ps |
| T705 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.644285002 |
|
|
Mar 28 03:08:06 PM PDT 24 |
Mar 28 03:10:07 PM PDT 24 |
1735775182 ps |
| T706 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.40862372 |
|
|
Mar 28 03:11:03 PM PDT 24 |
Mar 28 03:11:21 PM PDT 24 |
2748371098 ps |
| T707 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2979710291 |
|
|
Mar 28 03:07:47 PM PDT 24 |
Mar 28 03:07:52 PM PDT 24 |
323779326 ps |
| T708 |
/workspace/coverage/default/26.sram_ctrl_executable.1327483775 |
|
|
Mar 28 03:10:30 PM PDT 24 |
Mar 28 03:17:59 PM PDT 24 |
4323328162 ps |
| T709 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.3790415745 |
|
|
Mar 28 03:09:01 PM PDT 24 |
Mar 28 03:11:10 PM PDT 24 |
1337233179 ps |
| T710 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.3722286398 |
|
|
Mar 28 03:09:54 PM PDT 24 |
Mar 28 03:23:45 PM PDT 24 |
5441536144 ps |
| T711 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.591688812 |
|
|
Mar 28 03:10:27 PM PDT 24 |
Mar 28 03:10:37 PM PDT 24 |
2611571022 ps |
| T712 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.2652886980 |
|
|
Mar 28 03:09:33 PM PDT 24 |
Mar 28 03:09:34 PM PDT 24 |
26144929 ps |
| T713 |
/workspace/coverage/default/44.sram_ctrl_regwen.1219626501 |
|
|
Mar 28 03:12:52 PM PDT 24 |
Mar 28 03:13:53 PM PDT 24 |
552790346 ps |
| T714 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3057405460 |
|
|
Mar 28 03:08:42 PM PDT 24 |
Mar 28 03:13:36 PM PDT 24 |
37084689771 ps |
| T715 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3057427702 |
|
|
Mar 28 03:09:20 PM PDT 24 |
Mar 28 03:09:25 PM PDT 24 |
67273698 ps |
| T716 |
/workspace/coverage/default/26.sram_ctrl_smoke.343012716 |
|
|
Mar 28 03:10:28 PM PDT 24 |
Mar 28 03:10:30 PM PDT 24 |
190274201 ps |
| T717 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3656679200 |
|
|
Mar 28 03:07:48 PM PDT 24 |
Mar 28 03:31:37 PM PDT 24 |
12828247600 ps |
| T718 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2089902317 |
|
|
Mar 28 03:12:36 PM PDT 24 |
Mar 28 03:16:34 PM PDT 24 |
5329680373 ps |
| T719 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.31395338 |
|
|
Mar 28 03:11:39 PM PDT 24 |
Mar 28 03:11:42 PM PDT 24 |
98880183 ps |
| T720 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3595577753 |
|
|
Mar 28 03:13:44 PM PDT 24 |
Mar 28 03:13:46 PM PDT 24 |
137077756 ps |
| T721 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.135996325 |
|
|
Mar 28 03:08:05 PM PDT 24 |
Mar 28 03:13:53 PM PDT 24 |
6901374497 ps |
| T722 |
/workspace/coverage/default/12.sram_ctrl_bijection.4024768193 |
|
|
Mar 28 03:08:44 PM PDT 24 |
Mar 28 03:09:55 PM PDT 24 |
6783924063 ps |
| T723 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1108086638 |
|
|
Mar 28 03:12:36 PM PDT 24 |
Mar 28 03:14:02 PM PDT 24 |
2815378171 ps |
| T724 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.3831793152 |
|
|
Mar 28 03:10:11 PM PDT 24 |
Mar 28 03:10:13 PM PDT 24 |
97688807 ps |
| T725 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3348086186 |
|
|
Mar 28 03:14:01 PM PDT 24 |
Mar 28 03:20:15 PM PDT 24 |
20393996990 ps |
| T726 |
/workspace/coverage/default/31.sram_ctrl_smoke.3406516186 |
|
|
Mar 28 03:11:05 PM PDT 24 |
Mar 28 03:13:37 PM PDT 24 |
3194774087 ps |
| T727 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3241732211 |
|
|
Mar 28 03:12:00 PM PDT 24 |
Mar 28 04:47:41 PM PDT 24 |
87098647834 ps |
| T728 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.892710974 |
|
|
Mar 28 03:08:47 PM PDT 24 |
Mar 28 03:08:55 PM PDT 24 |
3569397396 ps |
| T729 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1347998578 |
|
|
Mar 28 03:08:07 PM PDT 24 |
Mar 28 03:08:13 PM PDT 24 |
481419021 ps |
| T730 |
/workspace/coverage/default/2.sram_ctrl_regwen.1931204780 |
|
|
Mar 28 03:07:47 PM PDT 24 |
Mar 28 03:32:11 PM PDT 24 |
6759143711 ps |
| T731 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2260369949 |
|
|
Mar 28 03:13:45 PM PDT 24 |
Mar 28 03:14:01 PM PDT 24 |
500574910 ps |
| T732 |
/workspace/coverage/default/4.sram_ctrl_executable.577387639 |
|
|
Mar 28 03:07:50 PM PDT 24 |
Mar 28 03:08:06 PM PDT 24 |
3732385951 ps |
| T733 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.1830986737 |
|
|
Mar 28 03:12:52 PM PDT 24 |
Mar 28 03:13:01 PM PDT 24 |
170024708 ps |
| T734 |
/workspace/coverage/default/11.sram_ctrl_regwen.3217532862 |
|
|
Mar 28 03:08:41 PM PDT 24 |
Mar 28 03:29:30 PM PDT 24 |
17004466719 ps |
| T735 |
/workspace/coverage/default/19.sram_ctrl_bijection.1081766387 |
|
|
Mar 28 03:09:36 PM PDT 24 |
Mar 28 03:10:38 PM PDT 24 |
4194263545 ps |
| T736 |
/workspace/coverage/default/18.sram_ctrl_partial_access.579819097 |
|
|
Mar 28 03:09:19 PM PDT 24 |
Mar 28 03:12:02 PM PDT 24 |
1382794398 ps |
| T737 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.1764476435 |
|
|
Mar 28 03:11:39 PM PDT 24 |
Mar 28 03:15:40 PM PDT 24 |
11077960653 ps |
| T738 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1018981500 |
|
|
Mar 28 03:12:35 PM PDT 24 |
Mar 28 03:29:58 PM PDT 24 |
2746255384 ps |
| T739 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.2659296936 |
|
|
Mar 28 03:12:20 PM PDT 24 |
Mar 28 03:12:26 PM PDT 24 |
56003064 ps |
| T740 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1633827469 |
|
|
Mar 28 03:08:08 PM PDT 24 |
Mar 28 03:10:10 PM PDT 24 |
605182166 ps |
| T741 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.2262384951 |
|
|
Mar 28 03:07:51 PM PDT 24 |
Mar 28 03:07:53 PM PDT 24 |
810376737 ps |
| T742 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2588768012 |
|
|
Mar 28 03:07:10 PM PDT 24 |
Mar 28 03:12:00 PM PDT 24 |
50868702402 ps |
| T743 |
/workspace/coverage/default/44.sram_ctrl_bijection.910975716 |
|
|
Mar 28 03:13:01 PM PDT 24 |
Mar 28 03:13:57 PM PDT 24 |
13083356124 ps |
| T744 |
/workspace/coverage/default/8.sram_ctrl_regwen.4055935366 |
|
|
Mar 28 03:08:15 PM PDT 24 |
Mar 28 03:21:43 PM PDT 24 |
95227120811 ps |
| T745 |
/workspace/coverage/default/13.sram_ctrl_partial_access.73937610 |
|
|
Mar 28 03:09:01 PM PDT 24 |
Mar 28 03:09:25 PM PDT 24 |
1393096343 ps |
| T746 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1617340970 |
|
|
Mar 28 03:08:14 PM PDT 24 |
Mar 28 03:40:34 PM PDT 24 |
18106002849 ps |
| T747 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1625428148 |
|
|
Mar 28 03:08:04 PM PDT 24 |
Mar 28 03:08:13 PM PDT 24 |
441536566 ps |
| T748 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.161332251 |
|
|
Mar 28 03:08:43 PM PDT 24 |
Mar 28 03:08:48 PM PDT 24 |
249037588 ps |
| T749 |
/workspace/coverage/default/32.sram_ctrl_executable.1028953855 |
|
|
Mar 28 03:11:22 PM PDT 24 |
Mar 28 03:29:41 PM PDT 24 |
169793898285 ps |
| T750 |
/workspace/coverage/default/45.sram_ctrl_smoke.620720941 |
|
|
Mar 28 03:13:21 PM PDT 24 |
Mar 28 03:13:28 PM PDT 24 |
126476213 ps |
| T751 |
/workspace/coverage/default/49.sram_ctrl_regwen.3829575952 |
|
|
Mar 28 03:14:02 PM PDT 24 |
Mar 28 03:18:33 PM PDT 24 |
30061268084 ps |
| T752 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.625662170 |
|
|
Mar 28 03:10:27 PM PDT 24 |
Mar 28 03:10:28 PM PDT 24 |
27693646 ps |
| T753 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2708725011 |
|
|
Mar 28 03:07:09 PM PDT 24 |
Mar 28 03:07:10 PM PDT 24 |
150136855 ps |
| T754 |
/workspace/coverage/default/36.sram_ctrl_partial_access.1411622143 |
|
|
Mar 28 03:12:06 PM PDT 24 |
Mar 28 03:12:25 PM PDT 24 |
1133499681 ps |
| T755 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2458062065 |
|
|
Mar 28 03:13:21 PM PDT 24 |
Mar 28 03:13:33 PM PDT 24 |
71578046 ps |
| T756 |
/workspace/coverage/default/46.sram_ctrl_regwen.3871855097 |
|
|
Mar 28 03:13:46 PM PDT 24 |
Mar 28 03:18:24 PM PDT 24 |
10609098617 ps |
| T757 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.156193852 |
|
|
Mar 28 03:11:19 PM PDT 24 |
Mar 28 03:32:03 PM PDT 24 |
9675029281 ps |
| T758 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.852356513 |
|
|
Mar 28 03:09:20 PM PDT 24 |
Mar 28 03:15:10 PM PDT 24 |
7865579688 ps |
| T759 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1356409606 |
|
|
Mar 28 03:09:06 PM PDT 24 |
Mar 28 03:13:42 PM PDT 24 |
2321348340 ps |
| T760 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.969344525 |
|
|
Mar 28 03:13:45 PM PDT 24 |
Mar 28 03:13:56 PM PDT 24 |
1342624684 ps |
| T761 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3162411740 |
|
|
Mar 28 03:09:53 PM PDT 24 |
Mar 28 03:09:57 PM PDT 24 |
816441001 ps |
| T762 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3721785262 |
|
|
Mar 28 03:12:02 PM PDT 24 |
Mar 28 03:31:55 PM PDT 24 |
3122746578 ps |
| T763 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.80564104 |
|
|
Mar 28 03:13:44 PM PDT 24 |
Mar 28 03:19:59 PM PDT 24 |
3730654476 ps |
| T764 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.630068127 |
|
|
Mar 28 03:11:24 PM PDT 24 |
Mar 28 03:11:33 PM PDT 24 |
303339733 ps |
| T765 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3785989244 |
|
|
Mar 28 03:08:15 PM PDT 24 |
Mar 28 03:08:19 PM PDT 24 |
1359420078 ps |
| T766 |
/workspace/coverage/default/38.sram_ctrl_regwen.63514640 |
|
|
Mar 28 03:12:19 PM PDT 24 |
Mar 28 03:36:23 PM PDT 24 |
32437968900 ps |
| T767 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1236228740 |
|
|
Mar 28 03:07:51 PM PDT 24 |
Mar 28 03:09:06 PM PDT 24 |
111219832 ps |
| T768 |
/workspace/coverage/default/25.sram_ctrl_partial_access.3725796975 |
|
|
Mar 28 03:10:23 PM PDT 24 |
Mar 28 03:11:38 PM PDT 24 |
173666370 ps |
| T769 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2386345225 |
|
|
Mar 28 03:08:10 PM PDT 24 |
Mar 28 03:08:12 PM PDT 24 |
1339665244 ps |
| T22 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.3667959723 |
|
|
Mar 28 03:08:04 PM PDT 24 |
Mar 28 03:08:06 PM PDT 24 |
819918507 ps |
| T770 |
/workspace/coverage/default/39.sram_ctrl_executable.4242022838 |
|
|
Mar 28 03:12:18 PM PDT 24 |
Mar 28 03:23:35 PM PDT 24 |
96831590524 ps |
| T771 |
/workspace/coverage/default/23.sram_ctrl_regwen.1343171256 |
|
|
Mar 28 03:10:09 PM PDT 24 |
Mar 28 03:23:01 PM PDT 24 |
20055183972 ps |
| T772 |
/workspace/coverage/default/41.sram_ctrl_smoke.2028006973 |
|
|
Mar 28 03:12:39 PM PDT 24 |
Mar 28 03:13:06 PM PDT 24 |
278087690 ps |
| T773 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.3585205807 |
|
|
Mar 28 03:12:36 PM PDT 24 |
Mar 28 03:12:43 PM PDT 24 |
1135021856 ps |
| T774 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2670708868 |
|
|
Mar 28 03:09:55 PM PDT 24 |
Mar 28 03:17:50 PM PDT 24 |
6457144381 ps |
| T775 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.2143646642 |
|
|
Mar 28 03:12:37 PM PDT 24 |
Mar 28 03:12:39 PM PDT 24 |
77513175 ps |
| T776 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3870368636 |
|
|
Mar 28 03:13:43 PM PDT 24 |
Mar 28 03:13:44 PM PDT 24 |
14558989 ps |
| T777 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3244185681 |
|
|
Mar 28 03:11:24 PM PDT 24 |
Mar 28 03:11:34 PM PDT 24 |
461173063 ps |
| T778 |
/workspace/coverage/default/14.sram_ctrl_bijection.173713132 |
|
|
Mar 28 03:08:59 PM PDT 24 |
Mar 28 03:09:27 PM PDT 24 |
873250365 ps |
| T779 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2484256860 |
|
|
Mar 28 03:12:18 PM PDT 24 |
Mar 28 03:12:26 PM PDT 24 |
161586883 ps |
| T780 |
/workspace/coverage/default/46.sram_ctrl_smoke.3264256868 |
|
|
Mar 28 03:13:20 PM PDT 24 |
Mar 28 03:13:26 PM PDT 24 |
96656181 ps |
| T781 |
/workspace/coverage/default/14.sram_ctrl_smoke.1151822907 |
|
|
Mar 28 03:09:04 PM PDT 24 |
Mar 28 03:11:28 PM PDT 24 |
703611826 ps |
| T782 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2085540283 |
|
|
Mar 28 03:10:27 PM PDT 24 |
Mar 28 03:10:28 PM PDT 24 |
20680216 ps |
| T33 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3519494015 |
|
|
Mar 28 03:07:48 PM PDT 24 |
Mar 28 03:07:51 PM PDT 24 |
799378448 ps |
| T783 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.843802206 |
|
|
Mar 28 03:10:46 PM PDT 24 |
Mar 28 03:24:55 PM PDT 24 |
88741725621 ps |
| T784 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.888689034 |
|
|
Mar 28 03:09:54 PM PDT 24 |
Mar 28 03:09:56 PM PDT 24 |
147800878 ps |
| T785 |
/workspace/coverage/default/29.sram_ctrl_executable.879985500 |
|
|
Mar 28 03:11:04 PM PDT 24 |
Mar 28 03:28:24 PM PDT 24 |
2922295079 ps |
| T786 |
/workspace/coverage/default/19.sram_ctrl_regwen.4184364463 |
|
|
Mar 28 03:09:34 PM PDT 24 |
Mar 28 03:28:35 PM PDT 24 |
66506418087 ps |
| T787 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2978554562 |
|
|
Mar 28 03:12:21 PM PDT 24 |
Mar 28 03:13:13 PM PDT 24 |
208813999 ps |
| T788 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3464722016 |
|
|
Mar 28 03:11:25 PM PDT 24 |
Mar 28 03:26:23 PM PDT 24 |
3051579332 ps |
| T789 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.50200316 |
|
|
Mar 28 03:09:56 PM PDT 24 |
Mar 28 03:23:44 PM PDT 24 |
3186708523 ps |
| T790 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.2334704196 |
|
|
Mar 28 03:07:47 PM PDT 24 |
Mar 28 03:07:48 PM PDT 24 |
45147997 ps |
| T791 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.3615621552 |
|
|
Mar 28 03:09:19 PM PDT 24 |
Mar 28 03:09:24 PM PDT 24 |
135525915 ps |
| T792 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1890241597 |
|
|
Mar 28 03:08:17 PM PDT 24 |
Mar 28 03:08:28 PM PDT 24 |
1500221877 ps |
| T793 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.823744820 |
|
|
Mar 28 03:13:20 PM PDT 24 |
Mar 28 03:14:39 PM PDT 24 |
2595704731 ps |
| T794 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.616634100 |
|
|
Mar 28 03:12:36 PM PDT 24 |
Mar 28 03:12:41 PM PDT 24 |
1840265892 ps |