| T315 |
/workspace/coverage/default/11.sram_ctrl_executable.3299468861 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:56:45 PM PDT 24 |
18883513872 ps |
| T316 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.236103608 |
|
|
Apr 30 01:41:51 PM PDT 24 |
Apr 30 01:43:31 PM PDT 24 |
517690473 ps |
| T317 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3533111058 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:42:01 PM PDT 24 |
46844952 ps |
| T52 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2837723632 |
|
|
Apr 30 01:45:07 PM PDT 24 |
Apr 30 01:46:32 PM PDT 24 |
6426274178 ps |
| T318 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.4195730913 |
|
|
Apr 30 01:43:25 PM PDT 24 |
Apr 30 01:43:27 PM PDT 24 |
54531318 ps |
| T319 |
/workspace/coverage/default/13.sram_ctrl_smoke.2841940635 |
|
|
Apr 30 01:42:17 PM PDT 24 |
Apr 30 01:42:27 PM PDT 24 |
597654281 ps |
| T320 |
/workspace/coverage/default/23.sram_ctrl_executable.3294153494 |
|
|
Apr 30 01:42:56 PM PDT 24 |
Apr 30 01:53:08 PM PDT 24 |
19476985785 ps |
| T321 |
/workspace/coverage/default/11.sram_ctrl_smoke.3633512922 |
|
|
Apr 30 01:42:11 PM PDT 24 |
Apr 30 01:42:26 PM PDT 24 |
1755387589 ps |
| T322 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.2925954058 |
|
|
Apr 30 01:42:40 PM PDT 24 |
Apr 30 01:42:46 PM PDT 24 |
882465020 ps |
| T323 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.952146491 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 01:42:26 PM PDT 24 |
329448945 ps |
| T324 |
/workspace/coverage/default/45.sram_ctrl_alert_test.578341246 |
|
|
Apr 30 01:45:37 PM PDT 24 |
Apr 30 01:45:38 PM PDT 24 |
14813023 ps |
| T325 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.4139931305 |
|
|
Apr 30 01:43:32 PM PDT 24 |
Apr 30 01:43:33 PM PDT 24 |
26120388 ps |
| T326 |
/workspace/coverage/default/25.sram_ctrl_alert_test.260084689 |
|
|
Apr 30 01:43:07 PM PDT 24 |
Apr 30 01:43:08 PM PDT 24 |
44327549 ps |
| T327 |
/workspace/coverage/default/18.sram_ctrl_partial_access.2268188698 |
|
|
Apr 30 01:42:21 PM PDT 24 |
Apr 30 01:42:23 PM PDT 24 |
216667225 ps |
| T328 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.717119921 |
|
|
Apr 30 01:43:34 PM PDT 24 |
Apr 30 01:43:40 PM PDT 24 |
157038508 ps |
| T329 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2468548776 |
|
|
Apr 30 01:45:40 PM PDT 24 |
Apr 30 01:49:16 PM PDT 24 |
27850769410 ps |
| T330 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.854886835 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:44:27 PM PDT 24 |
260916352 ps |
| T331 |
/workspace/coverage/default/31.sram_ctrl_smoke.3844855465 |
|
|
Apr 30 01:43:32 PM PDT 24 |
Apr 30 01:43:45 PM PDT 24 |
240753435 ps |
| T332 |
/workspace/coverage/default/31.sram_ctrl_bijection.2724418844 |
|
|
Apr 30 01:43:34 PM PDT 24 |
Apr 30 01:44:33 PM PDT 24 |
925327501 ps |
| T333 |
/workspace/coverage/default/16.sram_ctrl_alert_test.1147152142 |
|
|
Apr 30 01:42:20 PM PDT 24 |
Apr 30 01:42:21 PM PDT 24 |
17601005 ps |
| T334 |
/workspace/coverage/default/5.sram_ctrl_bijection.4188982883 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:43:17 PM PDT 24 |
14465056816 ps |
| T335 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3352292531 |
|
|
Apr 30 01:42:02 PM PDT 24 |
Apr 30 01:42:13 PM PDT 24 |
227983156 ps |
| T336 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3307050291 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:48:01 PM PDT 24 |
100647143290 ps |
| T337 |
/workspace/coverage/default/22.sram_ctrl_partial_access.886709167 |
|
|
Apr 30 01:42:42 PM PDT 24 |
Apr 30 01:42:58 PM PDT 24 |
853944351 ps |
| T338 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.3090406877 |
|
|
Apr 30 01:42:31 PM PDT 24 |
Apr 30 01:45:25 PM PDT 24 |
3780399946 ps |
| T339 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3334687968 |
|
|
Apr 30 01:42:02 PM PDT 24 |
Apr 30 01:43:36 PM PDT 24 |
503569597 ps |
| T340 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.1283858452 |
|
|
Apr 30 01:42:20 PM PDT 24 |
Apr 30 01:42:21 PM PDT 24 |
215242144 ps |
| T341 |
/workspace/coverage/default/27.sram_ctrl_stress_all.4017653815 |
|
|
Apr 30 01:43:12 PM PDT 24 |
Apr 30 02:56:05 PM PDT 24 |
10657243021 ps |
| T342 |
/workspace/coverage/default/5.sram_ctrl_smoke.2427246829 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:41:59 PM PDT 24 |
414333009 ps |
| T343 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.4172107454 |
|
|
Apr 30 01:43:47 PM PDT 24 |
Apr 30 01:49:47 PM PDT 24 |
14276958687 ps |
| T344 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1221889231 |
|
|
Apr 30 01:43:03 PM PDT 24 |
Apr 30 01:51:07 PM PDT 24 |
22910458745 ps |
| T345 |
/workspace/coverage/default/40.sram_ctrl_alert_test.184588125 |
|
|
Apr 30 01:44:51 PM PDT 24 |
Apr 30 01:44:52 PM PDT 24 |
13107283 ps |
| T346 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.4189938567 |
|
|
Apr 30 01:42:49 PM PDT 24 |
Apr 30 01:42:50 PM PDT 24 |
30176265 ps |
| T347 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.391045398 |
|
|
Apr 30 01:43:21 PM PDT 24 |
Apr 30 01:49:00 PM PDT 24 |
559786366 ps |
| T348 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.4007992225 |
|
|
Apr 30 01:43:55 PM PDT 24 |
Apr 30 01:48:24 PM PDT 24 |
11609742205 ps |
| T349 |
/workspace/coverage/default/27.sram_ctrl_partial_access.1730445015 |
|
|
Apr 30 01:43:14 PM PDT 24 |
Apr 30 01:43:26 PM PDT 24 |
5929441710 ps |
| T53 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.660553067 |
|
|
Apr 30 01:42:57 PM PDT 24 |
Apr 30 01:43:26 PM PDT 24 |
1747960200 ps |
| T350 |
/workspace/coverage/default/16.sram_ctrl_smoke.36922229 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:42:28 PM PDT 24 |
25472751 ps |
| T54 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3609888344 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 01:46:43 PM PDT 24 |
4046492993 ps |
| T351 |
/workspace/coverage/default/12.sram_ctrl_executable.3872366869 |
|
|
Apr 30 01:42:17 PM PDT 24 |
Apr 30 02:06:36 PM PDT 24 |
18815077710 ps |
| T352 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2919144022 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:42:35 PM PDT 24 |
215936796 ps |
| T353 |
/workspace/coverage/default/29.sram_ctrl_executable.1138979448 |
|
|
Apr 30 01:43:26 PM PDT 24 |
Apr 30 01:45:53 PM PDT 24 |
531946192 ps |
| T354 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.795682741 |
|
|
Apr 30 01:45:54 PM PDT 24 |
Apr 30 01:50:28 PM PDT 24 |
20597018168 ps |
| T355 |
/workspace/coverage/default/49.sram_ctrl_executable.739707022 |
|
|
Apr 30 01:46:08 PM PDT 24 |
Apr 30 02:08:19 PM PDT 24 |
8071562954 ps |
| T356 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3173072218 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 01:42:02 PM PDT 24 |
45588974 ps |
| T357 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1678191942 |
|
|
Apr 30 01:45:12 PM PDT 24 |
Apr 30 01:49:42 PM PDT 24 |
52412324458 ps |
| T358 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.37742848 |
|
|
Apr 30 01:43:20 PM PDT 24 |
Apr 30 01:43:21 PM PDT 24 |
29804931 ps |
| T359 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1291473718 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:43:21 PM PDT 24 |
865493753 ps |
| T360 |
/workspace/coverage/default/30.sram_ctrl_executable.803435110 |
|
|
Apr 30 01:43:35 PM PDT 24 |
Apr 30 02:04:53 PM PDT 24 |
64195297219 ps |
| T361 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3980264941 |
|
|
Apr 30 01:41:59 PM PDT 24 |
Apr 30 01:42:00 PM PDT 24 |
14763532 ps |
| T362 |
/workspace/coverage/default/16.sram_ctrl_regwen.3467445895 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 01:48:29 PM PDT 24 |
7160162755 ps |
| T363 |
/workspace/coverage/default/4.sram_ctrl_smoke.723365153 |
|
|
Apr 30 01:41:49 PM PDT 24 |
Apr 30 01:42:08 PM PDT 24 |
3598520391 ps |
| T364 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2652919895 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 01:42:53 PM PDT 24 |
172909434 ps |
| T16 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3592499673 |
|
|
Apr 30 01:41:42 PM PDT 24 |
Apr 30 01:41:47 PM PDT 24 |
933328656 ps |
| T36 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1679422373 |
|
|
Apr 30 01:45:37 PM PDT 24 |
Apr 30 02:08:37 PM PDT 24 |
17042054528 ps |
| T37 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3293079404 |
|
|
Apr 30 01:43:49 PM PDT 24 |
Apr 30 01:44:23 PM PDT 24 |
384007924 ps |
| T38 |
/workspace/coverage/default/28.sram_ctrl_partial_access.4210191198 |
|
|
Apr 30 01:43:15 PM PDT 24 |
Apr 30 01:43:24 PM PDT 24 |
468177627 ps |
| T39 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.3232051621 |
|
|
Apr 30 01:44:36 PM PDT 24 |
Apr 30 01:44:39 PM PDT 24 |
262563967 ps |
| T40 |
/workspace/coverage/default/11.sram_ctrl_bijection.3333050755 |
|
|
Apr 30 01:42:06 PM PDT 24 |
Apr 30 01:42:53 PM PDT 24 |
2265662953 ps |
| T41 |
/workspace/coverage/default/20.sram_ctrl_partial_access.4151907064 |
|
|
Apr 30 01:42:31 PM PDT 24 |
Apr 30 01:43:51 PM PDT 24 |
599560549 ps |
| T42 |
/workspace/coverage/default/9.sram_ctrl_smoke.2868107718 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:42:34 PM PDT 24 |
1558599626 ps |
| T43 |
/workspace/coverage/default/22.sram_ctrl_alert_test.913442525 |
|
|
Apr 30 01:42:50 PM PDT 24 |
Apr 30 01:42:51 PM PDT 24 |
13207426 ps |
| T44 |
/workspace/coverage/default/44.sram_ctrl_bijection.3254540146 |
|
|
Apr 30 01:45:19 PM PDT 24 |
Apr 30 01:46:17 PM PDT 24 |
21754158118 ps |
| T365 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2839167350 |
|
|
Apr 30 01:45:20 PM PDT 24 |
Apr 30 01:45:21 PM PDT 24 |
28867175 ps |
| T366 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1050636839 |
|
|
Apr 30 01:42:30 PM PDT 24 |
Apr 30 01:43:17 PM PDT 24 |
113816905 ps |
| T103 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3918080412 |
|
|
Apr 30 01:45:56 PM PDT 24 |
Apr 30 01:49:26 PM PDT 24 |
9970535965 ps |
| T367 |
/workspace/coverage/default/28.sram_ctrl_alert_test.2611368226 |
|
|
Apr 30 01:43:18 PM PDT 24 |
Apr 30 01:43:19 PM PDT 24 |
18775942 ps |
| T368 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.3972313309 |
|
|
Apr 30 01:42:21 PM PDT 24 |
Apr 30 01:45:35 PM PDT 24 |
9457116545 ps |
| T369 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1746040314 |
|
|
Apr 30 01:42:20 PM PDT 24 |
Apr 30 02:07:40 PM PDT 24 |
60548954740 ps |
| T370 |
/workspace/coverage/default/13.sram_ctrl_regwen.3270069034 |
|
|
Apr 30 01:42:19 PM PDT 24 |
Apr 30 01:53:33 PM PDT 24 |
4332713925 ps |
| T371 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4014582156 |
|
|
Apr 30 01:42:34 PM PDT 24 |
Apr 30 01:48:58 PM PDT 24 |
59492930166 ps |
| T372 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1627434597 |
|
|
Apr 30 01:42:11 PM PDT 24 |
Apr 30 01:47:57 PM PDT 24 |
3666175257 ps |
| T373 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.1753836187 |
|
|
Apr 30 01:41:44 PM PDT 24 |
Apr 30 01:41:49 PM PDT 24 |
1940052015 ps |
| T374 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.549851077 |
|
|
Apr 30 01:44:13 PM PDT 24 |
Apr 30 01:49:43 PM PDT 24 |
18259595591 ps |
| T375 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1691114506 |
|
|
Apr 30 01:45:59 PM PDT 24 |
Apr 30 01:46:05 PM PDT 24 |
620951036 ps |
| T376 |
/workspace/coverage/default/14.sram_ctrl_executable.275169125 |
|
|
Apr 30 01:42:19 PM PDT 24 |
Apr 30 02:04:43 PM PDT 24 |
11988730664 ps |
| T377 |
/workspace/coverage/default/2.sram_ctrl_partial_access.449068974 |
|
|
Apr 30 01:41:42 PM PDT 24 |
Apr 30 01:44:13 PM PDT 24 |
732237635 ps |
| T378 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1384763838 |
|
|
Apr 30 01:41:54 PM PDT 24 |
Apr 30 01:41:57 PM PDT 24 |
187496082 ps |
| T379 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.3380277738 |
|
|
Apr 30 01:42:49 PM PDT 24 |
Apr 30 01:42:53 PM PDT 24 |
413938322 ps |
| T380 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1252639185 |
|
|
Apr 30 01:41:45 PM PDT 24 |
Apr 30 01:41:46 PM PDT 24 |
30793740 ps |
| T381 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.783738231 |
|
|
Apr 30 01:42:05 PM PDT 24 |
Apr 30 01:42:33 PM PDT 24 |
104332267 ps |
| T382 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3122442481 |
|
|
Apr 30 01:42:21 PM PDT 24 |
Apr 30 01:42:23 PM PDT 24 |
33956548 ps |
| T383 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.129487491 |
|
|
Apr 30 01:45:54 PM PDT 24 |
Apr 30 02:04:53 PM PDT 24 |
3508873615 ps |
| T384 |
/workspace/coverage/default/29.sram_ctrl_alert_test.2475210283 |
|
|
Apr 30 01:43:25 PM PDT 24 |
Apr 30 01:43:26 PM PDT 24 |
23989685 ps |
| T385 |
/workspace/coverage/default/48.sram_ctrl_bijection.2549604348 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 01:47:00 PM PDT 24 |
2196594147 ps |
| T386 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1416462844 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:47:56 PM PDT 24 |
14054507904 ps |
| T387 |
/workspace/coverage/default/20.sram_ctrl_stress_all.1124059417 |
|
|
Apr 30 01:42:34 PM PDT 24 |
Apr 30 02:08:09 PM PDT 24 |
86463724644 ps |
| T388 |
/workspace/coverage/default/17.sram_ctrl_stress_all.1069310778 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 02:42:16 PM PDT 24 |
246414011280 ps |
| T389 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1904829885 |
|
|
Apr 30 01:46:15 PM PDT 24 |
Apr 30 01:46:16 PM PDT 24 |
17981693 ps |
| T390 |
/workspace/coverage/default/44.sram_ctrl_partial_access.2935360362 |
|
|
Apr 30 01:45:24 PM PDT 24 |
Apr 30 01:46:59 PM PDT 24 |
2507840562 ps |
| T391 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.2694681147 |
|
|
Apr 30 01:44:52 PM PDT 24 |
Apr 30 01:45:02 PM PDT 24 |
686172643 ps |
| T392 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.596173419 |
|
|
Apr 30 01:43:47 PM PDT 24 |
Apr 30 01:48:49 PM PDT 24 |
4236939953 ps |
| T393 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.3366041069 |
|
|
Apr 30 01:42:34 PM PDT 24 |
Apr 30 01:42:45 PM PDT 24 |
3507359975 ps |
| T394 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.2915939472 |
|
|
Apr 30 01:43:29 PM PDT 24 |
Apr 30 01:43:36 PM PDT 24 |
67192247 ps |
| T395 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.199379341 |
|
|
Apr 30 01:41:49 PM PDT 24 |
Apr 30 01:41:52 PM PDT 24 |
912480704 ps |
| T396 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.1425997654 |
|
|
Apr 30 01:44:20 PM PDT 24 |
Apr 30 01:44:24 PM PDT 24 |
962806802 ps |
| T397 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2617917532 |
|
|
Apr 30 01:42:29 PM PDT 24 |
Apr 30 01:42:34 PM PDT 24 |
227633055 ps |
| T398 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.832850216 |
|
|
Apr 30 01:43:07 PM PDT 24 |
Apr 30 01:43:17 PM PDT 24 |
1648977632 ps |
| T104 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1758814013 |
|
|
Apr 30 01:43:41 PM PDT 24 |
Apr 30 01:45:31 PM PDT 24 |
10028598503 ps |
| T399 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.4257991251 |
|
|
Apr 30 01:44:36 PM PDT 24 |
Apr 30 01:46:50 PM PDT 24 |
460899844 ps |
| T400 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3352907102 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:41:56 PM PDT 24 |
206244319 ps |
| T105 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3879401486 |
|
|
Apr 30 01:44:36 PM PDT 24 |
Apr 30 01:48:34 PM PDT 24 |
2525262197 ps |
| T401 |
/workspace/coverage/default/34.sram_ctrl_partial_access.1416831061 |
|
|
Apr 30 01:43:56 PM PDT 24 |
Apr 30 01:44:05 PM PDT 24 |
1677421727 ps |
| T402 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.1744370403 |
|
|
Apr 30 01:41:44 PM PDT 24 |
Apr 30 01:41:50 PM PDT 24 |
305189014 ps |
| T403 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.211134619 |
|
|
Apr 30 01:43:05 PM PDT 24 |
Apr 30 01:49:12 PM PDT 24 |
1278814751 ps |
| T404 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3207266776 |
|
|
Apr 30 01:45:05 PM PDT 24 |
Apr 30 01:49:34 PM PDT 24 |
15354859192 ps |
| T405 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.640381462 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:44:40 PM PDT 24 |
7679892814 ps |
| T406 |
/workspace/coverage/default/14.sram_ctrl_bijection.1805682810 |
|
|
Apr 30 01:42:17 PM PDT 24 |
Apr 30 01:43:06 PM PDT 24 |
3163322319 ps |
| T407 |
/workspace/coverage/default/11.sram_ctrl_regwen.347391029 |
|
|
Apr 30 01:42:13 PM PDT 24 |
Apr 30 02:04:04 PM PDT 24 |
25778047856 ps |
| T408 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2616231722 |
|
|
Apr 30 01:44:49 PM PDT 24 |
Apr 30 01:46:30 PM PDT 24 |
154000233 ps |
| T409 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.38296258 |
|
|
Apr 30 01:42:20 PM PDT 24 |
Apr 30 01:42:36 PM PDT 24 |
158515266 ps |
| T410 |
/workspace/coverage/default/1.sram_ctrl_smoke.100671952 |
|
|
Apr 30 01:41:44 PM PDT 24 |
Apr 30 01:41:52 PM PDT 24 |
732787975 ps |
| T411 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2835157099 |
|
|
Apr 30 01:45:11 PM PDT 24 |
Apr 30 01:45:19 PM PDT 24 |
897510946 ps |
| T412 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2476998173 |
|
|
Apr 30 01:43:47 PM PDT 24 |
Apr 30 01:43:49 PM PDT 24 |
766985154 ps |
| T413 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.439815081 |
|
|
Apr 30 01:42:09 PM PDT 24 |
Apr 30 01:42:37 PM PDT 24 |
88213600 ps |
| T414 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.3775096222 |
|
|
Apr 30 01:43:42 PM PDT 24 |
Apr 30 01:43:48 PM PDT 24 |
236835682 ps |
| T415 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.11556666 |
|
|
Apr 30 01:42:37 PM PDT 24 |
Apr 30 01:42:42 PM PDT 24 |
311636212 ps |
| T416 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2681107376 |
|
|
Apr 30 01:42:48 PM PDT 24 |
Apr 30 01:42:56 PM PDT 24 |
146928786 ps |
| T417 |
/workspace/coverage/default/33.sram_ctrl_stress_all.660407431 |
|
|
Apr 30 01:43:52 PM PDT 24 |
Apr 30 01:58:41 PM PDT 24 |
65449429459 ps |
| T418 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3981469053 |
|
|
Apr 30 01:45:42 PM PDT 24 |
Apr 30 01:45:46 PM PDT 24 |
147806884 ps |
| T419 |
/workspace/coverage/default/48.sram_ctrl_regwen.1443365049 |
|
|
Apr 30 01:45:56 PM PDT 24 |
Apr 30 02:00:58 PM PDT 24 |
12520251259 ps |
| T420 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2804209594 |
|
|
Apr 30 01:44:15 PM PDT 24 |
Apr 30 01:47:38 PM PDT 24 |
12595528593 ps |
| T421 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.2146743051 |
|
|
Apr 30 01:43:04 PM PDT 24 |
Apr 30 01:49:06 PM PDT 24 |
29605584339 ps |
| T422 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3774781024 |
|
|
Apr 30 01:42:35 PM PDT 24 |
Apr 30 01:42:37 PM PDT 24 |
37500974 ps |
| T423 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2371445185 |
|
|
Apr 30 01:44:06 PM PDT 24 |
Apr 30 01:47:00 PM PDT 24 |
7882145641 ps |
| T424 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.2360024209 |
|
|
Apr 30 01:44:49 PM PDT 24 |
Apr 30 01:50:30 PM PDT 24 |
4918875937 ps |
| T425 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1908438736 |
|
|
Apr 30 01:45:40 PM PDT 24 |
Apr 30 01:50:03 PM PDT 24 |
2820808812 ps |
| T426 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2911704563 |
|
|
Apr 30 01:43:02 PM PDT 24 |
Apr 30 01:44:21 PM PDT 24 |
374988516 ps |
| T427 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3923912142 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:42:08 PM PDT 24 |
119690620 ps |
| T428 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.261101203 |
|
|
Apr 30 01:45:15 PM PDT 24 |
Apr 30 01:45:21 PM PDT 24 |
352522673 ps |
| T429 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2876937958 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:42:32 PM PDT 24 |
618745071 ps |
| T430 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1032703494 |
|
|
Apr 30 01:43:02 PM PDT 24 |
Apr 30 01:43:35 PM PDT 24 |
1191438467 ps |
| T431 |
/workspace/coverage/default/22.sram_ctrl_executable.2625425135 |
|
|
Apr 30 01:42:51 PM PDT 24 |
Apr 30 01:48:05 PM PDT 24 |
13213072386 ps |
| T432 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2532374642 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:53:43 PM PDT 24 |
2153946296 ps |
| T433 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.2475509290 |
|
|
Apr 30 01:43:28 PM PDT 24 |
Apr 30 01:48:56 PM PDT 24 |
1480573228 ps |
| T434 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.857406595 |
|
|
Apr 30 01:45:59 PM PDT 24 |
Apr 30 01:46:08 PM PDT 24 |
139702017 ps |
| T435 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1748572709 |
|
|
Apr 30 01:46:10 PM PDT 24 |
Apr 30 01:49:13 PM PDT 24 |
1572343914 ps |
| T436 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2422310243 |
|
|
Apr 30 01:44:00 PM PDT 24 |
Apr 30 01:44:03 PM PDT 24 |
637666610 ps |
| T437 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2648542922 |
|
|
Apr 30 01:43:06 PM PDT 24 |
Apr 30 01:43:09 PM PDT 24 |
163072785 ps |
| T438 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.4049365687 |
|
|
Apr 30 01:42:43 PM PDT 24 |
Apr 30 01:46:18 PM PDT 24 |
3076888736 ps |
| T439 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.2029356359 |
|
|
Apr 30 01:43:47 PM PDT 24 |
Apr 30 01:43:49 PM PDT 24 |
63049648 ps |
| T440 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.2172646489 |
|
|
Apr 30 01:43:48 PM PDT 24 |
Apr 30 01:43:59 PM PDT 24 |
3932609085 ps |
| T441 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.825060516 |
|
|
Apr 30 01:42:42 PM PDT 24 |
Apr 30 02:01:15 PM PDT 24 |
95739558221 ps |
| T442 |
/workspace/coverage/default/19.sram_ctrl_alert_test.522422013 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:42:28 PM PDT 24 |
17466097 ps |
| T443 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.81764790 |
|
|
Apr 30 01:43:31 PM PDT 24 |
Apr 30 02:13:17 PM PDT 24 |
6136394730 ps |
| T444 |
/workspace/coverage/default/29.sram_ctrl_regwen.128841724 |
|
|
Apr 30 01:43:26 PM PDT 24 |
Apr 30 01:47:59 PM PDT 24 |
35727062793 ps |
| T445 |
/workspace/coverage/default/16.sram_ctrl_stress_all.3800430369 |
|
|
Apr 30 01:42:20 PM PDT 24 |
Apr 30 02:18:26 PM PDT 24 |
9400961348 ps |
| T446 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4063268117 |
|
|
Apr 30 01:42:02 PM PDT 24 |
Apr 30 01:42:07 PM PDT 24 |
392614988 ps |
| T447 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2135077754 |
|
|
Apr 30 01:42:42 PM PDT 24 |
Apr 30 01:42:46 PM PDT 24 |
91522960 ps |
| T448 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.883543845 |
|
|
Apr 30 01:43:25 PM PDT 24 |
Apr 30 01:43:31 PM PDT 24 |
607979395 ps |
| T449 |
/workspace/coverage/default/38.sram_ctrl_regwen.3776736248 |
|
|
Apr 30 01:44:29 PM PDT 24 |
Apr 30 01:54:18 PM PDT 24 |
1957997584 ps |
| T450 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.3737500599 |
|
|
Apr 30 01:42:24 PM PDT 24 |
Apr 30 01:44:27 PM PDT 24 |
270669956 ps |
| T451 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.45914688 |
|
|
Apr 30 01:42:30 PM PDT 24 |
Apr 30 01:43:22 PM PDT 24 |
495339182 ps |
| T452 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.1034117704 |
|
|
Apr 30 01:43:15 PM PDT 24 |
Apr 30 02:08:24 PM PDT 24 |
54279716877 ps |
| T453 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.2201494958 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 01:46:00 PM PDT 24 |
1202976509 ps |
| T454 |
/workspace/coverage/default/49.sram_ctrl_smoke.129592539 |
|
|
Apr 30 01:46:03 PM PDT 24 |
Apr 30 01:46:11 PM PDT 24 |
356775849 ps |
| T455 |
/workspace/coverage/default/38.sram_ctrl_smoke.380671760 |
|
|
Apr 30 01:44:21 PM PDT 24 |
Apr 30 01:44:32 PM PDT 24 |
1828471949 ps |
| T456 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.39654826 |
|
|
Apr 30 01:41:57 PM PDT 24 |
Apr 30 01:42:03 PM PDT 24 |
306694163 ps |
| T457 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.772789591 |
|
|
Apr 30 01:44:27 PM PDT 24 |
Apr 30 02:14:11 PM PDT 24 |
20483535216 ps |
| T458 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.924478514 |
|
|
Apr 30 01:42:51 PM PDT 24 |
Apr 30 01:50:43 PM PDT 24 |
113449111041 ps |
| T459 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1531217184 |
|
|
Apr 30 01:46:07 PM PDT 24 |
Apr 30 01:46:08 PM PDT 24 |
31005377 ps |
| T460 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.3718819956 |
|
|
Apr 30 01:44:14 PM PDT 24 |
Apr 30 01:55:44 PM PDT 24 |
30472211808 ps |
| T461 |
/workspace/coverage/default/24.sram_ctrl_regwen.943945794 |
|
|
Apr 30 01:42:58 PM PDT 24 |
Apr 30 01:59:06 PM PDT 24 |
4932444135 ps |
| T462 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.2275516075 |
|
|
Apr 30 01:44:35 PM PDT 24 |
Apr 30 01:46:25 PM PDT 24 |
1216800540 ps |
| T463 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.1421664015 |
|
|
Apr 30 01:42:27 PM PDT 24 |
Apr 30 01:47:14 PM PDT 24 |
2694517613 ps |
| T464 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.3338507974 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:41:55 PM PDT 24 |
67935325 ps |
| T465 |
/workspace/coverage/default/42.sram_ctrl_stress_all.1417927953 |
|
|
Apr 30 01:45:06 PM PDT 24 |
Apr 30 01:51:27 PM PDT 24 |
4854540002 ps |
| T466 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.693562616 |
|
|
Apr 30 01:41:46 PM PDT 24 |
Apr 30 01:45:45 PM PDT 24 |
25729813556 ps |
| T467 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.1069526110 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:43:23 PM PDT 24 |
932407209 ps |
| T468 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3240231082 |
|
|
Apr 30 01:42:16 PM PDT 24 |
Apr 30 01:56:10 PM PDT 24 |
5494588304 ps |
| T469 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1853145883 |
|
|
Apr 30 01:43:49 PM PDT 24 |
Apr 30 01:43:50 PM PDT 24 |
287864257 ps |
| T470 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3785216613 |
|
|
Apr 30 01:42:13 PM PDT 24 |
Apr 30 01:43:58 PM PDT 24 |
608422779 ps |
| T471 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2728854228 |
|
|
Apr 30 01:45:12 PM PDT 24 |
Apr 30 01:45:17 PM PDT 24 |
77520794 ps |
| T472 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2776160539 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 01:50:09 PM PDT 24 |
6490002468 ps |
| T473 |
/workspace/coverage/default/5.sram_ctrl_executable.4253892970 |
|
|
Apr 30 01:41:49 PM PDT 24 |
Apr 30 01:54:06 PM PDT 24 |
34178805750 ps |
| T474 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.3246092955 |
|
|
Apr 30 01:43:05 PM PDT 24 |
Apr 30 01:43:06 PM PDT 24 |
47121699 ps |
| T475 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3357049623 |
|
|
Apr 30 01:43:22 PM PDT 24 |
Apr 30 01:46:44 PM PDT 24 |
2239615905 ps |
| T476 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2469252010 |
|
|
Apr 30 01:44:02 PM PDT 24 |
Apr 30 01:46:37 PM PDT 24 |
1598680312 ps |
| T477 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.3286903955 |
|
|
Apr 30 01:43:43 PM PDT 24 |
Apr 30 01:43:44 PM PDT 24 |
59932589 ps |
| T478 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1462303243 |
|
|
Apr 30 01:41:58 PM PDT 24 |
Apr 30 01:42:06 PM PDT 24 |
1022346719 ps |
| T479 |
/workspace/coverage/default/48.sram_ctrl_smoke.2786659740 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 01:46:04 PM PDT 24 |
180052213 ps |
| T480 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2788040326 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 01:51:48 PM PDT 24 |
13806221832 ps |
| T481 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.209343588 |
|
|
Apr 30 01:45:33 PM PDT 24 |
Apr 30 01:50:06 PM PDT 24 |
6369650862 ps |
| T482 |
/workspace/coverage/default/37.sram_ctrl_regwen.3990275615 |
|
|
Apr 30 01:44:20 PM PDT 24 |
Apr 30 01:48:26 PM PDT 24 |
716519202 ps |
| T483 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3383839330 |
|
|
Apr 30 01:41:48 PM PDT 24 |
Apr 30 01:45:03 PM PDT 24 |
8931489110 ps |
| T484 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1860223436 |
|
|
Apr 30 01:45:52 PM PDT 24 |
Apr 30 01:45:53 PM PDT 24 |
89195644 ps |
| T485 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3689807416 |
|
|
Apr 30 01:45:31 PM PDT 24 |
Apr 30 01:49:22 PM PDT 24 |
1278191667 ps |
| T486 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2638344320 |
|
|
Apr 30 01:42:56 PM PDT 24 |
Apr 30 01:42:57 PM PDT 24 |
21536302 ps |
| T487 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2106960832 |
|
|
Apr 30 01:42:05 PM PDT 24 |
Apr 30 01:42:24 PM PDT 24 |
1731026928 ps |
| T488 |
/workspace/coverage/default/27.sram_ctrl_smoke.4234662071 |
|
|
Apr 30 01:43:12 PM PDT 24 |
Apr 30 01:43:29 PM PDT 24 |
1135152990 ps |
| T489 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3093571528 |
|
|
Apr 30 01:45:37 PM PDT 24 |
Apr 30 01:46:25 PM PDT 24 |
511886624 ps |
| T490 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.531918344 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:43:14 PM PDT 24 |
2120786356 ps |
| T491 |
/workspace/coverage/default/22.sram_ctrl_bijection.4200417901 |
|
|
Apr 30 01:42:39 PM PDT 24 |
Apr 30 01:43:03 PM PDT 24 |
797664283 ps |
| T106 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1369454385 |
|
|
Apr 30 01:42:12 PM PDT 24 |
Apr 30 01:42:42 PM PDT 24 |
1969783331 ps |
| T492 |
/workspace/coverage/default/36.sram_ctrl_executable.2721859430 |
|
|
Apr 30 01:44:14 PM PDT 24 |
Apr 30 01:48:06 PM PDT 24 |
4711059198 ps |
| T493 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2370014168 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 01:45:59 PM PDT 24 |
1611736149 ps |
| T494 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.4030613490 |
|
|
Apr 30 01:45:07 PM PDT 24 |
Apr 30 01:48:12 PM PDT 24 |
4140812030 ps |
| T495 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2350037662 |
|
|
Apr 30 01:43:22 PM PDT 24 |
Apr 30 01:44:16 PM PDT 24 |
451335162 ps |
| T496 |
/workspace/coverage/default/36.sram_ctrl_partial_access.2866543793 |
|
|
Apr 30 01:44:07 PM PDT 24 |
Apr 30 01:44:40 PM PDT 24 |
6409988574 ps |
| T497 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1664991274 |
|
|
Apr 30 01:43:06 PM PDT 24 |
Apr 30 01:47:59 PM PDT 24 |
3065161792 ps |
| T498 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3436404884 |
|
|
Apr 30 01:41:49 PM PDT 24 |
Apr 30 01:41:50 PM PDT 24 |
88634014 ps |
| T499 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2319314206 |
|
|
Apr 30 01:44:07 PM PDT 24 |
Apr 30 01:44:10 PM PDT 24 |
88170442 ps |
| T500 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.4174254515 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:47:35 PM PDT 24 |
20198093905 ps |
| T501 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.2167769978 |
|
|
Apr 30 01:42:18 PM PDT 24 |
Apr 30 01:42:43 PM PDT 24 |
317938721 ps |
| T502 |
/workspace/coverage/default/38.sram_ctrl_stress_all.960107965 |
|
|
Apr 30 01:44:34 PM PDT 24 |
Apr 30 02:10:43 PM PDT 24 |
4813011321 ps |
| T503 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.3184587316 |
|
|
Apr 30 01:43:05 PM PDT 24 |
Apr 30 01:43:09 PM PDT 24 |
48288284 ps |
| T504 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1618997798 |
|
|
Apr 30 01:43:53 PM PDT 24 |
Apr 30 01:44:16 PM PDT 24 |
97395154 ps |
| T505 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2013042779 |
|
|
Apr 30 01:43:20 PM PDT 24 |
Apr 30 01:45:28 PM PDT 24 |
297569398 ps |
| T506 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3407558817 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 01:47:59 PM PDT 24 |
56799307714 ps |
| T507 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1893947954 |
|
|
Apr 30 01:43:47 PM PDT 24 |
Apr 30 01:43:48 PM PDT 24 |
11872805 ps |
| T508 |
/workspace/coverage/default/14.sram_ctrl_alert_test.605807650 |
|
|
Apr 30 01:42:19 PM PDT 24 |
Apr 30 01:42:20 PM PDT 24 |
39744376 ps |
| T509 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2409418006 |
|
|
Apr 30 01:43:40 PM PDT 24 |
Apr 30 01:45:46 PM PDT 24 |
309536858 ps |
| T510 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1435504278 |
|
|
Apr 30 01:44:28 PM PDT 24 |
Apr 30 01:44:34 PM PDT 24 |
605181507 ps |
| T511 |
/workspace/coverage/default/18.sram_ctrl_bijection.219647446 |
|
|
Apr 30 01:42:29 PM PDT 24 |
Apr 30 01:43:21 PM PDT 24 |
33712198577 ps |
| T512 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.2476333922 |
|
|
Apr 30 01:43:32 PM PDT 24 |
Apr 30 01:43:41 PM PDT 24 |
1538542759 ps |
| T513 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1968189541 |
|
|
Apr 30 01:42:08 PM PDT 24 |
Apr 30 01:42:13 PM PDT 24 |
1021866851 ps |
| T514 |
/workspace/coverage/default/15.sram_ctrl_smoke.1216130772 |
|
|
Apr 30 01:42:21 PM PDT 24 |
Apr 30 01:42:25 PM PDT 24 |
129561181 ps |
| T515 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.348731786 |
|
|
Apr 30 01:44:49 PM PDT 24 |
Apr 30 01:44:56 PM PDT 24 |
2371032096 ps |
| T516 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.4165197600 |
|
|
Apr 30 01:42:13 PM PDT 24 |
Apr 30 01:43:46 PM PDT 24 |
245358638 ps |
| T517 |
/workspace/coverage/default/2.sram_ctrl_regwen.1567997044 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:56:54 PM PDT 24 |
5225890123 ps |
| T518 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3517665222 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:45:02 PM PDT 24 |
203260869 ps |
| T519 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.4082176331 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 02:11:45 PM PDT 24 |
16841280428 ps |
| T520 |
/workspace/coverage/default/46.sram_ctrl_smoke.2736512309 |
|
|
Apr 30 01:45:36 PM PDT 24 |
Apr 30 01:46:05 PM PDT 24 |
351057327 ps |
| T521 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3149459718 |
|
|
Apr 30 01:45:33 PM PDT 24 |
Apr 30 01:45:42 PM PDT 24 |
814686509 ps |
| T522 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2251808897 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:54:42 PM PDT 24 |
29780486527 ps |
| T523 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1128036663 |
|
|
Apr 30 01:43:30 PM PDT 24 |
Apr 30 01:48:08 PM PDT 24 |
101291649435 ps |
| T524 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.4051606576 |
|
|
Apr 30 01:43:05 PM PDT 24 |
Apr 30 01:46:29 PM PDT 24 |
9057498279 ps |
| T525 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1052902866 |
|
|
Apr 30 01:41:38 PM PDT 24 |
Apr 30 01:41:47 PM PDT 24 |
777994995 ps |
| T17 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.1958280665 |
|
|
Apr 30 01:41:41 PM PDT 24 |
Apr 30 01:41:44 PM PDT 24 |
1116611292 ps |
| T526 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2414218333 |
|
|
Apr 30 01:44:50 PM PDT 24 |
Apr 30 01:44:54 PM PDT 24 |
196225977 ps |
| T527 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1576536501 |
|
|
Apr 30 01:45:33 PM PDT 24 |
Apr 30 01:45:34 PM PDT 24 |
81825997 ps |
| T528 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2980013734 |
|
|
Apr 30 01:45:54 PM PDT 24 |
Apr 30 01:48:15 PM PDT 24 |
2111495469 ps |
| T529 |
/workspace/coverage/default/21.sram_ctrl_alert_test.2603233037 |
|
|
Apr 30 01:42:42 PM PDT 24 |
Apr 30 01:42:43 PM PDT 24 |
12142730 ps |
| T530 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.208277440 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 02:12:00 PM PDT 24 |
26194051507 ps |
| T531 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.683751437 |
|
|
Apr 30 01:45:24 PM PDT 24 |
Apr 30 01:49:09 PM PDT 24 |
28962241575 ps |
| T532 |
/workspace/coverage/default/3.sram_ctrl_alert_test.2124739472 |
|
|
Apr 30 01:41:53 PM PDT 24 |
Apr 30 01:41:54 PM PDT 24 |
20531600 ps |
| T533 |
/workspace/coverage/default/35.sram_ctrl_bijection.3217945216 |
|
|
Apr 30 01:44:00 PM PDT 24 |
Apr 30 01:44:16 PM PDT 24 |
898317797 ps |
| T534 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1189872435 |
|
|
Apr 30 01:41:57 PM PDT 24 |
Apr 30 01:46:32 PM PDT 24 |
2160312782 ps |
| T535 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3645771714 |
|
|
Apr 30 01:44:06 PM PDT 24 |
Apr 30 01:44:07 PM PDT 24 |
24179102 ps |
| T536 |
/workspace/coverage/default/45.sram_ctrl_stress_all.2406989257 |
|
|
Apr 30 01:45:33 PM PDT 24 |
Apr 30 02:43:23 PM PDT 24 |
39495153625 ps |
| T537 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1663419474 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:42:06 PM PDT 24 |
226776803 ps |
| T538 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2453422518 |
|
|
Apr 30 01:42:51 PM PDT 24 |
Apr 30 01:42:59 PM PDT 24 |
2589893258 ps |
| T539 |
/workspace/coverage/default/42.sram_ctrl_smoke.2949394044 |
|
|
Apr 30 01:44:58 PM PDT 24 |
Apr 30 01:46:55 PM PDT 24 |
531387389 ps |
| T540 |
/workspace/coverage/default/8.sram_ctrl_executable.1838730120 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 02:01:11 PM PDT 24 |
62685806764 ps |
| T541 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2855704351 |
|
|
Apr 30 01:43:26 PM PDT 24 |
Apr 30 01:46:39 PM PDT 24 |
5871044635 ps |
| T542 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.715617856 |
|
|
Apr 30 01:41:53 PM PDT 24 |
Apr 30 01:42:01 PM PDT 24 |
773528511 ps |
| T543 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3503749428 |
|
|
Apr 30 01:45:54 PM PDT 24 |
Apr 30 01:45:55 PM PDT 24 |
48468483 ps |
| T544 |
/workspace/coverage/default/48.sram_ctrl_executable.831734025 |
|
|
Apr 30 01:45:56 PM PDT 24 |
Apr 30 01:57:07 PM PDT 24 |
3527170779 ps |
| T545 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2261990408 |
|
|
Apr 30 01:42:49 PM PDT 24 |
Apr 30 01:42:55 PM PDT 24 |
158959259 ps |
| T546 |
/workspace/coverage/default/18.sram_ctrl_alert_test.2272386476 |
|
|
Apr 30 01:42:31 PM PDT 24 |
Apr 30 01:42:32 PM PDT 24 |
33765285 ps |