| T547 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.828121881 |
|
|
Apr 30 01:42:15 PM PDT 24 |
Apr 30 01:42:25 PM PDT 24 |
914602422 ps |
| T548 |
/workspace/coverage/default/21.sram_ctrl_regwen.1137167114 |
|
|
Apr 30 01:42:43 PM PDT 24 |
Apr 30 01:55:47 PM PDT 24 |
25548679594 ps |
| T549 |
/workspace/coverage/default/28.sram_ctrl_stress_all.2974586655 |
|
|
Apr 30 01:43:20 PM PDT 24 |
Apr 30 01:56:05 PM PDT 24 |
16932944582 ps |
| T550 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3423840568 |
|
|
Apr 30 01:45:21 PM PDT 24 |
Apr 30 02:00:01 PM PDT 24 |
15335216439 ps |
| T551 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.1415073920 |
|
|
Apr 30 01:41:45 PM PDT 24 |
Apr 30 01:41:51 PM PDT 24 |
936365671 ps |
| T552 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3879958238 |
|
|
Apr 30 01:45:14 PM PDT 24 |
Apr 30 01:46:23 PM PDT 24 |
5162609048 ps |
| T553 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.3991665565 |
|
|
Apr 30 01:44:03 PM PDT 24 |
Apr 30 01:55:44 PM PDT 24 |
26174804605 ps |
| T554 |
/workspace/coverage/default/31.sram_ctrl_regwen.298900374 |
|
|
Apr 30 01:43:41 PM PDT 24 |
Apr 30 01:56:15 PM PDT 24 |
22405564269 ps |
| T555 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1934547591 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 01:42:05 PM PDT 24 |
185161389 ps |
| T556 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1035029062 |
|
|
Apr 30 01:45:28 PM PDT 24 |
Apr 30 01:45:31 PM PDT 24 |
94816643 ps |
| T557 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.1416212995 |
|
|
Apr 30 01:42:22 PM PDT 24 |
Apr 30 01:42:24 PM PDT 24 |
126821326 ps |
| T558 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3984505591 |
|
|
Apr 30 01:42:33 PM PDT 24 |
Apr 30 01:43:06 PM PDT 24 |
390529173 ps |
| T559 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2379252263 |
|
|
Apr 30 01:42:28 PM PDT 24 |
Apr 30 01:50:15 PM PDT 24 |
7245843442 ps |
| T560 |
/workspace/coverage/default/39.sram_ctrl_alert_test.1474038716 |
|
|
Apr 30 01:44:48 PM PDT 24 |
Apr 30 01:44:49 PM PDT 24 |
80758504 ps |
| T561 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3262194166 |
|
|
Apr 30 01:44:49 PM PDT 24 |
Apr 30 01:45:03 PM PDT 24 |
1536188308 ps |
| T562 |
/workspace/coverage/default/41.sram_ctrl_executable.3457517573 |
|
|
Apr 30 01:44:59 PM PDT 24 |
Apr 30 01:54:14 PM PDT 24 |
6041530693 ps |
| T563 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1930306262 |
|
|
Apr 30 01:44:05 PM PDT 24 |
Apr 30 01:45:00 PM PDT 24 |
296392819 ps |
| T564 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2671338736 |
|
|
Apr 30 01:42:09 PM PDT 24 |
Apr 30 02:05:58 PM PDT 24 |
13811261246 ps |
| T565 |
/workspace/coverage/default/1.sram_ctrl_executable.583798472 |
|
|
Apr 30 01:41:41 PM PDT 24 |
Apr 30 01:56:50 PM PDT 24 |
9255246273 ps |
| T566 |
/workspace/coverage/default/38.sram_ctrl_executable.2121317942 |
|
|
Apr 30 01:44:31 PM PDT 24 |
Apr 30 01:54:34 PM PDT 24 |
8384759074 ps |
| T567 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2887361049 |
|
|
Apr 30 01:42:17 PM PDT 24 |
Apr 30 01:46:22 PM PDT 24 |
2824669390 ps |
| T568 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.3590736416 |
|
|
Apr 30 01:42:49 PM PDT 24 |
Apr 30 02:01:42 PM PDT 24 |
15941803112 ps |
| T569 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3427131525 |
|
|
Apr 30 01:42:33 PM PDT 24 |
Apr 30 01:43:03 PM PDT 24 |
138051701 ps |
| T570 |
/workspace/coverage/default/18.sram_ctrl_stress_all.979981652 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 02:23:29 PM PDT 24 |
295171232000 ps |
| T571 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2232924948 |
|
|
Apr 30 01:41:41 PM PDT 24 |
Apr 30 01:48:42 PM PDT 24 |
9134369202 ps |
| T572 |
/workspace/coverage/default/17.sram_ctrl_executable.2603349970 |
|
|
Apr 30 01:42:29 PM PDT 24 |
Apr 30 01:43:21 PM PDT 24 |
1243659621 ps |
| T573 |
/workspace/coverage/default/34.sram_ctrl_stress_all.2136716601 |
|
|
Apr 30 01:44:04 PM PDT 24 |
Apr 30 02:11:35 PM PDT 24 |
97628941397 ps |
| T574 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.597443539 |
|
|
Apr 30 01:43:43 PM PDT 24 |
Apr 30 01:43:47 PM PDT 24 |
253113111 ps |
| T575 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.1450070044 |
|
|
Apr 30 01:43:53 PM PDT 24 |
Apr 30 01:43:55 PM PDT 24 |
354047953 ps |
| T576 |
/workspace/coverage/default/6.sram_ctrl_stress_all.1343293988 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:59:26 PM PDT 24 |
20290950304 ps |
| T577 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3361561980 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 01:46:04 PM PDT 24 |
632088677 ps |
| T578 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4117168970 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:41:41 PM PDT 24 |
18640963 ps |
| T579 |
/workspace/coverage/default/19.sram_ctrl_stress_all.1067447097 |
|
|
Apr 30 01:42:27 PM PDT 24 |
Apr 30 02:08:34 PM PDT 24 |
15341454152 ps |
| T580 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.3029022375 |
|
|
Apr 30 01:44:01 PM PDT 24 |
Apr 30 01:44:06 PM PDT 24 |
3262770692 ps |
| T581 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.824307618 |
|
|
Apr 30 01:42:17 PM PDT 24 |
Apr 30 01:45:10 PM PDT 24 |
353069975 ps |
| T582 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3034962607 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:46:33 PM PDT 24 |
47074938019 ps |
| T583 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2549423064 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 01:42:29 PM PDT 24 |
296502948 ps |
| T584 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1493072881 |
|
|
Apr 30 01:41:57 PM PDT 24 |
Apr 30 01:41:58 PM PDT 24 |
33379394 ps |
| T585 |
/workspace/coverage/default/12.sram_ctrl_regwen.2505411383 |
|
|
Apr 30 01:42:08 PM PDT 24 |
Apr 30 01:50:24 PM PDT 24 |
1732487310 ps |
| T586 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.1164978394 |
|
|
Apr 30 01:42:27 PM PDT 24 |
Apr 30 01:42:28 PM PDT 24 |
136388081 ps |
| T587 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.21738147 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:43:16 PM PDT 24 |
166610564 ps |
| T588 |
/workspace/coverage/default/24.sram_ctrl_smoke.1091187848 |
|
|
Apr 30 01:42:55 PM PDT 24 |
Apr 30 01:44:22 PM PDT 24 |
1219880095 ps |
| T589 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2447946677 |
|
|
Apr 30 01:45:45 PM PDT 24 |
Apr 30 01:46:10 PM PDT 24 |
275900164 ps |
| T590 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.3805316491 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 01:42:42 PM PDT 24 |
151861694 ps |
| T591 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2765887824 |
|
|
Apr 30 01:42:08 PM PDT 24 |
Apr 30 01:42:10 PM PDT 24 |
12368566 ps |
| T107 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.4230021987 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:43:18 PM PDT 24 |
230787416 ps |
| T592 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.3873140271 |
|
|
Apr 30 01:43:04 PM PDT 24 |
Apr 30 01:43:11 PM PDT 24 |
570675108 ps |
| T593 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2842247529 |
|
|
Apr 30 01:41:44 PM PDT 24 |
Apr 30 01:46:48 PM PDT 24 |
4360503964 ps |
| T594 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3800305616 |
|
|
Apr 30 01:45:44 PM PDT 24 |
Apr 30 01:46:46 PM PDT 24 |
121985708 ps |
| T595 |
/workspace/coverage/default/33.sram_ctrl_alert_test.3359486978 |
|
|
Apr 30 01:43:53 PM PDT 24 |
Apr 30 01:43:54 PM PDT 24 |
29839092 ps |
| T596 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2443436724 |
|
|
Apr 30 01:42:17 PM PDT 24 |
Apr 30 01:42:34 PM PDT 24 |
287445996 ps |
| T597 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1671220642 |
|
|
Apr 30 01:43:25 PM PDT 24 |
Apr 30 01:43:34 PM PDT 24 |
149653279 ps |
| T598 |
/workspace/coverage/default/37.sram_ctrl_smoke.2605212143 |
|
|
Apr 30 01:44:15 PM PDT 24 |
Apr 30 01:44:20 PM PDT 24 |
377895154 ps |
| T599 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.2165938098 |
|
|
Apr 30 01:43:04 PM PDT 24 |
Apr 30 01:58:23 PM PDT 24 |
2448600199 ps |
| T600 |
/workspace/coverage/default/44.sram_ctrl_alert_test.1615303407 |
|
|
Apr 30 01:45:25 PM PDT 24 |
Apr 30 01:45:26 PM PDT 24 |
36744881 ps |
| T601 |
/workspace/coverage/default/1.sram_ctrl_bijection.2220974648 |
|
|
Apr 30 01:41:41 PM PDT 24 |
Apr 30 01:42:08 PM PDT 24 |
5000804640 ps |
| T602 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1380753835 |
|
|
Apr 30 01:43:06 PM PDT 24 |
Apr 30 01:43:55 PM PDT 24 |
418110034 ps |
| T603 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2230495504 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:44:36 PM PDT 24 |
272261144 ps |
| T604 |
/workspace/coverage/default/22.sram_ctrl_smoke.4142171518 |
|
|
Apr 30 01:42:42 PM PDT 24 |
Apr 30 01:42:56 PM PDT 24 |
232836911 ps |
| T605 |
/workspace/coverage/default/3.sram_ctrl_executable.2021148548 |
|
|
Apr 30 01:41:42 PM PDT 24 |
Apr 30 01:44:21 PM PDT 24 |
1665047394 ps |
| T606 |
/workspace/coverage/default/22.sram_ctrl_stress_all.2964293456 |
|
|
Apr 30 01:42:48 PM PDT 24 |
Apr 30 02:22:29 PM PDT 24 |
97652133096 ps |
| T607 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3428803415 |
|
|
Apr 30 01:43:06 PM PDT 24 |
Apr 30 01:56:14 PM PDT 24 |
4891203504 ps |
| T608 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.1151354814 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:55:54 PM PDT 24 |
2970865402 ps |
| T609 |
/workspace/coverage/default/8.sram_ctrl_regwen.613070896 |
|
|
Apr 30 01:41:58 PM PDT 24 |
Apr 30 01:54:41 PM PDT 24 |
9850411806 ps |
| T610 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1985588342 |
|
|
Apr 30 01:42:57 PM PDT 24 |
Apr 30 01:49:38 PM PDT 24 |
11253827233 ps |
| T611 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.3722921863 |
|
|
Apr 30 01:44:07 PM PDT 24 |
Apr 30 01:44:12 PM PDT 24 |
99951212 ps |
| T612 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.3464452813 |
|
|
Apr 30 01:42:22 PM PDT 24 |
Apr 30 01:49:52 PM PDT 24 |
1906762733 ps |
| T613 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.284522958 |
|
|
Apr 30 01:42:35 PM PDT 24 |
Apr 30 01:42:47 PM PDT 24 |
75078022 ps |
| T614 |
/workspace/coverage/default/21.sram_ctrl_smoke.2660906345 |
|
|
Apr 30 01:42:33 PM PDT 24 |
Apr 30 01:43:10 PM PDT 24 |
356277723 ps |
| T615 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.3671362343 |
|
|
Apr 30 01:46:04 PM PDT 24 |
Apr 30 01:46:13 PM PDT 24 |
219092872 ps |
| T616 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2666144662 |
|
|
Apr 30 01:41:45 PM PDT 24 |
Apr 30 01:41:56 PM PDT 24 |
2551812590 ps |
| T617 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3710599690 |
|
|
Apr 30 01:42:05 PM PDT 24 |
Apr 30 01:56:25 PM PDT 24 |
7440934646 ps |
| T618 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1906786526 |
|
|
Apr 30 01:41:49 PM PDT 24 |
Apr 30 01:45:27 PM PDT 24 |
9066173135 ps |
| T619 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.449472390 |
|
|
Apr 30 01:41:44 PM PDT 24 |
Apr 30 01:43:01 PM PDT 24 |
261372121 ps |
| T620 |
/workspace/coverage/default/45.sram_ctrl_executable.756973225 |
|
|
Apr 30 01:45:30 PM PDT 24 |
Apr 30 02:01:29 PM PDT 24 |
10142882415 ps |
| T621 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.113638113 |
|
|
Apr 30 01:43:52 PM PDT 24 |
Apr 30 01:43:57 PM PDT 24 |
252876971 ps |
| T622 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2243921555 |
|
|
Apr 30 01:45:12 PM PDT 24 |
Apr 30 01:48:31 PM PDT 24 |
4992749013 ps |
| T623 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1313934206 |
|
|
Apr 30 01:45:37 PM PDT 24 |
Apr 30 01:50:56 PM PDT 24 |
2714195173 ps |
| T624 |
/workspace/coverage/default/7.sram_ctrl_executable.1227018321 |
|
|
Apr 30 01:41:57 PM PDT 24 |
Apr 30 01:56:23 PM PDT 24 |
12338513028 ps |
| T625 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.1862170796 |
|
|
Apr 30 01:45:12 PM PDT 24 |
Apr 30 01:45:36 PM PDT 24 |
668509431 ps |
| T626 |
/workspace/coverage/default/8.sram_ctrl_smoke.2119655443 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 01:42:06 PM PDT 24 |
1077794995 ps |
| T627 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.3082004331 |
|
|
Apr 30 01:42:51 PM PDT 24 |
Apr 30 01:42:55 PM PDT 24 |
124980563 ps |
| T628 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2443207823 |
|
|
Apr 30 01:41:41 PM PDT 24 |
Apr 30 01:41:43 PM PDT 24 |
71817557 ps |
| T629 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.32146453 |
|
|
Apr 30 01:41:48 PM PDT 24 |
Apr 30 01:41:56 PM PDT 24 |
3461894424 ps |
| T630 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.558128385 |
|
|
Apr 30 01:44:15 PM PDT 24 |
Apr 30 01:44:26 PM PDT 24 |
1897102801 ps |
| T631 |
/workspace/coverage/default/21.sram_ctrl_executable.4201776824 |
|
|
Apr 30 01:42:43 PM PDT 24 |
Apr 30 02:00:32 PM PDT 24 |
17867779600 ps |
| T632 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.1502787256 |
|
|
Apr 30 01:44:43 PM PDT 24 |
Apr 30 01:44:51 PM PDT 24 |
521934709 ps |
| T633 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.2179929102 |
|
|
Apr 30 01:41:48 PM PDT 24 |
Apr 30 01:41:53 PM PDT 24 |
312496418 ps |
| T634 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.89824120 |
|
|
Apr 30 01:44:51 PM PDT 24 |
Apr 30 01:51:23 PM PDT 24 |
63236909346 ps |
| T635 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1788553588 |
|
|
Apr 30 01:43:27 PM PDT 24 |
Apr 30 01:43:30 PM PDT 24 |
151314981 ps |
| T636 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3904209555 |
|
|
Apr 30 01:46:02 PM PDT 24 |
Apr 30 01:46:03 PM PDT 24 |
14820412 ps |
| T637 |
/workspace/coverage/default/24.sram_ctrl_partial_access.1178610399 |
|
|
Apr 30 01:42:56 PM PDT 24 |
Apr 30 01:44:47 PM PDT 24 |
2574599433 ps |
| T638 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.2336344054 |
|
|
Apr 30 01:42:24 PM PDT 24 |
Apr 30 01:42:29 PM PDT 24 |
268524486 ps |
| T639 |
/workspace/coverage/default/43.sram_ctrl_executable.2909857231 |
|
|
Apr 30 01:45:13 PM PDT 24 |
Apr 30 01:52:21 PM PDT 24 |
28823852225 ps |
| T640 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3273372125 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:43:32 PM PDT 24 |
466412130 ps |
| T641 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.1144432859 |
|
|
Apr 30 01:44:07 PM PDT 24 |
Apr 30 02:01:47 PM PDT 24 |
152824793106 ps |
| T642 |
/workspace/coverage/default/10.sram_ctrl_regwen.2335459211 |
|
|
Apr 30 01:42:11 PM PDT 24 |
Apr 30 01:57:02 PM PDT 24 |
11370675489 ps |
| T643 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1029194813 |
|
|
Apr 30 01:41:41 PM PDT 24 |
Apr 30 01:41:48 PM PDT 24 |
852516122 ps |
| T644 |
/workspace/coverage/default/21.sram_ctrl_bijection.2940554611 |
|
|
Apr 30 01:42:35 PM PDT 24 |
Apr 30 01:43:00 PM PDT 24 |
6095713500 ps |
| T645 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.3012328049 |
|
|
Apr 30 01:43:05 PM PDT 24 |
Apr 30 02:02:52 PM PDT 24 |
2515627180 ps |
| T646 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2151119804 |
|
|
Apr 30 01:45:25 PM PDT 24 |
Apr 30 01:49:30 PM PDT 24 |
3752991579 ps |
| T647 |
/workspace/coverage/default/25.sram_ctrl_executable.2949443325 |
|
|
Apr 30 01:43:04 PM PDT 24 |
Apr 30 01:55:20 PM PDT 24 |
173629957658 ps |
| T648 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.3062481303 |
|
|
Apr 30 01:44:49 PM PDT 24 |
Apr 30 01:56:33 PM PDT 24 |
10438389649 ps |
| T649 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.1768001899 |
|
|
Apr 30 01:42:21 PM PDT 24 |
Apr 30 01:50:44 PM PDT 24 |
2930552960 ps |
| T650 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.689183838 |
|
|
Apr 30 01:41:47 PM PDT 24 |
Apr 30 01:41:48 PM PDT 24 |
72409335 ps |
| T651 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3737869236 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:44:25 PM PDT 24 |
139175037 ps |
| T652 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4056154146 |
|
|
Apr 30 01:42:11 PM PDT 24 |
Apr 30 01:46:26 PM PDT 24 |
3803834435 ps |
| T653 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.2254069770 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 01:55:02 PM PDT 24 |
15667702997 ps |
| T654 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1058608838 |
|
|
Apr 30 01:45:20 PM PDT 24 |
Apr 30 02:05:01 PM PDT 24 |
71424830033 ps |
| T655 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2444564726 |
|
|
Apr 30 01:42:34 PM PDT 24 |
Apr 30 01:42:52 PM PDT 24 |
2196442010 ps |
| T656 |
/workspace/coverage/default/27.sram_ctrl_executable.1982902304 |
|
|
Apr 30 01:43:13 PM PDT 24 |
Apr 30 01:54:59 PM PDT 24 |
15449630571 ps |
| T657 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2620829913 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 01:44:02 PM PDT 24 |
156289663 ps |
| T658 |
/workspace/coverage/default/40.sram_ctrl_executable.189176119 |
|
|
Apr 30 01:44:52 PM PDT 24 |
Apr 30 01:45:05 PM PDT 24 |
2491437879 ps |
| T659 |
/workspace/coverage/default/0.sram_ctrl_regwen.1384701027 |
|
|
Apr 30 01:41:44 PM PDT 24 |
Apr 30 01:42:57 PM PDT 24 |
812252688 ps |
| T660 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.852315071 |
|
|
Apr 30 01:42:41 PM PDT 24 |
Apr 30 01:46:37 PM PDT 24 |
1123007391 ps |
| T661 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.592562488 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:46:12 PM PDT 24 |
10247930051 ps |
| T662 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.4247207237 |
|
|
Apr 30 01:44:03 PM PDT 24 |
Apr 30 01:50:41 PM PDT 24 |
72706707559 ps |
| T663 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.249680173 |
|
|
Apr 30 01:43:34 PM PDT 24 |
Apr 30 01:46:23 PM PDT 24 |
7554888448 ps |
| T664 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.1784150839 |
|
|
Apr 30 01:43:54 PM PDT 24 |
Apr 30 01:55:31 PM PDT 24 |
6651419761 ps |
| T665 |
/workspace/coverage/default/10.sram_ctrl_stress_all.1038363458 |
|
|
Apr 30 01:42:05 PM PDT 24 |
Apr 30 02:03:31 PM PDT 24 |
45172413059 ps |
| T666 |
/workspace/coverage/default/11.sram_ctrl_alert_test.89759529 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 01:42:15 PM PDT 24 |
24384068 ps |
| T667 |
/workspace/coverage/default/0.sram_ctrl_bijection.413150862 |
|
|
Apr 30 01:41:37 PM PDT 24 |
Apr 30 01:42:32 PM PDT 24 |
3567535666 ps |
| T668 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1920869269 |
|
|
Apr 30 01:45:42 PM PDT 24 |
Apr 30 01:53:24 PM PDT 24 |
4251944232 ps |
| T669 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.1355755909 |
|
|
Apr 30 01:44:27 PM PDT 24 |
Apr 30 01:48:13 PM PDT 24 |
2302639774 ps |
| T670 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.15741024 |
|
|
Apr 30 01:45:08 PM PDT 24 |
Apr 30 01:45:17 PM PDT 24 |
1315466962 ps |
| T671 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1089291689 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 02:03:15 PM PDT 24 |
39484758837 ps |
| T672 |
/workspace/coverage/default/45.sram_ctrl_smoke.2815110286 |
|
|
Apr 30 01:45:24 PM PDT 24 |
Apr 30 01:45:41 PM PDT 24 |
758063242 ps |
| T673 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.2260728773 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:42:01 PM PDT 24 |
575174860 ps |
| T674 |
/workspace/coverage/default/33.sram_ctrl_executable.3955890995 |
|
|
Apr 30 01:43:55 PM PDT 24 |
Apr 30 01:52:21 PM PDT 24 |
16727373531 ps |
| T675 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.4120319933 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:42:32 PM PDT 24 |
346596406 ps |
| T676 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1527165958 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 02:37:18 PM PDT 24 |
10737955013 ps |
| T677 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3454554774 |
|
|
Apr 30 01:41:58 PM PDT 24 |
Apr 30 01:42:04 PM PDT 24 |
4046779410 ps |
| T678 |
/workspace/coverage/default/29.sram_ctrl_smoke.1055321812 |
|
|
Apr 30 01:43:21 PM PDT 24 |
Apr 30 01:43:23 PM PDT 24 |
211580163 ps |
| T679 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1951990293 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 01:43:59 PM PDT 24 |
296861777 ps |
| T680 |
/workspace/coverage/default/39.sram_ctrl_partial_access.343279381 |
|
|
Apr 30 01:44:36 PM PDT 24 |
Apr 30 01:44:45 PM PDT 24 |
200989638 ps |
| T681 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1636483570 |
|
|
Apr 30 01:43:48 PM PDT 24 |
Apr 30 01:43:51 PM PDT 24 |
49669662 ps |
| T682 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3797610784 |
|
|
Apr 30 01:43:26 PM PDT 24 |
Apr 30 01:45:37 PM PDT 24 |
230427505 ps |
| T683 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.1645490603 |
|
|
Apr 30 01:45:38 PM PDT 24 |
Apr 30 01:46:22 PM PDT 24 |
154451315 ps |
| T684 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3837256335 |
|
|
Apr 30 01:45:12 PM PDT 24 |
Apr 30 01:45:13 PM PDT 24 |
89659678 ps |
| T685 |
/workspace/coverage/default/43.sram_ctrl_bijection.386397643 |
|
|
Apr 30 01:45:14 PM PDT 24 |
Apr 30 01:46:28 PM PDT 24 |
15574492716 ps |
| T686 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.136957199 |
|
|
Apr 30 01:43:29 PM PDT 24 |
Apr 30 01:49:38 PM PDT 24 |
732656205 ps |
| T687 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.997643574 |
|
|
Apr 30 01:45:31 PM PDT 24 |
Apr 30 01:46:55 PM PDT 24 |
152203236 ps |
| T688 |
/workspace/coverage/default/31.sram_ctrl_stress_all.1770350399 |
|
|
Apr 30 01:43:42 PM PDT 24 |
Apr 30 02:16:55 PM PDT 24 |
7471290666 ps |
| T689 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1065233518 |
|
|
Apr 30 01:42:16 PM PDT 24 |
Apr 30 01:59:31 PM PDT 24 |
2693546504 ps |
| T690 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1429440486 |
|
|
Apr 30 01:41:59 PM PDT 24 |
Apr 30 01:42:03 PM PDT 24 |
433216151 ps |
| T691 |
/workspace/coverage/default/24.sram_ctrl_bijection.533044848 |
|
|
Apr 30 01:43:03 PM PDT 24 |
Apr 30 01:43:35 PM PDT 24 |
2043153801 ps |
| T692 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.1895549095 |
|
|
Apr 30 01:42:24 PM PDT 24 |
Apr 30 01:42:28 PM PDT 24 |
237962495 ps |
| T693 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2904472903 |
|
|
Apr 30 01:43:05 PM PDT 24 |
Apr 30 01:43:16 PM PDT 24 |
514001746 ps |
| T694 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1454265516 |
|
|
Apr 30 01:45:19 PM PDT 24 |
Apr 30 01:49:36 PM PDT 24 |
2825291576 ps |
| T108 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3928951777 |
|
|
Apr 30 01:42:24 PM PDT 24 |
Apr 30 01:43:17 PM PDT 24 |
4939840378 ps |
| T695 |
/workspace/coverage/default/40.sram_ctrl_bijection.1864453891 |
|
|
Apr 30 01:44:45 PM PDT 24 |
Apr 30 01:45:54 PM PDT 24 |
2420440867 ps |
| T696 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2271165379 |
|
|
Apr 30 01:45:24 PM PDT 24 |
Apr 30 01:46:24 PM PDT 24 |
240669090 ps |
| T697 |
/workspace/coverage/default/30.sram_ctrl_bijection.3069036889 |
|
|
Apr 30 01:43:26 PM PDT 24 |
Apr 30 01:44:14 PM PDT 24 |
2188496532 ps |
| T698 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3157274028 |
|
|
Apr 30 01:44:13 PM PDT 24 |
Apr 30 01:44:20 PM PDT 24 |
246773542 ps |
| T699 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.691488805 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:50:02 PM PDT 24 |
1452311255 ps |
| T700 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.3638517339 |
|
|
Apr 30 01:42:13 PM PDT 24 |
Apr 30 01:42:19 PM PDT 24 |
175374669 ps |
| T701 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3336055870 |
|
|
Apr 30 01:45:33 PM PDT 24 |
Apr 30 01:45:36 PM PDT 24 |
296879843 ps |
| T702 |
/workspace/coverage/default/40.sram_ctrl_regwen.3655986642 |
|
|
Apr 30 01:44:53 PM PDT 24 |
Apr 30 01:57:19 PM PDT 24 |
6660318262 ps |
| T703 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1980703292 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:41:44 PM PDT 24 |
44482325 ps |
| T704 |
/workspace/coverage/default/47.sram_ctrl_smoke.409632648 |
|
|
Apr 30 01:45:46 PM PDT 24 |
Apr 30 01:45:57 PM PDT 24 |
680336497 ps |
| T705 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.272499068 |
|
|
Apr 30 01:42:18 PM PDT 24 |
Apr 30 01:44:51 PM PDT 24 |
7785938752 ps |
| T706 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2873573506 |
|
|
Apr 30 01:42:50 PM PDT 24 |
Apr 30 01:43:12 PM PDT 24 |
180695762 ps |
| T707 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1421992713 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:52:52 PM PDT 24 |
21259934995 ps |
| T708 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2786126434 |
|
|
Apr 30 01:42:16 PM PDT 24 |
Apr 30 01:42:17 PM PDT 24 |
51994861 ps |
| T709 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2843731434 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:42:05 PM PDT 24 |
823411654 ps |
| T710 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2922317311 |
|
|
Apr 30 01:43:19 PM PDT 24 |
Apr 30 01:43:20 PM PDT 24 |
42894401 ps |
| T711 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.116795913 |
|
|
Apr 30 01:42:19 PM PDT 24 |
Apr 30 01:42:30 PM PDT 24 |
2626581647 ps |
| T712 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.3500796740 |
|
|
Apr 30 01:44:28 PM PDT 24 |
Apr 30 01:46:41 PM PDT 24 |
510973950 ps |
| T713 |
/workspace/coverage/default/33.sram_ctrl_bijection.3879125536 |
|
|
Apr 30 01:43:52 PM PDT 24 |
Apr 30 01:44:46 PM PDT 24 |
11419620690 ps |
| T714 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1935142059 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:42:33 PM PDT 24 |
855551247 ps |
| T715 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.3194129626 |
|
|
Apr 30 01:43:49 PM PDT 24 |
Apr 30 01:44:23 PM PDT 24 |
551483841 ps |
| T716 |
/workspace/coverage/default/40.sram_ctrl_smoke.1392044514 |
|
|
Apr 30 01:44:43 PM PDT 24 |
Apr 30 01:44:55 PM PDT 24 |
445826340 ps |
| T717 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.448584160 |
|
|
Apr 30 01:45:19 PM PDT 24 |
Apr 30 01:45:24 PM PDT 24 |
797383107 ps |
| T718 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3812057629 |
|
|
Apr 30 01:41:36 PM PDT 24 |
Apr 30 01:47:21 PM PDT 24 |
39068223697 ps |
| T719 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.1316559704 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:41:52 PM PDT 24 |
145166128 ps |
| T720 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1319384440 |
|
|
Apr 30 01:45:38 PM PDT 24 |
Apr 30 01:45:56 PM PDT 24 |
15080283870 ps |
| T721 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3151956155 |
|
|
Apr 30 01:44:00 PM PDT 24 |
Apr 30 01:44:01 PM PDT 24 |
129334712 ps |
| T722 |
/workspace/coverage/default/13.sram_ctrl_bijection.1058650279 |
|
|
Apr 30 01:42:19 PM PDT 24 |
Apr 30 01:43:13 PM PDT 24 |
3323716488 ps |
| T723 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2004796932 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:41:51 PM PDT 24 |
19809058 ps |
| T724 |
/workspace/coverage/default/44.sram_ctrl_smoke.3601889845 |
|
|
Apr 30 01:45:21 PM PDT 24 |
Apr 30 01:47:24 PM PDT 24 |
465460129 ps |
| T725 |
/workspace/coverage/default/41.sram_ctrl_alert_test.4173243264 |
|
|
Apr 30 01:45:01 PM PDT 24 |
Apr 30 01:45:02 PM PDT 24 |
16463130 ps |
| T726 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3583188663 |
|
|
Apr 30 01:45:08 PM PDT 24 |
Apr 30 01:46:24 PM PDT 24 |
218313784 ps |
| T18 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.3063771412 |
|
|
Apr 30 01:41:52 PM PDT 24 |
Apr 30 01:41:54 PM PDT 24 |
2144882169 ps |
| T727 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.3816954480 |
|
|
Apr 30 01:44:07 PM PDT 24 |
Apr 30 01:44:13 PM PDT 24 |
233784347 ps |
| T728 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1071942962 |
|
|
Apr 30 01:42:08 PM PDT 24 |
Apr 30 01:42:10 PM PDT 24 |
15997914 ps |
| T729 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.734753175 |
|
|
Apr 30 01:43:21 PM PDT 24 |
Apr 30 01:58:39 PM PDT 24 |
14661919040 ps |
| T730 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2938442634 |
|
|
Apr 30 01:45:26 PM PDT 24 |
Apr 30 01:48:29 PM PDT 24 |
7500703703 ps |
| T731 |
/workspace/coverage/default/43.sram_ctrl_regwen.4091644679 |
|
|
Apr 30 01:45:13 PM PDT 24 |
Apr 30 01:59:19 PM PDT 24 |
22689928191 ps |
| T732 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1114233694 |
|
|
Apr 30 01:45:42 PM PDT 24 |
Apr 30 02:16:38 PM PDT 24 |
7270199308 ps |
| T733 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1515208376 |
|
|
Apr 30 01:41:38 PM PDT 24 |
Apr 30 01:42:56 PM PDT 24 |
358475513 ps |
| T734 |
/workspace/coverage/default/31.sram_ctrl_alert_test.228291828 |
|
|
Apr 30 01:43:42 PM PDT 24 |
Apr 30 01:43:43 PM PDT 24 |
37506773 ps |
| T735 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.1798898867 |
|
|
Apr 30 01:43:04 PM PDT 24 |
Apr 30 01:55:09 PM PDT 24 |
60260846280 ps |
| T736 |
/workspace/coverage/default/23.sram_ctrl_bijection.2601321200 |
|
|
Apr 30 01:42:53 PM PDT 24 |
Apr 30 01:43:29 PM PDT 24 |
2172760671 ps |
| T737 |
/workspace/coverage/default/38.sram_ctrl_alert_test.2200999487 |
|
|
Apr 30 01:44:36 PM PDT 24 |
Apr 30 01:44:37 PM PDT 24 |
20222702 ps |
| T738 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2538438330 |
|
|
Apr 30 01:41:59 PM PDT 24 |
Apr 30 01:46:14 PM PDT 24 |
14442834931 ps |
| T739 |
/workspace/coverage/default/18.sram_ctrl_smoke.451610485 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 01:42:37 PM PDT 24 |
1495326597 ps |
| T740 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.48186584 |
|
|
Apr 30 01:44:01 PM PDT 24 |
Apr 30 01:50:07 PM PDT 24 |
1595072959 ps |
| T741 |
/workspace/coverage/default/44.sram_ctrl_stress_all.2424033707 |
|
|
Apr 30 01:45:28 PM PDT 24 |
Apr 30 02:45:27 PM PDT 24 |
193103716464 ps |
| T742 |
/workspace/coverage/default/13.sram_ctrl_executable.1559509514 |
|
|
Apr 30 01:42:22 PM PDT 24 |
Apr 30 02:04:52 PM PDT 24 |
3270615787 ps |
| T743 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2715470090 |
|
|
Apr 30 01:41:53 PM PDT 24 |
Apr 30 01:46:32 PM PDT 24 |
2866536575 ps |
| T744 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.3285840082 |
|
|
Apr 30 01:44:20 PM PDT 24 |
Apr 30 01:44:25 PM PDT 24 |
1287400721 ps |
| T745 |
/workspace/coverage/default/19.sram_ctrl_bijection.2956238382 |
|
|
Apr 30 01:42:28 PM PDT 24 |
Apr 30 01:43:19 PM PDT 24 |
3384930060 ps |
| T746 |
/workspace/coverage/default/20.sram_ctrl_regwen.4089151073 |
|
|
Apr 30 01:42:33 PM PDT 24 |
Apr 30 02:18:07 PM PDT 24 |
112684495202 ps |
| T747 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2496489919 |
|
|
Apr 30 01:42:03 PM PDT 24 |
Apr 30 01:42:17 PM PDT 24 |
850902878 ps |
| T748 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2386346737 |
|
|
Apr 30 01:44:14 PM PDT 24 |
Apr 30 01:44:19 PM PDT 24 |
173880582 ps |
| T749 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3673273547 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:42:09 PM PDT 24 |
47007686 ps |
| T750 |
/workspace/coverage/default/32.sram_ctrl_smoke.453981885 |
|
|
Apr 30 01:43:43 PM PDT 24 |
Apr 30 01:45:11 PM PDT 24 |
244342202 ps |
| T751 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3017685160 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 01:42:15 PM PDT 24 |
29587188 ps |
| T34 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.673600485 |
|
|
Apr 30 01:41:47 PM PDT 24 |
Apr 30 01:41:51 PM PDT 24 |
534637266 ps |
| T752 |
/workspace/coverage/default/31.sram_ctrl_executable.418563680 |
|
|
Apr 30 01:43:41 PM PDT 24 |
Apr 30 02:11:43 PM PDT 24 |
43088200377 ps |
| T753 |
/workspace/coverage/default/3.sram_ctrl_bijection.2510780960 |
|
|
Apr 30 01:41:43 PM PDT 24 |
Apr 30 01:42:33 PM PDT 24 |
3163137815 ps |
| T754 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.516938247 |
|
|
Apr 30 01:43:26 PM PDT 24 |
Apr 30 01:44:18 PM PDT 24 |
3461890134 ps |
| T755 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1809406568 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 01:46:01 PM PDT 24 |
607343767 ps |
| T756 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.3985970390 |
|
|
Apr 30 01:44:00 PM PDT 24 |
Apr 30 01:44:06 PM PDT 24 |
340173442 ps |
| T757 |
/workspace/coverage/default/1.sram_ctrl_regwen.3950051485 |
|
|
Apr 30 01:41:39 PM PDT 24 |
Apr 30 01:56:08 PM PDT 24 |
1791088003 ps |
| T758 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2376184711 |
|
|
Apr 30 01:43:03 PM PDT 24 |
Apr 30 02:14:56 PM PDT 24 |
16601504404 ps |
| T759 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.806532208 |
|
|
Apr 30 01:42:50 PM PDT 24 |
Apr 30 01:43:11 PM PDT 24 |
90425092 ps |
| T760 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.3777881458 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 01:47:23 PM PDT 24 |
3349441280 ps |
| T761 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.282426950 |
|
|
Apr 30 01:41:48 PM PDT 24 |
Apr 30 01:46:44 PM PDT 24 |
14702186657 ps |
| T762 |
/workspace/coverage/default/7.sram_ctrl_bijection.1746197217 |
|
|
Apr 30 01:42:00 PM PDT 24 |
Apr 30 01:42:37 PM PDT 24 |
1780034927 ps |
| T763 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.812416233 |
|
|
Apr 30 01:46:08 PM PDT 24 |
Apr 30 01:46:15 PM PDT 24 |
3200140187 ps |
| T764 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2992261557 |
|
|
Apr 30 01:44:06 PM PDT 24 |
Apr 30 01:49:53 PM PDT 24 |
16801478530 ps |
| T765 |
/workspace/coverage/default/39.sram_ctrl_regwen.1649519787 |
|
|
Apr 30 01:44:48 PM PDT 24 |
Apr 30 02:01:02 PM PDT 24 |
2009899674 ps |
| T766 |
/workspace/coverage/default/20.sram_ctrl_executable.3620525850 |
|
|
Apr 30 01:42:35 PM PDT 24 |
Apr 30 01:48:22 PM PDT 24 |
1303400145 ps |
| T767 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.1919516907 |
|
|
Apr 30 01:42:42 PM PDT 24 |
Apr 30 01:42:58 PM PDT 24 |
96564539 ps |
| T768 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.4132827483 |
|
|
Apr 30 01:43:25 PM PDT 24 |
Apr 30 01:43:27 PM PDT 24 |
154746336 ps |
| T769 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.662795073 |
|
|
Apr 30 01:42:33 PM PDT 24 |
Apr 30 01:42:39 PM PDT 24 |
509208177 ps |
| T770 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1161446864 |
|
|
Apr 30 01:41:40 PM PDT 24 |
Apr 30 01:43:58 PM PDT 24 |
207023338 ps |
| T771 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2670299871 |
|
|
Apr 30 01:42:15 PM PDT 24 |
Apr 30 01:42:19 PM PDT 24 |
81610058 ps |
| T772 |
/workspace/coverage/default/47.sram_ctrl_stress_all.660104936 |
|
|
Apr 30 01:45:53 PM PDT 24 |
Apr 30 02:44:09 PM PDT 24 |
30574326244 ps |
| T773 |
/workspace/coverage/default/15.sram_ctrl_regwen.1607156575 |
|
|
Apr 30 01:42:16 PM PDT 24 |
Apr 30 02:04:53 PM PDT 24 |
19022953636 ps |
| T774 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.1295930432 |
|
|
Apr 30 01:42:57 PM PDT 24 |
Apr 30 01:42:58 PM PDT 24 |
65846924 ps |
| T775 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.898558475 |
|
|
Apr 30 01:42:47 PM PDT 24 |
Apr 30 01:50:09 PM PDT 24 |
11101166919 ps |
| T776 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.410762155 |
|
|
Apr 30 01:42:14 PM PDT 24 |
Apr 30 01:45:38 PM PDT 24 |
9106455307 ps |
| T777 |
/workspace/coverage/default/6.sram_ctrl_executable.4028625780 |
|
|
Apr 30 01:41:51 PM PDT 24 |
Apr 30 02:02:16 PM PDT 24 |
34675860300 ps |
| T778 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2182321560 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 01:42:25 PM PDT 24 |
20882433 ps |
| T779 |
/workspace/coverage/default/30.sram_ctrl_stress_all.1138857322 |
|
|
Apr 30 01:43:31 PM PDT 24 |
Apr 30 02:25:20 PM PDT 24 |
39756026150 ps |
| T780 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1790500750 |
|
|
Apr 30 01:41:50 PM PDT 24 |
Apr 30 01:44:10 PM PDT 24 |
446808172 ps |
| T781 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.4221360617 |
|
|
Apr 30 01:42:23 PM PDT 24 |
Apr 30 01:42:26 PM PDT 24 |
336353639 ps |
| T782 |
/workspace/coverage/default/31.sram_ctrl_partial_access.222407010 |
|
|
Apr 30 01:43:33 PM PDT 24 |
Apr 30 01:44:24 PM PDT 24 |
563038773 ps |
| T783 |
/workspace/coverage/default/19.sram_ctrl_executable.568290019 |
|
|
Apr 30 01:42:33 PM PDT 24 |
Apr 30 01:52:36 PM PDT 24 |
2556862834 ps |
| T784 |
/workspace/coverage/default/38.sram_ctrl_partial_access.963576807 |
|
|
Apr 30 01:44:28 PM PDT 24 |
Apr 30 01:44:33 PM PDT 24 |
843928336 ps |
| T785 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.175067198 |
|
|
Apr 30 01:42:25 PM PDT 24 |
Apr 30 01:47:36 PM PDT 24 |
3255042342 ps |
| T786 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3985788756 |
|
|
Apr 30 01:45:15 PM PDT 24 |
Apr 30 01:45:52 PM PDT 24 |
1262778903 ps |
| T787 |
/workspace/coverage/default/42.sram_ctrl_regwen.3030293738 |
|
|
Apr 30 01:45:03 PM PDT 24 |
Apr 30 02:04:36 PM PDT 24 |
37050565662 ps |
| T788 |
/workspace/coverage/default/7.sram_ctrl_regwen.652099819 |
|
|
Apr 30 01:42:01 PM PDT 24 |
Apr 30 01:43:36 PM PDT 24 |
1639295044 ps |
| T789 |
/workspace/coverage/default/0.sram_ctrl_partial_access.760236234 |
|
|
Apr 30 01:41:37 PM PDT 24 |
Apr 30 01:41:52 PM PDT 24 |
909623242 ps |
| T790 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.552980253 |
|
|
Apr 30 01:45:52 PM PDT 24 |
Apr 30 01:58:46 PM PDT 24 |
5772768734 ps |
| T791 |
/workspace/coverage/default/10.sram_ctrl_executable.1042021750 |
|
|
Apr 30 01:42:07 PM PDT 24 |
Apr 30 01:52:19 PM PDT 24 |
39536503076 ps |
| T792 |
/workspace/coverage/default/19.sram_ctrl_regwen.3951003077 |
|
|
Apr 30 01:42:26 PM PDT 24 |
Apr 30 01:54:46 PM PDT 24 |
24121013230 ps |