Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1018
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
83.98 83.98 95.68 95.68 80.21 80.21 93.31 93.31 61.90 61.90 85.75 85.75 94.25 94.25 76.78 76.78 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1930095542
88.90 4.92 97.37 1.69 80.45 0.24 93.93 0.62 90.48 28.57 88.89 3.14 94.25 0.00 76.97 0.18 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3163460542
93.16 4.26 98.56 1.19 86.26 5.81 95.98 2.05 100.00 9.52 93.48 4.59 95.43 1.18 82.45 5.48 /workspace/coverage/default/49.sram_ctrl_stress_all.199108570
94.13 0.97 98.73 0.17 87.09 0.83 96.19 0.21 100.00 0.00 94.20 0.72 95.87 0.44 86.84 4.39 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1177021873
95.07 0.94 98.90 0.17 88.74 1.66 97.99 1.80 100.00 0.00 95.17 0.97 95.87 0.00 88.85 2.01 /workspace/coverage/default/43.sram_ctrl_regwen.1071773677
95.65 0.58 99.07 0.17 90.52 1.78 98.40 0.42 100.00 0.00 95.89 0.72 96.46 0.59 89.21 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.2161781309
96.01 0.36 99.07 0.00 90.64 0.12 98.40 0.00 100.00 0.00 95.89 0.00 96.46 0.00 91.59 2.38 /workspace/coverage/default/9.sram_ctrl_stress_all.3585921962
96.25 0.24 99.07 0.00 91.00 0.36 98.82 0.42 100.00 0.00 95.89 0.00 96.46 0.00 92.50 0.91 /workspace/coverage/default/8.sram_ctrl_alert_test.1399452222
96.46 0.21 99.07 0.00 91.00 0.00 98.82 0.00 100.00 0.00 95.89 0.00 96.46 0.00 93.97 1.46 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3668338901
96.66 0.20 99.07 0.00 91.00 0.00 98.82 0.00 100.00 0.00 95.89 0.00 97.35 0.88 94.52 0.55 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.2346413687
96.87 0.20 99.07 0.00 91.00 0.00 98.82 0.00 100.00 0.00 95.89 0.00 97.49 0.15 95.80 1.28 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3271963932
97.07 0.20 99.07 0.00 91.00 0.00 98.89 0.07 100.00 0.00 95.89 0.00 98.82 1.33 95.80 0.00 /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3580719163
97.20 0.13 99.15 0.08 91.00 0.00 99.72 0.83 100.00 0.00 95.89 0.00 98.82 0.00 95.80 0.00 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3042883668
97.30 0.10 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 98.82 0.00 96.53 0.73 /workspace/coverage/default/18.sram_ctrl_executable.1566410159
97.40 0.10 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 98.97 0.15 97.07 0.55 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2442863854
97.44 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.24 98.97 0.00 97.07 0.00 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3124400609
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.26 0.18 /workspace/coverage/default/0.sram_ctrl_regwen.347318394
97.49 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.18 /workspace/coverage/default/1.sram_ctrl_lc_escalation.85752757
97.51 0.02 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2861604938


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.238313576
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1793480893
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2489474092
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1072574639
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2580434617
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2778634965
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2980421175
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3848446060
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3898001033
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3118261181
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1436314435
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2945798989
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.102861728
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1824053404
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1163561190
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.223981586
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3204816638
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1299095878
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.779070902
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1333665829
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1388222604
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4043410755
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1222312893
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3366023502
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.178855946
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1006013890
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1327201362
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.99189210
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.404879941
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.126627596
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1089535463
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1466953159
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3779067386
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2582935505
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2359650410
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2326824481
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.617328407
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3570880079
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3713975573
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2249723769
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2169012017
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3916272274
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.134172536
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3679376931
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2160985963
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3598285495
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.315559105
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.4177681882
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3161622216
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.835612853
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2879452207
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1731637607
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3482146360
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3526225119
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3572401071
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.101204226
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3330225558
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3344932548
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1105285632
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2952045175
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3205994360
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.795321175
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.332421268
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2189185066
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3172671273
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.301357522
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3395896022
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.310861979
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3439789551
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2614778188
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.687977810
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1211519199
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1968839071
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4112431105
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1557767924
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.4045454284
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3235203096
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3339433569
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2884350012
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3414321475
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.409579896
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1589516429
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1344092862
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.731735040
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3115489515
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2035342625
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1700290280
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1543152637
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4204479346
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.817366915
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1122077873
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2303450971
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1734771191
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1479642261
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1965226491
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2701231573
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.246456697
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2014039019
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1356517448
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1921887930
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.195320632
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2628637048
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.181944860
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.39963203
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2626909995
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1775820363
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2631776658
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1188314912
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.155447871
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3135341658
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2215660402
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3754483900
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.589527488
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.392642107
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.282997256
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3795053777
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2465432831
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.527631194
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4009684105
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2835210782
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.833018027
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1169446944
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.195900277
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2675542000
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1035410404
/workspace/coverage/default/0.sram_ctrl_alert_test.1172404066
/workspace/coverage/default/0.sram_ctrl_bijection.2753223980
/workspace/coverage/default/0.sram_ctrl_executable.1918357346
/workspace/coverage/default/0.sram_ctrl_lc_escalation.385759104
/workspace/coverage/default/0.sram_ctrl_max_throughput.1819204169
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.827318999
/workspace/coverage/default/0.sram_ctrl_mem_walk.390387050
/workspace/coverage/default/0.sram_ctrl_multiple_keys.33181555
/workspace/coverage/default/0.sram_ctrl_partial_access.3931380494
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.253638603
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1106151466
/workspace/coverage/default/0.sram_ctrl_smoke.1555424567
/workspace/coverage/default/0.sram_ctrl_stress_all.3954062111
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.531802449
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2989255727
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.371328217
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1628065172
/workspace/coverage/default/1.sram_ctrl_alert_test.4150988075
/workspace/coverage/default/1.sram_ctrl_bijection.2626440887
/workspace/coverage/default/1.sram_ctrl_executable.2845909933
/workspace/coverage/default/1.sram_ctrl_max_throughput.3740252283
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3789582949
/workspace/coverage/default/1.sram_ctrl_mem_walk.502475284
/workspace/coverage/default/1.sram_ctrl_multiple_keys.178222703
/workspace/coverage/default/1.sram_ctrl_partial_access.2966545728
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.96806934
/workspace/coverage/default/1.sram_ctrl_regwen.4066869039
/workspace/coverage/default/1.sram_ctrl_sec_cm.3436319499
/workspace/coverage/default/1.sram_ctrl_smoke.2192133103
/workspace/coverage/default/1.sram_ctrl_stress_all.1781132032
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3940407782
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1187643480
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.323668537
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3610215746
/workspace/coverage/default/10.sram_ctrl_alert_test.3928118321
/workspace/coverage/default/10.sram_ctrl_bijection.2618979848
/workspace/coverage/default/10.sram_ctrl_executable.643897417
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1966057422
/workspace/coverage/default/10.sram_ctrl_max_throughput.821785165
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3675771478
/workspace/coverage/default/10.sram_ctrl_mem_walk.1858418014
/workspace/coverage/default/10.sram_ctrl_multiple_keys.28845329
/workspace/coverage/default/10.sram_ctrl_partial_access.3047609332
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3387405942
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2158088775
/workspace/coverage/default/10.sram_ctrl_regwen.2450252444
/workspace/coverage/default/10.sram_ctrl_smoke.2356652213
/workspace/coverage/default/10.sram_ctrl_stress_all.386948167
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2685487035
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1908503593
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.226109976
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2168408959
/workspace/coverage/default/11.sram_ctrl_alert_test.3326359894
/workspace/coverage/default/11.sram_ctrl_bijection.3704619733
/workspace/coverage/default/11.sram_ctrl_executable.1906192682
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3234070512
/workspace/coverage/default/11.sram_ctrl_max_throughput.113557048
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.755654910
/workspace/coverage/default/11.sram_ctrl_mem_walk.3580820217
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2671392775
/workspace/coverage/default/11.sram_ctrl_partial_access.1842107843
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3796076721
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3629778969
/workspace/coverage/default/11.sram_ctrl_regwen.2358986675
/workspace/coverage/default/11.sram_ctrl_smoke.2404881587
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2884100649
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2763020287
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.765301991
/workspace/coverage/default/12.sram_ctrl_alert_test.3844304160
/workspace/coverage/default/12.sram_ctrl_bijection.924653533
/workspace/coverage/default/12.sram_ctrl_executable.3395081969
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1789408879
/workspace/coverage/default/12.sram_ctrl_max_throughput.3927958262
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1638864556
/workspace/coverage/default/12.sram_ctrl_mem_walk.2506513891
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3779946705
/workspace/coverage/default/12.sram_ctrl_partial_access.1566300427
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1575617713
/workspace/coverage/default/12.sram_ctrl_ram_cfg.4215132455
/workspace/coverage/default/12.sram_ctrl_regwen.1452366402
/workspace/coverage/default/12.sram_ctrl_smoke.3771719460
/workspace/coverage/default/12.sram_ctrl_stress_all.1963264881
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3106926640
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1561228045
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/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2101611939
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1512163005
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1044339278
/workspace/coverage/default/44.sram_ctrl_alert_test.1801567078
/workspace/coverage/default/44.sram_ctrl_bijection.2498465729
/workspace/coverage/default/44.sram_ctrl_executable.304918834
/workspace/coverage/default/44.sram_ctrl_lc_escalation.572122308
/workspace/coverage/default/44.sram_ctrl_max_throughput.1088763762
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4039302956
/workspace/coverage/default/44.sram_ctrl_mem_walk.652047381
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1712290837
/workspace/coverage/default/44.sram_ctrl_partial_access.4281208329
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1594975639
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2933460329
/workspace/coverage/default/44.sram_ctrl_regwen.139056487
/workspace/coverage/default/44.sram_ctrl_smoke.169649522
/workspace/coverage/default/44.sram_ctrl_stress_all.3756298004
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3916232573
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1929760153
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3692399605
/workspace/coverage/default/45.sram_ctrl_alert_test.4274488240
/workspace/coverage/default/45.sram_ctrl_bijection.2782976145
/workspace/coverage/default/45.sram_ctrl_executable.2503043712
/workspace/coverage/default/45.sram_ctrl_lc_escalation.647172849
/workspace/coverage/default/45.sram_ctrl_max_throughput.665635961
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3602791267
/workspace/coverage/default/45.sram_ctrl_mem_walk.2802563316
/workspace/coverage/default/45.sram_ctrl_multiple_keys.917435005
/workspace/coverage/default/45.sram_ctrl_partial_access.1326418051
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1702176271
/workspace/coverage/default/45.sram_ctrl_ram_cfg.135241330
/workspace/coverage/default/45.sram_ctrl_regwen.4257421665
/workspace/coverage/default/45.sram_ctrl_smoke.4090352017
/workspace/coverage/default/45.sram_ctrl_stress_all.57285945
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.194168116
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3152164297
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.822471202
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4028464131
/workspace/coverage/default/46.sram_ctrl_alert_test.2717951677
/workspace/coverage/default/46.sram_ctrl_bijection.3500669806
/workspace/coverage/default/46.sram_ctrl_executable.1533592838
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3525856009
/workspace/coverage/default/46.sram_ctrl_max_throughput.4162420273
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1108996438
/workspace/coverage/default/46.sram_ctrl_mem_walk.2651011405
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1351192146
/workspace/coverage/default/46.sram_ctrl_partial_access.2740004204
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2230055932
/workspace/coverage/default/46.sram_ctrl_ram_cfg.976942424
/workspace/coverage/default/46.sram_ctrl_regwen.1579604172
/workspace/coverage/default/46.sram_ctrl_smoke.1925306550
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4136505827
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.631472015
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2195857052
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1808276646
/workspace/coverage/default/47.sram_ctrl_alert_test.3253417406
/workspace/coverage/default/47.sram_ctrl_bijection.2114439372
/workspace/coverage/default/47.sram_ctrl_executable.588934496
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3448059781
/workspace/coverage/default/47.sram_ctrl_max_throughput.1123036561
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2229924227
/workspace/coverage/default/47.sram_ctrl_mem_walk.1991039421
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2157345897
/workspace/coverage/default/47.sram_ctrl_partial_access.1514169601
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.721927048
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3715542166
/workspace/coverage/default/47.sram_ctrl_regwen.2646533071
/workspace/coverage/default/47.sram_ctrl_smoke.2138432826
/workspace/coverage/default/47.sram_ctrl_stress_all.1036427012
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.4271069486
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3650416780
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.363056702
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.206090807
/workspace/coverage/default/48.sram_ctrl_alert_test.1034990988
/workspace/coverage/default/48.sram_ctrl_bijection.3460187232
/workspace/coverage/default/48.sram_ctrl_executable.3208976101
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2839848199
/workspace/coverage/default/48.sram_ctrl_max_throughput.2924111105
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3438528609
/workspace/coverage/default/48.sram_ctrl_mem_walk.3564671482
/workspace/coverage/default/48.sram_ctrl_multiple_keys.615080213
/workspace/coverage/default/48.sram_ctrl_partial_access.527162409
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2839879143
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2724860191
/workspace/coverage/default/48.sram_ctrl_regwen.307760069
/workspace/coverage/default/48.sram_ctrl_smoke.949373545
/workspace/coverage/default/48.sram_ctrl_stress_all.2561840527
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4008598207
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1920705383
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3773799015
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.688692375
/workspace/coverage/default/49.sram_ctrl_alert_test.4009040648
/workspace/coverage/default/49.sram_ctrl_bijection.1678309328
/workspace/coverage/default/49.sram_ctrl_executable.3971312557
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1351029873
/workspace/coverage/default/49.sram_ctrl_max_throughput.559665305
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2703989880
/workspace/coverage/default/49.sram_ctrl_mem_walk.2361659628
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3676332473
/workspace/coverage/default/49.sram_ctrl_partial_access.1883333365
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.551214394
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4255225205
/workspace/coverage/default/49.sram_ctrl_regwen.746004254
/workspace/coverage/default/49.sram_ctrl_smoke.3184186296
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1286232507
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3113281358
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2418860303
/workspace/coverage/default/5.sram_ctrl_alert_test.3714064313
/workspace/coverage/default/5.sram_ctrl_bijection.2532851444
/workspace/coverage/default/5.sram_ctrl_executable.1234016585
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1266466500
/workspace/coverage/default/5.sram_ctrl_max_throughput.3549220676
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.4169947146
/workspace/coverage/default/5.sram_ctrl_mem_walk.385803041
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1895108206
/workspace/coverage/default/5.sram_ctrl_partial_access.1712752143
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2446258900
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1368562934
/workspace/coverage/default/5.sram_ctrl_regwen.3204337460
/workspace/coverage/default/5.sram_ctrl_smoke.3638741407
/workspace/coverage/default/5.sram_ctrl_stress_all.2858784074
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1034819404
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.468513346
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2264480957
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2323240086
/workspace/coverage/default/6.sram_ctrl_alert_test.1442893783
/workspace/coverage/default/6.sram_ctrl_bijection.277951786
/workspace/coverage/default/6.sram_ctrl_executable.4270678340
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3379751364
/workspace/coverage/default/6.sram_ctrl_max_throughput.2706599701
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.446907679
/workspace/coverage/default/6.sram_ctrl_mem_walk.1104333591
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2544914087
/workspace/coverage/default/6.sram_ctrl_partial_access.1606454358
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1546223280
/workspace/coverage/default/6.sram_ctrl_ram_cfg.540535801
/workspace/coverage/default/6.sram_ctrl_regwen.1701684011
/workspace/coverage/default/6.sram_ctrl_smoke.330544856
/workspace/coverage/default/6.sram_ctrl_stress_all.240855151
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2902852828
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1687436183
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1178257084
/workspace/coverage/default/7.sram_ctrl_alert_test.1366898595
/workspace/coverage/default/7.sram_ctrl_bijection.2201358528
/workspace/coverage/default/7.sram_ctrl_executable.2049896406
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1072220399
/workspace/coverage/default/7.sram_ctrl_max_throughput.1338222566
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3359839261
/workspace/coverage/default/7.sram_ctrl_mem_walk.2843489404
/workspace/coverage/default/7.sram_ctrl_multiple_keys.238193148
/workspace/coverage/default/7.sram_ctrl_partial_access.76536944
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.236038510
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2381881027
/workspace/coverage/default/7.sram_ctrl_regwen.3221978763
/workspace/coverage/default/7.sram_ctrl_smoke.838156295
/workspace/coverage/default/7.sram_ctrl_stress_all.440642202
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2552318833
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.582805073
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2777154501
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2394746672
/workspace/coverage/default/8.sram_ctrl_bijection.2350182523
/workspace/coverage/default/8.sram_ctrl_executable.3588767541
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3325092997
/workspace/coverage/default/8.sram_ctrl_max_throughput.3420300732
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3635406748
/workspace/coverage/default/8.sram_ctrl_mem_walk.3419734132
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4275735617
/workspace/coverage/default/8.sram_ctrl_partial_access.427605631
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.151008845
/workspace/coverage/default/8.sram_ctrl_ram_cfg.822293126
/workspace/coverage/default/8.sram_ctrl_regwen.579810660
/workspace/coverage/default/8.sram_ctrl_smoke.3840067090
/workspace/coverage/default/8.sram_ctrl_stress_all.3753195643
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1250959867
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1520889342
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1576624027
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3590183346
/workspace/coverage/default/9.sram_ctrl_alert_test.1636893692
/workspace/coverage/default/9.sram_ctrl_bijection.2548755389
/workspace/coverage/default/9.sram_ctrl_executable.2322539874
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3013544989
/workspace/coverage/default/9.sram_ctrl_max_throughput.2552765369
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1101889438
/workspace/coverage/default/9.sram_ctrl_mem_walk.3386703714
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3761114071
/workspace/coverage/default/9.sram_ctrl_partial_access.1057359897
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3986947165
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2206339901
/workspace/coverage/default/9.sram_ctrl_regwen.2906023956
/workspace/coverage/default/9.sram_ctrl_smoke.3554616438
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1073531070
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1590845244
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2183439405




Total test records in report: 1018
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3387405942 Jun 23 06:25:09 PM PDT 24 Jun 23 06:31:59 PM PDT 24 41216774740 ps
T2 /workspace/coverage/default/39.sram_ctrl_multiple_keys.592432945 Jun 23 06:27:51 PM PDT 24 Jun 23 06:39:02 PM PDT 24 2440337814 ps
T3 /workspace/coverage/default/41.sram_ctrl_partial_access.1304211691 Jun 23 06:28:03 PM PDT 24 Jun 23 06:28:07 PM PDT 24 49680077 ps
T7 /workspace/coverage/default/15.sram_ctrl_smoke.3569691564 Jun 23 06:25:32 PM PDT 24 Jun 23 06:25:35 PM PDT 24 212429145 ps
T4 /workspace/coverage/default/49.sram_ctrl_stress_all.199108570 Jun 23 06:29:03 PM PDT 24 Jun 23 07:03:41 PM PDT 24 53644128376 ps
T8 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.1094847948 Jun 23 06:26:40 PM PDT 24 Jun 23 06:26:44 PM PDT 24 47487996 ps
T9 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1930095542 Jun 23 06:29:05 PM PDT 24 Jun 23 06:32:18 PM PDT 24 11317740438 ps
T10 /workspace/coverage/default/48.sram_ctrl_smoke.949373545 Jun 23 06:28:49 PM PDT 24 Jun 23 06:30:18 PM PDT 24 589529962 ps
T11 /workspace/coverage/default/18.sram_ctrl_regwen.2872876696 Jun 23 06:25:51 PM PDT 24 Jun 23 06:30:02 PM PDT 24 1083066243 ps
T12 /workspace/coverage/default/8.sram_ctrl_partial_access.427605631 Jun 23 06:24:59 PM PDT 24 Jun 23 06:25:33 PM PDT 24 526465348 ps
T19 /workspace/coverage/default/17.sram_ctrl_bijection.686065549 Jun 23 06:25:49 PM PDT 24 Jun 23 06:27:09 PM PDT 24 3685613331 ps
T22 /workspace/coverage/default/46.sram_ctrl_partial_access.2740004204 Jun 23 06:28:35 PM PDT 24 Jun 23 06:30:32 PM PDT 24 1274864104 ps
T44 /workspace/coverage/default/9.sram_ctrl_mem_walk.3386703714 Jun 23 06:25:09 PM PDT 24 Jun 23 06:25:20 PM PDT 24 443759603 ps
T56 /workspace/coverage/default/40.sram_ctrl_mem_walk.877012178 Jun 23 06:28:02 PM PDT 24 Jun 23 06:28:07 PM PDT 24 72718398 ps
T57 /workspace/coverage/default/35.sram_ctrl_smoke.1088838662 Jun 23 06:27:30 PM PDT 24 Jun 23 06:27:35 PM PDT 24 233740677 ps
T25 /workspace/coverage/default/46.sram_ctrl_ram_cfg.976942424 Jun 23 06:28:39 PM PDT 24 Jun 23 06:28:40 PM PDT 24 70445519 ps
T20 /workspace/coverage/default/2.sram_ctrl_regwen.1667958168 Jun 23 06:24:36 PM PDT 24 Jun 23 06:39:29 PM PDT 24 2236896508 ps
T154 /workspace/coverage/default/15.sram_ctrl_max_throughput.352159670 Jun 23 06:25:32 PM PDT 24 Jun 23 06:27:02 PM PDT 24 116710766 ps
T148 /workspace/coverage/default/17.sram_ctrl_max_throughput.4206171145 Jun 23 06:25:48 PM PDT 24 Jun 23 06:25:56 PM PDT 24 67513645 ps
T5 /workspace/coverage/default/43.sram_ctrl_stress_all.997470770 Jun 23 06:28:21 PM PDT 24 Jun 23 07:14:37 PM PDT 24 37796261832 ps
T64 /workspace/coverage/default/18.sram_ctrl_executable.1566410159 Jun 23 06:25:54 PM PDT 24 Jun 23 06:41:51 PM PDT 24 2275862458 ps
T13 /workspace/coverage/default/4.sram_ctrl_alert_test.4052233119 Jun 23 06:24:43 PM PDT 24 Jun 23 06:24:44 PM PDT 24 13513903 ps
T39 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.2346413687 Jun 23 06:27:34 PM PDT 24 Jun 23 06:35:14 PM PDT 24 4181749922 ps
T98 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.2884100649 Jun 23 06:25:18 PM PDT 24 Jun 23 06:31:30 PM PDT 24 7337074434 ps
T42 /workspace/coverage/default/17.sram_ctrl_stress_all.1591280588 Jun 23 06:25:49 PM PDT 24 Jun 23 07:32:46 PM PDT 24 40058432676 ps
T145 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1909252190 Jun 23 06:27:24 PM PDT 24 Jun 23 06:28:40 PM PDT 24 243052674 ps
T152 /workspace/coverage/default/19.sram_ctrl_smoke.307336621 Jun 23 06:25:58 PM PDT 24 Jun 23 06:26:05 PM PDT 24 466625133 ps
T146 /workspace/coverage/default/14.sram_ctrl_partial_access.2761453464 Jun 23 06:25:34 PM PDT 24 Jun 23 06:27:08 PM PDT 24 2606371730 ps
T143 /workspace/coverage/default/17.sram_ctrl_mem_walk.3021775246 Jun 23 06:25:47 PM PDT 24 Jun 23 06:25:52 PM PDT 24 79805414 ps
T138 /workspace/coverage/default/27.sram_ctrl_multiple_keys.4056905491 Jun 23 06:26:40 PM PDT 24 Jun 23 06:37:53 PM PDT 24 11288057031 ps
T40 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.781267054 Jun 23 06:27:25 PM PDT 24 Jun 23 06:39:12 PM PDT 24 6852127933 ps
T43 /workspace/coverage/default/43.sram_ctrl_regwen.1071773677 Jun 23 06:28:21 PM PDT 24 Jun 23 06:43:11 PM PDT 24 21759677544 ps
T23 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1034819404 Jun 23 06:24:49 PM PDT 24 Jun 23 06:25:50 PM PDT 24 1167123663 ps
T150 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1646083791 Jun 23 06:25:31 PM PDT 24 Jun 23 06:53:18 PM PDT 24 4535408504 ps
T155 /workspace/coverage/default/8.sram_ctrl_smoke.3840067090 Jun 23 06:25:02 PM PDT 24 Jun 23 06:25:16 PM PDT 24 470576572 ps
T14 /workspace/coverage/default/40.sram_ctrl_alert_test.3077741456 Jun 23 06:28:03 PM PDT 24 Jun 23 06:28:04 PM PDT 24 37267165 ps
T141 /workspace/coverage/default/22.sram_ctrl_max_throughput.773190292 Jun 23 06:26:17 PM PDT 24 Jun 23 06:26:22 PM PDT 24 53653186 ps
T151 /workspace/coverage/default/16.sram_ctrl_max_throughput.825798830 Jun 23 06:25:40 PM PDT 24 Jun 23 06:26:36 PM PDT 24 714801599 ps
T153 /workspace/coverage/default/24.sram_ctrl_partial_access.3494726658 Jun 23 06:26:27 PM PDT 24 Jun 23 06:28:22 PM PDT 24 1260358854 ps
T50 /workspace/coverage/default/23.sram_ctrl_mem_walk.1805810891 Jun 23 06:26:29 PM PDT 24 Jun 23 06:26:34 PM PDT 24 590820481 ps
T48 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.2959673842 Jun 23 06:27:46 PM PDT 24 Jun 23 06:27:52 PM PDT 24 103103350 ps
T144 /workspace/coverage/default/27.sram_ctrl_partial_access.2390313265 Jun 23 06:26:41 PM PDT 24 Jun 23 06:26:47 PM PDT 24 508497346 ps
T21 /workspace/coverage/default/31.sram_ctrl_regwen.729290978 Jun 23 06:27:10 PM PDT 24 Jun 23 06:29:20 PM PDT 24 635696529 ps
T156 /workspace/coverage/default/10.sram_ctrl_smoke.2356652213 Jun 23 06:25:06 PM PDT 24 Jun 23 06:25:14 PM PDT 24 264398503 ps
T67 /workspace/coverage/default/24.sram_ctrl_stress_all.3221937795 Jun 23 06:26:30 PM PDT 24 Jun 23 07:05:01 PM PDT 24 7862482648 ps
T147 /workspace/coverage/default/1.sram_ctrl_multiple_keys.178222703 Jun 23 06:24:28 PM PDT 24 Jun 23 06:35:50 PM PDT 24 7214269879 ps
T15 /workspace/coverage/default/32.sram_ctrl_alert_test.1464251721 Jun 23 06:27:14 PM PDT 24 Jun 23 06:27:15 PM PDT 24 19192444 ps
T68 /workspace/coverage/default/6.sram_ctrl_regwen.1701684011 Jun 23 06:24:56 PM PDT 24 Jun 23 06:26:42 PM PDT 24 925351098 ps
T41 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2168408959 Jun 23 06:25:13 PM PDT 24 Jun 23 06:42:14 PM PDT 24 19501067931 ps
T6 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1926272743 Jun 23 06:27:00 PM PDT 24 Jun 23 06:27:08 PM PDT 24 1752233367 ps
T99 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3271963932 Jun 23 06:27:30 PM PDT 24 Jun 23 06:36:36 PM PDT 24 88614244191 ps
T157 /workspace/coverage/default/26.sram_ctrl_smoke.1788273410 Jun 23 06:26:38 PM PDT 24 Jun 23 06:26:43 PM PDT 24 78537006 ps
T140 /workspace/coverage/default/21.sram_ctrl_multiple_keys.3073926116 Jun 23 06:26:10 PM PDT 24 Jun 23 06:42:45 PM PDT 24 22218864954 ps
T149 /workspace/coverage/default/45.sram_ctrl_smoke.4090352017 Jun 23 06:28:30 PM PDT 24 Jun 23 06:28:41 PM PDT 24 182261356 ps
T158 /workspace/coverage/default/36.sram_ctrl_max_throughput.4160959623 Jun 23 06:27:34 PM PDT 24 Jun 23 06:27:38 PM PDT 24 97159040 ps
T142 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2646940105 Jun 23 06:27:05 PM PDT 24 Jun 23 06:29:31 PM PDT 24 1372588653 ps
T159 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1687436183 Jun 23 06:24:56 PM PDT 24 Jun 23 06:24:58 PM PDT 24 285392139 ps
T139 /workspace/coverage/default/18.sram_ctrl_partial_access.1154973952 Jun 23 06:25:52 PM PDT 24 Jun 23 06:28:07 PM PDT 24 811307067 ps
T133 /workspace/coverage/default/2.sram_ctrl_executable.4169379959 Jun 23 06:24:36 PM PDT 24 Jun 23 06:37:03 PM PDT 24 60038553732 ps
T26 /workspace/coverage/default/13.sram_ctrl_ram_cfg.1865466252 Jun 23 06:25:22 PM PDT 24 Jun 23 06:25:24 PM PDT 24 77064912 ps
T160 /workspace/coverage/default/18.sram_ctrl_max_throughput.913463425 Jun 23 06:25:51 PM PDT 24 Jun 23 06:26:01 PM PDT 24 99844114 ps
T161 /workspace/coverage/default/22.sram_ctrl_bijection.2230082639 Jun 23 06:26:18 PM PDT 24 Jun 23 06:26:36 PM PDT 24 4549056576 ps
T71 /workspace/coverage/default/35.sram_ctrl_regwen.1171941178 Jun 23 06:27:34 PM PDT 24 Jun 23 06:38:23 PM PDT 24 22659842332 ps
T162 /workspace/coverage/default/8.sram_ctrl_max_throughput.3420300732 Jun 23 06:25:02 PM PDT 24 Jun 23 06:26:56 PM PDT 24 2057961420 ps
T100 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1520889342 Jun 23 06:24:59 PM PDT 24 Jun 23 06:29:12 PM PDT 24 28234602739 ps
T24 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2076994558 Jun 23 06:25:50 PM PDT 24 Jun 23 06:26:15 PM PDT 24 2654830066 ps
T109 /workspace/coverage/default/37.sram_ctrl_lc_escalation.3271296868 Jun 23 06:27:47 PM PDT 24 Jun 23 06:27:51 PM PDT 24 1081625383 ps
T52 /workspace/coverage/default/31.sram_ctrl_mem_walk.43899291 Jun 23 06:27:10 PM PDT 24 Jun 23 06:27:21 PM PDT 24 719083472 ps
T110 /workspace/coverage/default/13.sram_ctrl_lc_escalation.2911094107 Jun 23 06:25:21 PM PDT 24 Jun 23 06:25:25 PM PDT 24 847282643 ps
T53 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3361652657 Jun 23 06:27:21 PM PDT 24 Jun 23 06:36:02 PM PDT 24 1684435131 ps
T111 /workspace/coverage/default/42.sram_ctrl_lc_escalation.1218818825 Jun 23 06:28:11 PM PDT 24 Jun 23 06:28:14 PM PDT 24 597922230 ps
T51 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.4241121378 Jun 23 06:27:14 PM PDT 24 Jun 23 06:27:18 PM PDT 24 394833181 ps
T86 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.1035410404 Jun 23 06:24:20 PM PDT 24 Jun 23 06:28:08 PM PDT 24 4121297837 ps
T112 /workspace/coverage/default/9.sram_ctrl_stress_all.3585921962 Jun 23 06:25:07 PM PDT 24 Jun 23 07:05:10 PM PDT 24 8030280920 ps
T54 /workspace/coverage/default/1.sram_ctrl_mem_walk.502475284 Jun 23 06:24:24 PM PDT 24 Jun 23 06:24:31 PM PDT 24 496455986 ps
T163 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3761114071 Jun 23 06:25:03 PM PDT 24 Jun 23 06:34:13 PM PDT 24 23112463850 ps
T164 /workspace/coverage/default/8.sram_ctrl_alert_test.1399452222 Jun 23 06:25:01 PM PDT 24 Jun 23 06:25:02 PM PDT 24 12484469 ps
T101 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2101611939 Jun 23 06:28:15 PM PDT 24 Jun 23 06:33:00 PM PDT 24 5910093247 ps
T55 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2840044929 Jun 23 06:26:26 PM PDT 24 Jun 23 06:27:17 PM PDT 24 6484993222 ps
T165 /workspace/coverage/default/7.sram_ctrl_bijection.2201358528 Jun 23 06:24:55 PM PDT 24 Jun 23 06:25:29 PM PDT 24 1523436593 ps
T27 /workspace/coverage/default/27.sram_ctrl_ram_cfg.406357063 Jun 23 06:26:41 PM PDT 24 Jun 23 06:26:43 PM PDT 24 389573657 ps
T166 /workspace/coverage/default/26.sram_ctrl_partial_access.394665099 Jun 23 06:26:38 PM PDT 24 Jun 23 06:29:11 PM PDT 24 227627812 ps
T121 /workspace/coverage/default/34.sram_ctrl_stress_all.2227660085 Jun 23 06:27:26 PM PDT 24 Jun 23 06:57:35 PM PDT 24 16490946394 ps
T167 /workspace/coverage/default/16.sram_ctrl_bijection.3447165602 Jun 23 06:25:40 PM PDT 24 Jun 23 06:26:13 PM PDT 24 1457923794 ps
T168 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.553243341 Jun 23 06:27:57 PM PDT 24 Jun 23 06:29:40 PM PDT 24 140051005 ps
T169 /workspace/coverage/default/25.sram_ctrl_lc_escalation.2007948747 Jun 23 06:26:31 PM PDT 24 Jun 23 06:26:36 PM PDT 24 454131526 ps
T58 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1541179595 Jun 23 06:28:20 PM PDT 24 Jun 23 06:30:02 PM PDT 24 1599615692 ps
T87 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2280464825 Jun 23 06:25:52 PM PDT 24 Jun 23 06:27:07 PM PDT 24 315027217 ps
T170 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.323668537 Jun 23 06:24:25 PM PDT 24 Jun 23 06:24:27 PM PDT 24 38434689 ps
T171 /workspace/coverage/default/38.sram_ctrl_regwen.2846811026 Jun 23 06:27:51 PM PDT 24 Jun 23 06:42:49 PM PDT 24 53270097534 ps
T102 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.4070726928 Jun 23 06:26:37 PM PDT 24 Jun 23 06:32:05 PM PDT 24 3400430633 ps
T134 /workspace/coverage/default/22.sram_ctrl_executable.4219608750 Jun 23 06:26:15 PM PDT 24 Jun 23 06:37:39 PM PDT 24 44553866687 ps
T172 /workspace/coverage/default/46.sram_ctrl_multiple_keys.1351192146 Jun 23 06:28:33 PM PDT 24 Jun 23 06:42:13 PM PDT 24 11483847045 ps
T173 /workspace/coverage/default/14.sram_ctrl_regwen.1997944151 Jun 23 06:25:31 PM PDT 24 Jun 23 06:32:03 PM PDT 24 11592384005 ps
T174 /workspace/coverage/default/29.sram_ctrl_lc_escalation.251410357 Jun 23 06:26:54 PM PDT 24 Jun 23 06:27:01 PM PDT 24 2351461315 ps
T175 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1387935040 Jun 23 06:24:41 PM PDT 24 Jun 23 06:25:39 PM PDT 24 518577956 ps
T88 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.2727259289 Jun 23 06:27:08 PM PDT 24 Jun 23 06:45:30 PM PDT 24 12539828341 ps
T176 /workspace/coverage/default/40.sram_ctrl_partial_access.2410593078 Jun 23 06:27:57 PM PDT 24 Jun 23 06:28:02 PM PDT 24 104416847 ps
T177 /workspace/coverage/default/37.sram_ctrl_partial_access.2898090002 Jun 23 06:27:47 PM PDT 24 Jun 23 06:28:00 PM PDT 24 1535347777 ps
T45 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1250959867 Jun 23 06:25:04 PM PDT 24 Jun 23 06:26:05 PM PDT 24 8230388031 ps
T178 /workspace/coverage/default/11.sram_ctrl_regwen.2358986675 Jun 23 06:25:18 PM PDT 24 Jun 23 06:40:41 PM PDT 24 29101607242 ps
T103 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2111071874 Jun 23 06:27:15 PM PDT 24 Jun 23 06:32:07 PM PDT 24 12403982444 ps
T59 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2596321844 Jun 23 06:27:24 PM PDT 24 Jun 23 06:27:27 PM PDT 24 309192288 ps
T179 /workspace/coverage/default/32.sram_ctrl_regwen.396725571 Jun 23 06:27:17 PM PDT 24 Jun 23 06:40:55 PM PDT 24 36509615166 ps
T180 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1771720681 Jun 23 06:27:53 PM PDT 24 Jun 23 06:28:26 PM PDT 24 1383291631 ps
T60 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3602791267 Jun 23 06:28:34 PM PDT 24 Jun 23 06:28:38 PM PDT 24 239013663 ps
T104 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.3142243648 Jun 23 06:26:04 PM PDT 24 Jun 23 06:31:06 PM PDT 24 11986938290 ps
T181 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2604190185 Jun 23 06:26:14 PM PDT 24 Jun 23 06:26:15 PM PDT 24 33967513 ps
T182 /workspace/coverage/default/48.sram_ctrl_alert_test.1034990988 Jun 23 06:28:53 PM PDT 24 Jun 23 06:28:55 PM PDT 24 17314875 ps
T183 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1233627245 Jun 23 06:24:39 PM PDT 24 Jun 23 06:38:21 PM PDT 24 16011923316 ps
T184 /workspace/coverage/default/18.sram_ctrl_mem_walk.2616386874 Jun 23 06:25:52 PM PDT 24 Jun 23 06:26:03 PM PDT 24 349687242 ps
T185 /workspace/coverage/default/1.sram_ctrl_lc_escalation.85752757 Jun 23 06:24:30 PM PDT 24 Jun 23 06:24:40 PM PDT 24 1022986104 ps
T186 /workspace/coverage/default/26.sram_ctrl_ram_cfg.424553840 Jun 23 06:26:38 PM PDT 24 Jun 23 06:26:39 PM PDT 24 74916054 ps
T46 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3163460542 Jun 23 06:25:47 PM PDT 24 Jun 23 06:25:56 PM PDT 24 515406844 ps
T187 /workspace/coverage/default/0.sram_ctrl_bijection.2753223980 Jun 23 06:24:21 PM PDT 24 Jun 23 06:24:54 PM PDT 24 6347590018 ps
T188 /workspace/coverage/default/22.sram_ctrl_mem_walk.3983763852 Jun 23 06:26:15 PM PDT 24 Jun 23 06:26:20 PM PDT 24 279303903 ps
T189 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.1322065640 Jun 23 06:27:06 PM PDT 24 Jun 23 06:37:55 PM PDT 24 7434584731 ps
T190 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.1738248485 Jun 23 06:25:31 PM PDT 24 Jun 23 06:29:37 PM PDT 24 2685814017 ps
T191 /workspace/coverage/default/40.sram_ctrl_max_throughput.4052776819 Jun 23 06:27:57 PM PDT 24 Jun 23 06:28:15 PM PDT 24 745810996 ps
T192 /workspace/coverage/default/3.sram_ctrl_partial_access.543398738 Jun 23 06:24:37 PM PDT 24 Jun 23 06:24:56 PM PDT 24 994072846 ps
T193 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.1655798004 Jun 23 06:27:56 PM PDT 24 Jun 23 06:31:01 PM PDT 24 29430958240 ps
T194 /workspace/coverage/default/9.sram_ctrl_max_throughput.2552765369 Jun 23 06:25:08 PM PDT 24 Jun 23 06:25:14 PM PDT 24 207658002 ps
T195 /workspace/coverage/default/20.sram_ctrl_smoke.265826200 Jun 23 06:26:01 PM PDT 24 Jun 23 06:26:05 PM PDT 24 1870361783 ps
T196 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2528491365 Jun 23 06:26:37 PM PDT 24 Jun 23 06:27:00 PM PDT 24 170848892 ps
T197 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.3834579209 Jun 23 06:24:40 PM PDT 24 Jun 23 06:28:45 PM PDT 24 12873691629 ps
T198 /workspace/coverage/default/13.sram_ctrl_smoke.799090059 Jun 23 06:25:22 PM PDT 24 Jun 23 06:27:27 PM PDT 24 646295168 ps
T199 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3916232573 Jun 23 06:28:20 PM PDT 24 Jun 23 06:30:30 PM PDT 24 1436546298 ps
T200 /workspace/coverage/default/20.sram_ctrl_regwen.1025979934 Jun 23 06:26:08 PM PDT 24 Jun 23 06:35:25 PM PDT 24 97486633790 ps
T201 /workspace/coverage/default/46.sram_ctrl_smoke.1925306550 Jun 23 06:28:33 PM PDT 24 Jun 23 06:28:42 PM PDT 24 617215809 ps
T202 /workspace/coverage/default/17.sram_ctrl_regwen.2828396724 Jun 23 06:25:47 PM PDT 24 Jun 23 06:33:02 PM PDT 24 6278510631 ps
T203 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.2229924227 Jun 23 06:28:52 PM PDT 24 Jun 23 06:28:58 PM PDT 24 174617040 ps
T204 /workspace/coverage/default/14.sram_ctrl_multiple_keys.2135048959 Jun 23 06:25:25 PM PDT 24 Jun 23 06:55:26 PM PDT 24 45840182157 ps
T205 /workspace/coverage/default/42.sram_ctrl_max_throughput.1298496850 Jun 23 06:28:11 PM PDT 24 Jun 23 06:28:59 PM PDT 24 119028602 ps
T206 /workspace/coverage/default/44.sram_ctrl_smoke.169649522 Jun 23 06:28:22 PM PDT 24 Jun 23 06:28:37 PM PDT 24 714547222 ps
T207 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2961268699 Jun 23 06:26:33 PM PDT 24 Jun 23 06:26:36 PM PDT 24 114455751 ps
T208 /workspace/coverage/default/43.sram_ctrl_ram_cfg.3850218060 Jun 23 06:28:21 PM PDT 24 Jun 23 06:28:23 PM PDT 24 30688464 ps
T209 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.959949939 Jun 23 06:26:20 PM PDT 24 Jun 23 06:26:47 PM PDT 24 96552714 ps
T210 /workspace/coverage/default/28.sram_ctrl_partial_access.1507279708 Jun 23 06:26:46 PM PDT 24 Jun 23 06:28:11 PM PDT 24 213447944 ps
T211 /workspace/coverage/default/43.sram_ctrl_smoke.2254949563 Jun 23 06:28:17 PM PDT 24 Jun 23 06:28:30 PM PDT 24 407170024 ps
T212 /workspace/coverage/default/27.sram_ctrl_bijection.1001082037 Jun 23 06:26:40 PM PDT 24 Jun 23 06:27:28 PM PDT 24 15546965757 ps
T213 /workspace/coverage/default/21.sram_ctrl_partial_access.4008511366 Jun 23 06:26:12 PM PDT 24 Jun 23 06:28:09 PM PDT 24 1348339995 ps
T214 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.96806934 Jun 23 06:24:30 PM PDT 24 Jun 23 06:26:58 PM PDT 24 1964787472 ps
T215 /workspace/coverage/default/6.sram_ctrl_alert_test.1442893783 Jun 23 06:24:55 PM PDT 24 Jun 23 06:24:56 PM PDT 24 42817914 ps
T216 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.755654910 Jun 23 06:25:18 PM PDT 24 Jun 23 06:25:25 PM PDT 24 195708653 ps
T217 /workspace/coverage/default/28.sram_ctrl_regwen.2462430647 Jun 23 06:26:54 PM PDT 24 Jun 23 06:27:41 PM PDT 24 6465887054 ps
T69 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3045342807 Jun 23 06:26:54 PM PDT 24 Jun 23 06:27:24 PM PDT 24 645425453 ps
T218 /workspace/coverage/default/16.sram_ctrl_partial_access.3289117397 Jun 23 06:25:36 PM PDT 24 Jun 23 06:26:00 PM PDT 24 170691986 ps
T219 /workspace/coverage/default/32.sram_ctrl_bijection.3711699956 Jun 23 06:27:13 PM PDT 24 Jun 23 06:27:45 PM PDT 24 4316744259 ps
T220 /workspace/coverage/default/28.sram_ctrl_smoke.3293953398 Jun 23 06:26:47 PM PDT 24 Jun 23 06:27:00 PM PDT 24 186596013 ps
T221 /workspace/coverage/default/31.sram_ctrl_bijection.318476109 Jun 23 06:27:04 PM PDT 24 Jun 23 06:27:55 PM PDT 24 7943830270 ps
T70 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1073531070 Jun 23 06:25:09 PM PDT 24 Jun 23 06:25:50 PM PDT 24 613129266 ps
T222 /workspace/coverage/default/42.sram_ctrl_executable.2878205481 Jun 23 06:28:11 PM PDT 24 Jun 23 06:46:33 PM PDT 24 2300546220 ps
T223 /workspace/coverage/default/24.sram_ctrl_multiple_keys.1418229490 Jun 23 06:26:26 PM PDT 24 Jun 23 06:43:32 PM PDT 24 44034636777 ps
T224 /workspace/coverage/default/48.sram_ctrl_lc_escalation.2839848199 Jun 23 06:28:53 PM PDT 24 Jun 23 06:28:56 PM PDT 24 230046054 ps
T225 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.206090807 Jun 23 06:28:53 PM PDT 24 Jun 23 06:34:57 PM PDT 24 5171742294 ps
T226 /workspace/coverage/default/43.sram_ctrl_max_throughput.3741532538 Jun 23 06:28:16 PM PDT 24 Jun 23 06:29:33 PM PDT 24 311751236 ps
T227 /workspace/coverage/default/0.sram_ctrl_executable.1918357346 Jun 23 06:24:22 PM PDT 24 Jun 23 06:40:04 PM PDT 24 6273039535 ps
T228 /workspace/coverage/default/32.sram_ctrl_executable.3688648270 Jun 23 06:27:17 PM PDT 24 Jun 23 06:29:23 PM PDT 24 3102779607 ps
T229 /workspace/coverage/default/40.sram_ctrl_smoke.842525876 Jun 23 06:27:55 PM PDT 24 Jun 23 06:28:29 PM PDT 24 374492780 ps
T230 /workspace/coverage/default/29.sram_ctrl_multiple_keys.870995016 Jun 23 06:26:53 PM PDT 24 Jun 23 06:51:36 PM PDT 24 14224945021 ps
T231 /workspace/coverage/default/14.sram_ctrl_bijection.4052945328 Jun 23 06:25:34 PM PDT 24 Jun 23 06:26:07 PM PDT 24 493678294 ps
T232 /workspace/coverage/default/29.sram_ctrl_ram_cfg.2788670957 Jun 23 06:26:58 PM PDT 24 Jun 23 06:26:59 PM PDT 24 29100670 ps
T233 /workspace/coverage/default/23.sram_ctrl_smoke.3923906342 Jun 23 06:26:19 PM PDT 24 Jun 23 06:26:35 PM PDT 24 713920740 ps
T234 /workspace/coverage/default/33.sram_ctrl_smoke.2159718897 Jun 23 06:27:14 PM PDT 24 Jun 23 06:27:23 PM PDT 24 189507697 ps
T135 /workspace/coverage/default/38.sram_ctrl_stress_all.2244010439 Jun 23 06:27:49 PM PDT 24 Jun 23 07:09:50 PM PDT 24 25470157257 ps
T235 /workspace/coverage/default/6.sram_ctrl_max_throughput.2706599701 Jun 23 06:24:48 PM PDT 24 Jun 23 06:26:17 PM PDT 24 120718434 ps
T236 /workspace/coverage/default/15.sram_ctrl_stress_all.1241915434 Jun 23 06:25:38 PM PDT 24 Jun 23 06:58:22 PM PDT 24 7105675543 ps
T237 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3789582949 Jun 23 06:24:31 PM PDT 24 Jun 23 06:24:35 PM PDT 24 46249199 ps
T136 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1546223280 Jun 23 06:24:50 PM PDT 24 Jun 23 06:29:37 PM PDT 24 24866909272 ps
T137 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1575617713 Jun 23 06:25:17 PM PDT 24 Jun 23 06:35:38 PM PDT 24 23911771821 ps
T238 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.810674513 Jun 23 06:25:33 PM PDT 24 Jun 23 06:27:06 PM PDT 24 200326825 ps
T239 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1108996438 Jun 23 06:28:43 PM PDT 24 Jun 23 06:28:50 PM PDT 24 744072056 ps
T240 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1141601747 Jun 23 06:26:24 PM PDT 24 Jun 23 06:33:04 PM PDT 24 8356059492 ps
T241 /workspace/coverage/default/9.sram_ctrl_alert_test.1636893692 Jun 23 06:25:08 PM PDT 24 Jun 23 06:25:09 PM PDT 24 22175946 ps
T242 /workspace/coverage/default/25.sram_ctrl_alert_test.1659859248 Jun 23 06:26:40 PM PDT 24 Jun 23 06:26:42 PM PDT 24 13718610 ps
T243 /workspace/coverage/default/2.sram_ctrl_lc_escalation.3209953456 Jun 23 06:24:32 PM PDT 24 Jun 23 06:24:38 PM PDT 24 451938879 ps
T244 /workspace/coverage/default/37.sram_ctrl_stress_all.4123771314 Jun 23 06:27:47 PM PDT 24 Jun 23 06:55:15 PM PDT 24 12789903517 ps
T245 /workspace/coverage/default/47.sram_ctrl_max_throughput.1123036561 Jun 23 06:28:46 PM PDT 24 Jun 23 06:30:56 PM PDT 24 138045182 ps
T246 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2412458067 Jun 23 06:26:34 PM PDT 24 Jun 23 06:30:23 PM PDT 24 12621614361 ps
T247 /workspace/coverage/default/19.sram_ctrl_alert_test.796664979 Jun 23 06:26:00 PM PDT 24 Jun 23 06:26:01 PM PDT 24 16132491 ps
T248 /workspace/coverage/default/22.sram_ctrl_multiple_keys.4058539491 Jun 23 06:26:15 PM PDT 24 Jun 23 06:46:19 PM PDT 24 35958100178 ps
T249 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.721927048 Jun 23 06:28:43 PM PDT 24 Jun 23 06:38:23 PM PDT 24 45367917955 ps
T250 /workspace/coverage/default/43.sram_ctrl_mem_walk.456858582 Jun 23 06:28:21 PM PDT 24 Jun 23 06:28:26 PM PDT 24 348370453 ps
T251 /workspace/coverage/default/13.sram_ctrl_bijection.1338102191 Jun 23 06:25:22 PM PDT 24 Jun 23 06:26:10 PM PDT 24 1472773785 ps
T252 /workspace/coverage/default/4.sram_ctrl_smoke.1503450983 Jun 23 06:24:42 PM PDT 24 Jun 23 06:27:24 PM PDT 24 2356058152 ps
T253 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3013544989 Jun 23 06:25:07 PM PDT 24 Jun 23 06:25:18 PM PDT 24 1111491799 ps
T130 /workspace/coverage/default/3.sram_ctrl_regwen.912898166 Jun 23 06:24:40 PM PDT 24 Jun 23 06:49:04 PM PDT 24 19111159033 ps
T254 /workspace/coverage/default/23.sram_ctrl_lc_escalation.1150675223 Jun 23 06:26:27 PM PDT 24 Jun 23 06:26:33 PM PDT 24 807855595 ps
T255 /workspace/coverage/default/20.sram_ctrl_partial_access.3728028919 Jun 23 06:26:01 PM PDT 24 Jun 23 06:26:03 PM PDT 24 29815605 ps
T131 /workspace/coverage/default/7.sram_ctrl_stress_all.440642202 Jun 23 06:25:01 PM PDT 24 Jun 23 08:41:02 PM PDT 24 79797347343 ps
T256 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3715542166 Jun 23 06:28:50 PM PDT 24 Jun 23 06:28:51 PM PDT 24 53726683 ps
T257 /workspace/coverage/default/24.sram_ctrl_executable.3548727305 Jun 23 06:26:27 PM PDT 24 Jun 23 06:37:11 PM PDT 24 2804673687 ps
T258 /workspace/coverage/default/45.sram_ctrl_bijection.2782976145 Jun 23 06:28:31 PM PDT 24 Jun 23 06:29:01 PM PDT 24 2851045316 ps
T259 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3042883668 Jun 23 06:24:30 PM PDT 24 Jun 23 06:24:32 PM PDT 24 59962476 ps
T260 /workspace/coverage/default/46.sram_ctrl_mem_walk.2651011405 Jun 23 06:28:43 PM PDT 24 Jun 23 06:28:50 PM PDT 24 908887832 ps
T261 /workspace/coverage/default/16.sram_ctrl_lc_escalation.2510136445 Jun 23 06:25:41 PM PDT 24 Jun 23 06:25:46 PM PDT 24 389081742 ps
T262 /workspace/coverage/default/49.sram_ctrl_regwen.746004254 Jun 23 06:29:01 PM PDT 24 Jun 23 06:45:15 PM PDT 24 9521898707 ps
T263 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3149637071 Jun 23 06:27:32 PM PDT 24 Jun 23 06:27:36 PM PDT 24 212346091 ps
T264 /workspace/coverage/default/5.sram_ctrl_ram_cfg.1368562934 Jun 23 06:24:50 PM PDT 24 Jun 23 06:24:52 PM PDT 24 80229052 ps
T265 /workspace/coverage/default/4.sram_ctrl_partial_access.788082977 Jun 23 06:24:45 PM PDT 24 Jun 23 06:26:08 PM PDT 24 569233017 ps
T266 /workspace/coverage/default/7.sram_ctrl_alert_test.1366898595 Jun 23 06:25:03 PM PDT 24 Jun 23 06:25:04 PM PDT 24 10584367 ps
T267 /workspace/coverage/default/23.sram_ctrl_max_throughput.180612551 Jun 23 06:26:18 PM PDT 24 Jun 23 06:26:38 PM PDT 24 148312147 ps
T268 /workspace/coverage/default/38.sram_ctrl_mem_walk.398567016 Jun 23 06:27:46 PM PDT 24 Jun 23 06:27:55 PM PDT 24 139175594 ps
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T270 /workspace/coverage/default/25.sram_ctrl_executable.3973515926 Jun 23 06:26:31 PM PDT 24 Jun 23 06:39:58 PM PDT 24 9051988457 ps
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T272 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2418860303 Jun 23 06:24:49 PM PDT 24 Jun 23 06:27:56 PM PDT 24 1099794773 ps
T273 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1512163005 Jun 23 06:28:15 PM PDT 24 Jun 23 06:29:29 PM PDT 24 1533585439 ps
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T275 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3796076721 Jun 23 06:25:15 PM PDT 24 Jun 23 06:31:15 PM PDT 24 4956387085 ps
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T282 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.194168116 Jun 23 06:28:34 PM PDT 24 Jun 23 06:28:44 PM PDT 24 1194422143 ps
T283 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.3694834417 Jun 23 06:27:37 PM PDT 24 Jun 23 06:27:40 PM PDT 24 350880627 ps
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T288 /workspace/coverage/default/38.sram_ctrl_alert_test.1436653518 Jun 23 06:27:47 PM PDT 24 Jun 23 06:27:48 PM PDT 24 35503012 ps
T289 /workspace/coverage/default/41.sram_ctrl_smoke.3351396922 Jun 23 06:28:02 PM PDT 24 Jun 23 06:28:20 PM PDT 24 8433153683 ps
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T294 /workspace/coverage/default/29.sram_ctrl_partial_access.2930267106 Jun 23 06:26:51 PM PDT 24 Jun 23 06:27:29 PM PDT 24 410739957 ps
T295 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.231682301 Jun 23 06:26:32 PM PDT 24 Jun 23 06:27:51 PM PDT 24 284422988 ps
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T299 /workspace/coverage/default/34.sram_ctrl_max_throughput.2336727378 Jun 23 06:27:24 PM PDT 24 Jun 23 06:27:28 PM PDT 24 86613541 ps
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T301 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2839879143 Jun 23 06:28:53 PM PDT 24 Jun 23 06:35:39 PM PDT 24 11116491878 ps
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T303 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.634065692 Jun 23 06:28:11 PM PDT 24 Jun 23 06:33:09 PM PDT 24 3836086462 ps
T304 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1129321789 Jun 23 06:24:35 PM PDT 24 Jun 23 06:26:23 PM PDT 24 4359138758 ps
T305 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.765301991 Jun 23 06:25:16 PM PDT 24 Jun 23 06:37:34 PM PDT 24 1972364942 ps
T306 /workspace/coverage/default/3.sram_ctrl_lc_escalation.2034562980 Jun 23 06:24:43 PM PDT 24 Jun 23 06:24:50 PM PDT 24 1144740730 ps
T307 /workspace/coverage/default/6.sram_ctrl_lc_escalation.3379751364 Jun 23 06:24:57 PM PDT 24 Jun 23 06:25:04 PM PDT 24 2231001901 ps
T308 /workspace/coverage/default/28.sram_ctrl_stress_all.2841985864 Jun 23 06:26:51 PM PDT 24 Jun 23 08:09:26 PM PDT 24 59405334549 ps
T309 /workspace/coverage/default/16.sram_ctrl_executable.1273659391 Jun 23 06:25:41 PM PDT 24 Jun 23 06:38:44 PM PDT 24 56071243144 ps
T310 /workspace/coverage/default/41.sram_ctrl_lc_escalation.1097908975 Jun 23 06:28:04 PM PDT 24 Jun 23 06:28:11 PM PDT 24 725314281 ps
T311 /workspace/coverage/default/35.sram_ctrl_max_throughput.2341804780 Jun 23 06:27:30 PM PDT 24 Jun 23 06:29:24 PM PDT 24 1498344875 ps
T312 /workspace/coverage/default/30.sram_ctrl_alert_test.382862871 Jun 23 06:27:06 PM PDT 24 Jun 23 06:27:07 PM PDT 24 38382920 ps
T313 /workspace/coverage/default/20.sram_ctrl_ram_cfg.3453070982 Jun 23 06:26:05 PM PDT 24 Jun 23 06:26:06 PM PDT 24 48053430 ps
T314 /workspace/coverage/default/7.sram_ctrl_partial_access.76536944 Jun 23 06:24:56 PM PDT 24 Jun 23 06:25:42 PM PDT 24 1716494466 ps
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