Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1027
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
73.22 73.22 93.05 93.05 73.46 73.46 87.38 87.38 33.33 33.33 83.57 83.57 93.51 93.51 48.26 48.26 /workspace/coverage/default/47.sram_ctrl_stress_all.3432848298
88.49 15.27 97.03 3.98 84.83 11.37 97.61 10.23 71.43 38.10 89.37 5.80 95.43 1.92 83.73 35.47 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1864913396
93.81 5.31 98.73 1.69 86.49 1.66 97.71 0.10 100.00 28.57 93.48 4.11 96.31 0.88 83.91 0.18 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2516873134
94.76 0.95 98.90 0.17 87.32 0.83 97.92 0.21 100.00 0.00 94.20 0.72 96.31 0.00 88.67 4.75 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1149701182
95.48 0.72 99.07 0.17 89.10 1.78 98.75 0.83 100.00 0.00 94.93 0.72 96.90 0.59 89.58 0.91 /workspace/coverage/default/2.sram_ctrl_sec_cm.1128889162
96.07 0.60 99.07 0.00 90.17 1.07 98.75 0.00 100.00 0.00 95.65 0.72 96.90 0.00 91.96 2.38 /workspace/coverage/default/39.sram_ctrl_regwen.169799318
96.43 0.36 99.07 0.00 90.17 0.00 98.75 0.00 100.00 0.00 95.65 0.00 97.05 0.15 94.33 2.38 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1922435798
96.62 0.19 99.07 0.00 90.28 0.12 98.75 0.00 100.00 0.00 96.14 0.48 97.79 0.74 94.33 0.00 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2243615019
96.80 0.18 99.07 0.00 90.28 0.00 98.82 0.07 100.00 0.00 96.14 0.00 98.97 1.18 94.33 0.00 /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.4077549091
96.96 0.16 99.07 0.00 90.28 0.00 98.82 0.00 100.00 0.00 96.14 0.00 98.97 0.00 95.43 1.10 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2186941800
97.11 0.16 99.07 0.00 90.64 0.36 98.82 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.16 0.73 /workspace/coverage/default/39.sram_ctrl_stress_all.3739697711
97.24 0.13 99.15 0.08 90.64 0.00 99.65 0.83 100.00 0.00 96.14 0.00 98.97 0.00 96.16 0.00 /workspace/coverage/default/10.sram_ctrl_ram_cfg.1827312926
97.32 0.08 99.15 0.00 90.64 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.55 /workspace/coverage/default/15.sram_ctrl_stress_all.1729063886
97.38 0.06 99.15 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.00 /workspace/coverage/default/14.sram_ctrl_alert_test.1497703388
97.44 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.07 0.37 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2673071400
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1650589340
97.49 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.18 /workspace/coverage/default/16.sram_ctrl_regwen.334998477
97.51 0.02 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3098776401

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1410235584
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2771390607
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3524029372
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2376210736
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.750407064
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1853903677
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3971589003
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3922128729
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3475215125
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1744435094
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2993463535
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3389905919
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.197645907
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3358029348
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.930222979
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1258037222
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3573407494
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.231842993
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4225406083
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3978135043
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3677133548
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1998079467
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.550367227
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2906268148
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3567688161
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2810614834
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.841325322
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3312574794
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1254009051
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.857792567
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3916084885
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.355842102
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2823789269
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.992383175
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.4248609121
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3607900483
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.927193050
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1247684441
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.386967043
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1692753310
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1254287653
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.546171941
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1415693458
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2609077667
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2950466783
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.132223239
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2607865150
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3851885427
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3487914592
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.102839292
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2456353416
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.233272132
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3176949429
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.969276368
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1888013492
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2326194239
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3951800341
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3091138204
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3593539395
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.646573206
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3630230106
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1030974737
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1225220740
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3895590307
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1890805630
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3051042711
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4085174134
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.499725130
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1923025798
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2663825461
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3668826840
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3603545525
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1636945170
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.759956433
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3936690312
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1665390334
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3000015558
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2001690719
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1850643134
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3722964519
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.564330920
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.227333629
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3036622467
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2943298274
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1594378185
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2542278483
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.725202924
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3169179338
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3884948399
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.663492688
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.424198335
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2474989241
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3600248285
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1736746979
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3636191580
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2065585802
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3382980107
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2171634976
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.419789065
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4277025455
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.816705945
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.439256195
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1136574370
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1129998516
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1876135413
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3124622625
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2602901561
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1714804635
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3164627988
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.945988597
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3716229249
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3897623257
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3412789343
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3044772120
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3236177503
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4064356341
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2560109404
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.245213179
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.859387591
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1998880141
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1350134376
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3262888811
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2838873279
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.861332720
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.636102296
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.4109063244
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.790572880
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2312235672
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.848474425
/workspace/coverage/default/0.sram_ctrl_alert_test.3073377357
/workspace/coverage/default/0.sram_ctrl_bijection.2508181931
/workspace/coverage/default/0.sram_ctrl_executable.1794881240
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2513492524
/workspace/coverage/default/0.sram_ctrl_max_throughput.2535017645
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.32912069
/workspace/coverage/default/0.sram_ctrl_mem_walk.2658951747
/workspace/coverage/default/0.sram_ctrl_multiple_keys.194748428
/workspace/coverage/default/0.sram_ctrl_partial_access.1489279673
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1843038218
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3917792807
/workspace/coverage/default/0.sram_ctrl_regwen.4101834872
/workspace/coverage/default/0.sram_ctrl_sec_cm.4126554914
/workspace/coverage/default/0.sram_ctrl_smoke.4113952241
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.934027247
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2980753740
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3112071172
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4188043497
/workspace/coverage/default/1.sram_ctrl_alert_test.3092613103
/workspace/coverage/default/1.sram_ctrl_bijection.1963288115
/workspace/coverage/default/1.sram_ctrl_executable.3505417057
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4172182658
/workspace/coverage/default/1.sram_ctrl_max_throughput.325142163
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1196053568
/workspace/coverage/default/1.sram_ctrl_mem_walk.2996831623
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2403845781
/workspace/coverage/default/1.sram_ctrl_partial_access.3252475131
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3438544785
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2727756707
/workspace/coverage/default/1.sram_ctrl_regwen.382113481
/workspace/coverage/default/1.sram_ctrl_sec_cm.122306044
/workspace/coverage/default/1.sram_ctrl_smoke.972445088
/workspace/coverage/default/1.sram_ctrl_stress_all.450334271
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1229247831
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3587224641
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1857982056
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2308234771
/workspace/coverage/default/10.sram_ctrl_alert_test.535039490
/workspace/coverage/default/10.sram_ctrl_bijection.1580281992
/workspace/coverage/default/10.sram_ctrl_executable.773400736
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1697398020
/workspace/coverage/default/10.sram_ctrl_max_throughput.598827181
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.552355298
/workspace/coverage/default/10.sram_ctrl_mem_walk.1117933552
/workspace/coverage/default/10.sram_ctrl_multiple_keys.203337782
/workspace/coverage/default/10.sram_ctrl_partial_access.2434012114
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.271342985
/workspace/coverage/default/10.sram_ctrl_regwen.268966711
/workspace/coverage/default/10.sram_ctrl_smoke.3666201410
/workspace/coverage/default/10.sram_ctrl_stress_all.96651961
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2033952895
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3682759729
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3355570107
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3861567388
/workspace/coverage/default/11.sram_ctrl_alert_test.3003490611
/workspace/coverage/default/11.sram_ctrl_bijection.1288039958
/workspace/coverage/default/11.sram_ctrl_executable.2548464523
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4199872886
/workspace/coverage/default/11.sram_ctrl_max_throughput.2839404126
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3902470619
/workspace/coverage/default/11.sram_ctrl_mem_walk.177746356
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2492604475
/workspace/coverage/default/11.sram_ctrl_partial_access.1702244443
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1685175890
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2719585845
/workspace/coverage/default/11.sram_ctrl_regwen.2261674211
/workspace/coverage/default/11.sram_ctrl_smoke.3358375756
/workspace/coverage/default/11.sram_ctrl_stress_all.1681804694
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.207892970
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4060434657
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2645774502
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1258788815
/workspace/coverage/default/12.sram_ctrl_alert_test.3893730887
/workspace/coverage/default/12.sram_ctrl_bijection.1312664106
/workspace/coverage/default/12.sram_ctrl_executable.1191620611
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1654300065
/workspace/coverage/default/12.sram_ctrl_max_throughput.1584970668
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.312866176
/workspace/coverage/default/12.sram_ctrl_mem_walk.909452018
/workspace/coverage/default/12.sram_ctrl_multiple_keys.4093260147
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1696387169
/workspace/coverage/default/43.sram_ctrl_ram_cfg.320828844
/workspace/coverage/default/43.sram_ctrl_regwen.3705581002
/workspace/coverage/default/43.sram_ctrl_smoke.3966820410
/workspace/coverage/default/43.sram_ctrl_stress_all.616892764
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2792568159
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2075086317
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1263557639
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4217766909
/workspace/coverage/default/44.sram_ctrl_alert_test.2975582813
/workspace/coverage/default/44.sram_ctrl_bijection.695265202
/workspace/coverage/default/44.sram_ctrl_executable.3788071544
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1270271973
/workspace/coverage/default/44.sram_ctrl_max_throughput.1969817763
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2212526963
/workspace/coverage/default/44.sram_ctrl_mem_walk.3925848120
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2833224467
/workspace/coverage/default/44.sram_ctrl_partial_access.2468946202
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3836958821
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2796467556
/workspace/coverage/default/44.sram_ctrl_regwen.3910066452
/workspace/coverage/default/44.sram_ctrl_smoke.3309825184
/workspace/coverage/default/44.sram_ctrl_stress_all.2944994285
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1758336205
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1221604287
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2143471801
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3093060957
/workspace/coverage/default/45.sram_ctrl_alert_test.733970575
/workspace/coverage/default/45.sram_ctrl_bijection.4221010658
/workspace/coverage/default/45.sram_ctrl_executable.3519476026
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2822463912
/workspace/coverage/default/45.sram_ctrl_max_throughput.2688044560
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3467881242
/workspace/coverage/default/45.sram_ctrl_mem_walk.1972304535
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2975159646
/workspace/coverage/default/45.sram_ctrl_partial_access.3169458712
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1572994626
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2696209976
/workspace/coverage/default/45.sram_ctrl_regwen.4003723559
/workspace/coverage/default/45.sram_ctrl_smoke.778790051
/workspace/coverage/default/45.sram_ctrl_stress_all.2167653176
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1587463546
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2074044628
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1118419801
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1107472369
/workspace/coverage/default/46.sram_ctrl_alert_test.3065845809
/workspace/coverage/default/46.sram_ctrl_bijection.766878894
/workspace/coverage/default/46.sram_ctrl_executable.368800084
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3943129222
/workspace/coverage/default/46.sram_ctrl_max_throughput.195539416
/workspace/coverage/default/46.sram_ctrl_mem_walk.195561219
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1426673388
/workspace/coverage/default/46.sram_ctrl_partial_access.3493173387
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1094632413
/workspace/coverage/default/46.sram_ctrl_ram_cfg.833380529
/workspace/coverage/default/46.sram_ctrl_regwen.2831649671
/workspace/coverage/default/46.sram_ctrl_smoke.3425908692
/workspace/coverage/default/46.sram_ctrl_stress_all.3838820118
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2673712319
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2356634701
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1519469637
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3675990833
/workspace/coverage/default/47.sram_ctrl_alert_test.1583684476
/workspace/coverage/default/47.sram_ctrl_bijection.2708179124
/workspace/coverage/default/47.sram_ctrl_executable.1764983424
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2210933129
/workspace/coverage/default/47.sram_ctrl_max_throughput.2553455618
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2251611116
/workspace/coverage/default/47.sram_ctrl_mem_walk.1954153893
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1209808476
/workspace/coverage/default/47.sram_ctrl_partial_access.3657029898
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3197503153
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2622256456
/workspace/coverage/default/47.sram_ctrl_regwen.4235512516
/workspace/coverage/default/47.sram_ctrl_smoke.2660614538
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1434070272
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3918121250
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1535867679
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2364277455
/workspace/coverage/default/48.sram_ctrl_alert_test.3253475399
/workspace/coverage/default/48.sram_ctrl_bijection.3100511579
/workspace/coverage/default/48.sram_ctrl_executable.394518308
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4221259405
/workspace/coverage/default/48.sram_ctrl_max_throughput.2558313918
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2461184406
/workspace/coverage/default/48.sram_ctrl_mem_walk.2846235870
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1053331166
/workspace/coverage/default/48.sram_ctrl_partial_access.632159977
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1570967987
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3457375477
/workspace/coverage/default/48.sram_ctrl_regwen.1309163310
/workspace/coverage/default/48.sram_ctrl_smoke.1685875103
/workspace/coverage/default/48.sram_ctrl_stress_all.3637818564
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2189376782
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2582265175
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2916597592
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2827653180
/workspace/coverage/default/49.sram_ctrl_alert_test.724868172
/workspace/coverage/default/49.sram_ctrl_bijection.805618963
/workspace/coverage/default/49.sram_ctrl_executable.4027645215
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2635949003
/workspace/coverage/default/49.sram_ctrl_max_throughput.1277300724
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.731240834
/workspace/coverage/default/49.sram_ctrl_mem_walk.993940663
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3006044428
/workspace/coverage/default/49.sram_ctrl_partial_access.2214289212
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2292080766
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2399136857
/workspace/coverage/default/49.sram_ctrl_regwen.2323045006
/workspace/coverage/default/49.sram_ctrl_smoke.3995399321
/workspace/coverage/default/49.sram_ctrl_stress_all.2936990552
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2515754934
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1173362072
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2646864297
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3090362511
/workspace/coverage/default/5.sram_ctrl_alert_test.333547270
/workspace/coverage/default/5.sram_ctrl_bijection.551208375
/workspace/coverage/default/5.sram_ctrl_executable.268767709
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1573864551
/workspace/coverage/default/5.sram_ctrl_max_throughput.4209437107
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2881702949
/workspace/coverage/default/5.sram_ctrl_mem_walk.2094960928
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4249246748
/workspace/coverage/default/5.sram_ctrl_partial_access.1417226157
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.949114143
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3591049638
/workspace/coverage/default/5.sram_ctrl_regwen.743895862
/workspace/coverage/default/5.sram_ctrl_smoke.1607902131
/workspace/coverage/default/5.sram_ctrl_stress_all.2025078992
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3730292448
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2581530342
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1912318366
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2534897661
/workspace/coverage/default/6.sram_ctrl_alert_test.1396353360
/workspace/coverage/default/6.sram_ctrl_bijection.1794183142
/workspace/coverage/default/6.sram_ctrl_executable.614332867
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3755957828
/workspace/coverage/default/6.sram_ctrl_max_throughput.4088177447
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4093252734
/workspace/coverage/default/6.sram_ctrl_mem_walk.3777457659
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3328921536
/workspace/coverage/default/6.sram_ctrl_partial_access.3909497882
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.554331975
/workspace/coverage/default/6.sram_ctrl_ram_cfg.822060793
/workspace/coverage/default/6.sram_ctrl_regwen.555643361
/workspace/coverage/default/6.sram_ctrl_smoke.1057998877
/workspace/coverage/default/6.sram_ctrl_stress_all.1330783969
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.44248005
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3479191234
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3837424377
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1457248417
/workspace/coverage/default/7.sram_ctrl_alert_test.517718881
/workspace/coverage/default/7.sram_ctrl_bijection.3912795355
/workspace/coverage/default/7.sram_ctrl_executable.1427154036
/workspace/coverage/default/7.sram_ctrl_lc_escalation.347913781
/workspace/coverage/default/7.sram_ctrl_max_throughput.565606205
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.834189546
/workspace/coverage/default/7.sram_ctrl_mem_walk.3142185801
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3946357371
/workspace/coverage/default/7.sram_ctrl_partial_access.726873623
/workspace/coverage/default/7.sram_ctrl_ram_cfg.508419171
/workspace/coverage/default/7.sram_ctrl_regwen.2967323624
/workspace/coverage/default/7.sram_ctrl_smoke.4113184869
/workspace/coverage/default/7.sram_ctrl_stress_all.367441228
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2213734139
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.396061253
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2853205672
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1496822575
/workspace/coverage/default/8.sram_ctrl_alert_test.3981292689
/workspace/coverage/default/8.sram_ctrl_bijection.471711370
/workspace/coverage/default/8.sram_ctrl_executable.3413584099
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2075698294
/workspace/coverage/default/8.sram_ctrl_max_throughput.856067285
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1709329752
/workspace/coverage/default/8.sram_ctrl_mem_walk.1235156190
/workspace/coverage/default/8.sram_ctrl_multiple_keys.113221122
/workspace/coverage/default/8.sram_ctrl_partial_access.1059951517
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.913666692
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1167758274
/workspace/coverage/default/8.sram_ctrl_regwen.3172940600
/workspace/coverage/default/8.sram_ctrl_smoke.9216031
/workspace/coverage/default/8.sram_ctrl_stress_all.416306391
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2548633023
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2849917213
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3546001420
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1917581491
/workspace/coverage/default/9.sram_ctrl_alert_test.2382842702
/workspace/coverage/default/9.sram_ctrl_bijection.2070338111
/workspace/coverage/default/9.sram_ctrl_executable.4145189254
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1530419
/workspace/coverage/default/9.sram_ctrl_max_throughput.2056979041
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3519965953
/workspace/coverage/default/9.sram_ctrl_mem_walk.4022239682
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2152700640
/workspace/coverage/default/9.sram_ctrl_partial_access.4045569150
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3106997818
/workspace/coverage/default/9.sram_ctrl_ram_cfg.22182999
/workspace/coverage/default/9.sram_ctrl_regwen.2732453974
/workspace/coverage/default/9.sram_ctrl_smoke.168518209
/workspace/coverage/default/9.sram_ctrl_stress_all.2381921986
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.723962600
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3601052836
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.732453820



Total test records in report: 1027
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/2.sram_ctrl_sec_cm.1128889162 Jun 26 05:28:04 PM PDT 24 Jun 26 05:28:11 PM PDT 24 239465463 ps
T2 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1143369234 Jun 26 05:31:48 PM PDT 24 Jun 26 05:31:57 PM PDT 24 1122499114 ps
T3 /workspace/coverage/default/34.sram_ctrl_mem_walk.662392875 Jun 26 05:32:27 PM PDT 24 Jun 26 05:32:35 PM PDT 24 2517077933 ps
T4 /workspace/coverage/default/48.sram_ctrl_multiple_keys.1053331166 Jun 26 05:34:52 PM PDT 24 Jun 26 05:55:10 PM PDT 24 74338983074 ps
T7 /workspace/coverage/default/31.sram_ctrl_ram_cfg.1231352139 Jun 26 05:31:59 PM PDT 24 Jun 26 05:32:01 PM PDT 24 34161019 ps
T8 /workspace/coverage/default/38.sram_ctrl_ram_cfg.1799743093 Jun 26 05:33:05 PM PDT 24 Jun 26 05:33:08 PM PDT 24 51450458 ps
T5 /workspace/coverage/default/47.sram_ctrl_stress_all.3432848298 Jun 26 05:34:51 PM PDT 24 Jun 26 06:08:13 PM PDT 24 54136535141 ps
T9 /workspace/coverage/default/22.sram_ctrl_bijection.4187876630 Jun 26 05:30:53 PM PDT 24 Jun 26 05:31:43 PM PDT 24 2294772721 ps
T10 /workspace/coverage/default/20.sram_ctrl_executable.189610882 Jun 26 05:30:46 PM PDT 24 Jun 26 05:48:43 PM PDT 24 12935665806 ps
T11 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2516873134 Jun 26 05:34:37 PM PDT 24 Jun 26 05:34:42 PM PDT 24 393569887 ps
T30 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2012746522 Jun 26 05:32:09 PM PDT 24 Jun 26 05:34:38 PM PDT 24 309501239 ps
T25 /workspace/coverage/default/48.sram_ctrl_stress_all.3637818564 Jun 26 05:34:54 PM PDT 24 Jun 26 07:03:40 PM PDT 24 52560993479 ps
T31 /workspace/coverage/default/44.sram_ctrl_partial_access.2468946202 Jun 26 05:34:08 PM PDT 24 Jun 26 05:37:10 PM PDT 24 1594775716 ps
T22 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2141650030 Jun 26 05:31:34 PM PDT 24 Jun 26 05:31:38 PM PDT 24 47563647 ps
T23 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2548633023 Jun 26 05:28:50 PM PDT 24 Jun 26 05:30:09 PM PDT 24 4601724237 ps
T24 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1864913396 Jun 26 05:31:20 PM PDT 24 Jun 26 05:37:20 PM PDT 24 4340660097 ps
T47 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.1843954686 Jun 26 05:31:41 PM PDT 24 Jun 26 05:36:57 PM PDT 24 6253852269 ps
T48 /workspace/coverage/default/29.sram_ctrl_mem_walk.2179684899 Jun 26 05:31:41 PM PDT 24 Jun 26 05:31:51 PM PDT 24 275381291 ps
T18 /workspace/coverage/default/10.sram_ctrl_regwen.268966711 Jun 26 05:28:57 PM PDT 24 Jun 26 05:31:22 PM PDT 24 642618488 ps
T12 /workspace/coverage/default/28.sram_ctrl_alert_test.4062249372 Jun 26 05:31:33 PM PDT 24 Jun 26 05:31:34 PM PDT 24 16061991 ps
T59 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1118419801 Jun 26 05:34:18 PM PDT 24 Jun 26 05:34:24 PM PDT 24 206268346 ps
T53 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2074044628 Jun 26 05:34:20 PM PDT 24 Jun 26 05:39:40 PM PDT 24 3343502291 ps
T52 /workspace/coverage/default/10.sram_ctrl_bijection.1580281992 Jun 26 05:28:58 PM PDT 24 Jun 26 05:29:25 PM PDT 24 832462933 ps
T60 /workspace/coverage/default/14.sram_ctrl_multiple_keys.4272818556 Jun 26 05:29:39 PM PDT 24 Jun 26 06:01:03 PM PDT 24 190941724113 ps
T19 /workspace/coverage/default/39.sram_ctrl_regwen.169799318 Jun 26 05:33:14 PM PDT 24 Jun 26 05:45:24 PM PDT 24 17664851937 ps
T92 /workspace/coverage/default/17.sram_ctrl_bijection.2649718745 Jun 26 05:30:16 PM PDT 24 Jun 26 05:31:12 PM PDT 24 3305267329 ps
T156 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1261596431 Jun 26 05:32:34 PM PDT 24 Jun 26 05:32:37 PM PDT 24 43228786 ps
T157 /workspace/coverage/default/11.sram_ctrl_smoke.3358375756 Jun 26 05:29:06 PM PDT 24 Jun 26 05:29:20 PM PDT 24 725328824 ps
T158 /workspace/coverage/default/40.sram_ctrl_mem_walk.4252171029 Jun 26 05:33:33 PM PDT 24 Jun 26 05:33:39 PM PDT 24 155468979 ps
T159 /workspace/coverage/default/11.sram_ctrl_bijection.1288039958 Jun 26 05:29:07 PM PDT 24 Jun 26 05:30:20 PM PDT 24 1078038494 ps
T32 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3861567388 Jun 26 05:29:13 PM PDT 24 Jun 26 05:40:53 PM PDT 24 17614489236 ps
T98 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1922435798 Jun 26 05:28:28 PM PDT 24 Jun 26 05:34:50 PM PDT 24 14655262035 ps
T71 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3599658415 Jun 26 05:30:18 PM PDT 24 Jun 26 05:34:48 PM PDT 24 144683499098 ps
T72 /workspace/coverage/default/10.sram_ctrl_smoke.3666201410 Jun 26 05:28:58 PM PDT 24 Jun 26 05:30:16 PM PDT 24 149775118 ps
T99 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1173362072 Jun 26 05:35:02 PM PDT 24 Jun 26 05:38:43 PM PDT 24 8719079944 ps
T160 /workspace/coverage/default/19.sram_ctrl_max_throughput.1704330668 Jun 26 05:30:39 PM PDT 24 Jun 26 05:31:46 PM PDT 24 1146312071 ps
T41 /workspace/coverage/default/32.sram_ctrl_mem_walk.842306976 Jun 26 05:32:10 PM PDT 24 Jun 26 05:32:21 PM PDT 24 1838952661 ps
T161 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.4027710745 Jun 26 05:30:55 PM PDT 24 Jun 26 05:31:19 PM PDT 24 414956855 ps
T153 /workspace/coverage/default/24.sram_ctrl_multiple_keys.3152678490 Jun 26 05:31:05 PM PDT 24 Jun 26 05:46:57 PM PDT 24 47531814624 ps
T162 /workspace/coverage/default/8.sram_ctrl_max_throughput.856067285 Jun 26 05:28:44 PM PDT 24 Jun 26 05:28:50 PM PDT 24 88766106 ps
T42 /workspace/coverage/default/23.sram_ctrl_mem_walk.1991767135 Jun 26 05:31:01 PM PDT 24 Jun 26 05:31:07 PM PDT 24 370075286 ps
T27 /workspace/coverage/default/10.sram_ctrl_ram_cfg.1827312926 Jun 26 05:29:04 PM PDT 24 Jun 26 05:29:07 PM PDT 24 40205301 ps
T163 /workspace/coverage/default/30.sram_ctrl_smoke.2339813010 Jun 26 05:31:42 PM PDT 24 Jun 26 05:32:03 PM PDT 24 1022179522 ps
T164 /workspace/coverage/default/4.sram_ctrl_max_throughput.1652041222 Jun 26 05:28:15 PM PDT 24 Jun 26 05:30:03 PM PDT 24 133540605 ps
T20 /workspace/coverage/default/20.sram_ctrl_regwen.2883413575 Jun 26 05:30:48 PM PDT 24 Jun 26 05:43:06 PM PDT 24 2202733594 ps
T165 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1708122858 Jun 26 05:32:22 PM PDT 24 Jun 26 05:33:19 PM PDT 24 612138527 ps
T152 /workspace/coverage/default/15.sram_ctrl_bijection.87387557 Jun 26 05:29:55 PM PDT 24 Jun 26 05:30:49 PM PDT 24 3399946299 ps
T79 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.3197261624 Jun 26 05:32:40 PM PDT 24 Jun 26 05:32:47 PM PDT 24 409232220 ps
T6 /workspace/coverage/default/39.sram_ctrl_stress_all.3739697711 Jun 26 05:33:20 PM PDT 24 Jun 26 05:48:36 PM PDT 24 19036910009 ps
T61 /workspace/coverage/default/16.sram_ctrl_regwen.334998477 Jun 26 05:30:05 PM PDT 24 Jun 26 05:38:13 PM PDT 24 16107803442 ps
T166 /workspace/coverage/default/29.sram_ctrl_smoke.2132008410 Jun 26 05:31:34 PM PDT 24 Jun 26 05:31:54 PM PDT 24 1097263077 ps
T100 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.1221604287 Jun 26 05:34:08 PM PDT 24 Jun 26 05:36:28 PM PDT 24 2940658800 ps
T62 /workspace/coverage/default/9.sram_ctrl_lc_escalation.1530419 Jun 26 05:28:52 PM PDT 24 Jun 26 05:29:03 PM PDT 24 2103250679 ps
T154 /workspace/coverage/default/4.sram_ctrl_smoke.3592367197 Jun 26 05:28:14 PM PDT 24 Jun 26 05:28:21 PM PDT 24 104023416 ps
T101 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.613317407 Jun 26 05:31:18 PM PDT 24 Jun 26 05:40:40 PM PDT 24 91648697560 ps
T167 /workspace/coverage/default/17.sram_ctrl_max_throughput.2788565596 Jun 26 05:30:18 PM PDT 24 Jun 26 05:31:19 PM PDT 24 426654752 ps
T80 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3972849453 Jun 26 05:30:55 PM PDT 24 Jun 26 05:31:02 PM PDT 24 347796237 ps
T33 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.332907041 Jun 26 05:31:24 PM PDT 24 Jun 26 05:57:25 PM PDT 24 7528429615 ps
T147 /workspace/coverage/default/27.sram_ctrl_stress_all.1845046250 Jun 26 05:31:24 PM PDT 24 Jun 26 06:14:17 PM PDT 24 31835066543 ps
T21 /workspace/coverage/default/42.sram_ctrl_lc_escalation.107470000 Jun 26 05:33:45 PM PDT 24 Jun 26 05:33:49 PM PDT 24 105404114 ps
T15 /workspace/coverage/default/18.sram_ctrl_alert_test.1981971534 Jun 26 05:30:32 PM PDT 24 Jun 26 05:30:34 PM PDT 24 17503472 ps
T168 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3591049638 Jun 26 05:28:23 PM PDT 24 Jun 26 05:28:25 PM PDT 24 56150339 ps
T16 /workspace/coverage/default/4.sram_ctrl_sec_cm.42165816 Jun 26 05:28:12 PM PDT 24 Jun 26 05:28:15 PM PDT 24 315204974 ps
T169 /workspace/coverage/default/37.sram_ctrl_smoke.2658984289 Jun 26 05:32:47 PM PDT 24 Jun 26 05:33:05 PM PDT 24 3180961619 ps
T151 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3897513933 Jun 26 05:33:10 PM PDT 24 Jun 26 05:33:14 PM PDT 24 280774863 ps
T170 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3682600176 Jun 26 05:30:41 PM PDT 24 Jun 26 05:30:43 PM PDT 24 122110057 ps
T102 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1820330608 Jun 26 05:31:42 PM PDT 24 Jun 26 05:36:57 PM PDT 24 11634756760 ps
T37 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.2313849756 Jun 26 05:28:14 PM PDT 24 Jun 26 05:28:21 PM PDT 24 64225755 ps
T171 /workspace/coverage/default/43.sram_ctrl_max_throughput.3181585694 Jun 26 05:34:01 PM PDT 24 Jun 26 05:34:09 PM PDT 24 198038156 ps
T103 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.554331975 Jun 26 05:28:23 PM PDT 24 Jun 26 05:32:56 PM PDT 24 4250672553 ps
T34 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.2440252584 Jun 26 05:32:38 PM PDT 24 Jun 26 05:40:10 PM PDT 24 10244547297 ps
T40 /workspace/coverage/default/22.sram_ctrl_mem_walk.183566196 Jun 26 05:31:03 PM PDT 24 Jun 26 05:31:11 PM PDT 24 332066106 ps
T172 /workspace/coverage/default/34.sram_ctrl_max_throughput.2714358366 Jun 26 05:32:15 PM PDT 24 Jun 26 05:33:10 PM PDT 24 1041383380 ps
T173 /workspace/coverage/default/13.sram_ctrl_bijection.4203062578 Jun 26 05:29:26 PM PDT 24 Jun 26 05:30:11 PM PDT 24 1336969719 ps
T174 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.504597538 Jun 26 05:28:03 PM PDT 24 Jun 26 05:34:17 PM PDT 24 30546587272 ps
T175 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2696209976 Jun 26 05:34:27 PM PDT 24 Jun 26 05:34:29 PM PDT 24 29471517 ps
T43 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.824260574 Jun 26 05:31:34 PM PDT 24 Jun 26 05:31:40 PM PDT 24 102088520 ps
T176 /workspace/coverage/default/47.sram_ctrl_executable.1764983424 Jun 26 05:34:49 PM PDT 24 Jun 26 05:35:59 PM PDT 24 1381668481 ps
T26 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2626387630 Jun 26 05:30:11 PM PDT 24 Jun 26 05:31:50 PM PDT 24 2919615488 ps
T177 /workspace/coverage/default/33.sram_ctrl_mem_walk.67904495 Jun 26 05:32:21 PM PDT 24 Jun 26 05:32:30 PM PDT 24 548806002 ps
T178 /workspace/coverage/default/46.sram_ctrl_ram_cfg.833380529 Jun 26 05:34:40 PM PDT 24 Jun 26 05:34:42 PM PDT 24 207900412 ps
T179 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3197503153 Jun 26 05:34:41 PM PDT 24 Jun 26 05:37:06 PM PDT 24 2605771610 ps
T180 /workspace/coverage/default/49.sram_ctrl_bijection.805618963 Jun 26 05:35:02 PM PDT 24 Jun 26 05:35:32 PM PDT 24 3490226175 ps
T181 /workspace/coverage/default/47.sram_ctrl_mem_walk.1954153893 Jun 26 05:34:51 PM PDT 24 Jun 26 05:34:57 PM PDT 24 281289490 ps
T81 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1620986331 Jun 26 05:32:58 PM PDT 24 Jun 26 05:33:02 PM PDT 24 329845067 ps
T13 /workspace/coverage/default/35.sram_ctrl_alert_test.4222762065 Jun 26 05:32:36 PM PDT 24 Jun 26 05:32:38 PM PDT 24 15770787 ps
T182 /workspace/coverage/default/1.sram_ctrl_multiple_keys.2403845781 Jun 26 05:27:56 PM PDT 24 Jun 26 05:30:16 PM PDT 24 5972019582 ps
T183 /workspace/coverage/default/22.sram_ctrl_ram_cfg.1215657955 Jun 26 05:31:04 PM PDT 24 Jun 26 05:31:06 PM PDT 24 73312508 ps
T184 /workspace/coverage/default/6.sram_ctrl_ram_cfg.822060793 Jun 26 05:28:30 PM PDT 24 Jun 26 05:28:33 PM PDT 24 29097509 ps
T82 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.3026672555 Jun 26 05:34:01 PM PDT 24 Jun 26 05:40:29 PM PDT 24 5426422744 ps
T185 /workspace/coverage/default/34.sram_ctrl_partial_access.1959835611 Jun 26 05:32:16 PM PDT 24 Jun 26 05:32:21 PM PDT 24 481299168 ps
T14 /workspace/coverage/default/34.sram_ctrl_alert_test.915211201 Jun 26 05:32:27 PM PDT 24 Jun 26 05:32:29 PM PDT 24 19698756 ps
T186 /workspace/coverage/default/41.sram_ctrl_executable.149947861 Jun 26 05:33:37 PM PDT 24 Jun 26 05:53:31 PM PDT 24 8343343799 ps
T150 /workspace/coverage/default/25.sram_ctrl_executable.2327538502 Jun 26 05:31:10 PM PDT 24 Jun 26 05:52:51 PM PDT 24 63725673500 ps
T187 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.125838690 Jun 26 05:32:45 PM PDT 24 Jun 26 05:38:06 PM PDT 24 49502133042 ps
T188 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3362690042 Jun 26 05:29:40 PM PDT 24 Jun 26 05:32:59 PM PDT 24 15869866484 ps
T144 /workspace/coverage/default/33.sram_ctrl_executable.2968930688 Jun 26 05:32:15 PM PDT 24 Jun 26 05:49:02 PM PDT 24 5414772800 ps
T189 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.1486342042 Jun 26 05:30:55 PM PDT 24 Jun 26 05:35:47 PM PDT 24 6002006439 ps
T155 /workspace/coverage/default/26.sram_ctrl_bijection.3377560777 Jun 26 05:31:19 PM PDT 24 Jun 26 05:31:55 PM PDT 24 6087985458 ps
T56 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2673712319 Jun 26 05:34:41 PM PDT 24 Jun 26 05:36:25 PM PDT 24 3068657871 ps
T17 /workspace/coverage/default/1.sram_ctrl_sec_cm.122306044 Jun 26 05:27:54 PM PDT 24 Jun 26 05:27:59 PM PDT 24 462918033 ps
T190 /workspace/coverage/default/38.sram_ctrl_regwen.1228472688 Jun 26 05:33:04 PM PDT 24 Jun 26 05:36:02 PM PDT 24 4160003329 ps
T191 /workspace/coverage/default/2.sram_ctrl_partial_access.3161786748 Jun 26 05:27:57 PM PDT 24 Jun 26 05:28:09 PM PDT 24 484320090 ps
T192 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3171762434 Jun 26 05:32:27 PM PDT 24 Jun 26 05:32:29 PM PDT 24 27937091 ps
T193 /workspace/coverage/default/19.sram_ctrl_executable.961070020 Jun 26 05:30:40 PM PDT 24 Jun 26 05:34:02 PM PDT 24 3916841195 ps
T194 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2517033641 Jun 26 05:33:48 PM PDT 24 Jun 26 05:34:13 PM PDT 24 1156162903 ps
T195 /workspace/coverage/default/14.sram_ctrl_ram_cfg.1487050274 Jun 26 05:29:46 PM PDT 24 Jun 26 05:29:48 PM PDT 24 29833901 ps
T196 /workspace/coverage/default/48.sram_ctrl_max_throughput.2558313918 Jun 26 05:34:57 PM PDT 24 Jun 26 05:35:09 PM PDT 24 243365598 ps
T57 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2526008495 Jun 26 05:32:39 PM PDT 24 Jun 26 05:32:45 PM PDT 24 176861430 ps
T123 /workspace/coverage/default/48.sram_ctrl_partial_access.632159977 Jun 26 05:34:54 PM PDT 24 Jun 26 05:35:12 PM PDT 24 593694949 ps
T124 /workspace/coverage/default/48.sram_ctrl_bijection.3100511579 Jun 26 05:34:52 PM PDT 24 Jun 26 05:35:32 PM PDT 24 7125024516 ps
T125 /workspace/coverage/default/42.sram_ctrl_bijection.3743987566 Jun 26 05:33:44 PM PDT 24 Jun 26 05:34:27 PM PDT 24 623736136 ps
T126 /workspace/coverage/default/14.sram_ctrl_alert_test.1497703388 Jun 26 05:29:49 PM PDT 24 Jun 26 05:29:51 PM PDT 24 19028341 ps
T127 /workspace/coverage/default/41.sram_ctrl_ram_cfg.3705209924 Jun 26 05:33:40 PM PDT 24 Jun 26 05:33:41 PM PDT 24 78993800 ps
T128 /workspace/coverage/default/43.sram_ctrl_alert_test.816956446 Jun 26 05:34:10 PM PDT 24 Jun 26 05:34:12 PM PDT 24 12415179 ps
T129 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.1995822996 Jun 26 05:30:18 PM PDT 24 Jun 26 05:49:29 PM PDT 24 10198754478 ps
T130 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3093060957 Jun 26 05:34:19 PM PDT 24 Jun 26 05:35:26 PM PDT 24 6235755420 ps
T131 /workspace/coverage/default/49.sram_ctrl_executable.4027645215 Jun 26 05:35:12 PM PDT 24 Jun 26 05:41:19 PM PDT 24 7818217561 ps
T197 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2143471801 Jun 26 05:34:08 PM PDT 24 Jun 26 05:35:21 PM PDT 24 605786983 ps
T198 /workspace/coverage/default/8.sram_ctrl_regwen.3172940600 Jun 26 05:28:44 PM PDT 24 Jun 26 05:41:08 PM PDT 24 38307111368 ps
T132 /workspace/coverage/default/19.sram_ctrl_stress_all.647843888 Jun 26 05:30:42 PM PDT 24 Jun 26 06:11:42 PM PDT 24 238059155848 ps
T199 /workspace/coverage/default/45.sram_ctrl_max_throughput.2688044560 Jun 26 05:34:18 PM PDT 24 Jun 26 05:34:40 PM PDT 24 279640592 ps
T200 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.933793429 Jun 26 05:28:14 PM PDT 24 Jun 26 05:30:15 PM PDT 24 622140062 ps
T201 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2020482169 Jun 26 05:33:29 PM PDT 24 Jun 26 05:33:31 PM PDT 24 91728919 ps
T202 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1258788815 Jun 26 05:29:25 PM PDT 24 Jun 26 05:42:41 PM PDT 24 8954600100 ps
T203 /workspace/coverage/default/18.sram_ctrl_smoke.3725832249 Jun 26 05:30:27 PM PDT 24 Jun 26 05:31:40 PM PDT 24 1076721148 ps
T204 /workspace/coverage/default/12.sram_ctrl_max_throughput.1584970668 Jun 26 05:29:18 PM PDT 24 Jun 26 05:29:37 PM PDT 24 77951984 ps
T205 /workspace/coverage/default/19.sram_ctrl_regwen.3747517330 Jun 26 05:30:39 PM PDT 24 Jun 26 05:35:09 PM PDT 24 4120575350 ps
T206 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.732453820 Jun 26 05:28:50 PM PDT 24 Jun 26 05:29:31 PM PDT 24 330017073 ps
T148 /workspace/coverage/default/27.sram_ctrl_executable.915989177 Jun 26 05:31:18 PM PDT 24 Jun 26 05:39:13 PM PDT 24 38275546214 ps
T207 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.743866989 Jun 26 05:33:36 PM PDT 24 Jun 26 05:34:22 PM PDT 24 442231212 ps
T149 /workspace/coverage/default/23.sram_ctrl_executable.2118897941 Jun 26 05:31:03 PM PDT 24 Jun 26 05:39:58 PM PDT 24 1833629697 ps
T58 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3405029928 Jun 26 05:31:35 PM PDT 24 Jun 26 05:31:44 PM PDT 24 810861641 ps
T208 /workspace/coverage/default/15.sram_ctrl_multiple_keys.3011730316 Jun 26 05:29:54 PM PDT 24 Jun 26 05:42:26 PM PDT 24 16504127481 ps
T209 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.1457248417 Jun 26 05:28:34 PM PDT 24 Jun 26 05:38:42 PM PDT 24 5510138110 ps
T210 /workspace/coverage/default/18.sram_ctrl_multiple_keys.2351280659 Jun 26 05:30:25 PM PDT 24 Jun 26 05:55:22 PM PDT 24 51273764690 ps
T211 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.1150553963 Jun 26 05:31:09 PM PDT 24 Jun 26 05:39:03 PM PDT 24 14301507576 ps
T145 /workspace/coverage/default/15.sram_ctrl_stress_all.1729063886 Jun 26 05:30:02 PM PDT 24 Jun 26 06:38:22 PM PDT 24 221462847073 ps
T133 /workspace/coverage/default/19.sram_ctrl_lc_escalation.1136707356 Jun 26 05:30:38 PM PDT 24 Jun 26 05:30:45 PM PDT 24 479503226 ps
T212 /workspace/coverage/default/22.sram_ctrl_lc_escalation.2839761609 Jun 26 05:30:56 PM PDT 24 Jun 26 05:31:04 PM PDT 24 2329913470 ps
T213 /workspace/coverage/default/31.sram_ctrl_max_throughput.3686755325 Jun 26 05:31:57 PM PDT 24 Jun 26 05:34:19 PM PDT 24 535050803 ps
T214 /workspace/coverage/default/29.sram_ctrl_stress_all.4278015084 Jun 26 05:31:42 PM PDT 24 Jun 26 06:17:17 PM PDT 24 24151009873 ps
T215 /workspace/coverage/default/29.sram_ctrl_lc_escalation.316391216 Jun 26 05:31:33 PM PDT 24 Jun 26 05:31:42 PM PDT 24 2127031781 ps
T216 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2162512689 Jun 26 05:30:04 PM PDT 24 Jun 26 05:39:20 PM PDT 24 98524968546 ps
T217 /workspace/coverage/default/24.sram_ctrl_alert_test.3775277230 Jun 26 05:31:11 PM PDT 24 Jun 26 05:31:13 PM PDT 24 41669448 ps
T218 /workspace/coverage/default/7.sram_ctrl_partial_access.726873623 Jun 26 05:28:29 PM PDT 24 Jun 26 05:29:11 PM PDT 24 553573556 ps
T219 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1923728117 Jun 26 05:31:04 PM PDT 24 Jun 26 05:36:10 PM PDT 24 7081503536 ps
T220 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2493645578 Jun 26 05:33:08 PM PDT 24 Jun 26 05:33:36 PM PDT 24 563817056 ps
T221 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2212526963 Jun 26 05:34:11 PM PDT 24 Jun 26 05:34:16 PM PDT 24 346564910 ps
T222 /workspace/coverage/default/22.sram_ctrl_max_throughput.84533655 Jun 26 05:30:54 PM PDT 24 Jun 26 05:31:42 PM PDT 24 122678481 ps
T223 /workspace/coverage/default/4.sram_ctrl_executable.904358076 Jun 26 05:28:16 PM PDT 24 Jun 26 05:38:14 PM PDT 24 12645370396 ps
T224 /workspace/coverage/default/15.sram_ctrl_partial_access.2411929225 Jun 26 05:29:55 PM PDT 24 Jun 26 05:30:08 PM PDT 24 1382300435 ps
T225 /workspace/coverage/default/46.sram_ctrl_multiple_keys.1426673388 Jun 26 05:34:28 PM PDT 24 Jun 26 05:58:13 PM PDT 24 11845166537 ps
T226 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.277360626 Jun 26 05:30:54 PM PDT 24 Jun 26 05:30:59 PM PDT 24 198336296 ps
T227 /workspace/coverage/default/31.sram_ctrl_smoke.2296109473 Jun 26 05:31:51 PM PDT 24 Jun 26 05:32:09 PM PDT 24 3515852352 ps
T228 /workspace/coverage/default/31.sram_ctrl_mem_walk.2148484392 Jun 26 05:31:59 PM PDT 24 Jun 26 05:32:05 PM PDT 24 73746447 ps
T229 /workspace/coverage/default/20.sram_ctrl_bijection.2968807425 Jun 26 05:30:46 PM PDT 24 Jun 26 05:31:22 PM PDT 24 1263311997 ps
T230 /workspace/coverage/default/12.sram_ctrl_mem_walk.909452018 Jun 26 05:29:32 PM PDT 24 Jun 26 05:29:38 PM PDT 24 77650555 ps
T231 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1570967987 Jun 26 05:34:54 PM PDT 24 Jun 26 05:40:44 PM PDT 24 13568944414 ps
T232 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1841963089 Jun 26 05:29:49 PM PDT 24 Jun 26 05:42:25 PM PDT 24 13421406848 ps
T233 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1472463955 Jun 26 05:32:48 PM PDT 24 Jun 26 05:35:18 PM PDT 24 8019922034 ps
T234 /workspace/coverage/default/24.sram_ctrl_executable.1052819662 Jun 26 05:31:09 PM PDT 24 Jun 26 05:34:03 PM PDT 24 6616815625 ps
T235 /workspace/coverage/default/26.sram_ctrl_max_throughput.1213109128 Jun 26 05:31:17 PM PDT 24 Jun 26 05:31:38 PM PDT 24 79239664 ps
T236 /workspace/coverage/default/15.sram_ctrl_smoke.285123476 Jun 26 05:29:51 PM PDT 24 Jun 26 05:29:54 PM PDT 24 46361456 ps
T237 /workspace/coverage/default/23.sram_ctrl_lc_escalation.744297576 Jun 26 05:31:02 PM PDT 24 Jun 26 05:31:10 PM PDT 24 448918151 ps
T238 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.1170255826 Jun 26 05:31:34 PM PDT 24 Jun 26 05:34:38 PM PDT 24 22957889164 ps
T239 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1496822575 Jun 26 05:28:43 PM PDT 24 Jun 26 05:30:27 PM PDT 24 629709757 ps
T240 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.4217766909 Jun 26 05:34:09 PM PDT 24 Jun 26 05:50:44 PM PDT 24 7238935516 ps
T241 /workspace/coverage/default/11.sram_ctrl_max_throughput.2839404126 Jun 26 05:29:11 PM PDT 24 Jun 26 05:30:22 PM PDT 24 399754969 ps
T39 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2053190784 Jun 26 05:30:49 PM PDT 24 Jun 26 05:33:26 PM PDT 24 3605060012 ps
T35 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2243615019 Jun 26 05:28:06 PM PDT 24 Jun 26 05:29:40 PM PDT 24 1791380323 ps
T242 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.1168225565 Jun 26 05:31:17 PM PDT 24 Jun 26 05:36:29 PM PDT 24 12634155754 ps
T243 /workspace/coverage/default/8.sram_ctrl_multiple_keys.113221122 Jun 26 05:28:43 PM PDT 24 Jun 26 05:46:40 PM PDT 24 24444022699 ps
T244 /workspace/coverage/default/18.sram_ctrl_lc_escalation.2808088180 Jun 26 05:30:25 PM PDT 24 Jun 26 05:30:36 PM PDT 24 3840367109 ps
T146 /workspace/coverage/default/41.sram_ctrl_stress_all.1272588380 Jun 26 05:33:44 PM PDT 24 Jun 26 06:44:44 PM PDT 24 53314972163 ps
T44 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1758336205 Jun 26 05:34:11 PM PDT 24 Jun 26 05:34:57 PM PDT 24 1561110603 ps
T245 /workspace/coverage/default/23.sram_ctrl_ram_cfg.719592518 Jun 26 05:31:03 PM PDT 24 Jun 26 05:31:06 PM PDT 24 75971249 ps
T246 /workspace/coverage/default/49.sram_ctrl_smoke.3995399321 Jun 26 05:34:59 PM PDT 24 Jun 26 05:36:46 PM PDT 24 1309883339 ps
T247 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3116809887 Jun 26 05:28:13 PM PDT 24 Jun 26 05:28:17 PM PDT 24 45651304 ps
T248 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2849917213 Jun 26 05:28:45 PM PDT 24 Jun 26 05:32:58 PM PDT 24 16194151255 ps
T249 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.54209727 Jun 26 05:30:47 PM PDT 24 Jun 26 05:36:15 PM PDT 24 5646419655 ps
T250 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1685175890 Jun 26 05:29:16 PM PDT 24 Jun 26 05:31:24 PM PDT 24 2762763873 ps
T251 /workspace/coverage/default/4.sram_ctrl_alert_test.1075809757 Jun 26 05:28:14 PM PDT 24 Jun 26 05:28:18 PM PDT 24 11384219 ps
T252 /workspace/coverage/default/31.sram_ctrl_stress_all.3933986851 Jun 26 05:32:00 PM PDT 24 Jun 26 06:39:26 PM PDT 24 57248148585 ps
T45 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3284502204 Jun 26 05:33:21 PM PDT 24 Jun 26 05:33:25 PM PDT 24 207891232 ps
T253 /workspace/coverage/default/48.sram_ctrl_lc_escalation.4221259405 Jun 26 05:34:55 PM PDT 24 Jun 26 05:35:01 PM PDT 24 551249234 ps
T254 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.1989241078 Jun 26 05:33:14 PM PDT 24 Jun 26 05:36:24 PM PDT 24 2003564752 ps
T255 /workspace/coverage/default/15.sram_ctrl_executable.1399628606 Jun 26 05:29:56 PM PDT 24 Jun 26 05:38:43 PM PDT 24 2079322116 ps
T256 /workspace/coverage/default/21.sram_ctrl_alert_test.1528928851 Jun 26 05:30:53 PM PDT 24 Jun 26 05:30:54 PM PDT 24 14046679 ps
T257 /workspace/coverage/default/5.sram_ctrl_regwen.743895862 Jun 26 05:28:22 PM PDT 24 Jun 26 05:51:10 PM PDT 24 109978471994 ps
T258 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1519469637 Jun 26 05:34:35 PM PDT 24 Jun 26 05:36:28 PM PDT 24 163466084 ps
T259 /workspace/coverage/default/32.sram_ctrl_stress_all.1937299510 Jun 26 05:32:08 PM PDT 24 Jun 26 06:29:53 PM PDT 24 171289019636 ps
T260 /workspace/coverage/default/14.sram_ctrl_regwen.1964886013 Jun 26 05:29:47 PM PDT 24 Jun 26 05:43:49 PM PDT 24 5239044678 ps
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T262 /workspace/coverage/default/42.sram_ctrl_max_throughput.1413505990 Jun 26 05:33:45 PM PDT 24 Jun 26 05:34:11 PM PDT 24 80772152 ps
T263 /workspace/coverage/default/18.sram_ctrl_ram_cfg.1583660881 Jun 26 05:30:33 PM PDT 24 Jun 26 05:30:35 PM PDT 24 36746763 ps
T264 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2075086317 Jun 26 05:33:53 PM PDT 24 Jun 26 05:39:55 PM PDT 24 3651848974 ps
T265 /workspace/coverage/default/42.sram_ctrl_stress_all.2337367795 Jun 26 05:33:54 PM PDT 24 Jun 26 05:36:43 PM PDT 24 7292768159 ps
T266 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2292080766 Jun 26 05:35:01 PM PDT 24 Jun 26 05:44:27 PM PDT 24 20942256956 ps
T267 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.913666692 Jun 26 05:28:43 PM PDT 24 Jun 26 05:34:44 PM PDT 24 217289315807 ps
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T281 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3675990833 Jun 26 05:34:43 PM PDT 24 Jun 26 05:49:44 PM PDT 24 6494149854 ps
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T291 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.2827653180 Jun 26 05:35:02 PM PDT 24 Jun 26 05:49:54 PM PDT 24 3124517719 ps
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T304 /workspace/coverage/default/6.sram_ctrl_bijection.1794183142 Jun 26 05:28:26 PM PDT 24 Jun 26 05:29:41 PM PDT 24 6641565548 ps
T305 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2719585845 Jun 26 05:29:15 PM PDT 24 Jun 26 05:29:18 PM PDT 24 48434552 ps
T306 /workspace/coverage/default/32.sram_ctrl_multiple_keys.738392154 Jun 26 05:31:59 PM PDT 24 Jun 26 05:46:16 PM PDT 24 9960812297 ps
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T308 /workspace/coverage/default/14.sram_ctrl_lc_escalation.1676977631 Jun 26 05:29:49 PM PDT 24 Jun 26 05:29:57 PM PDT 24 520674987 ps
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T310 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1640178774 Jun 26 05:29:40 PM PDT 24 Jun 26 05:34:27 PM PDT 24 11310609434 ps
T311 /workspace/coverage/default/25.sram_ctrl_stress_all.1169425662 Jun 26 05:31:48 PM PDT 24 Jun 26 06:34:48 PM PDT 24 42020112612 ps
T312 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.312866176 Jun 26 05:29:25 PM PDT 24 Jun 26 05:29:29 PM PDT 24 109385309 ps
T313 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.170664798 Jun 26 05:32:26 PM PDT 24 Jun 26 05:35:28 PM PDT 24 1810527164 ps
T314 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3106997818 Jun 26 05:28:50 PM PDT 24 Jun 26 05:38:40 PM PDT 24 65974521369 ps
T315 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.2755005930 Jun 26 05:32:07 PM PDT 24 Jun 26 05:32:15 PM PDT 24 293463380 ps
T316 /workspace/coverage/default/21.sram_ctrl_max_throughput.1285515724 Jun 26 05:30:55 PM PDT 24 Jun 26 05:31:01 PM PDT 24 79146894 ps
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