Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.91	99.37	96.46	100.00	98.08	98.78	99.71	92.97

Total tests in report: 913

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
66.63	66.63	84.29	84.29	74.47	74.47	86.30	86.30	29.49	29.49	85.47	85.47	70.33	70.33	36.04	36.04	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2207702743
76.96	10.34	88.65	4.37	79.63	5.16	87.44	1.14	56.41	26.92	89.35	3.88	80.44	10.12	56.82	20.77	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.449056471
83.68	6.72	95.37	6.72	88.65	9.02	89.27	1.83	66.03	9.62	94.75	5.40	90.08	9.63	61.61	4.80	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1481015753
86.25	2.57	96.17	0.80	89.59	0.94	89.27	0.00	73.72	7.69	95.49	0.74	92.10	2.02	67.39	5.78	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2859333564
88.05	1.81	97.31	1.14	91.33	1.74	89.27	0.00	82.05	8.33	96.64	1.15	92.39	0.29	67.39	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3365835413
89.69	1.63	97.44	0.13	92.01	0.68	97.03	7.76	82.05	0.00	96.93	0.30	92.39	0.00	69.96	2.56	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1242951239
90.97	1.29	97.52	0.07	93.28	1.26	97.72	0.68	82.05	0.00	97.04	0.11	92.39	0.00	76.83	6.87	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3631000596
92.02	1.05	97.87	0.35	93.60	0.33	97.72	0.00	85.26	3.21	97.34	0.30	93.26	0.87	79.12	2.29	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2117024980
93.02	1.00	98.38	0.50	94.11	0.51	97.72	0.00	89.10	3.85	97.74	0.41	94.70	1.45	79.39	0.27	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2960737065
93.74	0.72	98.62	0.24	94.26	0.15	97.72	0.00	91.03	1.92	97.89	0.15	95.28	0.58	81.35	1.96	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.274349230
94.16	0.42	98.62	0.00	94.36	0.10	98.17	0.46	91.03	0.00	97.89	0.00	97.01	1.73	82.01	0.65	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3609593248
94.44	0.28	98.62	0.00	94.39	0.03	99.77	1.60	91.03	0.00	97.89	0.00	97.11	0.10	82.28	0.27	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.751311186
94.71	0.27	98.71	0.09	94.49	0.10	99.77	0.00	92.31	1.28	98.00	0.11	97.40	0.29	82.28	0.00	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2707413857
94.96	0.25	98.71	0.00	95.40	0.91	99.77	0.00	92.31	0.00	98.00	0.00	97.50	0.10	83.04	0.76	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2166993504
95.21	0.25	98.77	0.06	95.42	0.03	99.77	0.00	92.95	0.64	98.08	0.07	97.59	0.10	83.91	0.87	/workspace/coverage/default/15.sysrst_ctrl_stress_all.2041813731
95.45	0.24	98.84	0.07	95.48	0.05	99.77	0.00	94.23	1.28	98.15	0.07	97.78	0.19	83.91	0.00	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.270621015
95.66	0.21	98.86	0.02	95.48	0.00	99.77	0.00	94.23	0.00	98.15	0.00	97.78	0.00	85.33	1.42	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2710766155
95.83	0.18	98.90	0.04	95.80	0.33	99.77	0.00	94.87	0.64	98.19	0.04	97.98	0.19	85.33	0.00	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2561955449
96.01	0.17	98.90	0.00	95.80	0.00	99.77	0.00	94.87	0.00	98.19	0.00	98.27	0.29	86.26	0.93	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2369215715
96.17	0.16	98.96	0.06	95.80	0.00	99.77	0.00	95.51	0.64	98.23	0.04	98.27	0.00	86.64	0.38	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.514436441
96.32	0.16	98.99	0.04	96.06	0.25	99.77	0.00	95.51	0.00	98.30	0.07	98.94	0.67	86.70	0.05	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.581585690
96.48	0.16	98.99	0.00	96.06	0.00	99.77	0.00	95.51	0.00	98.34	0.04	99.23	0.29	87.46	0.76	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2049319328
96.61	0.13	99.05	0.06	96.08	0.03	99.77	0.00	96.15	0.64	98.41	0.07	99.33	0.10	87.46	0.00	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3747423544
96.73	0.13	99.10	0.06	96.11	0.03	99.77	0.00	96.79	0.64	98.48	0.07	99.42	0.10	87.46	0.00	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.587128241
96.86	0.13	99.12	0.02	96.11	0.00	99.77	0.00	96.79	0.00	98.48	0.00	99.42	0.00	88.33	0.87	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2378147701
96.98	0.12	99.16	0.04	96.13	0.03	99.77	0.00	97.44	0.64	98.52	0.04	99.52	0.10	88.33	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.4000381227
97.10	0.12	99.20	0.04	96.16	0.03	99.77	0.00	98.08	0.64	98.56	0.04	99.61	0.10	88.33	0.00	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2300794110
97.19	0.09	99.20	0.00	96.16	0.00	99.77	0.00	98.08	0.00	98.56	0.00	99.61	0.00	88.93	0.60	/workspace/coverage/default/5.sysrst_ctrl_stress_all.1191030451
97.25	0.06	99.20	0.00	96.16	0.00	99.77	0.00	98.08	0.00	98.56	0.00	99.61	0.00	89.37	0.44	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.4294800238
97.31	0.06	99.25	0.06	96.23	0.08	100.00	0.23	98.08	0.00	98.60	0.04	99.61	0.00	89.37	0.00	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1225146296
97.36	0.05	99.25	0.00	96.23	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.61	0.00	89.75	0.38	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.587011266
97.41	0.05	99.25	0.00	96.23	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.61	0.00	90.08	0.33	/workspace/coverage/default/33.sysrst_ctrl_stress_all.2147950178
97.45	0.05	99.25	0.00	96.23	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.61	0.00	90.40	0.33	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.115975299
97.50	0.04	99.25	0.00	96.23	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.71	0.10	90.62	0.22	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3157584849
97.54	0.04	99.25	0.00	96.23	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.71	0.00	90.89	0.27	/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2971788476
97.57	0.03	99.25	0.00	96.23	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.71	0.00	91.11	0.22	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.507312265
97.60	0.03	99.27	0.02	96.26	0.03	100.00	0.00	98.08	0.00	98.60	0.00	99.71	0.00	91.28	0.16	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1825685917
97.62	0.02	99.27	0.00	96.26	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.71	0.00	91.44	0.16	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2553354852
97.65	0.02	99.27	0.00	96.26	0.00	100.00	0.00	98.08	0.00	98.60	0.00	99.71	0.00	91.60	0.16	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.104600130
97.66	0.02	99.31	0.04	96.26	0.00	100.00	0.00	98.08	0.00	98.67	0.07	99.71	0.00	91.60	0.00	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.137194763
97.68	0.02	99.31	0.00	96.26	0.00	100.00	0.00	98.08	0.00	98.67	0.00	99.71	0.00	91.71	0.11	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.267709996
97.69	0.02	99.31	0.00	96.26	0.00	100.00	0.00	98.08	0.00	98.67	0.00	99.71	0.00	91.82	0.11	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.4227163253
97.71	0.02	99.31	0.00	96.26	0.00	100.00	0.00	98.08	0.00	98.67	0.00	99.71	0.00	91.93	0.11	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1422875574
97.72	0.02	99.31	0.00	96.26	0.00	100.00	0.00	98.08	0.00	98.67	0.00	99.71	0.00	92.04	0.11	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3195723729
97.74	0.01	99.31	0.00	96.36	0.10	100.00	0.00	98.08	0.00	98.67	0.00	99.71	0.00	92.04	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2026201293
97.75	0.01	99.33	0.02	96.36	0.00	100.00	0.00	98.08	0.00	98.71	0.04	99.71	0.00	92.04	0.00	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2769086408
97.75	0.01	99.35	0.02	96.36	0.00	100.00	0.00	98.08	0.00	98.74	0.04	99.71	0.00	92.04	0.00	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2331938058
97.76	0.01	99.37	0.02	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.04	99.71	0.00	92.04	0.00	/workspace/coverage/default/45.sysrst_ctrl_stress_all.4135028202
97.77	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.09	0.05	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3346892785
97.78	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.15	0.05	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1433943230
97.79	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.20	0.05	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.1082836818
97.79	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.26	0.05	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.834752929
97.80	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.31	0.05	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.668777673
97.81	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.37	0.05	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1996686339
97.82	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.42	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.4135250583
97.82	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.48	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2014480021
97.83	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.53	0.05	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.3155439862
97.84	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.58	0.05	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1278906587
97.85	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.64	0.05	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2346515322
97.86	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.69	0.05	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.316715094
97.86	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.75	0.05	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2074763341
97.87	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.80	0.05	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2510267611
97.88	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.86	0.05	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2181310302
97.89	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.91	0.05	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1917960018
97.89	0.01	99.37	0.00	96.36	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.97	0.05	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.45350345
97.90	0.01	99.37	0.00	96.41	0.05	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.97	0.00	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3437454991
97.91	0.01	99.37	0.00	96.44	0.03	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.97	0.00	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3844734590

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3164389247
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.211609578
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.361000516
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2998958094
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2229869393
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.1325975342
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.340131234
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.4063915426
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1456579740
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3805347921
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.438407056
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.4190546785
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3018865701
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.750568442
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2662518785
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2249147847
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2901884297
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2730633655
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2523809776
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.592364556
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.250758099
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.285451131
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1865384381
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2411268296
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3073488668
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2108400968
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3799345630
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3965699473
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2238903991
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1096621655
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2142169530
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1621087698
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3053884843
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.869441936
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.6763169
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.584690801
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2079131918
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.856361472
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.966219865
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.465590222
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3761817768
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2537462534
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.976245747
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1914116139
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.292662890
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.568598861
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.4286408346
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2952355931
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3502406903
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/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3311083561
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1115278295
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.138376376
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3652697751
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1948928509
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1249087355
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.1410297529
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1598699124
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1989124471
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1415021459
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1665343619
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3898655281
/workspace/coverage/default/4.sysrst_ctrl_smoke.2255475259
/workspace/coverage/default/4.sysrst_ctrl_stress_all.2492118727
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2664921838
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3321753951
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3722258108
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3706855618
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3595600109
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2930215018
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3661016510
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3570269836
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3331093740
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1308171171
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2788002785
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.4101005017
/workspace/coverage/default/40.sysrst_ctrl_smoke.3710616203
/workspace/coverage/default/40.sysrst_ctrl_stress_all.3591441982
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3885881348
/workspace/coverage/default/41.sysrst_ctrl_alert_test.2643997678
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3851857558
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2924160461
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.791626134
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.961479498
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1171710577
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2781565617
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2434713388
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4145874821
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3515191889
/workspace/coverage/default/41.sysrst_ctrl_smoke.1580850696
/workspace/coverage/default/41.sysrst_ctrl_stress_all.734618684
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1462289537
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1930481832
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3195253122
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.946979515
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.415156231
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1167877010
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1095326593
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4174502875
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3368040000
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3653028792
/workspace/coverage/default/42.sysrst_ctrl_smoke.534119546
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3493172516
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2500216566
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2704148329
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3712792702
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1619136711
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1049187911
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3169862385
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1520763758
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2517714585
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2127021884
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3630545729
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4262373032
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.320144969
/workspace/coverage/default/43.sysrst_ctrl_smoke.148207792
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3865614020
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2733054390
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1424055391
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.635382631
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1028203659
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.501988411
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.958505401
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3797860290
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.593852692
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2229382428
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3115404005
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4060984615
/workspace/coverage/default/44.sysrst_ctrl_smoke.4058292151
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1176533352
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3265206823
/workspace/coverage/default/45.sysrst_ctrl_alert_test.696732652
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1224371257
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2472992840
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.43942594
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2791232545
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3226580944
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.822114040
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2688936432
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4146389311
/workspace/coverage/default/45.sysrst_ctrl_smoke.2391933514
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3759341698
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1228203465
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3354240573
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.664663259
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3912972448
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.516500410
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3908327878
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.637553293
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.4145614303
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.23833920
/workspace/coverage/default/46.sysrst_ctrl_smoke.3190286632
/workspace/coverage/default/46.sysrst_ctrl_stress_all.2308809518
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4095738528
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.218365045
/workspace/coverage/default/47.sysrst_ctrl_alert_test.989479183
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2870665031
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1646197233
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1351439118
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4168049129
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.62814608
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1600712139
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3363434605
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2340394754
/workspace/coverage/default/47.sysrst_ctrl_smoke.33034526
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2196478701
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4273800646
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.788608436
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3217120010
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.636117529
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3005211545
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3308240901
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1163162037
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4218139478
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2130587632
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.4223020582
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.951910506
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.127918460
/workspace/coverage/default/48.sysrst_ctrl_smoke.3584490883
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1369707263
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2114126490
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1504229687
/workspace/coverage/default/49.sysrst_ctrl_alert_test.4143768148
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3516009691
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2537628741
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2142684179
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3827051124
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3653151717
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2171243256
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4108494440
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1710189621
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2725985244
/workspace/coverage/default/49.sysrst_ctrl_smoke.2267180014
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2656734498
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4096690057
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1502401399
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1683801704
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1513081769
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1135735644
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3225717814
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2019710854
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.353289124
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2039870030
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3167609238
/workspace/coverage/default/5.sysrst_ctrl_smoke.2524461154
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1291190371
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1578211054
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.658462196
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3686542425
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2608215201
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1289667888
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.897870415
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2015298530
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3788222430
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3195037526
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1045749051
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2334125407
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2574820197
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2051701906
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3209558065
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1056251154
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.731829541
/workspace/coverage/default/6.sysrst_ctrl_smoke.2856258229
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1351757263
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2440006572
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1867853059
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2305561358
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3296336296
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3643308183
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3750641747
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1721402100
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.412069071
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3648628541
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3019108615
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2680735402
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.744598389
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4144706901
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2576407688
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2841234466
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.755035945
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2916134982
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3294314897
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1263468217
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3659018514
/workspace/coverage/default/7.sysrst_ctrl_smoke.2850599172
/workspace/coverage/default/7.sysrst_ctrl_stress_all.793903769
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1733843168
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2402585930
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1127866477
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2094707204
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2459015443
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3597995662
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2410432931
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2211047630
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1890696564
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2151667310
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.890923210
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1446826851
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3004305868
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1851986738
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.700400655
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.763730939
/workspace/coverage/default/8.sysrst_ctrl_smoke.3735658555
/workspace/coverage/default/8.sysrst_ctrl_stress_all.515972883
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1754142958
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1850638773
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2804890831
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1892506949
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3997983544
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.255525347
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3327759408
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.53697629
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3205613698
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1030591748
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2004414751
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2781109321
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3624789105
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1150860490
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2825042380
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.205279128
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2129496709
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.230570264
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3793097197
/workspace/coverage/default/9.sysrst_ctrl_smoke.3937338478
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1433132949
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.303320243
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4191457604
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1976468362
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3014225426
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1573422884
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1011888848
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1747118285
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3380906166
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2001578074

Total test records in report: 913

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2207702743	Aug 09 05:14:22 PM PDT 24	Aug 09 05:17:40 PM PDT 24	87610386725 ps
T4	/workspace/coverage/default/31.sysrst_ctrl_alert_test.2019219230	Aug 09 05:14:23 PM PDT 24	Aug 09 05:14:28 PM PDT 24	2011612366 ps
T5	/workspace/coverage/default/36.sysrst_ctrl_stress_all.2602614725	Aug 09 05:14:35 PM PDT 24	Aug 09 05:14:40 PM PDT 24	10444166389 ps
T2	/workspace/coverage/default/7.sysrst_ctrl_stress_all.793903769	Aug 09 05:13:02 PM PDT 24	Aug 09 05:13:17 PM PDT 24	12547669982 ps
T13	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3413317495	Aug 09 05:13:07 PM PDT 24	Aug 09 05:13:09 PM PDT 24	2525127057 ps
T14	/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3597995662	Aug 09 05:15:21 PM PDT 24	Aug 09 05:16:21 PM PDT 24	44657859121 ps
T15	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2017512455	Aug 09 05:13:24 PM PDT 24	Aug 09 05:13:25 PM PDT 24	2033874855 ps
T16	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1943753451	Aug 09 05:14:20 PM PDT 24	Aug 09 05:14:22 PM PDT 24	2105650352 ps
T3	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2369215715	Aug 09 05:13:57 PM PDT 24	Aug 09 05:14:44 PM PDT 24	69139874671 ps
T6	/workspace/coverage/default/37.sysrst_ctrl_stress_all.186830967	Aug 09 05:14:34 PM PDT 24	Aug 09 05:15:04 PM PDT 24	14732388207 ps
T46	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.731829541	Aug 09 05:12:54 PM PDT 24	Aug 09 05:13:02 PM PDT 24	2510906366 ps
T47	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1229713927	Aug 09 05:13:25 PM PDT 24	Aug 09 05:13:29 PM PDT 24	2616228041 ps
T48	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.751311186	Aug 09 05:12:49 PM PDT 24	Aug 09 05:13:05 PM PDT 24	22042656425 ps
T49	/workspace/coverage/default/15.sysrst_ctrl_smoke.3358853883	Aug 09 05:13:22 PM PDT 24	Aug 09 05:13:29 PM PDT 24	2111533819 ps
T21	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1224371257	Aug 09 05:15:03 PM PDT 24	Aug 09 05:15:06 PM PDT 24	3722494674 ps
T54	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1225146296	Aug 09 05:13:40 PM PDT 24	Aug 09 05:13:43 PM PDT 24	2021918899 ps
T7	/workspace/coverage/default/44.sysrst_ctrl_stress_all.1176533352	Aug 09 05:15:03 PM PDT 24	Aug 09 05:15:19 PM PDT 24	11323926365 ps
T42	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3851857558	Aug 09 05:14:51 PM PDT 24	Aug 09 05:21:10 PM PDT 24	296767060411 ps
T8	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2561955449	Aug 09 05:12:55 PM PDT 24	Aug 09 05:12:57 PM PDT 24	5627459138 ps
T43	/workspace/coverage/default/8.sysrst_ctrl_stress_all.515972883	Aug 09 05:13:04 PM PDT 24	Aug 09 05:13:15 PM PDT 24	8127231893 ps
T9	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.449056471	Aug 09 05:13:25 PM PDT 24	Aug 09 05:14:02 PM PDT 24	322747260827 ps
T50	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1165390884	Aug 09 05:13:38 PM PDT 24	Aug 09 05:13:42 PM PDT 24	2619168745 ps
T51	/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3135681781	Aug 09 05:14:23 PM PDT 24	Aug 09 05:14:27 PM PDT 24	3456019265 ps
T44	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.404138300	Aug 09 05:14:15 PM PDT 24	Aug 09 05:14:24 PM PDT 24	3422009005 ps
T73	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.4217944903	Aug 09 05:12:48 PM PDT 24	Aug 09 05:12:51 PM PDT 24	2026437726 ps
T62	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4060984615	Aug 09 05:14:54 PM PDT 24	Aug 09 05:14:55 PM PDT 24	2625638292 ps
T22	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1433160620	Aug 09 05:14:14 PM PDT 24	Aug 09 05:16:21 PM PDT 24	50263516367 ps
T63	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2781565617	Aug 09 05:14:46 PM PDT 24	Aug 09 05:14:54 PM PDT 24	2612469999 ps
T55	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2997229242	Aug 09 05:12:35 PM PDT 24	Aug 09 05:12:43 PM PDT 24	2995435154 ps
T124	/workspace/coverage/default/31.sysrst_ctrl_smoke.3242723009	Aug 09 05:14:13 PM PDT 24	Aug 09 05:14:15 PM PDT 24	2124410657 ps
T64	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3658908628	Aug 09 05:13:52 PM PDT 24	Aug 09 05:13:54 PM PDT 24	2555223899 ps
T10	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.4245098224	Aug 09 05:14:03 PM PDT 24	Aug 09 05:14:05 PM PDT 24	2904043907 ps
T11	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4218139478	Aug 09 05:15:10 PM PDT 24	Aug 09 05:15:12 PM PDT 24	4513592897 ps
T57	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3294314897	Aug 09 05:13:00 PM PDT 24	Aug 09 05:13:04 PM PDT 24	2476237182 ps
T12	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.137194763	Aug 09 05:13:16 PM PDT 24	Aug 09 05:13:18 PM PDT 24	2558776087 ps
T29	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1242951239	Aug 09 05:12:56 PM PDT 24	Aug 09 05:14:57 PM PDT 24	167639551223 ps
T45	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1619522433	Aug 09 05:14:07 PM PDT 24	Aug 09 05:14:12 PM PDT 24	3695770190 ps
T23	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1764298373	Aug 09 05:13:43 PM PDT 24	Aug 09 05:13:53 PM PDT 24	42074221047 ps
T58	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.4237449503	Aug 09 05:13:07 PM PDT 24	Aug 09 05:13:09 PM PDT 24	2478159118 ps
T149	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.788892863	Aug 09 05:13:50 PM PDT 24	Aug 09 05:13:55 PM PDT 24	2521048061 ps
T150	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.799362417	Aug 09 05:14:22 PM PDT 24	Aug 09 05:14:27 PM PDT 24	2206669891 ps
T151	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2476608383	Aug 09 05:14:15 PM PDT 24	Aug 09 05:14:22 PM PDT 24	2510689247 ps
T20	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2117024980	Aug 09 05:14:43 PM PDT 24	Aug 09 05:15:30 PM PDT 24	88919753774 ps
T39	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.2266985167	Aug 09 05:14:00 PM PDT 24	Aug 09 05:14:02 PM PDT 24	2597736827 ps
T106	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.244942370	Aug 09 05:13:53 PM PDT 24	Aug 09 05:14:00 PM PDT 24	2512238886 ps
T107	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2582470766	Aug 09 05:14:33 PM PDT 24	Aug 09 05:14:37 PM PDT 24	2558993264 ps
T59	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3489063337	Aug 09 05:13:36 PM PDT 24	Aug 09 05:13:38 PM PDT 24	2514245382 ps
T52	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3138345579	Aug 09 05:14:26 PM PDT 24	Aug 09 05:14:33 PM PDT 24	4942533931 ps
T108	/workspace/coverage/default/6.sysrst_ctrl_alert_test.2015298530	Aug 09 05:12:54 PM PDT 24	Aug 09 05:12:57 PM PDT 24	2020828605 ps
T33	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.127627144	Aug 09 05:13:53 PM PDT 24	Aug 09 05:15:57 PM PDT 24	60423767962 ps
T37	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2049319328	Aug 09 05:14:58 PM PDT 24	Aug 09 05:16:59 PM PDT 24	47940904729 ps
T56	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1278906587	Aug 09 05:13:38 PM PDT 24	Aug 09 05:14:27 PM PDT 24	21558435419 ps
T84	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2069767986	Aug 09 05:13:23 PM PDT 24	Aug 09 05:13:28 PM PDT 24	3824812107 ps
T310	/workspace/coverage/default/9.sysrst_ctrl_smoke.3937338478	Aug 09 05:13:03 PM PDT 24	Aug 09 05:13:09 PM PDT 24	2110367631 ps
T53	/workspace/coverage/default/4.sysrst_ctrl_stress_all.2492118727	Aug 09 05:12:50 PM PDT 24	Aug 09 05:13:09 PM PDT 24	15754068590 ps
T311	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1378158765	Aug 09 05:14:25 PM PDT 24	Aug 09 05:14:29 PM PDT 24	2617609890 ps
T312	/workspace/coverage/default/36.sysrst_ctrl_smoke.1832512089	Aug 09 05:14:33 PM PDT 24	Aug 09 05:14:37 PM PDT 24	2118983553 ps
T32	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1115278295	Aug 09 05:12:48 PM PDT 24	Aug 09 05:13:10 PM PDT 24	146834381837 ps
T34	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.274349230	Aug 09 05:13:47 PM PDT 24	Aug 09 05:16:48 PM PDT 24	133447251055 ps
T60	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.4275258947	Aug 09 05:13:35 PM PDT 24	Aug 09 05:13:37 PM PDT 24	2462032692 ps
T61	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1744583780	Aug 09 05:12:43 PM PDT 24	Aug 09 05:12:47 PM PDT 24	2474195105 ps
T69	/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1850638773	Aug 09 05:13:03 PM PDT 24	Aug 09 05:13:08 PM PDT 24	5963543862 ps
T258	/workspace/coverage/default/24.sysrst_ctrl_smoke.2030299354	Aug 09 05:13:50 PM PDT 24	Aug 09 05:13:52 PM PDT 24	2136104062 ps
T70	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2733054390	Aug 09 05:14:52 PM PDT 24	Aug 09 05:15:01 PM PDT 24	10807361869 ps
T259	/workspace/coverage/default/26.sysrst_ctrl_stress_all.2188132351	Aug 09 05:14:02 PM PDT 24	Aug 09 05:15:08 PM PDT 24	24252076505 ps
T260	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3462589092	Aug 09 05:12:42 PM PDT 24	Aug 09 05:13:19 PM PDT 24	192012538337 ps
T261	/workspace/coverage/default/33.sysrst_ctrl_stress_all.2147950178	Aug 09 05:14:23 PM PDT 24	Aug 09 05:14:50 PM PDT 24	9528894222 ps
T262	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2659368968	Aug 09 05:13:48 PM PDT 24	Aug 09 05:13:53 PM PDT 24	2018165026 ps
T391	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.4190528731	Aug 09 05:13:54 PM PDT 24	Aug 09 05:14:07 PM PDT 24	4430429100 ps
T30	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1481015753	Aug 09 05:12:46 PM PDT 24	Aug 09 05:13:12 PM PDT 24	64426016076 ps
T65	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1976468362	Aug 09 05:15:27 PM PDT 24	Aug 09 05:15:43 PM PDT 24	23112715395 ps
T248	/workspace/coverage/default/20.sysrst_ctrl_alert_test.1218214483	Aug 09 05:13:40 PM PDT 24	Aug 09 05:13:42 PM PDT 24	2027215957 ps
T249	/workspace/coverage/default/35.sysrst_ctrl_smoke.1659817273	Aug 09 05:14:32 PM PDT 24	Aug 09 05:14:36 PM PDT 24	2114210804 ps
T250	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2735379266	Aug 09 05:12:44 PM PDT 24	Aug 09 05:12:49 PM PDT 24	2616489187 ps
T251	/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.380068339	Aug 09 05:13:09 PM PDT 24	Aug 09 05:13:13 PM PDT 24	5974668958 ps
T252	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2870665031	Aug 09 05:15:10 PM PDT 24	Aug 09 05:15:11 PM PDT 24	3474622509 ps
T253	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.4067567952	Aug 09 05:13:14 PM PDT 24	Aug 09 05:13:15 PM PDT 24	2599754222 ps
T254	/workspace/coverage/default/30.sysrst_ctrl_smoke.275006664	Aug 09 05:14:05 PM PDT 24	Aug 09 05:14:07 PM PDT 24	2128985269 ps
T38	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.3943866237	Aug 09 05:13:35 PM PDT 24	Aug 09 05:13:39 PM PDT 24	3219511112 ps
T31	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2859333564	Aug 09 05:14:25 PM PDT 24	Aug 09 05:16:16 PM PDT 24	177198716050 ps
T109	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1263468217	Aug 09 05:13:00 PM PDT 24	Aug 09 05:13:02 PM PDT 24	2215416945 ps
T110	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1317572106	Aug 09 05:12:34 PM PDT 24	Aug 09 05:12:36 PM PDT 24	2189188222 ps
T111	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.593852692	Aug 09 05:14:52 PM PDT 24	Aug 09 05:14:54 PM PDT 24	2638507876 ps
T40	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.524542862	Aug 09 05:14:14 PM PDT 24	Aug 09 05:14:57 PM PDT 24	37902992506 ps
T85	/workspace/coverage/default/8.sysrst_ctrl_alert_test.2410432931	Aug 09 05:13:02 PM PDT 24	Aug 09 05:13:08 PM PDT 24	2015253417 ps
T86	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3609593248	Aug 09 05:14:59 PM PDT 24	Aug 09 05:17:43 PM PDT 24	74726149957 ps
T87	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2459187879	Aug 09 05:14:25 PM PDT 24	Aug 09 05:14:27 PM PDT 24	2475871874 ps
T88	/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1683801704	Aug 09 05:12:55 PM PDT 24	Aug 09 05:12:58 PM PDT 24	3732075223 ps
T89	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1135735644	Aug 09 05:12:54 PM PDT 24	Aug 09 05:12:57 PM PDT 24	4269058623 ps
T90	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.668777673	Aug 09 05:13:09 PM PDT 24	Aug 09 05:13:33 PM PDT 24	44441354044 ps
T137	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3443921247	Aug 09 05:14:07 PM PDT 24	Aug 09 05:14:12 PM PDT 24	2615869411 ps
T138	/workspace/coverage/default/22.sysrst_ctrl_stress_all.1249232534	Aug 09 05:13:47 PM PDT 24	Aug 09 05:13:56 PM PDT 24	6880014651 ps
T139	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.4026382863	Aug 09 05:13:38 PM PDT 24	Aug 09 05:13:40 PM PDT 24	3542303709 ps
T299	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3653028792	Aug 09 05:14:52 PM PDT 24	Aug 09 05:14:55 PM PDT 24	2533397116 ps
T300	/workspace/coverage/default/5.sysrst_ctrl_smoke.2524461154	Aug 09 05:12:57 PM PDT 24	Aug 09 05:12:59 PM PDT 24	2131054767 ps
T195	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2825042380	Aug 09 05:13:03 PM PDT 24	Aug 09 05:13:05 PM PDT 24	2973974532 ps
T392	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2076863750	Aug 09 05:14:33 PM PDT 24	Aug 09 05:14:41 PM PDT 24	2480343633 ps
T293	/workspace/coverage/default/29.sysrst_ctrl_stress_all.2130313933	Aug 09 05:14:05 PM PDT 24	Aug 09 05:14:27 PM PDT 24	30997422316 ps
T393	/workspace/coverage/default/0.sysrst_ctrl_smoke.2882335068	Aug 09 05:12:35 PM PDT 24	Aug 09 05:12:38 PM PDT 24	2120836099 ps
T301	/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.283138038	Aug 09 05:14:13 PM PDT 24	Aug 09 05:14:21 PM PDT 24	3363508573 ps
T390	/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.763730939	Aug 09 05:13:04 PM PDT 24	Aug 09 05:13:08 PM PDT 24	2520948569 ps
T270	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.2895011524	Aug 09 05:12:49 PM PDT 24	Aug 09 05:13:53 PM PDT 24	123714266978 ps
T394	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3418015071	Aug 09 05:12:48 PM PDT 24	Aug 09 05:12:57 PM PDT 24	3456594761 ps
T395	/workspace/coverage/default/11.sysrst_ctrl_stress_all.961325434	Aug 09 05:13:08 PM PDT 24	Aug 09 05:13:34 PM PDT 24	12078035311 ps
T396	/workspace/coverage/default/8.sysrst_ctrl_smoke.3735658555	Aug 09 05:13:04 PM PDT 24	Aug 09 05:13:06 PM PDT 24	2134759561 ps
T264	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.1992272750	Aug 09 05:13:15 PM PDT 24	Aug 09 05:15:11 PM PDT 24	91868147421 ps
T397	/workspace/coverage/default/2.sysrst_ctrl_alert_test.1285796459	Aug 09 05:12:43 PM PDT 24	Aug 09 05:12:49 PM PDT 24	2014627419 ps
T35	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2054539179	Aug 09 05:13:37 PM PDT 24	Aug 09 05:13:48 PM PDT 24	4145468977 ps
T398	/workspace/coverage/default/45.sysrst_ctrl_alert_test.696732652	Aug 09 05:15:01 PM PDT 24	Aug 09 05:15:02 PM PDT 24	2059504782 ps
T66	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3044302136	Aug 09 05:14:45 PM PDT 24	Aug 09 05:15:08 PM PDT 24	37370922332 ps
T399	/workspace/coverage/default/40.sysrst_ctrl_smoke.3710616203	Aug 09 05:14:41 PM PDT 24	Aug 09 05:14:45 PM PDT 24	2116795596 ps
T400	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2095975170	Aug 09 05:12:42 PM PDT 24	Aug 09 05:12:45 PM PDT 24	4034388529 ps
T234	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.3691079891	Aug 09 05:12:48 PM PDT 24	Aug 09 05:12:50 PM PDT 24	2488851219 ps
T401	/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.1981655986	Aug 09 05:13:18 PM PDT 24	Aug 09 05:13:23 PM PDT 24	3723228840 ps
T402	/workspace/coverage/default/48.sysrst_ctrl_smoke.3584490883	Aug 09 05:15:10 PM PDT 24	Aug 09 05:15:13 PM PDT 24	2114687115 ps
T403	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2735100506	Aug 09 05:14:35 PM PDT 24	Aug 09 05:14:38 PM PDT 24	2489186894 ps
T404	/workspace/coverage/default/19.sysrst_ctrl_smoke.1906965409	Aug 09 05:13:38 PM PDT 24	Aug 09 05:13:44 PM PDT 24	2110053174 ps
T405	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2004414751	Aug 09 05:13:01 PM PDT 24	Aug 09 05:13:03 PM PDT 24	3501912474 ps
T67	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2378147701	Aug 09 05:15:28 PM PDT 24	Aug 09 05:18:30 PM PDT 24	199348486863 ps
T266	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1049187911	Aug 09 05:14:55 PM PDT 24	Aug 09 05:15:14 PM PDT 24	112241068330 ps
T68	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1422875574	Aug 09 05:13:41 PM PDT 24	Aug 09 05:15:37 PM PDT 24	96218944174 ps
T255	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1807438317	Aug 09 05:12:47 PM PDT 24	Aug 09 05:12:53 PM PDT 24	2269103621 ps
T406	/workspace/coverage/default/42.sysrst_ctrl_alert_test.1930481832	Aug 09 05:14:54 PM PDT 24	Aug 09 05:14:56 PM PDT 24	2045081074 ps
T407	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4262373032	Aug 09 05:14:52 PM PDT 24	Aug 09 05:14:54 PM PDT 24	2049891043 ps
T71	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1291190371	Aug 09 05:12:57 PM PDT 24	Aug 09 05:13:47 PM PDT 24	25213253444 ps
T408	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1150860490	Aug 09 05:13:05 PM PDT 24	Aug 09 05:13:13 PM PDT 24	2946422927 ps
T72	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2851275708	Aug 09 05:13:39 PM PDT 24	Aug 09 05:14:19 PM PDT 24	1481699635505 ps
T409	/workspace/coverage/default/12.sysrst_ctrl_smoke.972630471	Aug 09 05:13:18 PM PDT 24	Aug 09 05:13:24 PM PDT 24	2110116182 ps
T410	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.1608473963	Aug 09 05:13:56 PM PDT 24	Aug 09 05:13:59 PM PDT 24	2480614414 ps
T411	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2059742990	Aug 09 05:12:42 PM PDT 24	Aug 09 05:12:45 PM PDT 24	2519923969 ps
T77	/workspace/coverage/default/43.sysrst_ctrl_stress_all.3865614020	Aug 09 05:14:52 PM PDT 24	Aug 09 05:15:01 PM PDT 24	14422324218 ps
T41	/workspace/coverage/default/16.sysrst_ctrl_stress_all.84282723	Aug 09 05:13:35 PM PDT 24	Aug 09 05:13:43 PM PDT 24	13907728573 ps
T205	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1395355648	Aug 09 05:14:45 PM PDT 24	Aug 09 05:14:55 PM PDT 24	3473082749 ps
T206	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1578282146	Aug 09 05:13:36 PM PDT 24	Aug 09 05:13:46 PM PDT 24	3795647661 ps
T207	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.714885140	Aug 09 05:13:52 PM PDT 24	Aug 09 05:15:49 PM PDT 24	98454426388 ps
T208	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.1374223410	Aug 09 05:13:44 PM PDT 24	Aug 09 05:16:00 PM PDT 24	56523790488 ps
T209	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2934487880	Aug 09 05:13:58 PM PDT 24	Aug 09 05:14:00 PM PDT 24	2247630578 ps
T210	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2664921838	Aug 09 05:12:47 PM PDT 24	Aug 09 05:15:04 PM PDT 24	53470605577 ps
T211	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1665343619	Aug 09 05:12:49 PM PDT 24	Aug 09 05:12:51 PM PDT 24	2536416508 ps
T82	/workspace/coverage/default/1.sysrst_ctrl_stress_all.4209082701	Aug 09 05:12:41 PM PDT 24	Aug 09 05:12:49 PM PDT 24	83641415604 ps
T304	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3097311930	Aug 09 05:14:16 PM PDT 24	Aug 09 05:14:18 PM PDT 24	2493887343 ps
T412	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.4276829676	Aug 09 05:13:59 PM PDT 24	Aug 09 05:14:01 PM PDT 24	4137446272 ps
T413	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.412508067	Aug 09 05:14:05 PM PDT 24	Aug 09 05:14:12 PM PDT 24	2132391398 ps
T244	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3912972448	Aug 09 05:15:09 PM PDT 24	Aug 09 05:16:19 PM PDT 24	101914411479 ps
T414	/workspace/coverage/default/28.sysrst_ctrl_smoke.3755620520	Aug 09 05:14:00 PM PDT 24	Aug 09 05:14:06 PM PDT 24	2109690859 ps
T415	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2916134982	Aug 09 05:13:04 PM PDT 24	Aug 09 05:13:06 PM PDT 24	2629057641 ps
T36	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2960737065	Aug 09 05:13:50 PM PDT 24	Aug 09 05:15:15 PM PDT 24	142338816574 ps
T83	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2152040395	Aug 09 05:12:49 PM PDT 24	Aug 09 05:12:51 PM PDT 24	5950635486 ps
T416	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3661016510	Aug 09 05:14:44 PM PDT 24	Aug 09 05:14:47 PM PDT 24	2840472896 ps
T176	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.4203934182	Aug 09 05:13:53 PM PDT 24	Aug 09 05:13:57 PM PDT 24	3397422941 ps
T269	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2011161048	Aug 09 05:12:50 PM PDT 24	Aug 09 05:13:42 PM PDT 24	77131598076 ps
T417	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3226580944	Aug 09 05:15:02 PM PDT 24	Aug 09 05:15:06 PM PDT 24	2618645108 ps
T418	/workspace/coverage/default/1.sysrst_ctrl_smoke.3544125376	Aug 09 05:12:36 PM PDT 24	Aug 09 05:12:42 PM PDT 24	2109409530 ps
T419	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2334125407	Aug 09 05:12:57 PM PDT 24	Aug 09 05:13:00 PM PDT 24	2828192965 ps
T177	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3797860290	Aug 09 05:15:00 PM PDT 24	Aug 09 05:15:05 PM PDT 24	3307937112 ps
T420	/workspace/coverage/default/47.sysrst_ctrl_smoke.33034526	Aug 09 05:15:12 PM PDT 24	Aug 09 05:15:19 PM PDT 24	2112681836 ps
T421	/workspace/coverage/default/43.sysrst_ctrl_smoke.148207792	Aug 09 05:14:52 PM PDT 24	Aug 09 05:14:54 PM PDT 24	2128449315 ps
T422	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3130676248	Aug 09 05:14:06 PM PDT 24	Aug 09 05:14:14 PM PDT 24	2449729551 ps
T294	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2561174418	Aug 09 05:14:24 PM PDT 24	Aug 09 05:14:27 PM PDT 24	3260382098 ps
T423	/workspace/coverage/default/10.sysrst_ctrl_smoke.2970180760	Aug 09 05:13:11 PM PDT 24	Aug 09 05:13:12 PM PDT 24	2182538520 ps
T424	/workspace/coverage/default/37.sysrst_ctrl_alert_test.1581864504	Aug 09 05:14:33 PM PDT 24	Aug 09 05:14:35 PM PDT 24	2048140363 ps
T131	/workspace/coverage/default/32.sysrst_ctrl_stress_all.1398426572	Aug 09 05:14:23 PM PDT 24	Aug 09 05:14:42 PM PDT 24	11581108120 ps
T425	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2291170744	Aug 09 05:14:37 PM PDT 24	Aug 09 05:23:25 PM PDT 24	197814644499 ps
T426	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3682896480	Aug 09 05:13:53 PM PDT 24	Aug 09 05:13:54 PM PDT 24	2289548964 ps
T427	/workspace/coverage/default/30.sysrst_ctrl_alert_test.4144621244	Aug 09 05:14:13 PM PDT 24	Aug 09 05:14:18 PM PDT 24	2016283164 ps
T305	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3906219728	Aug 09 05:13:57 PM PDT 24	Aug 09 05:14:04 PM PDT 24	2442282637 ps
T338	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.2432279839	Aug 09 05:14:05 PM PDT 24	Aug 09 05:17:58 PM PDT 24	89488876262 ps
T428	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.952459734	Aug 09 05:14:14 PM PDT 24	Aug 09 05:14:16 PM PDT 24	2633637999 ps
T429	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.521769055	Aug 09 05:12:44 PM PDT 24	Aug 09 05:12:47 PM PDT 24	3763408209 ps
T161	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3586688801	Aug 09 05:14:24 PM PDT 24	Aug 09 05:14:26 PM PDT 24	3939013458 ps
T430	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.678788579	Aug 09 05:14:17 PM PDT 24	Aug 09 05:14:18 PM PDT 24	2173749039 ps
T112	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.4055726051	Aug 09 05:14:33 PM PDT 24	Aug 09 05:14:36 PM PDT 24	11572030184 ps
T431	/workspace/coverage/default/11.sysrst_ctrl_smoke.2497439820	Aug 09 05:13:11 PM PDT 24	Aug 09 05:13:17 PM PDT 24	2110158870 ps
T78	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3997983544	Aug 09 05:15:28 PM PDT 24	Aug 09 05:24:33 PM PDT 24	206326020286 ps
T432	/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1961340436	Aug 09 05:13:13 PM PDT 24	Aug 09 05:13:17 PM PDT 24	4574019298 ps
T433	/workspace/coverage/default/26.sysrst_ctrl_alert_test.3348188736	Aug 09 05:13:59 PM PDT 24	Aug 09 05:14:01 PM PDT 24	2030897643 ps
T91	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2823319895	Aug 09 05:12:35 PM PDT 24	Aug 09 05:15:28 PM PDT 24	130031382980 ps
T434	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.623589625	Aug 09 05:13:10 PM PDT 24	Aug 09 05:13:12 PM PDT 24	2483000403 ps
T435	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.792553115	Aug 09 05:13:53 PM PDT 24	Aug 09 05:14:01 PM PDT 24	2801097389 ps
T436	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2350391618	Aug 09 05:12:49 PM PDT 24	Aug 09 05:12:56 PM PDT 24	2610109622 ps
T437	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2522547345	Aug 09 05:14:43 PM PDT 24	Aug 09 05:14:44 PM PDT 24	3387295901 ps
T438	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.4190723558	Aug 09 05:14:08 PM PDT 24	Aug 09 05:14:14 PM PDT 24	2069471051 ps
T113	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.545986838	Aug 09 05:12:42 PM PDT 24	Aug 09 05:12:44 PM PDT 24	12886598507 ps
T439	/workspace/coverage/default/15.sysrst_ctrl_alert_test.519783145	Aug 09 05:13:25 PM PDT 24	Aug 09 05:13:30 PM PDT 24	2010168660 ps
T114	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2998509130	Aug 09 05:14:14 PM PDT 24	Aug 09 05:14:22 PM PDT 24	5840911527 ps
T440	/workspace/coverage/default/46.sysrst_ctrl_stress_all.2308809518	Aug 09 05:15:13 PM PDT 24	Aug 09 05:15:21 PM PDT 24	10821481511 ps
T441	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1387785305	Aug 09 05:13:36 PM PDT 24	Aug 09 05:13:44 PM PDT 24	2455169370 ps
T307	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3659018514	Aug 09 05:13:01 PM PDT 24	Aug 09 05:13:03 PM PDT 24	2547362387 ps
T308	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.4158975128	Aug 09 05:13:35 PM PDT 24	Aug 09 05:13:38 PM PDT 24	2528122919 ps
T374	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2047946485	Aug 09 05:14:51 PM PDT 24	Aug 09 05:15:45 PM PDT 24	163662543804 ps
T442	/workspace/coverage/default/14.sysrst_ctrl_stress_all.453230702	Aug 09 05:13:23 PM PDT 24	Aug 09 05:13:36 PM PDT 24	13350942935 ps
T115	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.4227163253	Aug 09 05:12:41 PM PDT 24	Aug 09 05:12:59 PM PDT 24	448683873309 ps
T302	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2178056279	Aug 09 05:13:22 PM PDT 24	Aug 09 05:13:33 PM PDT 24	4386973567 ps
T263	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2181310302	Aug 09 05:15:29 PM PDT 24	Aug 09 05:16:10 PM PDT 24	70282768498 ps
T268	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3490873444	Aug 09 05:14:23 PM PDT 24	Aug 09 05:16:20 PM PDT 24	48369872045 ps
T309	/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2379767043	Aug 09 05:14:15 PM PDT 24	Aug 09 05:14:17 PM PDT 24	2537990168 ps
T443	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1807764121	Aug 09 05:13:37 PM PDT 24	Aug 09 05:13:41 PM PDT 24	2098168712 ps
T152	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1171710577	Aug 09 05:14:52 PM PDT 24	Aug 09 05:14:57 PM PDT 24	4522752743 ps
T444	/workspace/coverage/default/6.sysrst_ctrl_smoke.2856258229	Aug 09 05:12:55 PM PDT 24	Aug 09 05:13:01 PM PDT 24	2112051370 ps
T445	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3793097197	Aug 09 05:13:02 PM PDT 24	Aug 09 05:13:09 PM PDT 24	2508917216 ps
T446	/workspace/coverage/default/43.sysrst_ctrl_alert_test.3712792702	Aug 09 05:14:56 PM PDT 24	Aug 09 05:14:58 PM PDT 24	2031518990 ps
T245	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.514436441	Aug 09 05:14:36 PM PDT 24	Aug 09 05:14:51 PM PDT 24	33266352645 ps
T447	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2856433473	Aug 09 05:12:41 PM PDT 24	Aug 09 05:12:43 PM PDT 24	2488980955 ps
T448	/workspace/coverage/default/4.sysrst_ctrl_smoke.2255475259	Aug 09 05:12:48 PM PDT 24	Aug 09 05:12:54 PM PDT 24	2110310621 ps
T449	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3115404005	Aug 09 05:15:00 PM PDT 24	Aug 09 05:15:02 PM PDT 24	2187806205 ps
T450	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.205279128	Aug 09 05:13:03 PM PDT 24	Aug 09 05:13:05 PM PDT 24	2629041783 ps
T451	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.232120630	Aug 09 05:14:46 PM PDT 24	Aug 09 05:14:53 PM PDT 24	2443729716 ps
T334	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.587011266	Aug 09 05:14:34 PM PDT 24	Aug 09 05:15:08 PM PDT 24	75522965614 ps
T387	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2738369699	Aug 09 05:13:37 PM PDT 24	Aug 09 05:14:56 PM PDT 24	993922780066 ps
T116	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1578211054	Aug 09 05:12:54 PM PDT 24	Aug 09 05:13:01 PM PDT 24	2767643492 ps
T79	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1825685917	Aug 09 05:14:23 PM PDT 24	Aug 09 05:14:32 PM PDT 24	52211952342 ps
T132	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1446826851	Aug 09 05:13:02 PM PDT 24	Aug 09 05:13:07 PM PDT 24	4097316566 ps
T163	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.301742414	Aug 09 05:14:33 PM PDT 24	Aug 09 05:15:47 PM PDT 24	110731909981 ps
T164	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1573422884	Aug 09 05:15:27 PM PDT 24	Aug 09 05:16:25 PM PDT 24	41356268050 ps
T165	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2143734395	Aug 09 05:13:09 PM PDT 24	Aug 09 05:13:11 PM PDT 24	2055925853 ps
T166	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1866184777	Aug 09 05:13:39 PM PDT 24	Aug 09 05:13:47 PM PDT 24	2508396303 ps
T167	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3529287236	Aug 09 05:14:35 PM PDT 24	Aug 09 05:14:37 PM PDT 24	2554763533 ps
T145	/workspace/coverage/default/38.sysrst_ctrl_stress_all.2056475425	Aug 09 05:14:51 PM PDT 24	Aug 09 05:15:24 PM PDT 24	13023623729 ps
T168	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3779216597	Aug 09 05:14:05 PM PDT 24	Aug 09 05:14:09 PM PDT 24	2511689144 ps
T169	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3014225426	Aug 09 05:15:30 PM PDT 24	Aug 09 05:15:50 PM PDT 24	29661228830 ps
T170	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1598699124	Aug 09 05:12:50 PM PDT 24	Aug 09 05:12:51 PM PDT 24	2710448076 ps
T92	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.4130794673	Aug 09 05:14:23 PM PDT 24	Aug 09 05:15:06 PM PDT 24	75981655838 ps
T452	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.890923210	Aug 09 05:13:02 PM PDT 24	Aug 09 05:13:03 PM PDT 24	3663601602 ps
T453	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.916670916	Aug 09 05:13:44 PM PDT 24	Aug 09 05:13:45 PM PDT 24	3279057310 ps
T454	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2453573473	Aug 09 05:12:36 PM PDT 24	Aug 09 05:12:39 PM PDT 24	2517891237 ps
T133	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3570269836	Aug 09 05:14:46 PM PDT 24	Aug 09 05:14:56 PM PDT 24	3438759234 ps
T81	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2519608770	Aug 09 05:14:23 PM PDT 24	Aug 09 05:14:25 PM PDT 24	3878435585 ps
T125	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1504229687	Aug 09 05:15:12 PM PDT 24	Aug 09 05:15:20 PM PDT 24	10531798740 ps
T178	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1308171171	Aug 09 05:14:46 PM PDT 24	Aug 09 05:14:50 PM PDT 24	2453903737 ps
T134	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.587128241	Aug 09 05:15:09 PM PDT 24	Aug 09 05:15:13 PM PDT 24	2646045411 ps
T117	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1256873224	Aug 09 05:12:39 PM PDT 24	Aug 09 05:13:31 PM PDT 24	27614371871 ps
T179	/workspace/coverage/default/49.sysrst_ctrl_smoke.2267180014	Aug 09 05:15:13 PM PDT 24	Aug 09 05:15:17 PM PDT 24	2116549957 ps
T180	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3371142925	Aug 09 05:14:45 PM PDT 24	Aug 09 05:14:54 PM PDT 24	3332740433 ps
T181	/workspace/coverage/default/25.sysrst_ctrl_smoke.3936192373	Aug 09 05:13:52 PM PDT 24	Aug 09 05:13:59 PM PDT 24	2109876062 ps
T182	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.780398214	Aug 09 05:13:36 PM PDT 24	Aug 09 05:13:37 PM PDT 24	2657892303 ps
T455	/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1351439118	Aug 09 05:15:09 PM PDT 24	Aug 09 05:15:20 PM PDT 24	4112701753 ps
T456	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.4249123466	Aug 09 05:14:22 PM PDT 24	Aug 09 05:14:25 PM PDT 24	4233016003 ps
T363	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2710766155	Aug 09 05:15:29 PM PDT 24	Aug 09 05:16:21 PM PDT 24	86114330024 ps
T457	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3007094207	Aug 09 05:13:44 PM PDT 24	Aug 09 05:13:51 PM PDT 24	2687865565 ps
T458	/workspace/coverage/default/16.sysrst_ctrl_alert_test.3364458030	Aug 09 05:13:37 PM PDT 24	Aug 09 05:13:40 PM PDT 24	2019461980 ps
T459	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1462289537	Aug 09 05:14:51 PM PDT 24	Aug 09 05:14:57 PM PDT 24	4555630962 ps
T460	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1993756775	Aug 09 05:13:45 PM PDT 24	Aug 09 05:13:48 PM PDT 24	2479714924 ps
T146	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1378108846	Aug 09 05:14:32 PM PDT 24	Aug 09 05:14:39 PM PDT 24	2899412925 ps
T361	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3737257072	Aug 09 05:13:46 PM PDT 24	Aug 09 05:14:15 PM PDT 24	99921893247 ps
T461	/workspace/coverage/default/41.sysrst_ctrl_smoke.1580850696	Aug 09 05:14:46 PM PDT 24	Aug 09 05:14:48 PM PDT 24	2121039982 ps
T462	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2053657680	Aug 09 05:13:25 PM PDT 24	Aug 09 05:13:31 PM PDT 24	2173236971 ps
T463	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2704148329	Aug 09 05:14:58 PM PDT 24	Aug 09 05:15:01 PM PDT 24	2796786205 ps
T464	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.218365045	Aug 09 05:15:08 PM PDT 24	Aug 09 05:15:11 PM PDT 24	3779464018 ps
T465	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2840837264	Aug 09 05:13:56 PM PDT 24	Aug 09 05:13:58 PM PDT 24	4007770066 ps
T466	/workspace/coverage/default/5.sysrst_ctrl_alert_test.1502401399	Aug 09 05:12:55 PM PDT 24	Aug 09 05:12:57 PM PDT 24	2027193979 ps