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ASSERTIONS	CATEGORY	SEVERITY	ATTEMPTS	REAL SUCCESSES	FAILURES	INCOMPLETE
tb.dut.tlul_assert_device.gen_assert_final[90].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[91].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[92].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[93].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[94].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[95].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[96].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[97].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[98].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[99].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_assert_final[9].noOutstandingReqsAtEndOfSim_A	0	0	912	912	0	0
tb.dut.tlul_assert_device.gen_device.aDataKnown_M	0	0	1144834993	2993203	0	0
tb.dut.tlul_assert_device.gen_device.addrSizeAlignedErr_A	0	0	1144834408	6112	0	0
tb.dut.tlul_assert_device.gen_device.contigMask_M	0	0	1144834993	17284549	0	0
tb.dut.tlul_assert_device.gen_device.dDataKnown_A	0	0	1144834993	169696	0	0
tb.dut.tlul_assert_device.gen_device.legalAOpcodeErr_A	0	0	1144834408	6294	0	0
tb.dut.tlul_assert_device.gen_device.legalAParam_M	0	0	1144834993	19092287	0	0
tb.dut.tlul_assert_device.gen_device.legalDParam_A	0	0	1144834993	488342	0	0
tb.dut.tlul_assert_device.gen_device.pendingReqPerSrc_M	0	0	1144834993	19092287	0	0
tb.dut.tlul_assert_device.gen_device.respMustHaveReq_A	0	0	1144834993	488342	0	0
tb.dut.tlul_assert_device.gen_device.respOpcode_A	0	0	1144834993	488342	0	0
tb.dut.tlul_assert_device.gen_device.respSzEqReqSz_A	0	0	1144834993	488342	0	0
tb.dut.tlul_assert_device.gen_device.sizeGTEMaskErr_A	0	0	1144834408	3978	0	0
tb.dut.tlul_assert_device.gen_device.sizeMatchesMaskErr_A	0	0	1144834408	3750	0	0
tb.dut.tlul_assert_device.p_dbw.TlDbw_A	0	0	912	912	0	0
tb.dut.u_reg.en2addrHit	0	0	1144834408	256556	0	0
tb.dut.u_reg.reAfterRv	0	0	1144834408	256556	0	0
tb.dut.u_reg.rePulse	0	0	1144834408	138969	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1257274	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1252	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1252	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1252	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1174	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1259	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1145963	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1144	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1144	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1144	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1067	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1150	0	0
tb.dut.u_reg.u_chk.PayLoadWidthCheck	0	0	912	912	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.BusySrcReqChk_A	0	0	1144834408	1681120	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.SrcAckBusyChk_A	0	0	1144834408	1870	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1870	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1870	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1792	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1878	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.BusySrcReqChk_A	0	0	1144834408	1689833	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.SrcAckBusyChk_A	0	0	1144834408	1853	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1853	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1853	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1777	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1861	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.BusySrcReqChk_A	0	0	1144834408	1679228	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.SrcAckBusyChk_A	0	0	1144834408	1858	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1858	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1858	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1780	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1862	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.BusySrcReqChk_A	0	0	1144834408	1672190	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.SrcAckBusyChk_A	0	0	1144834408	1856	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1856	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1856	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1778	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1862	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.BusySrcReqChk_A	0	0	1144834408	1684823	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.SrcAckBusyChk_A	0	0	1144834408	1869	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1869	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1869	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1795	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1875	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.BusySrcReqChk_A	0	0	1144834408	1664926	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.SrcAckBusyChk_A	0	0	1144834408	1859	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1859	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1859	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1782	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1865	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.BusySrcReqChk_A	0	0	1144834408	1618689	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.SrcAckBusyChk_A	0	0	1144834408	1826	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1826	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1826	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1752	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1834	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.BusySrcReqChk_A	0	0	1144834408	1652631	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.SrcAckBusyChk_A	0	0	1144834408	1877	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1877	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1877	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1799	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1882	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.BusySrcReqChk_A	0	0	1144834408	1357053	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.SrcAckBusyChk_A	0	0	1144834408	1376	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1376	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1376	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1304	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1383	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.BusySrcReqChk_A	0	0	1144834408	1290427	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.SrcAckBusyChk_A	0	0	1144834408	1354	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1354	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1354	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1278	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1361	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.BusySrcReqChk_A	0	0	1144834408	1270139	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.SrcAckBusyChk_A	0	0	1144834408	1344	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1344	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1344	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1270	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1352	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.BusySrcReqChk_A	0	0	1144834408	1275640	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.SrcAckBusyChk_A	0	0	1144834408	1347	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1347	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1347	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1273	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1353	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.BusySrcReqChk_A	0	0	1144834408	6709255	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.SrcAckBusyChk_A	0	0	1144834408	7106	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7106	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7106	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7030	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7111	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.BusySrcReqChk_A	0	0	1144834408	6550686	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.SrcAckBusyChk_A	0	0	1144834408	7034	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7034	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7034	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	6960	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7041	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.BusySrcReqChk_A	0	0	1144834408	6652393	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.SrcAckBusyChk_A	0	0	1144834408	7146	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7146	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7146	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7072	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7155	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.BusySrcReqChk_A	0	0	1144834408	6438132	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.SrcAckBusyChk_A	0	0	1144834408	7104	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7104	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7104	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7025	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7114	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.BusySrcReqChk_A	0	0	1144834408	7166560	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.SrcAckBusyChk_A	0	0	1144834408	7620	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7620	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7620	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7543	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7625	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.BusySrcReqChk_A	0	0	1144834408	6985009	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.SrcAckBusyChk_A	0	0	1144834408	7539	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7539	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7539	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7464	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7546	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.BusySrcReqChk_A	0	0	1144834408	7074519	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.SrcAckBusyChk_A	0	0	1144834408	7666	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7666	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7666	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7590	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7673	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.BusySrcReqChk_A	0	0	1144834408	6805454	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.SrcAckBusyChk_A	0	0	1144834408	7580	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	7580	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	7580	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	7504	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	7588	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1709426	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1923	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1923	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1923	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1850	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1930	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1051191	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1105	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1105	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1105	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1031	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1111	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1720888	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1928	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1928	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1928	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1852	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1936	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	2196653	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	2249	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	2249	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	2249	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	2176	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	2257	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	3772743	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	4115	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	4115	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	4115	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	4037	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	4124	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	4598530	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	5088	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	5088	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	5088	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	5012	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	5095	0	0
tb.dut.u_reg.u_pin_out_value_cdc.BusySrcReqChk_A	0	0	1144834408	3724086	0	0
tb.dut.u_reg.u_pin_out_value_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_pin_out_value_cdc.SrcAckBusyChk_A	0	0	1144834408	4053	0	0
tb.dut.u_reg.u_pin_out_value_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	4053	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	4053	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	3976	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	4062	0	0
tb.dut.u_reg.u_reg_if.AllowedLatency_A	0	0	912	912	0	0
tb.dut.u_reg.u_reg_if.MatchedWidthAssert	0	0	912	912	0	0
tb.dut.u_reg.u_reg_if.u_err.dataWidthOnly32_A	0	0	912	912	0	0
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.DataWidthCheck_A	0	0	912	912	0	0
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.PayLoadWidthCheck	0	0	912	912	0	0
tb.dut.u_reg.u_rsp_intg_gen.DataWidthCheck_A	0	0	912	912	0	0
tb.dut.u_reg.u_rsp_intg_gen.PayLoadWidthCheck	0	0	912	912	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1072612	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1066	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1066	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1066	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	994	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1073	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1089228	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1103	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1103	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1103	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1026	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1112	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1078722	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1078	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1078	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1078	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	999	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1084	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1144834408	1093159	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1144834408	1092	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1144834408	1092	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5667492	1092	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1019	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1098	0	0
tb.dut.u_reg.u_wkup_status_cdc.BusySrcReqChk_A	0	0	1144834408	1025922	0	0
tb.dut.u_reg.u_wkup_status_cdc.DstReqKnown_A	0	0	5667492	5017589	0	0
tb.dut.u_reg.u_wkup_status_cdc.SrcAckBusyChk_A	0	0	1144834408	1110	0	0
tb.dut.u_reg.u_wkup_status_cdc.SrcBusyKnown_A	0	0	1144834408	1144428958	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.DstUpdateReqCheck_A	0	0	5667492	653	0	912
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.HwIdSelCheck_A	0	0	5667492	653	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckAckNeedsReq	0	0	1144834408	1763	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckHoldReq	0	0	5667492	918	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5667492	1035	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1144834408	1118	0	0
tb.dut.u_reg.wePulse	0	0	1144834408	117587	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntClr_A	0	0	5407980	182	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntIncr_A	0	0	5407980	271094	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntNoWrap_A	0	0	5407980	4942403	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectStDropOut_A	0	0	5407980	3	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectedOut_A	0	0	5407980	591	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectedPulseOut_A	0	0	5407980	82	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DisabledIdleSt_A	0	0	5407980	4667305	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DisabledNoDetection_A	0	0	5407980	4669202	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterDebounceSt_A	0	0	5407980	97	0	0

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	ASSERT	PROPERTIES	SEQUENCES
Total	1028	0	10
Category 0	1028	0	10

	ASSERT	PROPERTIES	SEQUENCES
Total	1028	0	10
Severity 0	1028	0	10

	NUMBER	PERCENT
Total Number	1028	100.00
Uncovered	6	0.58
Success	1022	99.42
Failure	0	0.00
Incomplete	1	0.10
Without Attempts	0	0.00

	NUMBER	PERCENT
Total Number	10	100.00
Uncovered	0	0.00
All Matches	10	100.00
First Matches	10	100.00