| T133 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/13.uart_rx_parity_err.3728894227 |
|
|
Aug 23 03:32:07 AM UTC 24 |
Aug 23 03:34:46 AM UTC 24 |
158855803319 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_rx_start_bit_filter.1144567431 |
|
|
Aug 23 03:34:47 AM UTC 24 |
Aug 23 03:34:52 AM UTC 24 |
2837772179 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_tx_rx.537414705 |
|
|
Aug 23 03:34:12 AM UTC 24 |
Aug 23 03:34:53 AM UTC 24 |
25290131271 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.2343845710 |
|
|
Aug 23 03:29:24 AM UTC 24 |
Aug 23 03:34:56 AM UTC 24 |
63541314419 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_tx_ovrd.1568109480 |
|
|
Aug 23 03:34:54 AM UTC 24 |
Aug 23 03:34:56 AM UTC 24 |
487031766 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.1954025766 |
|
|
Aug 23 03:30:10 AM UTC 24 |
Aug 23 03:34:57 AM UTC 24 |
33275466428 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_rx_oversample.2664521583 |
|
|
Aug 23 03:34:35 AM UTC 24 |
Aug 23 03:35:01 AM UTC 24 |
3055751901 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_intr.2603070353 |
|
|
Aug 23 03:34:45 AM UTC 24 |
Aug 23 03:35:06 AM UTC 24 |
22176104886 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_loopback.3950913970 |
|
|
Aug 23 03:34:57 AM UTC 24 |
Aug 23 03:35:08 AM UTC 24 |
5587911577 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_alert_test.2382657243 |
|
|
Aug 23 03:35:09 AM UTC 24 |
Aug 23 03:35:10 AM UTC 24 |
42105612 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.3128058254 |
|
|
Aug 23 03:34:25 AM UTC 24 |
Aug 23 03:35:12 AM UTC 24 |
28452321346 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_smoke.4251624812 |
|
|
Aug 23 03:35:11 AM UTC 24 |
Aug 23 03:35:13 AM UTC 24 |
110595958 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.679180169 |
|
|
Aug 23 03:34:53 AM UTC 24 |
Aug 23 03:35:27 AM UTC 24 |
19533900014 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.449194819 |
|
|
Aug 23 03:35:02 AM UTC 24 |
Aug 23 03:35:27 AM UTC 24 |
9623461297 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_tx_rx.1657662543 |
|
|
Aug 23 03:35:13 AM UTC 24 |
Aug 23 03:35:30 AM UTC 24 |
49303887252 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_rx_oversample.823098473 |
|
|
Aug 23 03:35:31 AM UTC 24 |
Aug 23 03:35:42 AM UTC 24 |
5296668926 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.920371311 |
|
|
Aug 23 03:35:28 AM UTC 24 |
Aug 23 03:35:45 AM UTC 24 |
31894438148 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_noise_filter.2013239237 |
|
|
Aug 23 03:35:45 AM UTC 24 |
Aug 23 03:35:54 AM UTC 24 |
6769845405 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_fifo_reset.2189590323 |
|
|
Aug 23 03:34:33 AM UTC 24 |
Aug 23 03:35:56 AM UTC 24 |
139119221740 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.2091962149 |
|
|
Aug 23 03:35:54 AM UTC 24 |
Aug 23 03:35:57 AM UTC 24 |
4401141752 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_fifo_reset.1928559790 |
|
|
Aug 23 03:35:28 AM UTC 24 |
Aug 23 03:36:04 AM UTC 24 |
79010688767 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.223938836 |
|
|
Aug 23 03:31:05 AM UTC 24 |
Aug 23 03:36:04 AM UTC 24 |
92451652438 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.4290987600 |
|
|
Aug 23 03:23:51 AM UTC 24 |
Aug 23 03:36:18 AM UTC 24 |
138110413009 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.3504518994 |
|
|
Aug 23 03:35:58 AM UTC 24 |
Aug 23 03:36:19 AM UTC 24 |
7388746046 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/15.uart_perf.773874994 |
|
|
Aug 23 03:33:59 AM UTC 24 |
Aug 23 03:36:23 AM UTC 24 |
15788126505 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_loopback.3492607314 |
|
|
Aug 23 03:36:05 AM UTC 24 |
Aug 23 03:36:25 AM UTC 24 |
9160936278 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_alert_test.1539456365 |
|
|
Aug 23 03:36:26 AM UTC 24 |
Aug 23 03:36:27 AM UTC 24 |
38639754 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_smoke.3780659882 |
|
|
Aug 23 03:36:28 AM UTC 24 |
Aug 23 03:36:31 AM UTC 24 |
470196859 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_stress_all.2606342372 |
|
|
Aug 23 03:35:07 AM UTC 24 |
Aug 23 03:36:43 AM UTC 24 |
35089199507 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_fifo_full.526420392 |
|
|
Aug 23 03:34:15 AM UTC 24 |
Aug 23 03:36:49 AM UTC 24 |
263014770000 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/9.uart_perf.2315041881 |
|
|
Aug 23 03:28:23 AM UTC 24 |
Aug 23 03:36:50 AM UTC 24 |
11728086254 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_tx_rx.2877015932 |
|
|
Aug 23 03:36:32 AM UTC 24 |
Aug 23 03:36:54 AM UTC 24 |
60366078061 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_fifo_full.2874624407 |
|
|
Aug 23 03:36:43 AM UTC 24 |
Aug 23 03:36:56 AM UTC 24 |
72410041201 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_rx_oversample.1111031892 |
|
|
Aug 23 03:36:55 AM UTC 24 |
Aug 23 03:37:00 AM UTC 24 |
6725609843 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/7.uart_perf.2254463540 |
|
|
Aug 23 03:27:02 AM UTC 24 |
Aug 23 03:37:00 AM UTC 24 |
12997679628 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/11.uart_stress_all.2077030985 |
|
|
Aug 23 03:30:13 AM UTC 24 |
Aug 23 03:37:00 AM UTC 24 |
451625899763 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_intr.473176440 |
|
|
Aug 23 03:35:43 AM UTC 24 |
Aug 23 03:37:08 AM UTC 24 |
61757340550 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_noise_filter.274063820 |
|
|
Aug 23 03:34:46 AM UTC 24 |
Aug 23 03:37:11 AM UTC 24 |
132029048726 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_loopback.1567514691 |
|
|
Aug 23 03:37:12 AM UTC 24 |
Aug 23 03:37:15 AM UTC 24 |
2897223953 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.3576781472 |
|
|
Aug 23 03:36:20 AM UTC 24 |
Aug 23 03:37:17 AM UTC 24 |
4291479691 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.3426797336 |
|
|
Aug 23 03:37:08 AM UTC 24 |
Aug 23 03:37:22 AM UTC 24 |
6230844017 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.3007542321 |
|
|
Aug 23 03:37:00 AM UTC 24 |
Aug 23 03:37:26 AM UTC 24 |
38096635037 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/12.uart_fifo_full.3831894023 |
|
|
Aug 23 03:30:31 AM UTC 24 |
Aug 23 03:37:26 AM UTC 24 |
190266664599 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_fifo_reset.1581854576 |
|
|
Aug 23 03:36:50 AM UTC 24 |
Aug 23 03:37:27 AM UTC 24 |
108753943585 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.4087012974 |
|
|
Aug 23 03:37:00 AM UTC 24 |
Aug 23 03:37:28 AM UTC 24 |
14381705171 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_alert_test.1006829591 |
|
|
Aug 23 03:37:27 AM UTC 24 |
Aug 23 03:37:28 AM UTC 24 |
12698415 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.3023947186 |
|
|
Aug 23 03:37:23 AM UTC 24 |
Aug 23 03:37:29 AM UTC 24 |
1276160254 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_smoke.2923814106 |
|
|
Aug 23 03:37:28 AM UTC 24 |
Aug 23 03:37:30 AM UTC 24 |
502521781 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_noise_filter.1463771432 |
|
|
Aug 23 03:37:00 AM UTC 24 |
Aug 23 03:37:35 AM UTC 24 |
19675711226 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/14.uart_stress_all.932802679 |
|
|
Aug 23 03:33:24 AM UTC 24 |
Aug 23 03:37:39 AM UTC 24 |
141937569086 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.25808117 |
|
|
Aug 23 03:32:12 AM UTC 24 |
Aug 23 03:37:39 AM UTC 24 |
81148147130 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.572819466 |
|
|
Aug 23 03:36:49 AM UTC 24 |
Aug 23 03:37:42 AM UTC 24 |
120236558356 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.1430089297 |
|
|
Aug 23 03:37:43 AM UTC 24 |
Aug 23 03:37:47 AM UTC 24 |
1871547838 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_tx_rx.1074629884 |
|
|
Aug 23 03:37:29 AM UTC 24 |
Aug 23 03:37:48 AM UTC 24 |
10516229288 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.2802718194 |
|
|
Aug 23 03:35:56 AM UTC 24 |
Aug 23 03:37:48 AM UTC 24 |
102884384910 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_loopback.3258336839 |
|
|
Aug 23 03:37:48 AM UTC 24 |
Aug 23 03:37:51 AM UTC 24 |
1548272275 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.3827533707 |
|
|
Aug 23 03:37:48 AM UTC 24 |
Aug 23 03:37:52 AM UTC 24 |
806095676 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.4191994314 |
|
|
Aug 23 03:33:15 AM UTC 24 |
Aug 23 03:37:54 AM UTC 24 |
78110221461 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_fifo_reset.3345909520 |
|
|
Aug 23 03:37:31 AM UTC 24 |
Aug 23 03:38:00 AM UTC 24 |
15995993804 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.3923565514 |
|
|
Aug 23 03:37:30 AM UTC 24 |
Aug 23 03:38:05 AM UTC 24 |
24747782388 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_alert_test.4115134646 |
|
|
Aug 23 03:38:07 AM UTC 24 |
Aug 23 03:38:08 AM UTC 24 |
14434229 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_smoke.1418311779 |
|
|
Aug 23 03:38:09 AM UTC 24 |
Aug 23 03:38:11 AM UTC 24 |
312969456 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_fifo_full.4066481573 |
|
|
Aug 23 03:37:29 AM UTC 24 |
Aug 23 03:38:26 AM UTC 24 |
64668470220 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_fifo_full.2661378259 |
|
|
Aug 23 03:35:14 AM UTC 24 |
Aug 23 03:38:26 AM UTC 24 |
139335993934 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_stress_all.1849772788 |
|
|
Aug 23 03:38:01 AM UTC 24 |
Aug 23 03:38:34 AM UTC 24 |
67721526907 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_rx_oversample.486809669 |
|
|
Aug 23 03:37:35 AM UTC 24 |
Aug 23 03:38:35 AM UTC 24 |
7575057047 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_noise_filter.502750620 |
|
|
Aug 23 03:37:40 AM UTC 24 |
Aug 23 03:38:39 AM UTC 24 |
509922516720 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.3330189794 |
|
|
Aug 23 03:34:58 AM UTC 24 |
Aug 23 03:38:42 AM UTC 24 |
248254714853 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_tx_rx.3965342792 |
|
|
Aug 23 03:38:12 AM UTC 24 |
Aug 23 03:38:45 AM UTC 24 |
23842550428 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_rx_oversample.1909581749 |
|
|
Aug 23 03:38:36 AM UTC 24 |
Aug 23 03:38:47 AM UTC 24 |
3385018265 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.112210908 |
|
|
Aug 23 03:38:46 AM UTC 24 |
Aug 23 03:38:51 AM UTC 24 |
3273388334 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/14.uart_intr.561340509 |
|
|
Aug 23 03:32:50 AM UTC 24 |
Aug 23 03:38:52 AM UTC 24 |
176417868557 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_loopback.3640856917 |
|
|
Aug 23 03:38:52 AM UTC 24 |
Aug 23 03:38:55 AM UTC 24 |
2528921233 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.3700545051 |
|
|
Aug 23 03:37:56 AM UTC 24 |
Aug 23 03:38:55 AM UTC 24 |
11771382734 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/5.uart_perf.1178639010 |
|
|
Aug 23 03:25:36 AM UTC 24 |
Aug 23 03:38:57 AM UTC 24 |
19886885000 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_fifo_full.402623117 |
|
|
Aug 23 03:38:27 AM UTC 24 |
Aug 23 03:38:58 AM UTC 24 |
39418154779 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_intr.4177101068 |
|
|
Aug 23 03:37:40 AM UTC 24 |
Aug 23 03:39:02 AM UTC 24 |
144649964286 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.3671489858 |
|
|
Aug 23 03:37:47 AM UTC 24 |
Aug 23 03:39:04 AM UTC 24 |
62574528693 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_stress_all.2219539203 |
|
|
Aug 23 03:37:27 AM UTC 24 |
Aug 23 03:39:04 AM UTC 24 |
273233048970 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_fifo_reset.531192506 |
|
|
Aug 23 03:38:35 AM UTC 24 |
Aug 23 03:39:05 AM UTC 24 |
37609235267 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.3002849002 |
|
|
Aug 23 03:38:51 AM UTC 24 |
Aug 23 03:39:05 AM UTC 24 |
6619166036 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_alert_test.3802112763 |
|
|
Aug 23 03:39:04 AM UTC 24 |
Aug 23 03:39:05 AM UTC 24 |
39408702 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_noise_filter.1023557119 |
|
|
Aug 23 03:38:42 AM UTC 24 |
Aug 23 03:39:05 AM UTC 24 |
52744847040 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_rx_oversample.1302242708 |
|
|
Aug 23 03:39:06 AM UTC 24 |
Aug 23 03:39:09 AM UTC 24 |
1899859397 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_tx_rx.3611584105 |
|
|
Aug 23 03:39:05 AM UTC 24 |
Aug 23 03:39:14 AM UTC 24 |
23533509055 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_perf.999347778 |
|
|
Aug 23 03:37:16 AM UTC 24 |
Aug 23 03:39:15 AM UTC 24 |
22254682242 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.887984144 |
|
|
Aug 23 03:38:48 AM UTC 24 |
Aug 23 03:39:15 AM UTC 24 |
69584599777 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_stress_all.1442104841 |
|
|
Aug 23 03:36:24 AM UTC 24 |
Aug 23 03:39:16 AM UTC 24 |
213217282195 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_smoke.4014819985 |
|
|
Aug 23 03:39:05 AM UTC 24 |
Aug 23 03:39:17 AM UTC 24 |
6171644964 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.3355027705 |
|
|
Aug 23 03:39:16 AM UTC 24 |
Aug 23 03:39:18 AM UTC 24 |
3940782513 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.2404679025 |
|
|
Aug 23 03:39:17 AM UTC 24 |
Aug 23 03:39:19 AM UTC 24 |
2065509628 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2439956290 |
|
|
Aug 23 03:27:44 AM UTC 24 |
Aug 23 03:39:22 AM UTC 24 |
94734053643 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_loopback.820815634 |
|
|
Aug 23 03:39:18 AM UTC 24 |
Aug 23 03:39:23 AM UTC 24 |
3146462657 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_perf.2463523084 |
|
|
Aug 23 03:36:05 AM UTC 24 |
Aug 23 03:39:26 AM UTC 24 |
15611976528 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/13.uart_perf.590422686 |
|
|
Aug 23 03:32:11 AM UTC 24 |
Aug 23 03:39:27 AM UTC 24 |
9602807337 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_alert_test.2805176792 |
|
|
Aug 23 03:39:26 AM UTC 24 |
Aug 23 03:39:28 AM UTC 24 |
13113939 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_smoke.266523657 |
|
|
Aug 23 03:39:27 AM UTC 24 |
Aug 23 03:39:29 AM UTC 24 |
286026476 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_fifo_reset.1678628732 |
|
|
Aug 23 03:39:06 AM UTC 24 |
Aug 23 03:39:31 AM UTC 24 |
16761093721 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.3638624820 |
|
|
Aug 23 03:39:16 AM UTC 24 |
Aug 23 03:39:33 AM UTC 24 |
15004983187 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.3264077355 |
|
|
Aug 23 03:38:57 AM UTC 24 |
Aug 23 03:39:39 AM UTC 24 |
3919961115 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_rx_oversample.26301021 |
|
|
Aug 23 03:39:40 AM UTC 24 |
Aug 23 03:39:55 AM UTC 24 |
4126470294 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_fifo_full.3504821923 |
|
|
Aug 23 03:39:06 AM UTC 24 |
Aug 23 03:40:04 AM UTC 24 |
42655248600 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/14.uart_perf.3398950002 |
|
|
Aug 23 03:33:15 AM UTC 24 |
Aug 23 03:40:05 AM UTC 24 |
32276658392 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_intr.786874782 |
|
|
Aug 23 03:39:56 AM UTC 24 |
Aug 23 03:40:06 AM UTC 24 |
27114997516 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_intr.2954656595 |
|
|
Aug 23 03:38:40 AM UTC 24 |
Aug 23 03:40:06 AM UTC 24 |
64214626981 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.805196334 |
|
|
Aug 23 03:40:07 AM UTC 24 |
Aug 23 03:40:09 AM UTC 24 |
254364576 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.2815511601 |
|
|
Aug 23 03:40:06 AM UTC 24 |
Aug 23 03:40:12 AM UTC 24 |
3035206928 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.2252731663 |
|
|
Aug 23 03:34:00 AM UTC 24 |
Aug 23 03:40:13 AM UTC 24 |
182449815955 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_loopback.3676112095 |
|
|
Aug 23 03:40:10 AM UTC 24 |
Aug 23 03:40:14 AM UTC 24 |
5158405139 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.4165819355 |
|
|
Aug 23 03:39:23 AM UTC 24 |
Aug 23 03:40:20 AM UTC 24 |
15866970683 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/7.uart_stress_all.3000350191 |
|
|
Aug 23 03:27:05 AM UTC 24 |
Aug 23 03:40:22 AM UTC 24 |
120791149941 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_alert_test.4278603412 |
|
|
Aug 23 03:40:23 AM UTC 24 |
Aug 23 03:40:25 AM UTC 24 |
61817759 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/16.uart_perf.4155891388 |
|
|
Aug 23 03:34:57 AM UTC 24 |
Aug 23 03:40:26 AM UTC 24 |
12970574094 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.4127228456 |
|
|
Aug 23 03:39:32 AM UTC 24 |
Aug 23 03:40:31 AM UTC 24 |
42466352347 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_fifo_full.1339678700 |
|
|
Aug 23 03:39:30 AM UTC 24 |
Aug 23 03:40:33 AM UTC 24 |
77813259205 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.4117141391 |
|
|
Aug 23 03:40:07 AM UTC 24 |
Aug 23 03:40:36 AM UTC 24 |
98093974334 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_noise_filter.3902107483 |
|
|
Aug 23 03:39:15 AM UTC 24 |
Aug 23 03:40:40 AM UTC 24 |
242193696837 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_smoke.2341464871 |
|
|
Aug 23 03:40:25 AM UTC 24 |
Aug 23 03:40:43 AM UTC 24 |
5387276119 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/0.uart_perf.717479072 |
|
|
Aug 23 03:23:03 AM UTC 24 |
Aug 23 03:40:44 AM UTC 24 |
19704539013 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.1575768949 |
|
|
Aug 23 03:40:15 AM UTC 24 |
Aug 23 03:40:45 AM UTC 24 |
9456048824 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.253579295 |
|
|
Aug 23 03:40:33 AM UTC 24 |
Aug 23 03:40:45 AM UTC 24 |
51938661051 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.2870452999 |
|
|
Aug 23 03:40:46 AM UTC 24 |
Aug 23 03:40:48 AM UTC 24 |
3842410420 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_tx_rx.3513360763 |
|
|
Aug 23 03:39:28 AM UTC 24 |
Aug 23 03:40:53 AM UTC 24 |
49169788267 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_perf.1284405668 |
|
|
Aug 23 03:38:55 AM UTC 24 |
Aug 23 03:40:54 AM UTC 24 |
37575838855 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_fifo_reset.1271769990 |
|
|
Aug 23 03:39:34 AM UTC 24 |
Aug 23 03:40:55 AM UTC 24 |
57509632939 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_loopback.2496451696 |
|
|
Aug 23 03:40:54 AM UTC 24 |
Aug 23 03:40:58 AM UTC 24 |
5740510541 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_fifo_reset.3500254476 |
|
|
Aug 23 03:40:36 AM UTC 24 |
Aug 23 03:41:03 AM UTC 24 |
74525833158 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.3596815812 |
|
|
Aug 23 03:38:27 AM UTC 24 |
Aug 23 03:41:12 AM UTC 24 |
72522274942 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.3304705115 |
|
|
Aug 23 03:40:49 AM UTC 24 |
Aug 23 03:41:14 AM UTC 24 |
6569492080 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_alert_test.1339278754 |
|
|
Aug 23 03:41:12 AM UTC 24 |
Aug 23 03:41:14 AM UTC 24 |
22149759 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.909249956 |
|
|
Aug 23 03:37:52 AM UTC 24 |
Aug 23 03:41:15 AM UTC 24 |
40274911267 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.664725718 |
|
|
Aug 23 03:39:06 AM UTC 24 |
Aug 23 03:41:23 AM UTC 24 |
131296252324 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_fifo_full.3835439548 |
|
|
Aug 23 03:41:16 AM UTC 24 |
Aug 23 03:41:29 AM UTC 24 |
31429759934 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_rx_oversample.89035628 |
|
|
Aug 23 03:40:41 AM UTC 24 |
Aug 23 03:41:29 AM UTC 24 |
6918676746 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_smoke.599933833 |
|
|
Aug 23 03:41:14 AM UTC 24 |
Aug 23 03:41:33 AM UTC 24 |
6077397078 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_tx_rx.3821636554 |
|
|
Aug 23 03:40:27 AM UTC 24 |
Aug 23 03:41:33 AM UTC 24 |
58655280786 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_rx_oversample.1553809843 |
|
|
Aug 23 03:41:30 AM UTC 24 |
Aug 23 03:41:38 AM UTC 24 |
4655479454 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_perf.4195751731 |
|
|
Aug 23 03:39:19 AM UTC 24 |
Aug 23 03:41:38 AM UTC 24 |
11446567355 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_intr.170773864 |
|
|
Aug 23 03:41:34 AM UTC 24 |
Aug 23 03:41:41 AM UTC 24 |
31223150773 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.4062459835 |
|
|
Aug 23 03:41:38 AM UTC 24 |
Aug 23 03:41:42 AM UTC 24 |
2934893127 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_fifo_reset.954523628 |
|
|
Aug 23 03:41:30 AM UTC 24 |
Aug 23 03:41:45 AM UTC 24 |
19485277760 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_stress_all.1039023801 |
|
|
Aug 23 03:40:21 AM UTC 24 |
Aug 23 03:41:46 AM UTC 24 |
378534646878 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.701036954 |
|
|
Aug 23 03:41:42 AM UTC 24 |
Aug 23 03:41:47 AM UTC 24 |
1228463173 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_noise_filter.1599211987 |
|
|
Aug 23 03:40:05 AM UTC 24 |
Aug 23 03:41:48 AM UTC 24 |
208610056400 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.2664583305 |
|
|
Aug 23 03:40:59 AM UTC 24 |
Aug 23 03:41:49 AM UTC 24 |
4461198206 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.3109801975 |
|
|
Aug 23 03:40:46 AM UTC 24 |
Aug 23 03:41:50 AM UTC 24 |
40227088019 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_alert_test.1217494900 |
|
|
Aug 23 03:41:50 AM UTC 24 |
Aug 23 03:41:51 AM UTC 24 |
34869332 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_smoke.3940797213 |
|
|
Aug 23 03:41:51 AM UTC 24 |
Aug 23 03:41:54 AM UTC 24 |
645837572 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.3489457151 |
|
|
Aug 23 03:41:38 AM UTC 24 |
Aug 23 03:41:54 AM UTC 24 |
45073329195 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_loopback.3315984130 |
|
|
Aug 23 03:41:42 AM UTC 24 |
Aug 23 03:41:56 AM UTC 24 |
5686077766 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.3392575198 |
|
|
Aug 23 03:41:24 AM UTC 24 |
Aug 23 03:41:58 AM UTC 24 |
212080036393 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_intr.1140984190 |
|
|
Aug 23 03:40:44 AM UTC 24 |
Aug 23 03:41:59 AM UTC 24 |
45466737475 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_rx_oversample.2292498427 |
|
|
Aug 23 03:41:58 AM UTC 24 |
Aug 23 03:42:00 AM UTC 24 |
1213032380 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_noise_filter.960455814 |
|
|
Aug 23 03:40:45 AM UTC 24 |
Aug 23 03:42:06 AM UTC 24 |
90701833645 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.2203161139 |
|
|
Aug 23 03:36:19 AM UTC 24 |
Aug 23 03:42:06 AM UTC 24 |
58483094754 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_tx_rx.3338131286 |
|
|
Aug 23 03:41:14 AM UTC 24 |
Aug 23 03:42:07 AM UTC 24 |
464703012503 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.2451917129 |
|
|
Aug 23 03:42:08 AM UTC 24 |
Aug 23 03:42:12 AM UTC 24 |
7484330933 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.3656467469 |
|
|
Aug 23 03:42:08 AM UTC 24 |
Aug 23 03:42:14 AM UTC 24 |
8908700040 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.653264811 |
|
|
Aug 23 03:42:08 AM UTC 24 |
Aug 23 03:42:18 AM UTC 24 |
6223437782 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_noise_filter.3667133191 |
|
|
Aug 23 03:41:34 AM UTC 24 |
Aug 23 03:42:20 AM UTC 24 |
188743158958 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.3676845914 |
|
|
Aug 23 03:37:18 AM UTC 24 |
Aug 23 03:42:21 AM UTC 24 |
181095318529 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.3496660449 |
|
|
Aug 23 03:41:48 AM UTC 24 |
Aug 23 03:42:21 AM UTC 24 |
2646650564 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_alert_test.1757749367 |
|
|
Aug 23 03:42:22 AM UTC 24 |
Aug 23 03:42:24 AM UTC 24 |
13968015 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_loopback.1280976510 |
|
|
Aug 23 03:42:13 AM UTC 24 |
Aug 23 03:42:25 AM UTC 24 |
6827036767 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.1671862690 |
|
|
Aug 23 03:40:56 AM UTC 24 |
Aug 23 03:42:30 AM UTC 24 |
153208908312 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_smoke.460191338 |
|
|
Aug 23 03:42:24 AM UTC 24 |
Aug 23 03:42:36 AM UTC 24 |
10564664036 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.2337051720 |
|
|
Aug 23 03:38:55 AM UTC 24 |
Aug 23 03:42:39 AM UTC 24 |
105752159192 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_tx_rx.2487965422 |
|
|
Aug 23 03:41:52 AM UTC 24 |
Aug 23 03:42:44 AM UTC 24 |
28963519634 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.234789910 |
|
|
Aug 23 03:42:21 AM UTC 24 |
Aug 23 03:42:45 AM UTC 24 |
3068336914 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_fifo_full.2967401902 |
|
|
Aug 23 03:40:31 AM UTC 24 |
Aug 23 03:42:58 AM UTC 24 |
191708240967 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.491498946 |
|
|
Aug 23 03:42:59 AM UTC 24 |
Aug 23 03:43:03 AM UTC 24 |
1381509807 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_tx_rx.880550739 |
|
|
Aug 23 03:42:25 AM UTC 24 |
Aug 23 03:43:05 AM UTC 24 |
121346668495 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/19.uart_perf.1961672134 |
|
|
Aug 23 03:37:51 AM UTC 24 |
Aug 23 03:43:05 AM UTC 24 |
5698676764 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_loopback.1354026717 |
|
|
Aug 23 03:43:06 AM UTC 24 |
Aug 23 03:43:08 AM UTC 24 |
3005215155 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.2319061136 |
|
|
Aug 23 03:43:06 AM UTC 24 |
Aug 23 03:43:08 AM UTC 24 |
232937850 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_stress_all.1193190916 |
|
|
Aug 23 03:41:03 AM UTC 24 |
Aug 23 03:43:13 AM UTC 24 |
297051631791 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_fifo_reset.60791018 |
|
|
Aug 23 03:41:56 AM UTC 24 |
Aug 23 03:43:14 AM UTC 24 |
55748523099 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_noise_filter.2266910633 |
|
|
Aug 23 03:42:59 AM UTC 24 |
Aug 23 03:43:15 AM UTC 24 |
40996044908 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_fifo_full.371259839 |
|
|
Aug 23 03:42:30 AM UTC 24 |
Aug 23 03:43:16 AM UTC 24 |
32832015810 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_alert_test.1251892082 |
|
|
Aug 23 03:43:15 AM UTC 24 |
Aug 23 03:43:17 AM UTC 24 |
92529439 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.3647721524 |
|
|
Aug 23 03:43:03 AM UTC 24 |
Aug 23 03:43:19 AM UTC 24 |
31325177772 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.2740708480 |
|
|
Aug 23 03:41:47 AM UTC 24 |
Aug 23 03:43:21 AM UTC 24 |
87766618484 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_rx_oversample.3158704837 |
|
|
Aug 23 03:42:46 AM UTC 24 |
Aug 23 03:43:21 AM UTC 24 |
4622948846 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/18.uart_intr.1524037459 |
|
|
Aug 23 03:36:57 AM UTC 24 |
Aug 23 03:43:22 AM UTC 24 |
257165232510 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.469268256 |
|
|
Aug 23 03:41:55 AM UTC 24 |
Aug 23 03:43:29 AM UTC 24 |
141437565338 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_fifo_reset.1988287747 |
|
|
Aug 23 03:42:39 AM UTC 24 |
Aug 23 03:43:30 AM UTC 24 |
105250697036 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_smoke.2068904935 |
|
|
Aug 23 03:43:18 AM UTC 24 |
Aug 23 03:43:34 AM UTC 24 |
5717288203 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_rx_oversample.3700438429 |
|
|
Aug 23 03:43:23 AM UTC 24 |
Aug 23 03:43:36 AM UTC 24 |
5848350691 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.3609438576 |
|
|
Aug 23 03:39:20 AM UTC 24 |
Aug 23 03:43:44 AM UTC 24 |
89411570686 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.1820595598 |
|
|
Aug 23 03:43:22 AM UTC 24 |
Aug 23 03:43:50 AM UTC 24 |
63160805174 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_fifo_reset.4268338435 |
|
|
Aug 23 03:43:22 AM UTC 24 |
Aug 23 03:43:55 AM UTC 24 |
39612209892 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_stress_all.3260296545 |
|
|
Aug 23 03:42:22 AM UTC 24 |
Aug 23 03:43:59 AM UTC 24 |
66239616770 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_loopback.3902806887 |
|
|
Aug 23 03:43:50 AM UTC 24 |
Aug 23 03:44:02 AM UTC 24 |
9763105864 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.1904262829 |
|
|
Aug 23 03:43:45 AM UTC 24 |
Aug 23 03:44:06 AM UTC 24 |
6285245543 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_perf.350189807 |
|
|
Aug 23 03:42:15 AM UTC 24 |
Aug 23 03:44:12 AM UTC 24 |
10096381566 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.2436485039 |
|
|
Aug 23 03:43:13 AM UTC 24 |
Aug 23 03:44:12 AM UTC 24 |
14297780887 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_perf.3117514597 |
|
|
Aug 23 03:41:45 AM UTC 24 |
Aug 23 03:44:14 AM UTC 24 |
18467513537 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_alert_test.2806905120 |
|
|
Aug 23 03:44:13 AM UTC 24 |
Aug 23 03:44:14 AM UTC 24 |
42354381 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_smoke.4075328982 |
|
|
Aug 23 03:44:13 AM UTC 24 |
Aug 23 03:44:15 AM UTC 24 |
505413505 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_intr.1870387256 |
|
|
Aug 23 03:42:46 AM UTC 24 |
Aug 23 03:44:18 AM UTC 24 |
197168573411 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_fifo_full.2873156175 |
|
|
Aug 23 03:43:20 AM UTC 24 |
Aug 23 03:44:19 AM UTC 24 |
40154810247 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_rx_oversample.2275659015 |
|
|
Aug 23 03:44:19 AM UTC 24 |
Aug 23 03:44:23 AM UTC 24 |
3650548717 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.847633540 |
|
|
Aug 23 03:44:03 AM UTC 24 |
Aug 23 03:44:26 AM UTC 24 |
1968564942 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.3395625402 |
|
|
Aug 23 03:43:34 AM UTC 24 |
Aug 23 03:44:29 AM UTC 24 |
39855098176 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_fifo_reset.3464038706 |
|
|
Aug 23 03:44:18 AM UTC 24 |
Aug 23 03:44:37 AM UTC 24 |
10790551310 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.2950567772 |
|
|
Aug 23 03:44:16 AM UTC 24 |
Aug 23 03:44:43 AM UTC 24 |
35081528514 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_fifo_full.2604805197 |
|
|
Aug 23 03:44:15 AM UTC 24 |
Aug 23 03:44:46 AM UTC 24 |
134502799168 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.620045406 |
|
|
Aug 23 03:44:44 AM UTC 24 |
Aug 23 03:44:47 AM UTC 24 |
532374178 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.1581394821 |
|
|
Aug 23 03:40:13 AM UTC 24 |
Aug 23 03:44:48 AM UTC 24 |
97312332165 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.3247851256 |
|
|
Aug 23 03:44:38 AM UTC 24 |
Aug 23 03:44:55 AM UTC 24 |
33410743661 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_tx_rx.692265588 |
|
|
Aug 23 03:44:15 AM UTC 24 |
Aug 23 03:45:01 AM UTC 24 |
31689703126 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.3773150764 |
|
|
Aug 23 03:44:31 AM UTC 24 |
Aug 23 03:45:03 AM UTC 24 |
38702538459 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_alert_test.2133367521 |
|
|
Aug 23 03:45:03 AM UTC 24 |
Aug 23 03:45:05 AM UTC 24 |
103806109 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.3776691251 |
|
|
Aug 23 03:42:36 AM UTC 24 |
Aug 23 03:45:07 AM UTC 24 |
83683887995 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_smoke.4211554923 |
|
|
Aug 23 03:45:05 AM UTC 24 |
Aug 23 03:45:09 AM UTC 24 |
872044837 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_noise_filter.27423787 |
|
|
Aug 23 03:43:31 AM UTC 24 |
Aug 23 03:45:09 AM UTC 24 |
227678706991 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.2203374148 |
|
|
Aug 23 03:43:37 AM UTC 24 |
Aug 23 03:45:11 AM UTC 24 |
57524505631 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_loopback.1135774146 |
|
|
Aug 23 03:44:47 AM UTC 24 |
Aug 23 03:45:12 AM UTC 24 |
11950995368 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_rx_oversample.1451260513 |
|
|
Aug 23 03:45:13 AM UTC 24 |
Aug 23 03:45:15 AM UTC 24 |
1958775816 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_perf.499775796 |
|
|
Aug 23 03:44:47 AM UTC 24 |
Aug 23 03:45:20 AM UTC 24 |
2196581416 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_tx_rx.3562445623 |
|
|
Aug 23 03:45:08 AM UTC 24 |
Aug 23 03:45:21 AM UTC 24 |
16196519197 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.3754052799 |
|
|
Aug 23 03:44:55 AM UTC 24 |
Aug 23 03:45:23 AM UTC 24 |
4995697729 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.2294438486 |
|
|
Aug 23 03:45:22 AM UTC 24 |
Aug 23 03:45:31 AM UTC 24 |
5104724873 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_intr.2783313283 |
|
|
Aug 23 03:45:16 AM UTC 24 |
Aug 23 03:45:32 AM UTC 24 |
36167025117 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.3189397664 |
|
|
Aug 23 03:45:31 AM UTC 24 |
Aug 23 03:45:34 AM UTC 24 |
1396886741 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.1121542735 |
|
|
Aug 23 03:45:09 AM UTC 24 |
Aug 23 03:45:37 AM UTC 24 |
66824660632 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_loopback.907402703 |
|
|
Aug 23 03:45:33 AM UTC 24 |
Aug 23 03:45:40 AM UTC 24 |
4947723885 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_fifo_reset.1159332334 |
|
|
Aug 23 03:45:12 AM UTC 24 |
Aug 23 03:45:49 AM UTC 24 |
25237382939 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.1998094588 |
|
|
Aug 23 03:45:40 AM UTC 24 |
Aug 23 03:46:02 AM UTC 24 |
8022913619 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_alert_test.178550727 |
|
|
Aug 23 03:46:03 AM UTC 24 |
Aug 23 03:46:04 AM UTC 24 |
15990389 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.3105049416 |
|
|
Aug 23 03:42:19 AM UTC 24 |
Aug 23 03:46:08 AM UTC 24 |
68582372474 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_tx_rx.3703847084 |
|
|
Aug 23 03:43:18 AM UTC 24 |
Aug 23 03:46:16 AM UTC 24 |
94614979707 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_noise_filter.874535070 |
|
|
Aug 23 03:45:21 AM UTC 24 |
Aug 23 03:46:23 AM UTC 24 |
155042778493 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_smoke.3490005658 |
|
|
Aug 23 03:46:05 AM UTC 24 |
Aug 23 03:46:23 AM UTC 24 |
6285110532 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_tx_rx.668251819 |
|
|
Aug 23 03:46:09 AM UTC 24 |
Aug 23 03:46:31 AM UTC 24 |
16033651850 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_fifo_reset.750209555 |
|
|
Aug 23 03:46:24 AM UTC 24 |
Aug 23 03:46:32 AM UTC 24 |
60636461825 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_perf.2411591185 |
|
|
Aug 23 03:43:09 AM UTC 24 |
Aug 23 03:46:34 AM UTC 24 |
12224564252 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_rx_oversample.4009725682 |
|
|
Aug 23 03:46:31 AM UTC 24 |
Aug 23 03:46:35 AM UTC 24 |
1925006995 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_noise_filter.2289955824 |
|
|
Aug 23 03:42:01 AM UTC 24 |
Aug 23 03:46:39 AM UTC 24 |
131700106620 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.2952209027 |
|
|
Aug 23 03:46:35 AM UTC 24 |
Aug 23 03:46:40 AM UTC 24 |
4215761123 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_intr.1093719099 |
|
|
Aug 23 03:46:32 AM UTC 24 |
Aug 23 03:46:40 AM UTC 24 |
27552111853 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.913630633 |
|
|
Aug 23 03:46:40 AM UTC 24 |
Aug 23 03:46:46 AM UTC 24 |
1126957478 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_fifo_full.2746796860 |
|
|
Aug 23 03:45:09 AM UTC 24 |
Aug 23 03:46:49 AM UTC 24 |
57971739446 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.4167312069 |
|
|
Aug 23 03:46:24 AM UTC 24 |
Aug 23 03:46:50 AM UTC 24 |
46248443884 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_loopback.381565293 |
|
|
Aug 23 03:46:41 AM UTC 24 |
Aug 23 03:46:53 AM UTC 24 |
8035326100 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/24.uart_stress_all.2385440967 |
|
|
Aug 23 03:41:49 AM UTC 24 |
Aug 23 03:46:57 AM UTC 24 |
341922943907 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/4.uart_perf.3817329812 |
|
|
Aug 23 03:24:53 AM UTC 24 |
Aug 23 03:46:58 AM UTC 24 |
24705585296 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_alert_test.458643597 |
|
|
Aug 23 03:46:58 AM UTC 24 |
Aug 23 03:46:59 AM UTC 24 |
14069629 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_intr.1497154744 |
|
|
Aug 23 03:43:30 AM UTC 24 |
Aug 23 03:47:00 AM UTC 24 |
171081386759 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_smoke.732859721 |
|
|
Aug 23 03:46:58 AM UTC 24 |
Aug 23 03:47:00 AM UTC 24 |
619154865 ps |