| T91 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.374919637 |
|
|
Aug 23 03:46:51 AM UTC 24 |
Aug 23 03:47:03 AM UTC 24 |
1056192866 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_tx_rx.3848504830 |
|
|
Aug 23 03:47:00 AM UTC 24 |
Aug 23 03:47:18 AM UTC 24 |
20239174663 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_stress_all.3588980384 |
|
|
Aug 23 03:39:23 AM UTC 24 |
Aug 23 03:47:26 AM UTC 24 |
206096795325 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_rx_oversample.1935162260 |
|
|
Aug 23 03:47:18 AM UTC 24 |
Aug 23 03:47:27 AM UTC 24 |
6788685985 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_fifo_reset.2372501818 |
|
|
Aug 23 03:47:03 AM UTC 24 |
Aug 23 03:47:27 AM UTC 24 |
16100366602 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.3154064966 |
|
|
Aug 23 03:47:29 AM UTC 24 |
Aug 23 03:47:34 AM UTC 24 |
2881242505 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.4023586675 |
|
|
Aug 23 03:46:39 AM UTC 24 |
Aug 23 03:47:50 AM UTC 24 |
54314892193 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.2888528426 |
|
|
Aug 23 03:47:51 AM UTC 24 |
Aug 23 03:47:54 AM UTC 24 |
514888864 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_fifo_full.2059163046 |
|
|
Aug 23 03:46:17 AM UTC 24 |
Aug 23 03:47:55 AM UTC 24 |
128194650599 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.3480260477 |
|
|
Aug 23 03:45:24 AM UTC 24 |
Aug 23 03:47:55 AM UTC 24 |
134733629033 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_loopback.1170165398 |
|
|
Aug 23 03:47:54 AM UTC 24 |
Aug 23 03:48:01 AM UTC 24 |
4789317324 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/21.uart_intr.1074772303 |
|
|
Aug 23 03:39:10 AM UTC 24 |
Aug 23 03:48:06 AM UTC 24 |
325973841066 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.739587628 |
|
|
Aug 23 03:47:36 AM UTC 24 |
Aug 23 03:48:11 AM UTC 24 |
18618773047 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_alert_test.2395653336 |
|
|
Aug 23 03:48:11 AM UTC 24 |
Aug 23 03:48:13 AM UTC 24 |
34970698 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_smoke.3057330954 |
|
|
Aug 23 03:48:13 AM UTC 24 |
Aug 23 03:48:16 AM UTC 24 |
445140392 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_noise_filter.1090448096 |
|
|
Aug 23 03:44:26 AM UTC 24 |
Aug 23 03:48:26 AM UTC 24 |
155167029537 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_noise_filter.1969661577 |
|
|
Aug 23 03:47:28 AM UTC 24 |
Aug 23 03:48:31 AM UTC 24 |
142544649701 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.2709488175 |
|
|
Aug 23 03:44:00 AM UTC 24 |
Aug 23 03:48:45 AM UTC 24 |
57317632022 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.3585016634 |
|
|
Aug 23 03:47:01 AM UTC 24 |
Aug 23 03:48:45 AM UTC 24 |
81723778497 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_intr.108120652 |
|
|
Aug 23 03:47:26 AM UTC 24 |
Aug 23 03:48:48 AM UTC 24 |
41817344078 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_fifo_full.2727829766 |
|
|
Aug 23 03:48:27 AM UTC 24 |
Aug 23 03:48:51 AM UTC 24 |
16610757481 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_rx_oversample.3820743531 |
|
|
Aug 23 03:48:46 AM UTC 24 |
Aug 23 03:48:57 AM UTC 24 |
4989044385 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_stress_all.2887726509 |
|
|
Aug 23 03:45:50 AM UTC 24 |
Aug 23 03:49:00 AM UTC 24 |
85822895684 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.3586946491 |
|
|
Aug 23 03:48:58 AM UTC 24 |
Aug 23 03:49:01 AM UTC 24 |
4945251313 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_perf.3707889422 |
|
|
Aug 23 03:43:55 AM UTC 24 |
Aug 23 03:49:04 AM UTC 24 |
25967724025 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.788112633 |
|
|
Aug 23 03:49:02 AM UTC 24 |
Aug 23 03:49:05 AM UTC 24 |
3851146910 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_noise_filter.2006028538 |
|
|
Aug 23 03:48:52 AM UTC 24 |
Aug 23 03:49:10 AM UTC 24 |
35790282482 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_loopback.745506787 |
|
|
Aug 23 03:49:05 AM UTC 24 |
Aug 23 03:49:11 AM UTC 24 |
4634616527 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_intr.4075879514 |
|
|
Aug 23 03:48:49 AM UTC 24 |
Aug 23 03:49:12 AM UTC 24 |
60405804183 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_fifo_reset.4162080001 |
|
|
Aug 23 03:48:46 AM UTC 24 |
Aug 23 03:49:16 AM UTC 24 |
57513675711 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.323778477 |
|
|
Aug 23 03:48:32 AM UTC 24 |
Aug 23 03:49:16 AM UTC 24 |
32808772234 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.2583226627 |
|
|
Aug 23 03:48:02 AM UTC 24 |
Aug 23 03:49:18 AM UTC 24 |
46548354612 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_alert_test.5502645 |
|
|
Aug 23 03:49:17 AM UTC 24 |
Aug 23 03:49:18 AM UTC 24 |
13656998 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_smoke.449306352 |
|
|
Aug 23 03:49:17 AM UTC 24 |
Aug 23 03:49:20 AM UTC 24 |
909399936 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_tx_rx.1375112129 |
|
|
Aug 23 03:48:16 AM UTC 24 |
Aug 23 03:49:29 AM UTC 24 |
46822350508 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_intr.3260634684 |
|
|
Aug 23 03:44:24 AM UTC 24 |
Aug 23 03:49:34 AM UTC 24 |
219491482705 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_rx_oversample.104155839 |
|
|
Aug 23 03:49:35 AM UTC 24 |
Aug 23 03:49:41 AM UTC 24 |
3693292416 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.1674318149 |
|
|
Aug 23 03:49:12 AM UTC 24 |
Aug 23 03:49:42 AM UTC 24 |
2163849042 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.935016777 |
|
|
Aug 23 03:49:01 AM UTC 24 |
Aug 23 03:49:45 AM UTC 24 |
96763276124 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.4127651514 |
|
|
Aug 23 03:49:45 AM UTC 24 |
Aug 23 03:49:48 AM UTC 24 |
603420003 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_stress_all.2164799426 |
|
|
Aug 23 03:45:02 AM UTC 24 |
Aug 23 03:49:50 AM UTC 24 |
224067423420 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_fifo_full.1508489977 |
|
|
Aug 23 03:49:19 AM UTC 24 |
Aug 23 03:49:52 AM UTC 24 |
96989645636 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.1220898317 |
|
|
Aug 23 03:49:51 AM UTC 24 |
Aug 23 03:49:54 AM UTC 24 |
693839456 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_fifo_reset.3767889849 |
|
|
Aug 23 03:49:30 AM UTC 24 |
Aug 23 03:49:54 AM UTC 24 |
258734776617 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_fifo_full.3351695541 |
|
|
Aug 23 03:47:01 AM UTC 24 |
Aug 23 03:49:56 AM UTC 24 |
296622055842 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_stress_all.3182117367 |
|
|
Aug 23 03:48:06 AM UTC 24 |
Aug 23 03:49:58 AM UTC 24 |
239333826237 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_noise_filter.272949051 |
|
|
Aug 23 03:46:34 AM UTC 24 |
Aug 23 03:50:02 AM UTC 24 |
97468227833 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_intr.1637888194 |
|
|
Aug 23 03:49:42 AM UTC 24 |
Aug 23 03:50:02 AM UTC 24 |
13402559617 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_alert_test.1779069465 |
|
|
Aug 23 03:50:03 AM UTC 24 |
Aug 23 03:50:05 AM UTC 24 |
12301633 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_loopback.1821999458 |
|
|
Aug 23 03:49:53 AM UTC 24 |
Aug 23 03:50:08 AM UTC 24 |
5426734278 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_smoke.3691989565 |
|
|
Aug 23 03:50:03 AM UTC 24 |
Aug 23 03:50:15 AM UTC 24 |
6072097535 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.2194060417 |
|
|
Aug 23 03:49:20 AM UTC 24 |
Aug 23 03:50:15 AM UTC 24 |
92809285896 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_noise_filter.2338669814 |
|
|
Aug 23 03:49:43 AM UTC 24 |
Aug 23 03:50:16 AM UTC 24 |
375609274600 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.2021507357 |
|
|
Aug 23 03:49:48 AM UTC 24 |
Aug 23 03:50:17 AM UTC 24 |
14843570006 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_perf.2540843644 |
|
|
Aug 23 03:49:05 AM UTC 24 |
Aug 23 03:50:21 AM UTC 24 |
6873952161 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_rx_oversample.690746521 |
|
|
Aug 23 03:50:16 AM UTC 24 |
Aug 23 03:50:26 AM UTC 24 |
5207653250 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_stress_all.3795351013 |
|
|
Aug 23 03:46:54 AM UTC 24 |
Aug 23 03:50:27 AM UTC 24 |
248904164847 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_perf.1441914386 |
|
|
Aug 23 03:46:47 AM UTC 24 |
Aug 23 03:50:27 AM UTC 24 |
30763935237 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.453063091 |
|
|
Aug 23 03:50:27 AM UTC 24 |
Aug 23 03:50:30 AM UTC 24 |
5267231349 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.158144496 |
|
|
Aug 23 03:50:28 AM UTC 24 |
Aug 23 03:50:30 AM UTC 24 |
5862915743 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_loopback.591082518 |
|
|
Aug 23 03:50:31 AM UTC 24 |
Aug 23 03:50:33 AM UTC 24 |
735075369 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/3.uart_stress_all.2973173427 |
|
|
Aug 23 03:24:25 AM UTC 24 |
Aug 23 03:50:33 AM UTC 24 |
225610547029 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.2545069593 |
|
|
Aug 23 03:49:57 AM UTC 24 |
Aug 23 03:50:35 AM UTC 24 |
13912397106 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/15.uart_stress_all.346018351 |
|
|
Aug 23 03:34:05 AM UTC 24 |
Aug 23 03:50:41 AM UTC 24 |
100243535715 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_fifo_full.2344889896 |
|
|
Aug 23 03:50:09 AM UTC 24 |
Aug 23 03:50:42 AM UTC 24 |
64127367353 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_intr.583144593 |
|
|
Aug 23 03:50:17 AM UTC 24 |
Aug 23 03:50:43 AM UTC 24 |
17680206109 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_alert_test.3009347335 |
|
|
Aug 23 03:50:43 AM UTC 24 |
Aug 23 03:50:44 AM UTC 24 |
20427515 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.2005981806 |
|
|
Aug 23 03:50:28 AM UTC 24 |
Aug 23 03:50:46 AM UTC 24 |
10894137223 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_fifo_overflow.1549660334 |
|
|
Aug 23 03:50:15 AM UTC 24 |
Aug 23 03:50:49 AM UTC 24 |
105553451934 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_tx_rx.2147052558 |
|
|
Aug 23 03:49:19 AM UTC 24 |
Aug 23 03:50:56 AM UTC 24 |
59625776731 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_perf.1509312122 |
|
|
Aug 23 03:49:55 AM UTC 24 |
Aug 23 03:50:59 AM UTC 24 |
15851707054 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.423176408 |
|
|
Aug 23 03:50:47 AM UTC 24 |
Aug 23 03:50:59 AM UTC 24 |
36399805798 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.704010887 |
|
|
Aug 23 03:50:34 AM UTC 24 |
Aug 23 03:51:02 AM UTC 24 |
16371013338 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_smoke.3352963039 |
|
|
Aug 23 03:50:44 AM UTC 24 |
Aug 23 03:51:03 AM UTC 24 |
5808312362 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_intr.2974358937 |
|
|
Aug 23 03:51:00 AM UTC 24 |
Aug 23 03:51:03 AM UTC 24 |
14417811982 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_rx_oversample.2518428500 |
|
|
Aug 23 03:50:57 AM UTC 24 |
Aug 23 03:51:05 AM UTC 24 |
1895525981 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_tx_rx.791560772 |
|
|
Aug 23 03:50:05 AM UTC 24 |
Aug 23 03:51:08 AM UTC 24 |
147465907012 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.2793002331 |
|
|
Aug 23 03:51:04 AM UTC 24 |
Aug 23 03:51:11 AM UTC 24 |
7282356100 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_stress_all.322415765 |
|
|
Aug 23 03:49:59 AM UTC 24 |
Aug 23 03:51:13 AM UTC 24 |
48123218064 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_fifo_reset.3278697232 |
|
|
Aug 23 03:50:15 AM UTC 24 |
Aug 23 03:51:16 AM UTC 24 |
187491152690 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_fifo_full.697882845 |
|
|
Aug 23 03:50:45 AM UTC 24 |
Aug 23 03:51:17 AM UTC 24 |
36421825720 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_loopback.3262647461 |
|
|
Aug 23 03:51:05 AM UTC 24 |
Aug 23 03:51:17 AM UTC 24 |
5952564228 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_alert_test.2385704168 |
|
|
Aug 23 03:51:17 AM UTC 24 |
Aug 23 03:51:19 AM UTC 24 |
24196501 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_smoke.3468550456 |
|
|
Aug 23 03:51:17 AM UTC 24 |
Aug 23 03:51:20 AM UTC 24 |
915126574 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_noise_filter.2022939973 |
|
|
Aug 23 03:50:22 AM UTC 24 |
Aug 23 03:51:24 AM UTC 24 |
153860473031 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_tx_rx.4112453765 |
|
|
Aug 23 03:50:44 AM UTC 24 |
Aug 23 03:51:26 AM UTC 24 |
31825287168 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.2960865082 |
|
|
Aug 23 03:51:03 AM UTC 24 |
Aug 23 03:51:28 AM UTC 24 |
32849978045 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.3833630537 |
|
|
Aug 23 03:51:14 AM UTC 24 |
Aug 23 03:51:34 AM UTC 24 |
15048415801 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.1334582474 |
|
|
Aug 23 03:44:49 AM UTC 24 |
Aug 23 03:51:35 AM UTC 24 |
112590960097 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_rx_oversample.2330573314 |
|
|
Aug 23 03:51:29 AM UTC 24 |
Aug 23 03:51:45 AM UTC 24 |
7178602405 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_perf.934763501 |
|
|
Aug 23 03:47:55 AM UTC 24 |
Aug 23 03:51:46 AM UTC 24 |
23582619826 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_fifo_reset.2335682928 |
|
|
Aug 23 03:50:49 AM UTC 24 |
Aug 23 03:51:50 AM UTC 24 |
42211620972 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.2029410901 |
|
|
Aug 23 03:51:04 AM UTC 24 |
Aug 23 03:51:51 AM UTC 24 |
118570179048 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.3850154925 |
|
|
Aug 23 03:51:46 AM UTC 24 |
Aug 23 03:51:51 AM UTC 24 |
2742923287 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/13.uart_stress_all.1163568733 |
|
|
Aug 23 03:32:27 AM UTC 24 |
Aug 23 03:51:53 AM UTC 24 |
269419703900 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.3766704944 |
|
|
Aug 23 03:51:51 AM UTC 24 |
Aug 23 03:51:55 AM UTC 24 |
893043733 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_fifo_full.2472199987 |
|
|
Aug 23 03:51:21 AM UTC 24 |
Aug 23 03:51:55 AM UTC 24 |
156928225842 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_loopback.4128534714 |
|
|
Aug 23 03:51:51 AM UTC 24 |
Aug 23 03:51:58 AM UTC 24 |
9170574047 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/23.uart_perf.1156763789 |
|
|
Aug 23 03:40:55 AM UTC 24 |
Aug 23 03:52:00 AM UTC 24 |
12297513165 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_alert_test.2304272398 |
|
|
Aug 23 03:51:58 AM UTC 24 |
Aug 23 03:52:00 AM UTC 24 |
12236107 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/98.uart_fifo_reset.201304690 |
|
|
Aug 23 04:06:34 AM UTC 24 |
Aug 23 04:07:58 AM UTC 24 |
44247269052 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_noise_filter.2368853735 |
|
|
Aug 23 03:51:36 AM UTC 24 |
Aug 23 03:52:02 AM UTC 24 |
14635249741 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_tx_rx.2729157543 |
|
|
Aug 23 03:51:20 AM UTC 24 |
Aug 23 03:52:03 AM UTC 24 |
444610489718 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.3987721697 |
|
|
Aug 23 03:51:47 AM UTC 24 |
Aug 23 03:52:03 AM UTC 24 |
30498789479 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_intr.3559234111 |
|
|
Aug 23 03:51:34 AM UTC 24 |
Aug 23 03:52:04 AM UTC 24 |
56052168864 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.2204569813 |
|
|
Aug 23 03:52:05 AM UTC 24 |
Aug 23 03:52:14 AM UTC 24 |
92386556933 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.2718215643 |
|
|
Aug 23 03:51:56 AM UTC 24 |
Aug 23 03:52:17 AM UTC 24 |
4264096253 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.2621921204 |
|
|
Aug 23 03:49:56 AM UTC 24 |
Aug 23 03:52:19 AM UTC 24 |
41959981253 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_tx_rx.555057748 |
|
|
Aug 23 03:52:01 AM UTC 24 |
Aug 23 03:52:19 AM UTC 24 |
19893595589 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.643882997 |
|
|
Aug 23 03:52:19 AM UTC 24 |
Aug 23 03:52:22 AM UTC 24 |
5567484438 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_smoke.839517868 |
|
|
Aug 23 03:52:01 AM UTC 24 |
Aug 23 03:52:23 AM UTC 24 |
5819699286 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.778349919 |
|
|
Aug 23 03:52:23 AM UTC 24 |
Aug 23 03:52:26 AM UTC 24 |
546380483 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_loopback.4284434965 |
|
|
Aug 23 03:52:24 AM UTC 24 |
Aug 23 03:52:27 AM UTC 24 |
2626365654 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_fifo_reset.2112817008 |
|
|
Aug 23 03:52:05 AM UTC 24 |
Aug 23 03:52:31 AM UTC 24 |
17255244085 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.1927712972 |
|
|
Aug 23 03:46:50 AM UTC 24 |
Aug 23 03:52:31 AM UTC 24 |
68276757689 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_rx_oversample.3095820114 |
|
|
Aug 23 03:52:05 AM UTC 24 |
Aug 23 03:52:32 AM UTC 24 |
7000879301 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_alert_test.768298419 |
|
|
Aug 23 03:52:33 AM UTC 24 |
Aug 23 03:52:34 AM UTC 24 |
20040174 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_smoke.4185559189 |
|
|
Aug 23 03:52:35 AM UTC 24 |
Aug 23 03:52:38 AM UTC 24 |
498475354 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/27.uart_stress_all.1666885061 |
|
|
Aug 23 03:44:07 AM UTC 24 |
Aug 23 03:52:44 AM UTC 24 |
200834382792 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/20.uart_stress_all.1073254238 |
|
|
Aug 23 03:38:58 AM UTC 24 |
Aug 23 03:52:50 AM UTC 24 |
275485642761 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_stress_all.397835849 |
|
|
Aug 23 03:50:35 AM UTC 24 |
Aug 23 03:52:52 AM UTC 24 |
379691051098 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_intr.1040573277 |
|
|
Aug 23 03:57:28 AM UTC 24 |
Aug 23 03:57:30 AM UTC 24 |
5495822159 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.21946031 |
|
|
Aug 23 03:52:32 AM UTC 24 |
Aug 23 03:52:52 AM UTC 24 |
1732377636 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_tx_rx.3555593611 |
|
|
Aug 23 03:52:38 AM UTC 24 |
Aug 23 03:52:53 AM UTC 24 |
67883574661 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_noise_filter.2667623775 |
|
|
Aug 23 03:52:18 AM UTC 24 |
Aug 23 03:52:55 AM UTC 24 |
23966542207 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_intr.701956212 |
|
|
Aug 23 03:52:55 AM UTC 24 |
Aug 23 03:52:59 AM UTC 24 |
1807726472 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_rx_oversample.2822517743 |
|
|
Aug 23 03:52:53 AM UTC 24 |
Aug 23 03:53:02 AM UTC 24 |
4575514116 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.3361878852 |
|
|
Aug 23 03:53:00 AM UTC 24 |
Aug 23 03:53:03 AM UTC 24 |
5704147991 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_noise_filter.115444318 |
|
|
Aug 23 03:51:01 AM UTC 24 |
Aug 23 03:53:07 AM UTC 24 |
82349962108 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.60608287 |
|
|
Aug 23 03:53:04 AM UTC 24 |
Aug 23 03:53:08 AM UTC 24 |
1108477064 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_loopback.3764156196 |
|
|
Aug 23 03:53:08 AM UTC 24 |
Aug 23 03:53:10 AM UTC 24 |
1346143137 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.625641218 |
|
|
Aug 23 03:52:19 AM UTC 24 |
Aug 23 03:53:10 AM UTC 24 |
35699169389 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.3438049919 |
|
|
Aug 23 03:52:51 AM UTC 24 |
Aug 23 03:53:10 AM UTC 24 |
14128837476 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_fifo_reset.1318290283 |
|
|
Aug 23 03:52:53 AM UTC 24 |
Aug 23 03:53:21 AM UTC 24 |
34307352295 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_alert_test.3962769978 |
|
|
Aug 23 03:53:22 AM UTC 24 |
Aug 23 03:53:23 AM UTC 24 |
11965956 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_smoke.3676307905 |
|
|
Aug 23 03:53:24 AM UTC 24 |
Aug 23 03:53:27 AM UTC 24 |
443621236 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_tx_rx.361091414 |
|
|
Aug 23 03:53:27 AM UTC 24 |
Aug 23 03:53:34 AM UTC 24 |
3130259161 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.552349979 |
|
|
Aug 23 03:43:09 AM UTC 24 |
Aug 23 03:53:36 AM UTC 24 |
93790016085 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_intr.2056308956 |
|
|
Aug 23 03:52:15 AM UTC 24 |
Aug 23 03:53:39 AM UTC 24 |
211780365221 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_noise_filter.3103561980 |
|
|
Aug 23 03:52:56 AM UTC 24 |
Aug 23 03:53:43 AM UTC 24 |
107261289629 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.1174745611 |
|
|
Aug 23 03:53:12 AM UTC 24 |
Aug 23 03:53:47 AM UTC 24 |
14875728442 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_fifo_full.1618570171 |
|
|
Aug 23 03:52:45 AM UTC 24 |
Aug 23 03:53:57 AM UTC 24 |
44694469755 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_rx_oversample.1104527852 |
|
|
Aug 23 03:53:44 AM UTC 24 |
Aug 23 03:53:59 AM UTC 24 |
6952206551 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_fifo_full.1576692319 |
|
|
Aug 23 03:53:35 AM UTC 24 |
Aug 23 03:53:59 AM UTC 24 |
28035678604 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/35.uart_perf.3360859934 |
|
|
Aug 23 03:51:09 AM UTC 24 |
Aug 23 03:54:03 AM UTC 24 |
7775715806 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_fifo_reset.3231375814 |
|
|
Aug 23 03:53:40 AM UTC 24 |
Aug 23 03:54:03 AM UTC 24 |
13678568677 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_loopback.3961750455 |
|
|
Aug 23 03:54:04 AM UTC 24 |
Aug 23 03:54:05 AM UTC 24 |
1843079014 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.1295569841 |
|
|
Aug 23 03:54:03 AM UTC 24 |
Aug 23 03:54:06 AM UTC 24 |
410195868 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_intr.3778615809 |
|
|
Aug 23 03:53:48 AM UTC 24 |
Aug 23 03:54:12 AM UTC 24 |
48252519860 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.2037970401 |
|
|
Aug 23 03:47:56 AM UTC 24 |
Aug 23 03:54:13 AM UTC 24 |
191545917761 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.3022506945 |
|
|
Aug 23 03:53:02 AM UTC 24 |
Aug 23 03:54:25 AM UTC 24 |
54493296756 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_fifo_reset.955003367 |
|
|
Aug 23 03:51:27 AM UTC 24 |
Aug 23 03:54:26 AM UTC 24 |
264555997421 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_alert_test.3183354536 |
|
|
Aug 23 03:54:27 AM UTC 24 |
Aug 23 03:54:28 AM UTC 24 |
14753593 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_smoke.2439683360 |
|
|
Aug 23 03:54:28 AM UTC 24 |
Aug 23 03:54:31 AM UTC 24 |
508790231 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_fifo_full.4030858606 |
|
|
Aug 23 03:52:03 AM UTC 24 |
Aug 23 03:54:40 AM UTC 24 |
139795862978 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.441661543 |
|
|
Aug 23 03:51:25 AM UTC 24 |
Aug 23 03:54:44 AM UTC 24 |
78677053081 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_perf.4241769278 |
|
|
Aug 23 03:50:31 AM UTC 24 |
Aug 23 03:54:48 AM UTC 24 |
24784280426 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.3473281069 |
|
|
Aug 23 03:52:28 AM UTC 24 |
Aug 23 03:54:48 AM UTC 24 |
99752193322 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.2661785591 |
|
|
Aug 23 03:54:00 AM UTC 24 |
Aug 23 03:54:52 AM UTC 24 |
43638043315 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.2047114481 |
|
|
Aug 23 03:53:37 AM UTC 24 |
Aug 23 03:54:54 AM UTC 24 |
59322149333 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.247317387 |
|
|
Aug 23 03:54:13 AM UTC 24 |
Aug 23 03:55:01 AM UTC 24 |
54111966886 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_fifo_reset.1232464818 |
|
|
Aug 23 03:54:46 AM UTC 24 |
Aug 23 03:55:07 AM UTC 24 |
54346805262 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.98062677 |
|
|
Aug 23 03:54:41 AM UTC 24 |
Aug 23 03:55:10 AM UTC 24 |
53414713792 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.3271742220 |
|
|
Aug 23 03:55:02 AM UTC 24 |
Aug 23 03:55:15 AM UTC 24 |
35377802453 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_rx_oversample.409040131 |
|
|
Aug 23 03:54:49 AM UTC 24 |
Aug 23 03:55:16 AM UTC 24 |
3483029174 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.1772327182 |
|
|
Aug 23 03:55:07 AM UTC 24 |
Aug 23 03:55:17 AM UTC 24 |
7115506694 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_loopback.1583482746 |
|
|
Aug 23 03:55:11 AM UTC 24 |
Aug 23 03:55:20 AM UTC 24 |
5519084649 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_noise_filter.1234540037 |
|
|
Aug 23 03:54:54 AM UTC 24 |
Aug 23 03:55:27 AM UTC 24 |
34476556208 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_alert_test.1100258714 |
|
|
Aug 23 03:55:28 AM UTC 24 |
Aug 23 03:55:29 AM UTC 24 |
13441365 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_smoke.3111342249 |
|
|
Aug 23 03:55:30 AM UTC 24 |
Aug 23 03:55:32 AM UTC 24 |
514413868 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_noise_filter.3331107234 |
|
|
Aug 23 03:53:59 AM UTC 24 |
Aug 23 03:55:39 AM UTC 24 |
59768479060 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.2414611719 |
|
|
Aug 23 03:54:00 AM UTC 24 |
Aug 23 03:55:43 AM UTC 24 |
148531565535 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_perf.1690041298 |
|
|
Aug 23 03:52:26 AM UTC 24 |
Aug 23 03:55:47 AM UTC 24 |
9978403641 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/25.uart_fifo_full.2876070781 |
|
|
Aug 23 03:41:55 AM UTC 24 |
Aug 23 03:55:49 AM UTC 24 |
284820356243 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_long_xfer_wo_dly.708675336 |
|
|
Aug 23 03:51:54 AM UTC 24 |
Aug 23 03:55:50 AM UTC 24 |
86225728076 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_long_xfer_wo_dly.3717778780 |
|
|
Aug 23 03:54:08 AM UTC 24 |
Aug 23 03:55:50 AM UTC 24 |
205469295065 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.2546582559 |
|
|
Aug 23 03:54:55 AM UTC 24 |
Aug 23 03:55:50 AM UTC 24 |
40817119475 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.740224552 |
|
|
Aug 23 03:45:37 AM UTC 24 |
Aug 23 03:55:54 AM UTC 24 |
93259424218 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.581796400 |
|
|
Aug 23 03:55:52 AM UTC 24 |
Aug 23 03:55:54 AM UTC 24 |
2613233478 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.2457800668 |
|
|
Aug 23 03:55:55 AM UTC 24 |
Aug 23 03:55:58 AM UTC 24 |
1710140654 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/37.uart_stress_all.576916296 |
|
|
Aug 23 03:52:32 AM UTC 24 |
Aug 23 03:56:00 AM UTC 24 |
93752217637 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_intr.1069417733 |
|
|
Aug 23 03:55:52 AM UTC 24 |
Aug 23 03:56:00 AM UTC 24 |
9114329672 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_loopback.386821996 |
|
|
Aug 23 03:55:58 AM UTC 24 |
Aug 23 03:56:00 AM UTC 24 |
997372919 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_perf.2630471274 |
|
|
Aug 23 03:53:09 AM UTC 24 |
Aug 23 03:56:02 AM UTC 24 |
15134715935 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_rx_oversample.3610589339 |
|
|
Aug 23 03:55:50 AM UTC 24 |
Aug 23 03:56:02 AM UTC 24 |
1923568352 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_alert_test.1858853234 |
|
|
Aug 23 03:56:02 AM UTC 24 |
Aug 23 03:56:04 AM UTC 24 |
69645073 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_smoke.3190207550 |
|
|
Aug 23 03:56:05 AM UTC 24 |
Aug 23 03:56:12 AM UTC 24 |
5965785146 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.589551868 |
|
|
Aug 23 03:55:18 AM UTC 24 |
Aug 23 03:56:20 AM UTC 24 |
31652014511 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_fifo_reset.2875692413 |
|
|
Aug 23 03:55:49 AM UTC 24 |
Aug 23 03:56:22 AM UTC 24 |
57118349606 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_tx_rx.2681404226 |
|
|
Aug 23 03:54:29 AM UTC 24 |
Aug 23 03:56:28 AM UTC 24 |
84141675309 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_tx_rx.1925585900 |
|
|
Aug 23 03:56:13 AM UTC 24 |
Aug 23 03:56:29 AM UTC 24 |
104150565432 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_tx_rx.658964030 |
|
|
Aug 23 03:55:33 AM UTC 24 |
Aug 23 03:56:33 AM UTC 24 |
137823965080 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_rx_oversample.3674355879 |
|
|
Aug 23 03:56:30 AM UTC 24 |
Aug 23 03:56:34 AM UTC 24 |
1811881744 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_stress_all.2159753433 |
|
|
Aug 23 03:55:21 AM UTC 24 |
Aug 23 03:56:37 AM UTC 24 |
283380581018 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.145742156 |
|
|
Aug 23 03:56:38 AM UTC 24 |
Aug 23 03:56:41 AM UTC 24 |
721948335 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_fifo_reset.3728150346 |
|
|
Aug 23 03:56:30 AM UTC 24 |
Aug 23 03:56:43 AM UTC 24 |
12982825405 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.2946797633 |
|
|
Aug 23 03:56:44 AM UTC 24 |
Aug 23 03:56:49 AM UTC 24 |
963877954 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_loopback.761355905 |
|
|
Aug 23 03:56:49 AM UTC 24 |
Aug 23 03:56:58 AM UTC 24 |
4382149632 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.1495595855 |
|
|
Aug 23 03:55:55 AM UTC 24 |
Aug 23 03:56:59 AM UTC 24 |
92543710031 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.3091767654 |
|
|
Aug 23 03:56:22 AM UTC 24 |
Aug 23 03:57:01 AM UTC 24 |
45165426161 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_stress_all.4162049758 |
|
|
Aug 23 03:51:56 AM UTC 24 |
Aug 23 03:57:11 AM UTC 24 |
233569515942 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_fifo_full.2780034624 |
|
|
Aug 23 03:54:32 AM UTC 24 |
Aug 23 03:57:15 AM UTC 24 |
123901847887 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.1719197534 |
|
|
Aug 23 03:57:02 AM UTC 24 |
Aug 23 03:57:16 AM UTC 24 |
2821669440 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_alert_test.3998409285 |
|
|
Aug 23 03:57:16 AM UTC 24 |
Aug 23 03:57:18 AM UTC 24 |
17052622 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_fifo_full.3101981154 |
|
|
Aug 23 03:55:40 AM UTC 24 |
Aug 23 03:57:18 AM UTC 24 |
122897300611 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_rx_parity_err.1741482211 |
|
|
Aug 23 03:56:42 AM UTC 24 |
Aug 23 03:57:19 AM UTC 24 |
108528019772 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_intr.4273359225 |
|
|
Aug 23 03:56:34 AM UTC 24 |
Aug 23 03:57:23 AM UTC 24 |
30499914202 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/22.uart_perf.3909612562 |
|
|
Aug 23 03:40:13 AM UTC 24 |
Aug 23 03:57:23 AM UTC 24 |
20527008526 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/40.uart_intr.8699790 |
|
|
Aug 23 03:54:49 AM UTC 24 |
Aug 23 03:57:27 AM UTC 24 |
478298717973 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_tx_rx.1782280005 |
|
|
Aug 23 03:57:19 AM UTC 24 |
Aug 23 03:57:29 AM UTC 24 |
6028394599 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_noise_filter.1481164961 |
|
|
Aug 23 03:56:35 AM UTC 24 |
Aug 23 03:57:31 AM UTC 24 |
73307136593 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_smoke.1387896165 |
|
|
Aug 23 03:57:18 AM UTC 24 |
Aug 23 03:57:32 AM UTC 24 |
5740547929 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/32.uart_stress_all.3412164363 |
|
|
Aug 23 03:49:13 AM UTC 24 |
Aug 23 03:57:32 AM UTC 24 |
202060921852 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_loopback.1279399934 |
|
|
Aug 23 03:57:33 AM UTC 24 |
Aug 23 03:57:36 AM UTC 24 |
1815359889 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.419672203 |
|
|
Aug 23 03:57:33 AM UTC 24 |
Aug 23 03:57:37 AM UTC 24 |
916922485 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.1316035234 |
|
|
Aug 23 03:56:01 AM UTC 24 |
Aug 23 03:57:37 AM UTC 24 |
17578242165 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_rx_oversample.4015642313 |
|
|
Aug 23 03:57:25 AM UTC 24 |
Aug 23 03:57:38 AM UTC 24 |
3550533242 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.2802650883 |
|
|
Aug 23 03:57:32 AM UTC 24 |
Aug 23 03:57:40 AM UTC 24 |
71160578097 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/39.uart_stress_all.3178364568 |
|
|
Aug 23 03:54:14 AM UTC 24 |
Aug 23 03:57:40 AM UTC 24 |
251380920406 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.3111998939 |
|
|
Aug 23 03:57:32 AM UTC 24 |
Aug 23 03:57:40 AM UTC 24 |
4759613114 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_noise_filter.1115599271 |
|
|
Aug 23 03:57:29 AM UTC 24 |
Aug 23 03:57:41 AM UTC 24 |
12707816598 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/34.uart_long_xfer_wo_dly.2945403224 |
|
|
Aug 23 03:50:34 AM UTC 24 |
Aug 23 03:57:42 AM UTC 24 |
138424173706 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_alert_test.3830355753 |
|
|
Aug 23 03:57:42 AM UTC 24 |
Aug 23 03:57:44 AM UTC 24 |
36640318 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_smoke.2039196358 |
|
|
Aug 23 03:57:42 AM UTC 24 |
Aug 23 03:57:45 AM UTC 24 |
534141380 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.2871839024 |
|
|
Aug 23 03:57:38 AM UTC 24 |
Aug 23 03:57:49 AM UTC 24 |
1342574691 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_rx_oversample.3677777076 |
|
|
Aug 23 03:57:47 AM UTC 24 |
Aug 23 03:57:54 AM UTC 24 |
1905944060 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.3713590522 |
|
|
Aug 23 03:57:20 AM UTC 24 |
Aug 23 03:58:00 AM UTC 24 |
19541955115 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_fifo_reset.1530730737 |
|
|
Aug 23 03:57:46 AM UTC 24 |
Aug 23 03:58:01 AM UTC 24 |
30125857143 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_fifo_full.1943205420 |
|
|
Aug 23 03:56:21 AM UTC 24 |
Aug 23 03:58:02 AM UTC 24 |
67087913799 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.938945216 |
|
|
Aug 23 03:58:01 AM UTC 24 |
Aug 23 03:58:04 AM UTC 24 |
1420219714 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_noise_filter.977752120 |
|
|
Aug 23 03:55:52 AM UTC 24 |
Aug 23 03:58:09 AM UTC 24 |
197378591073 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_loopback.2611755739 |
|
|
Aug 23 03:58:04 AM UTC 24 |
Aug 23 03:58:17 AM UTC 24 |
5976658472 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.2430701485 |
|
|
Aug 23 03:58:03 AM UTC 24 |
Aug 23 03:58:20 AM UTC 24 |
6731609089 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/43.uart_perf.1669171610 |
|
|
Aug 23 03:57:36 AM UTC 24 |
Aug 23 03:58:28 AM UTC 24 |
16967035341 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_perf.797301664 |
|
|
Aug 23 03:56:01 AM UTC 24 |
Aug 23 03:58:32 AM UTC 24 |
13255492354 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_alert_test.1508165699 |
|
|
Aug 23 03:58:33 AM UTC 24 |
Aug 23 03:58:34 AM UTC 24 |
133921995 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_stress_all_with_rand_reset.3743485073 |
|
|
Aug 23 03:58:21 AM UTC 24 |
Aug 23 03:58:48 AM UTC 24 |
8712797643 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/45.uart_smoke.1034542710 |
|
|
Aug 23 03:58:35 AM UTC 24 |
Aug 23 03:58:53 AM UTC 24 |
10536544921 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_intr.4058042738 |
|
|
Aug 23 03:57:50 AM UTC 24 |
Aug 23 03:58:54 AM UTC 24 |
169231574189 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/45.uart_tx_rx.1973139919 |
|
|
Aug 23 03:58:48 AM UTC 24 |
Aug 23 03:59:00 AM UTC 24 |
25238128838 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/45.uart_fifo_overflow.1586287301 |
|
|
Aug 23 03:58:55 AM UTC 24 |
Aug 23 03:59:06 AM UTC 24 |
6477621904 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.3639900406 |
|
|
Aug 23 03:58:02 AM UTC 24 |
Aug 23 03:59:06 AM UTC 24 |
225372504577 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/36.uart_perf.4039377962 |
|
|
Aug 23 03:51:52 AM UTC 24 |
Aug 23 03:59:10 AM UTC 24 |
9419711402 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/38.uart_long_xfer_wo_dly.1942392215 |
|
|
Aug 23 03:53:11 AM UTC 24 |
Aug 23 03:59:18 AM UTC 24 |
63835619721 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/29.uart_perf.2809046459 |
|
|
Aug 23 03:45:35 AM UTC 24 |
Aug 23 03:59:22 AM UTC 24 |
15293169966 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.2445670931 |
|
|
Aug 23 03:55:43 AM UTC 24 |
Aug 23 03:59:23 AM UTC 24 |
165210347928 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/45.uart_fifo_full.1091255280 |
|
|
Aug 23 03:58:54 AM UTC 24 |
Aug 23 03:59:25 AM UTC 24 |
30694363601 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/42.uart_stress_all.2879620949 |
|
|
Aug 23 03:57:12 AM UTC 24 |
Aug 23 03:59:25 AM UTC 24 |
12723308229 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.426152479 |
|
|
Aug 23 03:59:24 AM UTC 24 |
Aug 23 03:59:26 AM UTC 24 |
1670445259 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_22/uart-sim-vcs/coverage/default/45.uart_loopback.2169991357 |
|
|
Aug 23 03:59:26 AM UTC 24 |
Aug 23 03:59:28 AM UTC 24 |
2139462768 ps |