| T148 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_stress_all.2873360946 |
|
|
Aug 25 03:36:09 AM UTC 24 |
Aug 25 03:41:28 AM UTC 24 |
200848046867 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_smoke.11997329 |
|
|
Aug 25 03:40:59 AM UTC 24 |
Aug 25 03:41:31 AM UTC 24 |
6051329228 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.1944487548 |
|
|
Aug 25 03:35:29 AM UTC 24 |
Aug 25 03:41:35 AM UTC 24 |
99505103260 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.3789834181 |
|
|
Aug 25 03:40:56 AM UTC 24 |
Aug 25 03:41:35 AM UTC 24 |
2616138587 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_alert_test.2908618856 |
|
|
Aug 25 03:41:36 AM UTC 24 |
Aug 25 03:41:38 AM UTC 24 |
40457114 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_smoke.3927278066 |
|
|
Aug 25 03:41:36 AM UTC 24 |
Aug 25 03:41:40 AM UTC 24 |
285386741 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_loopback.334610915 |
|
|
Aug 25 03:41:23 AM UTC 24 |
Aug 25 03:41:41 AM UTC 24 |
8961932281 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.47187120 |
|
|
Aug 25 03:40:44 AM UTC 24 |
Aug 25 03:41:43 AM UTC 24 |
15277004657 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_fifo_full.1779908755 |
|
|
Aug 25 03:41:02 AM UTC 24 |
Aug 25 03:41:44 AM UTC 24 |
55162390134 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.2515509439 |
|
|
Aug 25 03:39:10 AM UTC 24 |
Aug 25 03:41:53 AM UTC 24 |
46069012067 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.3687499097 |
|
|
Aug 25 03:40:37 AM UTC 24 |
Aug 25 03:42:01 AM UTC 24 |
52339762632 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_intr.2959021855 |
|
|
Aug 25 03:39:09 AM UTC 24 |
Aug 25 03:42:03 AM UTC 24 |
281264260812 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_intr.780880747 |
|
|
Aug 25 03:36:44 AM UTC 24 |
Aug 25 03:42:03 AM UTC 24 |
209021532779 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.3280273067 |
|
|
Aug 25 03:42:01 AM UTC 24 |
Aug 25 03:42:04 AM UTC 24 |
533273841 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_fifo_reset.2584442888 |
|
|
Aug 25 03:39:03 AM UTC 24 |
Aug 25 03:42:07 AM UTC 24 |
60288924344 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.3684178576 |
|
|
Aug 25 03:42:05 AM UTC 24 |
Aug 25 03:42:08 AM UTC 24 |
2288432025 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_tx_rx.489468036 |
|
|
Aug 25 03:40:34 AM UTC 24 |
Aug 25 03:42:08 AM UTC 24 |
128199775823 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_tx_rx.383767490 |
|
|
Aug 25 03:41:39 AM UTC 24 |
Aug 25 03:42:09 AM UTC 24 |
8586309230 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_stress_all.3679439136 |
|
|
Aug 25 03:35:10 AM UTC 24 |
Aug 25 03:42:10 AM UTC 24 |
691146077355 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_alert_test.3433616051 |
|
|
Aug 25 03:42:11 AM UTC 24 |
Aug 25 03:42:13 AM UTC 24 |
16388108 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_tx_rx.3950793804 |
|
|
Aug 25 03:40:00 AM UTC 24 |
Aug 25 03:42:16 AM UTC 24 |
97285405293 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_perf.2550076013 |
|
|
Aug 25 03:37:00 AM UTC 24 |
Aug 25 03:42:18 AM UTC 24 |
9994992100 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_smoke.2590980674 |
|
|
Aug 25 03:42:14 AM UTC 24 |
Aug 25 03:42:18 AM UTC 24 |
544481757 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_perf.2282728586 |
|
|
Aug 25 03:36:05 AM UTC 24 |
Aug 25 03:42:21 AM UTC 24 |
17104803392 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_fifo_reset.197093098 |
|
|
Aug 25 03:41:44 AM UTC 24 |
Aug 25 03:42:22 AM UTC 24 |
43540993072 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.370463614 |
|
|
Aug 25 03:42:09 AM UTC 24 |
Aug 25 03:42:27 AM UTC 24 |
4065825124 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_tx_rx.3641877127 |
|
|
Aug 25 03:41:01 AM UTC 24 |
Aug 25 03:42:32 AM UTC 24 |
71584178660 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_rx_oversample.2365629042 |
|
|
Aug 25 03:42:23 AM UTC 24 |
Aug 25 03:42:34 AM UTC 24 |
2313133178 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.2206182640 |
|
|
Aug 25 03:34:47 AM UTC 24 |
Aug 25 03:42:38 AM UTC 24 |
73619732892 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_loopback.2749023115 |
|
|
Aug 25 03:42:05 AM UTC 24 |
Aug 25 03:42:39 AM UTC 24 |
10424753594 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_stress_all.753860271 |
|
|
Aug 25 03:38:17 AM UTC 24 |
Aug 25 03:42:42 AM UTC 24 |
90964794446 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_rx_oversample.1218854837 |
|
|
Aug 25 03:41:45 AM UTC 24 |
Aug 25 03:42:43 AM UTC 24 |
5164405017 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.2177853459 |
|
|
Aug 25 03:35:55 AM UTC 24 |
Aug 25 03:42:44 AM UTC 24 |
112079542708 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.2586337897 |
|
|
Aug 25 03:42:35 AM UTC 24 |
Aug 25 03:42:47 AM UTC 24 |
2951636306 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_stress_all.3046812111 |
|
|
Aug 25 03:38:52 AM UTC 24 |
Aug 25 03:42:54 AM UTC 24 |
162732244967 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_rx_oversample.1260658436 |
|
|
Aug 25 03:41:15 AM UTC 24 |
Aug 25 03:42:54 AM UTC 24 |
8019456855 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.1947872824 |
|
|
Aug 25 03:42:39 AM UTC 24 |
Aug 25 03:42:54 AM UTC 24 |
12114978274 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.2445806172 |
|
|
Aug 25 03:42:03 AM UTC 24 |
Aug 25 03:42:55 AM UTC 24 |
66152749451 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_alert_test.3001467230 |
|
|
Aug 25 03:42:55 AM UTC 24 |
Aug 25 03:42:56 AM UTC 24 |
12356281 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_smoke.2331699769 |
|
|
Aug 25 03:42:55 AM UTC 24 |
Aug 25 03:42:58 AM UTC 24 |
724985157 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_fifo_full.3224901958 |
|
|
Aug 25 03:42:18 AM UTC 24 |
Aug 25 03:43:01 AM UTC 24 |
52904466236 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.3161751904 |
|
|
Aug 25 03:41:28 AM UTC 24 |
Aug 25 03:43:02 AM UTC 24 |
2410016065 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_tx_rx.394616681 |
|
|
Aug 25 03:42:17 AM UTC 24 |
Aug 25 03:43:04 AM UTC 24 |
62379810839 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_tx_rx.303623015 |
|
|
Aug 25 03:38:58 AM UTC 24 |
Aug 25 03:43:05 AM UTC 24 |
74996906855 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_loopback.1898063537 |
|
|
Aug 25 03:42:43 AM UTC 24 |
Aug 25 03:43:06 AM UTC 24 |
5496723273 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_intr.825722621 |
|
|
Aug 25 03:41:50 AM UTC 24 |
Aug 25 03:43:07 AM UTC 24 |
41163309078 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_rx_oversample.1616161675 |
|
|
Aug 25 03:43:02 AM UTC 24 |
Aug 25 03:43:10 AM UTC 24 |
4994809949 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.4269336240 |
|
|
Aug 25 03:43:07 AM UTC 24 |
Aug 25 03:43:12 AM UTC 24 |
2326239539 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_intr.2795458493 |
|
|
Aug 25 03:34:19 AM UTC 24 |
Aug 25 03:43:14 AM UTC 24 |
393209859603 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.3193487806 |
|
|
Aug 25 03:41:21 AM UTC 24 |
Aug 25 03:43:17 AM UTC 24 |
38048890145 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_perf.203912860 |
|
|
Aug 25 03:37:27 AM UTC 24 |
Aug 25 03:43:18 AM UTC 24 |
4177957208 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.506738437 |
|
|
Aug 25 03:34:03 AM UTC 24 |
Aug 25 03:43:18 AM UTC 24 |
75805286509 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_loopback.471922766 |
|
|
Aug 25 03:43:10 AM UTC 24 |
Aug 25 03:43:18 AM UTC 24 |
3792642790 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.3669944428 |
|
|
Aug 25 03:42:40 AM UTC 24 |
Aug 25 03:43:20 AM UTC 24 |
7138973892 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_alert_test.1800036831 |
|
|
Aug 25 03:43:19 AM UTC 24 |
Aug 25 03:43:21 AM UTC 24 |
17662381 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.3168042065 |
|
|
Aug 25 03:42:57 AM UTC 24 |
Aug 25 03:43:22 AM UTC 24 |
25068431087 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_smoke.3913767485 |
|
|
Aug 25 03:43:19 AM UTC 24 |
Aug 25 03:43:25 AM UTC 24 |
693500180 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.2246868686 |
|
|
Aug 25 03:38:45 AM UTC 24 |
Aug 25 03:43:27 AM UTC 24 |
41219770782 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.2005389994 |
|
|
Aug 25 03:42:45 AM UTC 24 |
Aug 25 03:43:27 AM UTC 24 |
5669929399 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.505836757 |
|
|
Aug 25 03:41:03 AM UTC 24 |
Aug 25 03:43:29 AM UTC 24 |
134853836303 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.3301218361 |
|
|
Aug 25 03:43:35 AM UTC 24 |
Aug 25 03:43:39 AM UTC 24 |
5098372829 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_fifo_reset.3936675703 |
|
|
Aug 25 03:42:21 AM UTC 24 |
Aug 25 03:43:40 AM UTC 24 |
153736532167 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.1173806313 |
|
|
Aug 25 03:43:41 AM UTC 24 |
Aug 25 03:43:45 AM UTC 24 |
771883247 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_noise_filter.2530347247 |
|
|
Aug 25 03:41:15 AM UTC 24 |
Aug 25 03:43:48 AM UTC 24 |
182980105132 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_stress_all.2166058397 |
|
|
Aug 25 03:41:32 AM UTC 24 |
Aug 25 03:43:52 AM UTC 24 |
205265091521 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_fifo_full.1873098723 |
|
|
Aug 25 03:34:32 AM UTC 24 |
Aug 25 03:43:54 AM UTC 24 |
145936706591 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_perf.3412591743 |
|
|
Aug 25 03:40:49 AM UTC 24 |
Aug 25 03:43:55 AM UTC 24 |
8069160599 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_perf.1627614548 |
|
|
Aug 25 03:39:18 AM UTC 24 |
Aug 25 03:43:55 AM UTC 24 |
19289709416 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_fifo_reset.3023049756 |
|
|
Aug 25 03:36:40 AM UTC 24 |
Aug 25 03:43:57 AM UTC 24 |
79009182775 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_alert_test.1226249274 |
|
|
Aug 25 03:43:56 AM UTC 24 |
Aug 25 03:43:58 AM UTC 24 |
14088833 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_smoke.904042854 |
|
|
Aug 25 03:43:57 AM UTC 24 |
Aug 25 03:44:00 AM UTC 24 |
471043911 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_tx_rx.403646645 |
|
|
Aug 25 03:44:30 AM UTC 24 |
Aug 25 03:45:17 AM UTC 24 |
17179748711 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_fifo_reset.3054132216 |
|
|
Aug 25 03:41:10 AM UTC 24 |
Aug 25 03:44:03 AM UTC 24 |
102391046210 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_intr.2542803597 |
|
|
Aug 25 03:41:15 AM UTC 24 |
Aug 25 03:44:04 AM UTC 24 |
223614129319 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_intr.2039671254 |
|
|
Aug 25 03:43:28 AM UTC 24 |
Aug 25 03:44:08 AM UTC 24 |
10094289136 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.285170692 |
|
|
Aug 25 03:42:19 AM UTC 24 |
Aug 25 03:44:09 AM UTC 24 |
65570486482 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_stress_all.589445812 |
|
|
Aug 25 03:42:10 AM UTC 24 |
Aug 25 03:44:12 AM UTC 24 |
446172708384 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.2936741471 |
|
|
Aug 25 03:43:06 AM UTC 24 |
Aug 25 03:44:13 AM UTC 24 |
35470715188 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_intr.1836764987 |
|
|
Aug 25 03:33:52 AM UTC 24 |
Aug 25 03:44:19 AM UTC 24 |
232818348558 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_rx_oversample.3294700143 |
|
|
Aug 25 03:43:27 AM UTC 24 |
Aug 25 03:44:22 AM UTC 24 |
4848881382 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_rx_oversample.2183311291 |
|
|
Aug 25 03:44:09 AM UTC 24 |
Aug 25 03:44:23 AM UTC 24 |
1803410080 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.1883745868 |
|
|
Aug 25 03:43:07 AM UTC 24 |
Aug 25 03:44:24 AM UTC 24 |
36668205716 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_loopback.33602821 |
|
|
Aug 25 03:43:46 AM UTC 24 |
Aug 25 03:44:24 AM UTC 24 |
11558288112 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_stress_all.3287901233 |
|
|
Aug 25 03:40:58 AM UTC 24 |
Aug 25 03:44:25 AM UTC 24 |
66866059976 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.709301579 |
|
|
Aug 25 03:43:40 AM UTC 24 |
Aug 25 03:44:27 AM UTC 24 |
33781246137 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.2479331421 |
|
|
Aug 25 03:44:23 AM UTC 24 |
Aug 25 03:44:28 AM UTC 24 |
874437972 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_noise_filter.1988727079 |
|
|
Aug 25 03:34:58 AM UTC 24 |
Aug 25 03:44:29 AM UTC 24 |
119077185200 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_stress_all.1575861825 |
|
|
Aug 25 03:37:04 AM UTC 24 |
Aug 25 03:44:30 AM UTC 24 |
369651117392 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.1947963330 |
|
|
Aug 25 03:43:23 AM UTC 24 |
Aug 25 03:44:31 AM UTC 24 |
61883796396 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_alert_test.503825394 |
|
|
Aug 25 03:44:30 AM UTC 24 |
Aug 25 03:44:32 AM UTC 24 |
11747934 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_smoke.1565050027 |
|
|
Aug 25 03:44:30 AM UTC 24 |
Aug 25 03:44:35 AM UTC 24 |
646962635 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.2912478663 |
|
|
Aug 25 03:43:55 AM UTC 24 |
Aug 25 03:44:36 AM UTC 24 |
5462246139 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_noise_filter.2598012989 |
|
|
Aug 25 03:44:13 AM UTC 24 |
Aug 25 03:44:37 AM UTC 24 |
19404461724 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_loopback.3191637708 |
|
|
Aug 25 03:44:24 AM UTC 24 |
Aug 25 03:44:40 AM UTC 24 |
3819952712 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.2093375384 |
|
|
Aug 25 03:44:41 AM UTC 24 |
Aug 25 03:44:49 AM UTC 24 |
3934888434 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.4038723885 |
|
|
Aug 25 03:44:03 AM UTC 24 |
Aug 25 03:44:52 AM UTC 24 |
51060954729 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.1495695281 |
|
|
Aug 25 03:44:14 AM UTC 24 |
Aug 25 03:44:52 AM UTC 24 |
32990353610 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_noise_filter.1838600408 |
|
|
Aug 25 03:43:04 AM UTC 24 |
Aug 25 03:44:55 AM UTC 24 |
142028913538 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_stress_all.4157096508 |
|
|
Aug 25 03:40:30 AM UTC 24 |
Aug 25 03:45:16 AM UTC 24 |
319165654662 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.2423676200 |
|
|
Aug 25 03:44:51 AM UTC 24 |
Aug 25 03:44:57 AM UTC 24 |
868408416 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_loopback.2715964214 |
|
|
Aug 25 03:44:53 AM UTC 24 |
Aug 25 03:45:00 AM UTC 24 |
7552458897 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_intr.379661268 |
|
|
Aug 25 03:44:37 AM UTC 24 |
Aug 25 03:45:04 AM UTC 24 |
8863917578 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_alert_test.573638127 |
|
|
Aug 25 03:45:04 AM UTC 24 |
Aug 25 03:45:06 AM UTC 24 |
42766908 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.4087681823 |
|
|
Aug 25 03:44:25 AM UTC 24 |
Aug 25 03:45:06 AM UTC 24 |
2304168075 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_rx_oversample.1014358982 |
|
|
Aug 25 03:44:36 AM UTC 24 |
Aug 25 03:45:10 AM UTC 24 |
4937234661 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_fifo_reset.541091742 |
|
|
Aug 25 03:44:05 AM UTC 24 |
Aug 25 03:45:14 AM UTC 24 |
45596422868 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_noise_filter.411710790 |
|
|
Aug 25 03:41:54 AM UTC 24 |
Aug 25 03:45:20 AM UTC 24 |
57386710488 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.3597115184 |
|
|
Aug 25 03:44:58 AM UTC 24 |
Aug 25 03:45:21 AM UTC 24 |
1541607384 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_fifo_reset.4279157522 |
|
|
Aug 25 03:42:59 AM UTC 24 |
Aug 25 03:45:28 AM UTC 24 |
56435149108 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.3352898555 |
|
|
Aug 25 03:41:42 AM UTC 24 |
Aug 25 03:45:32 AM UTC 24 |
127801407483 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_tx_rx.1542393993 |
|
|
Aug 25 03:43:21 AM UTC 24 |
Aug 25 03:45:33 AM UTC 24 |
78999431514 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_perf.3420067159 |
|
|
Aug 25 03:43:13 AM UTC 24 |
Aug 25 03:45:33 AM UTC 24 |
17266331780 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.2667830804 |
|
|
Aug 25 03:43:19 AM UTC 24 |
Aug 25 03:45:34 AM UTC 24 |
67038841512 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.1560459389 |
|
|
Aug 25 03:39:53 AM UTC 24 |
Aug 25 03:45:34 AM UTC 24 |
66927283245 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.15411106 |
|
|
Aug 25 03:37:02 AM UTC 24 |
Aug 25 03:45:39 AM UTC 24 |
165117721416 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.1129572534 |
|
|
Aug 25 03:45:33 AM UTC 24 |
Aug 25 03:45:40 AM UTC 24 |
787208467 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_rx_oversample.1762845019 |
|
|
Aug 25 03:45:17 AM UTC 24 |
Aug 25 03:45:41 AM UTC 24 |
7659772501 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_alert_test.3023871035 |
|
|
Aug 25 03:45:40 AM UTC 24 |
Aug 25 03:45:42 AM UTC 24 |
11116373 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_noise_filter.257033522 |
|
|
Aug 25 03:40:42 AM UTC 24 |
Aug 25 03:45:45 AM UTC 24 |
87964239141 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_smoke.1981219309 |
|
|
Aug 25 03:45:07 AM UTC 24 |
Aug 25 03:45:46 AM UTC 24 |
5904432305 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_tx_rx.3215813164 |
|
|
Aug 25 03:45:07 AM UTC 24 |
Aug 25 03:45:47 AM UTC 24 |
94563505496 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_loopback.4051063737 |
|
|
Aug 25 03:45:34 AM UTC 24 |
Aug 25 03:45:48 AM UTC 24 |
7333205167 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_fifo_full.1094853721 |
|
|
Aug 25 03:44:31 AM UTC 24 |
Aug 25 03:45:50 AM UTC 24 |
33184069745 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_fifo_full.1319291425 |
|
|
Aug 25 03:41:40 AM UTC 24 |
Aug 25 03:45:55 AM UTC 24 |
87808582413 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_smoke.3990970925 |
|
|
Aug 25 03:45:41 AM UTC 24 |
Aug 25 03:45:56 AM UTC 24 |
5485654016 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_tx_rx.45767181 |
|
|
Aug 25 03:43:58 AM UTC 24 |
Aug 25 03:45:59 AM UTC 24 |
90200563019 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_intr.1447285915 |
|
|
Aug 25 03:40:09 AM UTC 24 |
Aug 25 03:46:02 AM UTC 24 |
101844338768 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_fifo_reset.2458399887 |
|
|
Aug 25 03:43:26 AM UTC 24 |
Aug 25 03:46:03 AM UTC 24 |
170268005543 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.3410473087 |
|
|
Aug 25 03:44:50 AM UTC 24 |
Aug 25 03:46:05 AM UTC 24 |
55196264646 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_stress_all.1912853800 |
|
|
Aug 25 03:33:14 AM UTC 24 |
Aug 25 03:46:07 AM UTC 24 |
603754621472 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_noise_filter.1284555934 |
|
|
Aug 25 03:45:56 AM UTC 24 |
Aug 25 03:46:08 AM UTC 24 |
5295242809 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.1692332292 |
|
|
Aug 25 03:45:57 AM UTC 24 |
Aug 25 03:46:10 AM UTC 24 |
3659105769 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_loopback.1711787209 |
|
|
Aug 25 03:46:04 AM UTC 24 |
Aug 25 03:46:12 AM UTC 24 |
6887034852 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_alert_test.4084877763 |
|
|
Aug 25 03:46:13 AM UTC 24 |
Aug 25 03:46:15 AM UTC 24 |
68062668 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_intr.2952833413 |
|
|
Aug 25 03:45:51 AM UTC 24 |
Aug 25 03:46:15 AM UTC 24 |
16716715573 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_tx_rx.2446039730 |
|
|
Aug 25 03:45:42 AM UTC 24 |
Aug 25 03:46:17 AM UTC 24 |
65386831568 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.3753525384 |
|
|
Aug 25 03:44:20 AM UTC 24 |
Aug 25 03:46:23 AM UTC 24 |
36210622380 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.1491165220 |
|
|
Aug 25 03:46:00 AM UTC 24 |
Aug 25 03:46:23 AM UTC 24 |
7781538828 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_noise_filter.3247856255 |
|
|
Aug 25 03:35:40 AM UTC 24 |
Aug 25 03:46:24 AM UTC 24 |
137150289656 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_perf.3149263131 |
|
|
Aug 25 03:42:08 AM UTC 24 |
Aug 25 03:46:24 AM UTC 24 |
14056767249 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_intr.3553428041 |
|
|
Aug 25 03:45:22 AM UTC 24 |
Aug 25 03:46:24 AM UTC 24 |
38847737169 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.2367761831 |
|
|
Aug 25 03:46:08 AM UTC 24 |
Aug 25 03:46:25 AM UTC 24 |
1739068249 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_noise_filter.2350634103 |
|
|
Aug 25 03:45:22 AM UTC 24 |
Aug 25 03:46:28 AM UTC 24 |
16548327198 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.1123474136 |
|
|
Aug 25 03:46:26 AM UTC 24 |
Aug 25 03:46:29 AM UTC 24 |
575464083 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_rx_oversample.3033884319 |
|
|
Aug 25 03:45:49 AM UTC 24 |
Aug 25 03:46:32 AM UTC 24 |
6830389482 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.4024814995 |
|
|
Aug 25 03:46:02 AM UTC 24 |
Aug 25 03:46:32 AM UTC 24 |
6514412901 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_perf.755025058 |
|
|
Aug 25 03:35:03 AM UTC 24 |
Aug 25 03:46:36 AM UTC 24 |
11396075521 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_smoke.3824962414 |
|
|
Aug 25 03:46:16 AM UTC 24 |
Aug 25 03:46:37 AM UTC 24 |
5886722143 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_intr.3384996512 |
|
|
Aug 25 03:46:25 AM UTC 24 |
Aug 25 03:46:39 AM UTC 24 |
8318526526 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_alert_test.1295749621 |
|
|
Aug 25 03:46:40 AM UTC 24 |
Aug 25 03:46:42 AM UTC 24 |
20271950 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_loopback.2710979195 |
|
|
Aug 25 03:46:30 AM UTC 24 |
Aug 25 03:46:43 AM UTC 24 |
8484779324 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.262013490 |
|
|
Aug 25 03:40:22 AM UTC 24 |
Aug 25 03:46:44 AM UTC 24 |
118336437948 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_noise_filter.2220428471 |
|
|
Aug 25 03:42:33 AM UTC 24 |
Aug 25 03:46:46 AM UTC 24 |
75149713610 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_fifo_full.193346073 |
|
|
Aug 25 03:43:21 AM UTC 24 |
Aug 25 03:46:48 AM UTC 24 |
71329258566 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.1642253716 |
|
|
Aug 25 03:45:35 AM UTC 24 |
Aug 25 03:46:51 AM UTC 24 |
14471926236 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_fifo_reset.2598680945 |
|
|
Aug 25 03:45:48 AM UTC 24 |
Aug 25 03:46:51 AM UTC 24 |
84142278214 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_noise_filter.545803266 |
|
|
Aug 25 03:46:25 AM UTC 24 |
Aug 25 03:46:52 AM UTC 24 |
42442742233 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2971788994 |
|
|
Aug 25 03:36:06 AM UTC 24 |
Aug 25 03:46:54 AM UTC 24 |
68818365287 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_tx_rx.2312546630 |
|
|
Aug 25 03:42:56 AM UTC 24 |
Aug 25 03:46:55 AM UTC 24 |
58317503567 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.3549692510 |
|
|
Aug 25 03:45:29 AM UTC 24 |
Aug 25 03:46:56 AM UTC 24 |
49383196289 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.3786326733 |
|
|
Aug 25 03:46:53 AM UTC 24 |
Aug 25 03:46:56 AM UTC 24 |
5687691671 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_stress_all.3316433890 |
|
|
Aug 25 03:45:39 AM UTC 24 |
Aug 25 03:46:57 AM UTC 24 |
19013246587 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_smoke.2134296856 |
|
|
Aug 25 03:46:40 AM UTC 24 |
Aug 25 03:46:57 AM UTC 24 |
6206601830 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.57501871 |
|
|
Aug 25 03:45:23 AM UTC 24 |
Aug 25 03:46:59 AM UTC 24 |
34045281554 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_intr.3971700301 |
|
|
Aug 25 03:39:36 AM UTC 24 |
Aug 25 03:47:00 AM UTC 24 |
132316911224 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.3842984316 |
|
|
Aug 25 03:46:56 AM UTC 24 |
Aug 25 03:47:00 AM UTC 24 |
4014429335 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_alert_test.2193263739 |
|
|
Aug 25 03:47:00 AM UTC 24 |
Aug 25 03:47:02 AM UTC 24 |
29967826 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_tx_rx.877621751 |
|
|
Aug 25 03:46:16 AM UTC 24 |
Aug 25 03:47:04 AM UTC 24 |
63142612536 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_smoke.2841893756 |
|
|
Aug 25 03:47:01 AM UTC 24 |
Aug 25 03:47:08 AM UTC 24 |
536994017 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_intr.298108810 |
|
|
Aug 25 03:46:51 AM UTC 24 |
Aug 25 03:47:09 AM UTC 24 |
67032650839 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_rx_oversample.3659707454 |
|
|
Aug 25 03:46:49 AM UTC 24 |
Aug 25 03:47:14 AM UTC 24 |
3899379149 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_tx_rx.580565801 |
|
|
Aug 25 03:47:02 AM UTC 24 |
Aug 25 03:47:16 AM UTC 24 |
13774143476 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.229135427 |
|
|
Aug 25 03:46:29 AM UTC 24 |
Aug 25 03:47:17 AM UTC 24 |
7113517239 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.4219137520 |
|
|
Aug 25 03:45:15 AM UTC 24 |
Aug 25 03:47:18 AM UTC 24 |
92088626189 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_noise_filter.3851844616 |
|
|
Aug 25 03:43:29 AM UTC 24 |
Aug 25 03:47:19 AM UTC 24 |
71851875303 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_noise_filter.1208480753 |
|
|
Aug 25 03:46:52 AM UTC 24 |
Aug 25 03:47:21 AM UTC 24 |
33251975255 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.2090783651 |
|
|
Aug 25 03:36:27 AM UTC 24 |
Aug 25 03:47:22 AM UTC 24 |
109163406661 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.2900542312 |
|
|
Aug 25 03:47:20 AM UTC 24 |
Aug 25 03:47:23 AM UTC 24 |
1207659722 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.477614960 |
|
|
Aug 25 03:47:18 AM UTC 24 |
Aug 25 03:47:24 AM UTC 24 |
2824128163 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_fifo_full.868185495 |
|
|
Aug 25 03:46:18 AM UTC 24 |
Aug 25 03:47:26 AM UTC 24 |
72894614516 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_loopback.3137555797 |
|
|
Aug 25 03:47:22 AM UTC 24 |
Aug 25 03:47:28 AM UTC 24 |
3032477292 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_alert_test.2168428761 |
|
|
Aug 25 03:47:28 AM UTC 24 |
Aug 25 03:47:31 AM UTC 24 |
16430349 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_stress_all.274276658 |
|
|
Aug 25 03:45:01 AM UTC 24 |
Aug 25 03:47:33 AM UTC 24 |
101507521738 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_loopback.2520591703 |
|
|
Aug 25 03:46:57 AM UTC 24 |
Aug 25 03:47:37 AM UTC 24 |
11381094354 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_stress_all.2609665537 |
|
|
Aug 25 03:34:06 AM UTC 24 |
Aug 25 03:47:38 AM UTC 24 |
148952268909 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_rx_oversample.2249813108 |
|
|
Aug 25 03:46:24 AM UTC 24 |
Aug 25 03:47:40 AM UTC 24 |
6113547500 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_intr.2512332129 |
|
|
Aug 25 03:44:10 AM UTC 24 |
Aug 25 03:47:40 AM UTC 24 |
288449374256 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.1084747336 |
|
|
Aug 25 03:46:24 AM UTC 24 |
Aug 25 03:47:41 AM UTC 24 |
46697431917 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_stress_all.1846309673 |
|
|
Aug 25 03:43:55 AM UTC 24 |
Aug 25 03:47:46 AM UTC 24 |
1165353178921 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_fifo_reset.1051975702 |
|
|
Aug 25 03:46:24 AM UTC 24 |
Aug 25 03:47:48 AM UTC 24 |
57385004593 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_rx_oversample.2707628687 |
|
|
Aug 25 03:47:41 AM UTC 24 |
Aug 25 03:47:51 AM UTC 24 |
3032341154 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_smoke.3266383832 |
|
|
Aug 25 03:47:32 AM UTC 24 |
Aug 25 03:47:53 AM UTC 24 |
5350148512 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.959405808 |
|
|
Aug 25 03:47:39 AM UTC 24 |
Aug 25 03:47:57 AM UTC 24 |
48413155077 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.2891285536 |
|
|
Aug 25 03:47:53 AM UTC 24 |
Aug 25 03:47:57 AM UTC 24 |
700064053 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_fifo_full.3236009402 |
|
|
Aug 25 03:45:46 AM UTC 24 |
Aug 25 03:47:58 AM UTC 24 |
33062303898 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_intr.3527573569 |
|
|
Aug 25 03:47:42 AM UTC 24 |
Aug 25 03:48:00 AM UTC 24 |
6228723663 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_intr.1979051257 |
|
|
Aug 25 03:47:16 AM UTC 24 |
Aug 25 03:48:00 AM UTC 24 |
11783360288 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.2061433855 |
|
|
Aug 25 03:45:47 AM UTC 24 |
Aug 25 03:48:01 AM UTC 24 |
44155938359 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_stress_all.3546987832 |
|
|
Aug 25 03:35:31 AM UTC 24 |
Aug 25 03:48:02 AM UTC 24 |
268062801242 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_rx_oversample.3853643303 |
|
|
Aug 25 03:47:15 AM UTC 24 |
Aug 25 03:48:04 AM UTC 24 |
4313863302 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_alert_test.1837227610 |
|
|
Aug 25 03:48:02 AM UTC 24 |
Aug 25 03:48:04 AM UTC 24 |
56165423 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.332964001 |
|
|
Aug 25 03:47:19 AM UTC 24 |
Aug 25 03:48:07 AM UTC 24 |
12782465844 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.2070878121 |
|
|
Aug 25 03:46:37 AM UTC 24 |
Aug 25 03:48:13 AM UTC 24 |
4327428546 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_fifo_reset.4250856755 |
|
|
Aug 25 03:46:47 AM UTC 24 |
Aug 25 03:48:13 AM UTC 24 |
53627614194 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_loopback.3873223429 |
|
|
Aug 25 03:47:57 AM UTC 24 |
Aug 25 03:48:13 AM UTC 24 |
6276180698 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_fifo_full.1337263211 |
|
|
Aug 25 03:47:05 AM UTC 24 |
Aug 25 03:48:19 AM UTC 24 |
51463318709 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.2491573769 |
|
|
Aug 25 03:45:35 AM UTC 24 |
Aug 25 03:48:22 AM UTC 24 |
42280862307 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.3529267529 |
|
|
Aug 25 03:48:01 AM UTC 24 |
Aug 25 03:48:24 AM UTC 24 |
1427917168 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.1169689310 |
|
|
Aug 25 03:48:25 AM UTC 24 |
Aug 25 03:48:28 AM UTC 24 |
838438197 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.1018606349 |
|
|
Aug 25 03:47:25 AM UTC 24 |
Aug 25 03:48:30 AM UTC 24 |
14914221982 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_rx_oversample.3814728555 |
|
|
Aug 25 03:48:14 AM UTC 24 |
Aug 25 03:48:31 AM UTC 24 |
5895475496 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_perf.3570470346 |
|
|
Aug 25 03:46:57 AM UTC 24 |
Aug 25 03:48:35 AM UTC 24 |
22380850729 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_smoke.2999426682 |
|
|
Aug 25 03:48:03 AM UTC 24 |
Aug 25 03:48:38 AM UTC 24 |
11058293566 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_fifo_full.4069294951 |
|
|
Aug 25 03:44:01 AM UTC 24 |
Aug 25 03:48:39 AM UTC 24 |
186330617434 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.931953564 |
|
|
Aug 25 03:47:08 AM UTC 24 |
Aug 25 03:48:40 AM UTC 24 |
121423181072 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_loopback.2693810042 |
|
|
Aug 25 03:48:29 AM UTC 24 |
Aug 25 03:48:41 AM UTC 24 |
7363826467 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_alert_test.1396800590 |
|
|
Aug 25 03:48:40 AM UTC 24 |
Aug 25 03:48:42 AM UTC 24 |
20108348 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_stress_all.590714669 |
|
|
Aug 25 03:39:55 AM UTC 24 |
Aug 25 03:48:43 AM UTC 24 |
701688723596 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.2194209883 |
|
|
Aug 25 03:47:48 AM UTC 24 |
Aug 25 03:48:45 AM UTC 24 |
35999742383 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_noise_filter.1324096855 |
|
|
Aug 25 03:44:37 AM UTC 24 |
Aug 25 03:48:47 AM UTC 24 |
85089165198 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_intr.1191865984 |
|
|
Aug 25 03:48:14 AM UTC 24 |
Aug 25 03:48:49 AM UTC 24 |
37930765191 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_perf.3056379086 |
|
|
Aug 25 03:43:49 AM UTC 24 |
Aug 25 03:48:53 AM UTC 24 |
18559352212 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_smoke.19609126 |
|
|
Aug 25 03:48:41 AM UTC 24 |
Aug 25 03:48:53 AM UTC 24 |
6065891228 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.3809211557 |
|
|
Aug 25 03:48:23 AM UTC 24 |
Aug 25 03:48:57 AM UTC 24 |
47613320723 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.2827388923 |
|
|
Aug 25 03:48:54 AM UTC 24 |
Aug 25 03:48:58 AM UTC 24 |
1831915016 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_fifo_reset.1486412256 |
|
|
Aug 25 03:45:16 AM UTC 24 |
Aug 25 03:48:58 AM UTC 24 |
159918245283 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_fifo_full.297165520 |
|
|
Aug 25 03:46:43 AM UTC 24 |
Aug 25 03:49:00 AM UTC 24 |
236658214819 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_loopback.850159651 |
|
|
Aug 25 03:48:59 AM UTC 24 |
Aug 25 03:49:05 AM UTC 24 |
5687611644 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_tx_rx.3762745448 |
|
|
Aug 25 03:46:43 AM UTC 24 |
Aug 25 03:49:07 AM UTC 24 |
189643380816 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_rx_oversample.2155136818 |
|
|
Aug 25 03:48:48 AM UTC 24 |
Aug 25 03:49:08 AM UTC 24 |
2208049037 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_fifo_reset.3200912476 |
|
|
Aug 25 03:48:13 AM UTC 24 |
Aug 25 03:49:08 AM UTC 24 |
15043065723 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_tx_rx.307388566 |
|
|
Aug 25 03:48:41 AM UTC 24 |
Aug 25 03:49:09 AM UTC 24 |
30023919476 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_fifo_full.2212095688 |
|
|
Aug 25 03:48:04 AM UTC 24 |
Aug 25 03:49:10 AM UTC 24 |
37894284777 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_alert_test.2436240320 |
|
|
Aug 25 03:49:10 AM UTC 24 |
Aug 25 03:49:11 AM UTC 24 |
53671897 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_fifo_reset.2651400541 |
|
|
Aug 25 03:48:46 AM UTC 24 |
Aug 25 03:49:12 AM UTC 24 |
6927675476 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.2789063918 |
|
|
Aug 25 03:48:59 AM UTC 24 |
Aug 25 03:49:12 AM UTC 24 |
7538762318 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_noise_filter.418113290 |
|
|
Aug 25 03:47:47 AM UTC 24 |
Aug 25 03:49:14 AM UTC 24 |
46750044822 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_perf.69310560 |
|
|
Aug 25 03:40:20 AM UTC 24 |
Aug 25 03:49:14 AM UTC 24 |
28336887672 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_smoke.1268373938 |
|
|
Aug 25 03:49:11 AM UTC 24 |
Aug 25 03:49:15 AM UTC 24 |
492623890 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_perf.2280254681 |
|
|
Aug 25 03:38:44 AM UTC 24 |
Aug 25 03:49:17 AM UTC 24 |
6693247093 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.2864005238 |
|
|
Aug 25 03:46:45 AM UTC 24 |
Aug 25 03:49:17 AM UTC 24 |
155183917623 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_fifo_full.681518700 |
|
|
Aug 25 03:47:38 AM UTC 24 |
Aug 25 03:49:18 AM UTC 24 |
212332467408 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_rx_oversample.1725773708 |
|
|
Aug 25 03:49:14 AM UTC 24 |
Aug 25 03:49:21 AM UTC 24 |
6604787338 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.2469975999 |
|
|
Aug 25 03:49:17 AM UTC 24 |
Aug 25 03:49:21 AM UTC 24 |
4664439314 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.1608503844 |
|
|
Aug 25 03:49:18 AM UTC 24 |
Aug 25 03:49:26 AM UTC 24 |
1173968424 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.3642306970 |
|
|
Aug 25 03:48:35 AM UTC 24 |
Aug 25 03:49:27 AM UTC 24 |
13253994927 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_fifo_full.3497147239 |
|
|
Aug 25 03:45:11 AM UTC 24 |
Aug 25 03:49:27 AM UTC 24 |
276676685515 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_intr.2715109008 |
|
|
Aug 25 03:48:50 AM UTC 24 |
Aug 25 03:49:31 AM UTC 24 |
46750511852 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_intr.430510367 |
|
|
Aug 25 03:49:15 AM UTC 24 |
Aug 25 03:49:32 AM UTC 24 |
8249080673 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/23.uart_stress_all.329624747 |
|
|
Aug 25 03:44:27 AM UTC 24 |
Aug 25 03:49:33 AM UTC 24 |
178912687373 ps |