T636 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_alert_test.2836492413 |
|
|
Aug 25 03:49:32 AM UTC 24 |
Aug 25 03:49:34 AM UTC 24 |
40831768 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_smoke.1202456816 |
|
|
Aug 25 03:49:33 AM UTC 24 |
Aug 25 03:49:36 AM UTC 24 |
703278707 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_fifo_reset.2655319126 |
|
|
Aug 25 03:47:41 AM UTC 24 |
Aug 25 03:49:36 AM UTC 24 |
34184304872 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_stress_all.4247965547 |
|
|
Aug 25 03:48:01 AM UTC 24 |
Aug 25 03:49:39 AM UTC 24 |
178799220881 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.422949799 |
|
|
Aug 25 03:46:55 AM UTC 24 |
Aug 25 03:49:42 AM UTC 24 |
47055601558 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_tx_rx.2096561205 |
|
|
Aug 25 03:47:34 AM UTC 24 |
Aug 25 03:49:50 AM UTC 24 |
129734820054 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.2480629539 |
|
|
Aug 25 03:49:08 AM UTC 24 |
Aug 25 03:49:52 AM UTC 24 |
12083930739 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_loopback.3046596891 |
|
|
Aug 25 03:49:21 AM UTC 24 |
Aug 25 03:49:55 AM UTC 24 |
6266878869 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_rx_oversample.4019556563 |
|
|
Aug 25 03:49:39 AM UTC 24 |
Aug 25 03:49:56 AM UTC 24 |
6457179317 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_noise_filter.3710724367 |
|
|
Aug 25 03:47:17 AM UTC 24 |
Aug 25 03:49:57 AM UTC 24 |
79565286153 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.950947215 |
|
|
Aug 25 03:49:53 AM UTC 24 |
Aug 25 03:49:59 AM UTC 24 |
1529591291 ps |
T162 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.3615021235 |
|
|
Aug 25 03:49:18 AM UTC 24 |
Aug 25 03:50:00 AM UTC 24 |
44636256213 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.3657492907 |
|
|
Aug 25 03:42:09 AM UTC 24 |
Aug 25 03:50:01 AM UTC 24 |
73492677058 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.2274930748 |
|
|
Aug 25 03:47:24 AM UTC 24 |
Aug 25 03:50:03 AM UTC 24 |
45136702405 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.3234472822 |
|
|
Aug 25 03:49:58 AM UTC 24 |
Aug 25 03:50:04 AM UTC 24 |
852833921 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_alert_test.339910047 |
|
|
Aug 25 03:50:05 AM UTC 24 |
Aug 25 03:50:07 AM UTC 24 |
18043073 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_fifo_full.274813880 |
|
|
Aug 25 03:49:35 AM UTC 24 |
Aug 25 03:50:09 AM UTC 24 |
24141367460 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_tx_rx.1987210872 |
|
|
Aug 25 03:49:11 AM UTC 24 |
Aug 25 03:50:12 AM UTC 24 |
17936707373 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_loopback.729327025 |
|
|
Aug 25 03:49:59 AM UTC 24 |
Aug 25 03:50:12 AM UTC 24 |
4277735115 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_smoke.2362783270 |
|
|
Aug 25 03:50:08 AM UTC 24 |
Aug 25 03:50:13 AM UTC 24 |
742166574 ps |
T119 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_stress_all.2224115551 |
|
|
Aug 25 03:50:03 AM UTC 24 |
Aug 25 03:50:15 AM UTC 24 |
8165465140 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.820927404 |
|
|
Aug 25 03:48:58 AM UTC 24 |
Aug 25 03:50:19 AM UTC 24 |
26714153779 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_noise_filter.4281923232 |
|
|
Aug 25 03:49:16 AM UTC 24 |
Aug 25 03:50:20 AM UTC 24 |
21398090493 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.2390266016 |
|
|
Aug 25 03:49:13 AM UTC 24 |
Aug 25 03:50:21 AM UTC 24 |
81453767154 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.3158918886 |
|
|
Aug 25 03:49:28 AM UTC 24 |
Aug 25 03:50:23 AM UTC 24 |
6461326707 ps |
T163 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_fifo_full.723638950 |
|
|
Aug 25 03:49:12 AM UTC 24 |
Aug 25 03:50:25 AM UTC 24 |
96640817193 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.3287157021 |
|
|
Aug 25 03:50:26 AM UTC 24 |
Aug 25 03:50:32 AM UTC 24 |
799264479 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.170656440 |
|
|
Aug 25 03:42:45 AM UTC 24 |
Aug 25 03:50:33 AM UTC 24 |
53966848332 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.2634440377 |
|
|
Aug 25 03:48:08 AM UTC 24 |
Aug 25 03:50:33 AM UTC 24 |
45495013047 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.2469331778 |
|
|
Aug 25 03:46:33 AM UTC 24 |
Aug 25 03:50:34 AM UTC 24 |
79897205426 ps |
T185 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_stress_all.2548174411 |
|
|
Aug 25 03:47:26 AM UTC 24 |
Aug 25 03:50:35 AM UTC 24 |
228212036039 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_noise_filter.234801941 |
|
|
Aug 25 03:48:54 AM UTC 24 |
Aug 25 03:50:37 AM UTC 24 |
197066894373 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_loopback.4165911867 |
|
|
Aug 25 03:50:33 AM UTC 24 |
Aug 25 03:50:38 AM UTC 24 |
4856296162 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_alert_test.562433819 |
|
|
Aug 25 03:50:38 AM UTC 24 |
Aug 25 03:50:39 AM UTC 24 |
15655345 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_noise_filter.10709782 |
|
|
Aug 25 03:49:50 AM UTC 24 |
Aug 25 03:50:43 AM UTC 24 |
13288647715 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_perf.3220531733 |
|
|
Aug 25 03:36:27 AM UTC 24 |
Aug 25 03:50:44 AM UTC 24 |
27279183615 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_fifo_full.1227221824 |
|
|
Aug 25 03:40:00 AM UTC 24 |
Aug 25 03:50:44 AM UTC 24 |
202425141602 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_stress_all.2982953875 |
|
|
Aug 25 03:39:24 AM UTC 24 |
Aug 25 03:50:45 AM UTC 24 |
345232344767 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_stress_all.3292584968 |
|
|
Aug 25 03:49:28 AM UTC 24 |
Aug 25 03:50:45 AM UTC 24 |
49234738492 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_smoke.4183029454 |
|
|
Aug 25 03:50:39 AM UTC 24 |
Aug 25 03:50:52 AM UTC 24 |
5759189236 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.1834513199 |
|
|
Aug 25 03:38:15 AM UTC 24 |
Aug 25 03:50:53 AM UTC 24 |
83000756435 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/33.uart_fifo_reset.1312672790 |
|
|
Aug 25 03:49:13 AM UTC 24 |
Aug 25 03:50:55 AM UTC 24 |
136817258879 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_fifo_reset.2457692432 |
|
|
Aug 25 03:50:15 AM UTC 24 |
Aug 25 03:50:56 AM UTC 24 |
57525764691 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_perf.3812573579 |
|
|
Aug 25 03:38:13 AM UTC 24 |
Aug 25 03:50:57 AM UTC 24 |
8850670631 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_tx_rx.779854445 |
|
|
Aug 25 03:50:09 AM UTC 24 |
Aug 25 03:51:01 AM UTC 24 |
65011527040 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.3296878371 |
|
|
Aug 25 03:50:56 AM UTC 24 |
Aug 25 03:51:02 AM UTC 24 |
793414926 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_loopback.289464121 |
|
|
Aug 25 03:50:58 AM UTC 24 |
Aug 25 03:51:03 AM UTC 24 |
1962767408 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.2407901256 |
|
|
Aug 25 03:50:54 AM UTC 24 |
Aug 25 03:51:05 AM UTC 24 |
4431184737 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_intr.405179368 |
|
|
Aug 25 03:50:46 AM UTC 24 |
Aug 25 03:51:05 AM UTC 24 |
18507425917 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.2626854355 |
|
|
Aug 25 03:50:34 AM UTC 24 |
Aug 25 03:51:07 AM UTC 24 |
17040265534 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_alert_test.1631106758 |
|
|
Aug 25 03:51:06 AM UTC 24 |
Aug 25 03:51:08 AM UTC 24 |
119492471 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_smoke.2965620195 |
|
|
Aug 25 03:51:06 AM UTC 24 |
Aug 25 03:51:09 AM UTC 24 |
290228128 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.2656694726 |
|
|
Aug 25 03:48:45 AM UTC 24 |
Aug 25 03:51:10 AM UTC 24 |
138472807405 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.1517285343 |
|
|
Aug 25 03:50:56 AM UTC 24 |
Aug 25 03:51:15 AM UTC 24 |
86197873348 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_rx_oversample.3268423805 |
|
|
Aug 25 03:51:16 AM UTC 24 |
Aug 25 03:51:19 AM UTC 24 |
1504789516 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.3413558666 |
|
|
Aug 25 03:50:02 AM UTC 24 |
Aug 25 03:51:20 AM UTC 24 |
10306064455 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_perf.2678770922 |
|
|
Aug 25 03:46:05 AM UTC 24 |
Aug 25 03:51:25 AM UTC 24 |
15357047327 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.3403757557 |
|
|
Aug 25 03:50:24 AM UTC 24 |
Aug 25 03:51:33 AM UTC 24 |
47666561542 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.2508019548 |
|
|
Aug 25 03:51:34 AM UTC 24 |
Aug 25 03:51:38 AM UTC 24 |
987629711 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.2633360260 |
|
|
Aug 25 03:51:26 AM UTC 24 |
Aug 25 03:51:39 AM UTC 24 |
2923958165 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_rx_oversample.2090570304 |
|
|
Aug 25 03:50:17 AM UTC 24 |
Aug 25 03:51:43 AM UTC 24 |
7079844306 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_fifo_full.2813389171 |
|
|
Aug 25 03:42:56 AM UTC 24 |
Aug 25 03:51:46 AM UTC 24 |
117499619999 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_stress_all.1952821781 |
|
|
Aug 25 03:42:47 AM UTC 24 |
Aug 25 03:51:48 AM UTC 24 |
382052696200 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.1729941334 |
|
|
Aug 25 03:51:04 AM UTC 24 |
Aug 25 03:51:49 AM UTC 24 |
2106362918 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_loopback.2625418795 |
|
|
Aug 25 03:51:39 AM UTC 24 |
Aug 25 03:51:49 AM UTC 24 |
2986839869 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_rx_oversample.2107941556 |
|
|
Aug 25 03:50:46 AM UTC 24 |
Aug 25 03:51:50 AM UTC 24 |
5677259197 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_stress_all.2563080092 |
|
|
Aug 25 03:43:19 AM UTC 24 |
Aug 25 03:51:51 AM UTC 24 |
142449678123 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_alert_test.4057548163 |
|
|
Aug 25 03:51:50 AM UTC 24 |
Aug 25 03:51:52 AM UTC 24 |
29522953 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_stress_all.2321248770 |
|
|
Aug 25 03:49:08 AM UTC 24 |
Aug 25 03:51:56 AM UTC 24 |
117064253461 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_smoke.3026133273 |
|
|
Aug 25 03:51:50 AM UTC 24 |
Aug 25 03:51:57 AM UTC 24 |
482404368 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_fifo_reset.2496769830 |
|
|
Aug 25 03:51:10 AM UTC 24 |
Aug 25 03:51:57 AM UTC 24 |
64236159043 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.1472880786 |
|
|
Aug 25 03:44:32 AM UTC 24 |
Aug 25 03:51:58 AM UTC 24 |
144754437460 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.46381584 |
|
|
Aug 25 03:52:02 AM UTC 24 |
Aug 25 03:52:07 AM UTC 24 |
3527533990 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.84843670 |
|
|
Aug 25 03:51:27 AM UTC 24 |
Aug 25 03:52:12 AM UTC 24 |
44903810638 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.1375311737 |
|
|
Aug 25 03:38:29 AM UTC 24 |
Aug 25 03:52:12 AM UTC 24 |
218023634953 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.3769871788 |
|
|
Aug 25 03:51:54 AM UTC 24 |
Aug 25 03:52:13 AM UTC 24 |
9792390520 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_loopback.1585812996 |
|
|
Aug 25 03:52:13 AM UTC 24 |
Aug 25 03:52:23 AM UTC 24 |
2547768484 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_noise_filter.2396120822 |
|
|
Aug 25 03:48:20 AM UTC 24 |
Aug 25 03:52:23 AM UTC 24 |
73198250600 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.4283931147 |
|
|
Aug 25 03:50:13 AM UTC 24 |
Aug 25 03:52:24 AM UTC 24 |
83652808504 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_alert_test.2153167009 |
|
|
Aug 25 03:52:25 AM UTC 24 |
Aug 25 03:52:27 AM UTC 24 |
42057369 ps |
T182 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_fifo_reset.2694663683 |
|
|
Aug 25 03:51:57 AM UTC 24 |
Aug 25 03:52:28 AM UTC 24 |
18898960703 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_intr.4227414233 |
|
|
Aug 25 03:51:58 AM UTC 24 |
Aug 25 03:52:28 AM UTC 24 |
50712470142 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_smoke.1546016218 |
|
|
Aug 25 03:52:28 AM UTC 24 |
Aug 25 03:52:30 AM UTC 24 |
91343953 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_perf.4178282361 |
|
|
Aug 25 03:48:31 AM UTC 24 |
Aug 25 03:52:31 AM UTC 24 |
9355789172 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_fifo_full.2234556636 |
|
|
Aug 25 03:50:44 AM UTC 24 |
Aug 25 03:52:33 AM UTC 24 |
242425096877 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.2101179147 |
|
|
Aug 25 03:50:22 AM UTC 24 |
Aug 25 03:52:33 AM UTC 24 |
39934602845 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.1279251939 |
|
|
Aug 25 03:48:24 AM UTC 24 |
Aug 25 03:52:35 AM UTC 24 |
71438428416 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.3790481175 |
|
|
Aug 25 03:51:47 AM UTC 24 |
Aug 25 03:52:37 AM UTC 24 |
5472912227 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.2440965123 |
|
|
Aug 25 03:52:37 AM UTC 24 |
Aug 25 03:52:40 AM UTC 24 |
3153590062 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_noise_filter.1256960617 |
|
|
Aug 25 03:50:21 AM UTC 24 |
Aug 25 03:52:41 AM UTC 24 |
452662943564 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_tx_rx.1531077384 |
|
|
Aug 25 03:51:50 AM UTC 24 |
Aug 25 03:52:44 AM UTC 24 |
112418638209 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_rx_oversample.3701678328 |
|
|
Aug 25 03:51:58 AM UTC 24 |
Aug 25 03:52:45 AM UTC 24 |
7053426854 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_tx_rx.3795676855 |
|
|
Aug 25 03:51:07 AM UTC 24 |
Aug 25 03:52:46 AM UTC 24 |
50223618126 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_rx_oversample.2425208424 |
|
|
Aug 25 03:52:34 AM UTC 24 |
Aug 25 03:52:46 AM UTC 24 |
3466989766 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_perf.2321333449 |
|
|
Aug 25 03:47:22 AM UTC 24 |
Aug 25 03:52:46 AM UTC 24 |
6925756389 ps |
T220 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_fifo_reset.3754559698 |
|
|
Aug 25 03:49:36 AM UTC 24 |
Aug 25 03:52:52 AM UTC 24 |
53013331105 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.1578350581 |
|
|
Aug 25 03:51:10 AM UTC 24 |
Aug 25 03:52:53 AM UTC 24 |
74549660924 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_alert_test.3445647239 |
|
|
Aug 25 03:52:53 AM UTC 24 |
Aug 25 03:52:55 AM UTC 24 |
15300123 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.2796322310 |
|
|
Aug 25 03:52:40 AM UTC 24 |
Aug 25 03:52:55 AM UTC 24 |
17234746421 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_long_xfer_wo_dly.217152213 |
|
|
Aug 25 03:50:34 AM UTC 24 |
Aug 25 03:52:55 AM UTC 24 |
84045262390 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_tx_rx.4160342335 |
|
|
Aug 25 03:50:41 AM UTC 24 |
Aug 25 03:52:56 AM UTC 24 |
125547649334 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_tx_rx.1324333271 |
|
|
Aug 25 03:52:29 AM UTC 24 |
Aug 25 03:52:56 AM UTC 24 |
27699817367 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/29.uart_fifo_reset.4196976392 |
|
|
Aug 25 03:47:12 AM UTC 24 |
Aug 25 03:52:57 AM UTC 24 |
104480914627 ps |
T194 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_fifo_reset.247567588 |
|
|
Aug 25 03:44:33 AM UTC 24 |
Aug 25 03:52:59 AM UTC 24 |
175020301253 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_smoke.380852916 |
|
|
Aug 25 03:52:54 AM UTC 24 |
Aug 25 03:53:01 AM UTC 24 |
884627292 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_intr.4234865834 |
|
|
Aug 25 03:52:34 AM UTC 24 |
Aug 25 03:53:01 AM UTC 24 |
16955536369 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_tx_rx.2731100425 |
|
|
Aug 25 03:49:34 AM UTC 24 |
Aug 25 03:53:02 AM UTC 24 |
68465011155 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_rx_oversample.3937822323 |
|
|
Aug 25 03:52:56 AM UTC 24 |
Aug 25 03:53:03 AM UTC 24 |
2138468368 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_loopback.2764218347 |
|
|
Aug 25 03:52:44 AM UTC 24 |
Aug 25 03:53:05 AM UTC 24 |
7613673593 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_noise_filter.1660320383 |
|
|
Aug 25 03:52:35 AM UTC 24 |
Aug 25 03:53:07 AM UTC 24 |
9983454681 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_loopback.604169424 |
|
|
Aug 25 03:53:03 AM UTC 24 |
Aug 25 03:53:08 AM UTC 24 |
2654515221 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.3754626061 |
|
|
Aug 25 03:53:03 AM UTC 24 |
Aug 25 03:53:09 AM UTC 24 |
1035368729 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_alert_test.2526269879 |
|
|
Aug 25 03:53:09 AM UTC 24 |
Aug 25 03:53:12 AM UTC 24 |
34378755 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.719904892 |
|
|
Aug 25 03:52:13 AM UTC 24 |
Aug 25 03:53:13 AM UTC 24 |
6544437528 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.1521387033 |
|
|
Aug 25 03:48:00 AM UTC 24 |
Aug 25 03:53:14 AM UTC 24 |
158075945361 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_smoke.4186374074 |
|
|
Aug 25 03:53:10 AM UTC 24 |
Aug 25 03:53:14 AM UTC 24 |
673594463 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.1277362302 |
|
|
Aug 25 03:52:59 AM UTC 24 |
Aug 25 03:53:18 AM UTC 24 |
5834412245 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.460372054 |
|
|
Aug 25 03:52:23 AM UTC 24 |
Aug 25 03:53:19 AM UTC 24 |
4964283815 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.1004184550 |
|
|
Aug 25 03:52:41 AM UTC 24 |
Aug 25 03:53:19 AM UTC 24 |
6444470815 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_tx_rx.1801138239 |
|
|
Aug 25 03:52:55 AM UTC 24 |
Aug 25 03:53:20 AM UTC 24 |
29778730840 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_intr.257264786 |
|
|
Aug 25 03:51:21 AM UTC 24 |
Aug 25 03:53:20 AM UTC 24 |
95072451045 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.1776694148 |
|
|
Aug 25 03:44:56 AM UTC 24 |
Aug 25 03:53:21 AM UTC 24 |
134978620951 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.1236706761 |
|
|
Aug 25 03:53:21 AM UTC 24 |
Aug 25 03:53:24 AM UTC 24 |
1898715532 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_noise_filter.2737922462 |
|
|
Aug 25 03:50:53 AM UTC 24 |
Aug 25 03:53:27 AM UTC 24 |
285862154108 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.3310877469 |
|
|
Aug 25 03:53:22 AM UTC 24 |
Aug 25 03:53:29 AM UTC 24 |
1008706639 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_intr.3132308873 |
|
|
Aug 25 03:50:20 AM UTC 24 |
Aug 25 03:53:31 AM UTC 24 |
116164720509 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.573248937 |
|
|
Aug 25 03:37:30 AM UTC 24 |
Aug 25 03:53:34 AM UTC 24 |
113000583529 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_stress_all.3534909829 |
|
|
Aug 25 03:46:38 AM UTC 24 |
Aug 25 03:53:35 AM UTC 24 |
53802654622 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_loopback.1549320474 |
|
|
Aug 25 03:53:25 AM UTC 24 |
Aug 25 03:53:35 AM UTC 24 |
2515889711 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_rx_oversample.671625747 |
|
|
Aug 25 03:53:19 AM UTC 24 |
Aug 25 03:53:35 AM UTC 24 |
5273065505 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_alert_test.2571344022 |
|
|
Aug 25 03:53:35 AM UTC 24 |
Aug 25 03:53:37 AM UTC 24 |
14620520 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.4243194760 |
|
|
Aug 25 03:52:31 AM UTC 24 |
Aug 25 03:53:38 AM UTC 24 |
18867868530 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_fifo_reset.3525346661 |
|
|
Aug 25 03:53:15 AM UTC 24 |
Aug 25 03:53:42 AM UTC 24 |
38207851596 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_smoke.469128872 |
|
|
Aug 25 03:53:35 AM UTC 24 |
Aug 25 03:53:43 AM UTC 24 |
885557273 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.3309689172 |
|
|
Aug 25 03:43:53 AM UTC 24 |
Aug 25 03:53:48 AM UTC 24 |
96478298965 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_stress_all.2784040610 |
|
|
Aug 25 03:52:23 AM UTC 24 |
Aug 25 03:53:48 AM UTC 24 |
28196068223 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.299019045 |
|
|
Aug 25 03:52:47 AM UTC 24 |
Aug 25 03:53:49 AM UTC 24 |
6897787131 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.16779132 |
|
|
Aug 25 03:53:08 AM UTC 24 |
Aug 25 03:53:51 AM UTC 24 |
3022671479 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.1736296101 |
|
|
Aug 25 03:53:02 AM UTC 24 |
Aug 25 03:53:55 AM UTC 24 |
132842505062 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.3851948707 |
|
|
Aug 25 03:53:52 AM UTC 24 |
Aug 25 03:53:56 AM UTC 24 |
719041411 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_fifo_full.3545244109 |
|
|
Aug 25 03:52:30 AM UTC 24 |
Aug 25 03:54:02 AM UTC 24 |
30917373871 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_perf.37510129 |
|
|
Aug 25 03:51:40 AM UTC 24 |
Aug 25 03:54:05 AM UTC 24 |
23228902343 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.2415552504 |
|
|
Aug 25 03:53:15 AM UTC 24 |
Aug 25 03:54:06 AM UTC 24 |
39641194975 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_loopback.2075643935 |
|
|
Aug 25 03:53:56 AM UTC 24 |
Aug 25 03:54:07 AM UTC 24 |
2120159484 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_intr.2029550248 |
|
|
Aug 25 03:53:20 AM UTC 24 |
Aug 25 03:54:09 AM UTC 24 |
68411855834 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_alert_test.1593990585 |
|
|
Aug 25 03:54:08 AM UTC 24 |
Aug 25 03:54:10 AM UTC 24 |
33845842 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_smoke.621129810 |
|
|
Aug 25 03:54:10 AM UTC 24 |
Aug 25 03:54:13 AM UTC 24 |
284912596 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_rx_oversample.661239617 |
|
|
Aug 25 03:53:43 AM UTC 24 |
Aug 25 03:54:14 AM UTC 24 |
2955510602 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_perf.3094534343 |
|
|
Aug 25 03:45:34 AM UTC 24 |
Aug 25 03:54:17 AM UTC 24 |
5798533693 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_tx_rx.3257875842 |
|
|
Aug 25 03:53:35 AM UTC 24 |
Aug 25 03:54:22 AM UTC 24 |
59444248199 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.4058578272 |
|
|
Aug 25 03:53:49 AM UTC 24 |
Aug 25 03:54:28 AM UTC 24 |
46870133852 ps |
T212 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.302436865 |
|
|
Aug 25 03:54:07 AM UTC 24 |
Aug 25 03:54:33 AM UTC 24 |
5857025837 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_noise_filter.1630162232 |
|
|
Aug 25 03:53:48 AM UTC 24 |
Aug 25 03:54:34 AM UTC 24 |
58710126244 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_rx_oversample.1026034299 |
|
|
Aug 25 03:54:23 AM UTC 24 |
Aug 25 03:54:35 AM UTC 24 |
3409582883 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_intr.1401325912 |
|
|
Aug 25 03:52:57 AM UTC 24 |
Aug 25 03:54:38 AM UTC 24 |
39155508290 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.2046010339 |
|
|
Aug 25 03:54:39 AM UTC 24 |
Aug 25 03:54:42 AM UTC 24 |
1192975626 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_tx_rx.3469142265 |
|
|
Aug 25 03:48:04 AM UTC 24 |
Aug 25 03:54:44 AM UTC 24 |
100758404698 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.2811450910 |
|
|
Aug 25 03:47:51 AM UTC 24 |
Aug 25 03:54:49 AM UTC 24 |
156454556778 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.2363754455 |
|
|
Aug 25 03:53:38 AM UTC 24 |
Aug 25 03:54:49 AM UTC 24 |
51669097796 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_loopback.3377604532 |
|
|
Aug 25 03:54:43 AM UTC 24 |
Aug 25 03:54:52 AM UTC 24 |
3757033716 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_fifo_full.2462960176 |
|
|
Aug 25 03:52:56 AM UTC 24 |
Aug 25 03:54:56 AM UTC 24 |
58929895429 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_alert_test.1415756717 |
|
|
Aug 25 03:54:57 AM UTC 24 |
Aug 25 03:54:59 AM UTC 24 |
35271144 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_fifo_reset.2102737221 |
|
|
Aug 25 03:54:17 AM UTC 24 |
Aug 25 03:55:01 AM UTC 24 |
47221904335 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.2674568354 |
|
|
Aug 25 03:53:21 AM UTC 24 |
Aug 25 03:55:01 AM UTC 24 |
33030184573 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/39.uart_fifo_reset.2131423301 |
|
|
Aug 25 03:52:32 AM UTC 24 |
Aug 25 03:55:07 AM UTC 24 |
180611846506 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_noise_filter.593784431 |
|
|
Aug 25 03:52:57 AM UTC 24 |
Aug 25 03:55:09 AM UTC 24 |
63850552267 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.3290450842 |
|
|
Aug 25 03:54:50 AM UTC 24 |
Aug 25 03:55:13 AM UTC 24 |
1310526394 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_tx_rx.1712072052 |
|
|
Aug 25 03:54:11 AM UTC 24 |
Aug 25 03:55:15 AM UTC 24 |
39028770733 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_noise_filter.518141939 |
|
|
Aug 25 03:51:59 AM UTC 24 |
Aug 25 03:55:16 AM UTC 24 |
186121624969 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_perf.1582067968 |
|
|
Aug 25 03:50:00 AM UTC 24 |
Aug 25 03:55:18 AM UTC 24 |
21037347720 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_fifo_reset.1181174935 |
|
|
Aug 25 03:50:45 AM UTC 24 |
Aug 25 03:55:19 AM UTC 24 |
89465568572 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.2421791508 |
|
|
Aug 25 03:53:32 AM UTC 24 |
Aug 25 03:55:23 AM UTC 24 |
4076531022 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.843709459 |
|
|
Aug 25 03:55:23 AM UTC 24 |
Aug 25 03:55:27 AM UTC 24 |
492051227 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_loopback.561059057 |
|
|
Aug 25 03:55:25 AM UTC 24 |
Aug 25 03:55:27 AM UTC 24 |
65924914 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_smoke.1079247600 |
|
|
Aug 25 03:55:00 AM UTC 24 |
Aug 25 03:55:28 AM UTC 24 |
6213273166 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_noise_filter.18153574 |
|
|
Aug 25 03:51:21 AM UTC 24 |
Aug 25 03:55:32 AM UTC 24 |
67142030792 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_rx_oversample.4038767237 |
|
|
Aug 25 03:55:14 AM UTC 24 |
Aug 25 03:55:33 AM UTC 24 |
3223628221 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_alert_test.2757802544 |
|
|
Aug 25 03:55:34 AM UTC 24 |
Aug 25 03:55:36 AM UTC 24 |
40427253 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.424488867 |
|
|
Aug 25 03:55:07 AM UTC 24 |
Aug 25 03:55:39 AM UTC 24 |
51676816041 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.562184385 |
|
|
Aug 25 03:51:43 AM UTC 24 |
Aug 25 03:55:42 AM UTC 24 |
81723087776 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_smoke.3528305332 |
|
|
Aug 25 03:55:37 AM UTC 24 |
Aug 25 03:55:45 AM UTC 24 |
717208294 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.2813462474 |
|
|
Aug 25 03:54:35 AM UTC 24 |
Aug 25 03:55:50 AM UTC 24 |
38298834201 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_stress_all_with_rand_reset.1411421618 |
|
|
Aug 25 03:55:28 AM UTC 24 |
Aug 25 03:55:52 AM UTC 24 |
1993919017 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_intr.3659655963 |
|
|
Aug 25 03:55:16 AM UTC 24 |
Aug 25 03:55:52 AM UTC 24 |
39759163111 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_noise_filter.91796023 |
|
|
Aug 25 03:53:20 AM UTC 24 |
Aug 25 03:55:54 AM UTC 24 |
108623235333 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_fifo_reset.2678900361 |
|
|
Aug 25 03:52:56 AM UTC 24 |
Aug 25 03:55:56 AM UTC 24 |
105344062000 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_perf.992242882 |
|
|
Aug 25 03:49:01 AM UTC 24 |
Aug 25 03:56:01 AM UTC 24 |
22302992175 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_rx_start_bit_filter.4002947613 |
|
|
Aug 25 03:55:57 AM UTC 24 |
Aug 25 03:56:04 AM UTC 24 |
3712689033 ps |
T802 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_tx_rx.973643911 |
|
|
Aug 25 03:55:01 AM UTC 24 |
Aug 25 03:56:04 AM UTC 24 |
32742192040 ps |
T803 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.1560040344 |
|
|
Aug 25 03:56:04 AM UTC 24 |
Aug 25 03:56:11 AM UTC 24 |
756873888 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_fifo_full.4127466425 |
|
|
Aug 25 03:53:37 AM UTC 24 |
Aug 25 03:56:13 AM UTC 24 |
95890219905 ps |
T805 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_loopback.3103357280 |
|
|
Aug 25 03:56:04 AM UTC 24 |
Aug 25 03:56:14 AM UTC 24 |
4554824254 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.3089374997 |
|
|
Aug 25 03:55:20 AM UTC 24 |
Aug 25 03:56:19 AM UTC 24 |
31059512910 ps |
T806 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_fifo_full.690758640 |
|
|
Aug 25 03:55:01 AM UTC 24 |
Aug 25 03:56:25 AM UTC 24 |
128073688952 ps |
T807 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_alert_test.3172810958 |
|
|
Aug 25 03:56:26 AM UTC 24 |
Aug 25 03:56:28 AM UTC 24 |
47174571 ps |
T808 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_smoke.918946741 |
|
|
Aug 25 03:56:29 AM UTC 24 |
Aug 25 03:56:32 AM UTC 24 |
670124955 ps |
T809 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_fifo_reset.3669389759 |
|
|
Aug 25 03:55:51 AM UTC 24 |
Aug 25 03:56:34 AM UTC 24 |
13733321273 ps |
T810 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.3275661420 |
|
|
Aug 25 03:54:15 AM UTC 24 |
Aug 25 03:56:34 AM UTC 24 |
162274495343 ps |
T811 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_tx_rx.2249784485 |
|
|
Aug 25 03:53:12 AM UTC 24 |
Aug 25 03:56:34 AM UTC 24 |
62007842413 ps |
T812 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/42.uart_stress_all.206045403 |
|
|
Aug 25 03:54:07 AM UTC 24 |
Aug 25 03:56:46 AM UTC 24 |
38685927617 ps |
T813 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_fifo_reset.710261216 |
|
|
Aug 25 03:55:09 AM UTC 24 |
Aug 25 03:56:51 AM UTC 24 |
32576524920 ps |
T814 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.2163835995 |
|
|
Aug 25 03:39:20 AM UTC 24 |
Aug 25 03:56:56 AM UTC 24 |
129439808659 ps |
T815 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/41.uart_fifo_full.3026695956 |
|
|
Aug 25 03:53:14 AM UTC 24 |
Aug 25 03:56:58 AM UTC 24 |
346326337586 ps |
T816 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_stress_all_with_rand_reset.1108439630 |
|
|
Aug 25 03:56:15 AM UTC 24 |
Aug 25 03:57:02 AM UTC 24 |
9936679600 ps |
T817 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_rx_oversample.2578432572 |
|
|
Aug 25 03:55:53 AM UTC 24 |
Aug 25 03:57:02 AM UTC 24 |
5240567272 ps |
T818 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.1050310497 |
|
|
Aug 25 03:54:35 AM UTC 24 |
Aug 25 03:57:05 AM UTC 24 |
53052390899 ps |
T819 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_rx_start_bit_filter.3034302326 |
|
|
Aug 25 03:57:00 AM UTC 24 |
Aug 25 03:57:08 AM UTC 24 |
1702626832 ps |
T820 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_loopback.2551249510 |
|
|
Aug 25 03:57:06 AM UTC 24 |
Aug 25 03:57:10 AM UTC 24 |
585391289 ps |
T821 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/43.uart_intr.823352850 |
|
|
Aug 25 03:54:28 AM UTC 24 |
Aug 25 03:57:12 AM UTC 24 |
225150370872 ps |
T822 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_tx_ovrd.2175798185 |
|
|
Aug 25 03:57:04 AM UTC 24 |
Aug 25 03:57:13 AM UTC 24 |
1228273290 ps |
T823 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_intr.18033728 |
|
|
Aug 25 03:49:43 AM UTC 24 |
Aug 25 03:57:14 AM UTC 24 |
133059485525 ps |
T824 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_alert_test.2723094286 |
|
|
Aug 25 03:57:16 AM UTC 24 |
Aug 25 03:57:18 AM UTC 24 |
18012843 ps |
T825 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_fifo_full.993512746 |
|
|
Aug 25 03:55:43 AM UTC 24 |
Aug 25 03:57:22 AM UTC 24 |
60647498086 ps |
T181 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.3477402597 |
|
|
Aug 25 03:52:08 AM UTC 24 |
Aug 25 03:57:25 AM UTC 24 |
111141688268 ps |
T826 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.3937554091 |
|
|
Aug 25 03:55:19 AM UTC 24 |
Aug 25 03:57:25 AM UTC 24 |
47485644155 ps |
T827 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.1987089068 |
|
|
Aug 25 03:48:32 AM UTC 24 |
Aug 25 03:57:26 AM UTC 24 |
128180076505 ps |
T828 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_stress_all_with_rand_reset.960529095 |
|
|
Aug 25 03:57:14 AM UTC 24 |
Aug 25 03:57:30 AM UTC 24 |
842026071 ps |
T829 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_stress_all.2029014267 |
|
|
Aug 25 03:37:32 AM UTC 24 |
Aug 25 03:57:30 AM UTC 24 |
74612696459 ps |
T830 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_rx_oversample.2369429173 |
|
|
Aug 25 03:56:46 AM UTC 24 |
Aug 25 03:57:31 AM UTC 24 |
3826715156 ps |
T831 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.371974336 |
|
|
Aug 25 03:40:55 AM UTC 24 |
Aug 25 03:57:32 AM UTC 24 |
116722468691 ps |
T173 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_rx_parity_err.1582205505 |
|
|
Aug 25 03:57:04 AM UTC 24 |
Aug 25 03:57:34 AM UTC 24 |
37121041633 ps |
T832 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/35.uart_perf.641890153 |
|
|
Aug 25 03:50:33 AM UTC 24 |
Aug 25 03:57:35 AM UTC 24 |
10409735439 ps |
T833 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.2523904292 |
|
|
Aug 25 03:52:56 AM UTC 24 |
Aug 25 03:57:38 AM UTC 24 |
157802981513 ps |
T834 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.1445043700 |
|
|
Aug 25 03:56:35 AM UTC 24 |
Aug 25 03:57:38 AM UTC 24 |
35187214755 ps |
T835 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_rx_start_bit_filter.587376169 |
|
|
Aug 25 03:57:31 AM UTC 24 |
Aug 25 03:57:38 AM UTC 24 |
6289779417 ps |
T836 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_tx_ovrd.2821702117 |
|
|
Aug 25 03:57:35 AM UTC 24 |
Aug 25 03:57:39 AM UTC 24 |
363082807 ps |
T837 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_noise_filter.2553468651 |
|
|
Aug 25 03:56:58 AM UTC 24 |
Aug 25 03:57:39 AM UTC 24 |
24969907307 ps |
T838 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_alert_test.2665338422 |
|
|
Aug 25 03:57:40 AM UTC 24 |
Aug 25 03:57:42 AM UTC 24 |
12008892 ps |
T839 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/45.uart_tx_rx.2388533828 |
|
|
Aug 25 03:55:40 AM UTC 24 |
Aug 25 03:57:42 AM UTC 24 |
81269138505 ps |
T840 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_stress_all.397035308 |
|
|
Aug 25 03:47:00 AM UTC 24 |
Aug 25 03:57:46 AM UTC 24 |
148970150743 ps |
T841 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_intr.2970432902 |
|
|
Aug 25 03:57:30 AM UTC 24 |
Aug 25 03:57:48 AM UTC 24 |
18196915098 ps |
T842 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_smoke.1776132611 |
|
|
Aug 25 03:57:21 AM UTC 24 |
Aug 25 03:57:50 AM UTC 24 |
5906874517 ps |
T843 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/46.uart_fifo_full.2227847066 |
|
|
Aug 25 03:56:34 AM UTC 24 |
Aug 25 03:57:52 AM UTC 24 |
76385712583 ps |
T844 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.3539539596 |
|
|
Aug 25 03:49:56 AM UTC 24 |
Aug 25 03:57:52 AM UTC 24 |
123200036612 ps |
T845 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.3286253473 |
|
|
Aug 25 03:46:28 AM UTC 24 |
Aug 25 03:58:00 AM UTC 24 |
258404840553 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.37098321 |
|
|
Aug 25 03:50:45 AM UTC 24 |
Aug 25 03:58:00 AM UTC 24 |
150236285226 ps |
T846 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_loopback.446770072 |
|
|
Aug 25 03:57:35 AM UTC 24 |
Aug 25 03:58:07 AM UTC 24 |
7366439922 ps |
T847 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/32.uart_fifo_full.1390963790 |
|
|
Aug 25 03:48:43 AM UTC 24 |
Aug 25 03:58:08 AM UTC 24 |
153918385156 ps |
T848 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.4110695562 |
|
|
Aug 25 03:46:07 AM UTC 24 |
Aug 25 03:58:08 AM UTC 24 |
177981439260 ps |
T849 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_rx_start_bit_filter.1945700877 |
|
|
Aug 25 03:58:01 AM UTC 24 |
Aug 25 03:58:08 AM UTC 24 |
1220278146 ps |
T850 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_stress_all.744547730 |
|
|
Aug 25 03:35:51 AM UTC 24 |
Aug 25 03:58:09 AM UTC 24 |
252741450204 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_loopback.1050053389 |
|
|
Aug 25 03:58:10 AM UTC 24 |
Aug 25 03:58:13 AM UTC 24 |
750527619 ps |
T852 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_stress_all_with_rand_reset.4232373507 |
|
|
Aug 25 03:57:40 AM UTC 24 |
Aug 25 03:58:13 AM UTC 24 |
7623070323 ps |
T853 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/47.uart_fifo_reset.1897949437 |
|
|
Aug 25 03:57:28 AM UTC 24 |
Aug 25 03:58:13 AM UTC 24 |
26796147606 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_tx_ovrd.4274249701 |
|
|
Aug 25 03:58:09 AM UTC 24 |
Aug 25 03:58:14 AM UTC 24 |
727861052 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_alert_test.3233551461 |
|
|
Aug 25 03:58:14 AM UTC 24 |
Aug 25 03:58:16 AM UTC 24 |
13074047 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_fifo_overflow.217524851 |
|
|
Aug 25 03:57:49 AM UTC 24 |
Aug 25 03:58:16 AM UTC 24 |
9122488580 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_noise_filter.2682399099 |
|
|
Aug 25 03:58:00 AM UTC 24 |
Aug 25 03:58:18 AM UTC 24 |
12573800979 ps |
T858 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/49.uart_smoke.1663094381 |
|
|
Aug 25 03:58:15 AM UTC 24 |
Aug 25 03:58:20 AM UTC 24 |
473530836 ps |
T859 |
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/48.uart_smoke.1694791552 |
|
|
Aug 25 03:57:42 AM UTC 24 |
Aug 25 03:58:22 AM UTC 24 |
5320249385 ps |