Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.12 99.10 97.65 100.00 98.38 100.00 99.62


Total tests in report: 1316
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
73.68 73.68 92.96 92.96 72.94 72.94 90.66 90.66 87.50 87.50 94.36 94.36 3.68 3.68 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_noise_filter.3333605904
78.60 4.92 96.38 3.42 84.47 11.53 93.31 2.65 89.81 2.31 95.85 1.48 11.81 8.13 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.1008397457
82.69 4.09 97.59 1.21 91.18 6.71 97.22 3.91 93.75 3.94 96.14 0.30 20.28 8.47 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_fifo_full.3326116369
85.16 2.47 97.59 0.00 91.18 0.00 97.22 0.00 93.75 0.00 96.14 0.00 35.09 14.81 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_stress_all.417247497
86.93 1.77 97.89 0.30 92.12 0.94 97.22 0.00 94.68 0.93 96.44 0.30 43.22 8.13 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_stress_all.3679439136
88.50 1.57 97.89 0.00 92.12 0.00 97.22 0.00 94.68 0.00 96.44 0.00 52.63 9.42 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.2887289598
89.70 1.21 97.89 0.00 92.12 0.00 97.22 0.00 94.68 0.00 96.44 0.00 59.88 7.25 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.2206182640
90.81 1.10 98.79 0.90 94.12 2.00 97.47 0.25 97.22 2.55 96.44 0.00 60.80 0.93 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_tx_ovrd.1430271510
91.84 1.03 98.79 0.00 95.76 1.65 97.47 0.00 97.45 0.23 96.44 0.00 65.09 4.29 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_intr.1008021201
92.74 0.90 98.79 0.00 95.76 0.00 97.47 0.00 97.45 0.00 96.44 0.00 70.49 5.40 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_stress_all.2873360946
93.38 0.64 98.79 0.00 95.76 0.00 97.47 0.00 97.45 0.00 96.44 0.00 74.33 3.84 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_rx_parity_err.3220551027
93.98 0.60 98.89 0.10 96.12 0.35 99.75 2.27 97.92 0.46 96.74 0.30 74.44 0.11 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_sec_cm.2456013611
94.45 0.48 98.89 0.00 96.12 0.00 99.75 0.00 97.92 0.00 96.74 0.00 77.31 2.87 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_fifo_full.2133241885
94.84 0.39 99.10 0.20 96.47 0.35 99.75 0.00 98.38 0.46 96.74 0.00 78.64 1.33 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_intr.15228816
95.19 0.35 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 97.63 0.89 79.84 1.20 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_stress_all_with_rand_reset.3405974165
95.54 0.35 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 99.70 2.08 79.84 0.00 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_rw.2858165128
95.88 0.34 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 99.70 0.00 81.87 2.03 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_fifo_full.2825149752
96.20 0.32 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 99.70 0.00 83.79 1.92 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_perf.3846855129
96.48 0.28 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 99.70 0.00 85.48 1.69 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.1477787032
96.71 0.23 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 99.70 0.00 86.86 1.38 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_fifo_reset.561601715
96.92 0.21 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 99.70 0.00 88.15 1.29 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.2246868686
97.12 0.19 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 100.00 0.30 89.00 0.86 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_noise_filter.1193760953
97.27 0.15 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 100.00 0.00 89.91 0.90 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_fifo_full.2280996206
97.41 0.14 99.10 0.00 96.47 0.00 99.75 0.00 98.38 0.00 100.00 0.00 90.74 0.84 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_fifo_reset.3023049756
97.53 0.13 99.10 0.00 97.06 0.59 99.75 0.00 98.38 0.00 100.00 0.00 90.92 0.18 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/9.uart_tl_intg_err.587005202
97.66 0.12 99.10 0.00 97.06 0.00 99.75 0.00 98.38 0.00 100.00 0.00 91.67 0.75 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_fifo_overflow.557211980
97.77 0.11 99.10 0.00 97.06 0.00 99.75 0.00 98.38 0.00 100.00 0.00 92.32 0.65 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.1111907341
97.87 0.11 99.10 0.00 97.06 0.00 99.75 0.00 98.38 0.00 100.00 0.00 92.96 0.63 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_fifo_full.3186558106
97.97 0.10 99.10 0.00 97.41 0.35 100.00 0.25 98.38 0.00 100.00 0.00 92.96 0.00 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_alert_test.497641308
98.06 0.08 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 93.45 0.50 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_fifo_reset.1450063549
98.13 0.08 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 93.90 0.45 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_fifo_reset.3681795058
98.21 0.08 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 94.36 0.45 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_fifo_reset.4116163464
98.27 0.07 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 94.76 0.41 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.2127861121
98.34 0.06 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 95.15 0.38 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_rx_parity_err.1983656573
98.39 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 95.46 0.32 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.136272727
98.44 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 95.78 0.32 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_fifo_reset.3054132216
98.49 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.07 0.29 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_tx_rx.3565205706
98.54 0.04 99.10 0.00 97.65 0.24 100.00 0.00 98.38 0.00 100.00 0.00 96.09 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_intg_err.301216467
98.57 0.04 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.32 0.23 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_stress_all.4157096508
98.61 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.52 0.20 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_stress_all.590714669
98.64 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.70 0.18 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_tx_rx.1039504413
98.67 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.88 0.18 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/24.uart_stress_all.274276658
98.70 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.06 0.18 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_fifo_overflow.118374406
98.72 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.22 0.16 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_stress_all.1912853800
98.75 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.38 0.16 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.1106447278
98.77 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.52 0.14 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.1883745868
98.80 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.65 0.14 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_tx_rx.43495587
98.81 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.76 0.11 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/174.uart_fifo_reset.217579498
98.83 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.88 0.11 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/224.uart_fifo_reset.1846229370
98.85 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.97 0.09 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_perf.1627614548
98.86 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.06 0.09 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/28.uart_fifo_reset.4250856755
98.88 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.15 0.09 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.2540251273
98.89 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.24 0.09 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_stress_all.2793739547
98.90 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.31 0.07 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_rx_start_bit_filter.706454082
98.92 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.37 0.07 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_tx_rx.3721591567
98.93 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.44 0.07 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/176.uart_fifo_reset.462790469
98.94 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.51 0.07 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/25.uart_fifo_reset.1486412256
98.95 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.58 0.07 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/27.uart_fifo_reset.1051975702
98.96 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.62 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/104.uart_fifo_reset.3189025839
98.97 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.67 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/110.uart_fifo_reset.1198619037
98.97 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.71 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/134.uart_fifo_reset.3603785959
98.98 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.76 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.346254671
98.99 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.80 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.1235988364
99.00 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.85 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_tx_rx.3950793804
99.00 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.89 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/185.uart_fifo_reset.1398848432
99.01 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.94 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/20.uart_tx_rx.394616681
99.02 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.98 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/211.uart_fifo_reset.3449244749
99.03 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.03 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/237.uart_fifo_reset.3277528975
99.03 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.07 0.05 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/298.uart_fifo_reset.990594887
99.04 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.10 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_perf.4004720132
99.04 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.12 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.1081730356
99.04 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.14 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/100.uart_fifo_reset.3328002037
99.05 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.16 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/119.uart_fifo_reset.1171324244
99.05 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.19 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/125.uart_fifo_reset.3754995110
99.06 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.21 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/128.uart_fifo_reset.2246918130
99.06 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.23 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/131.uart_fifo_reset.1250701071
99.06 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.25 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/133.uart_fifo_reset.1518280467
99.07 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.28 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/140.uart_fifo_reset.1491349153
99.07 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.30 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/143.uart_fifo_reset.254948659
99.07 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.32 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/152.uart_fifo_reset.2291078684
99.08 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.35 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_fifo_reset.1444406220
99.08 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.37 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/177.uart_fifo_reset.1125979485
99.09 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.39 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/184.uart_fifo_reset.1012737837
99.09 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.41 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/21.uart_intr.21866768
99.09 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.44 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/214.uart_fifo_reset.4073724939
99.10 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.46 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/220.uart_fifo_reset.1322828666
99.10 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.48 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/252.uart_fifo_reset.507753286
99.10 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.50 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/268.uart_fifo_reset.685746332
99.11 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.53 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/280.uart_fifo_reset.3540348246
99.11 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.55 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/284.uart_fifo_reset.3856841416
99.12 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.57 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_fifo_reset.390854919
99.12 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.59 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/61.uart_fifo_reset.551374555
99.12 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.62 0.02 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/66.uart_fifo_reset.2965485325

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_aliasing.4141417505
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_bit_bash.1604246714
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_hw_reset.3063485774
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_mem_rw_with_rand_reset.3030037266
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_rw.3378343600
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_intr_test.797495310
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_same_csr_outstanding.4023388993
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_errors.3310103787
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_intg_err.2000438654
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_aliasing.2538010511
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_bit_bash.3799484138
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_hw_reset.2316130012
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_mem_rw_with_rand_reset.3838670992
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_rw.88990186
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_intr_test.3705596893
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_same_csr_outstanding.3111119516
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_errors.1709625306
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_intg_err.2769032168
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_mem_rw_with_rand_reset.3086474228
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_rw.1865221076
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/10.uart_intr_test.108020256
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/10.uart_same_csr_outstanding.1389525270
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_errors.1723542912
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_intg_err.2434215278
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_mem_rw_with_rand_reset.3675849427
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_rw.3810680250
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/11.uart_intr_test.3850448377
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/11.uart_same_csr_outstanding.636048656
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_errors.4244299629
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_intg_err.2763698667
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_mem_rw_with_rand_reset.2673000769
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_rw.1412298179
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/12.uart_intr_test.1889510964
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/12.uart_same_csr_outstanding.626857981
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_errors.154677099
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_mem_rw_with_rand_reset.2933002937
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_rw.604115537
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/13.uart_intr_test.1462838943
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/13.uart_same_csr_outstanding.1511528432
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_errors.2727404013
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_intg_err.4132083394
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_mem_rw_with_rand_reset.1475682132
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_rw.2040747269
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/14.uart_intr_test.1931499835
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/14.uart_same_csr_outstanding.2818529826
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_errors.1486825794
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_intg_err.264930897
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_mem_rw_with_rand_reset.1435655106
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_rw.4161081013
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/15.uart_intr_test.1278915265
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/15.uart_same_csr_outstanding.3487651771
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_errors.3899766188
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_intg_err.2474079585
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_mem_rw_with_rand_reset.2514216298
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_rw.4098383945
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/16.uart_intr_test.2461976660
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/16.uart_same_csr_outstanding.2387784416
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_errors.2501638577
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_intg_err.3815167545
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_mem_rw_with_rand_reset.724576065
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_rw.3210679978
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/17.uart_intr_test.4069392299
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/17.uart_same_csr_outstanding.3579201970
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_errors.3901344354
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_intg_err.2312538768
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_mem_rw_with_rand_reset.1060938929
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_rw.1630457250
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/18.uart_intr_test.1713803330
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/18.uart_same_csr_outstanding.3167627181
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_errors.1671359423
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_intg_err.920638177
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_mem_rw_with_rand_reset.3540346524
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_rw.1954096805
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/19.uart_intr_test.2821244672
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/19.uart_same_csr_outstanding.3741405622
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_errors.2575739097
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_intg_err.3140284991
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_aliasing.3030418690
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_bit_bash.1670520953
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_hw_reset.3493881668
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_mem_rw_with_rand_reset.2514838235
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_rw.894191821
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_intr_test.2121509551
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_same_csr_outstanding.3930324137
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_errors.2035725418
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_intg_err.3739651294
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/20.uart_intr_test.2434786659
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/21.uart_intr_test.4021742443
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/22.uart_intr_test.2165162309
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/23.uart_intr_test.3262353533
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/24.uart_intr_test.1787764936
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/25.uart_intr_test.2505271709
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/26.uart_intr_test.3063827537
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/27.uart_intr_test.588042607
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/28.uart_intr_test.3256035098
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/29.uart_intr_test.1539220246
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_aliasing.2908427220
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_bit_bash.875353342
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_hw_reset.2971226833
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_mem_rw_with_rand_reset.3139381465
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_intr_test.1508462284
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_same_csr_outstanding.209697776
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_errors.2720800102
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_intg_err.422247545
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/30.uart_intr_test.1549212354
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/31.uart_intr_test.416725809
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/32.uart_intr_test.2791555971
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/33.uart_intr_test.3685117234
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/34.uart_intr_test.2776470070
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/35.uart_intr_test.1980972747
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/36.uart_intr_test.3840053240
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/37.uart_intr_test.1705708811
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/38.uart_intr_test.450809396
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/39.uart_intr_test.942579757
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_aliasing.1018231071
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_bit_bash.3179227883
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_hw_reset.2708094304
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_mem_rw_with_rand_reset.438452114
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_rw.1728141726
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_intr_test.311990651
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_same_csr_outstanding.3125753999
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_errors.2065501099
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_intg_err.3729297895
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/40.uart_intr_test.2677036770
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/41.uart_intr_test.636827589
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/42.uart_intr_test.2723975611
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/43.uart_intr_test.2731633000
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/44.uart_intr_test.1544875916
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/45.uart_intr_test.1006373976
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/46.uart_intr_test.3509651194
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/47.uart_intr_test.1894072228
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/48.uart_intr_test.2721181669
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/49.uart_intr_test.2454194038
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_mem_rw_with_rand_reset.3522304207
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_rw.636993221
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/5.uart_intr_test.306855093
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/5.uart_same_csr_outstanding.1145811359
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/5.uart_tl_errors.2538166443
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/cover_reg_top/5.uart_tl_intg_err.2691246505
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/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/74.uart_fifo_reset.306528090
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/74.uart_stress_all_with_rand_reset.3412166084
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/75.uart_fifo_reset.927872043
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/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/76.uart_fifo_reset.1110133466
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/76.uart_stress_all_with_rand_reset.3771093669
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/77.uart_fifo_reset.22132102
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/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/78.uart_fifo_reset.2812736231
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/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/79.uart_fifo_reset.2137007912
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/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.2177853459
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_intr.2347111425
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2971788994
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_loopback.3781390363
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_noise_filter.3309997981
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_perf.2282728586
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_rx_oversample.918262272
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.3829004777
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.1230665277
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_smoke.2147804221
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.2745212637
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.1863615449
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_tx_rx.3955192907
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/80.uart_fifo_reset.1721308615
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.4015414941
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/81.uart_fifo_reset.2103301710
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/81.uart_stress_all_with_rand_reset.2755484412
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/82.uart_fifo_reset.3300783632
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/82.uart_stress_all_with_rand_reset.905689086
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/83.uart_fifo_reset.1118976972
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/84.uart_fifo_reset.947748020
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/84.uart_stress_all_with_rand_reset.4180173380
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/85.uart_fifo_reset.760895087
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/85.uart_stress_all_with_rand_reset.2604948791
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/86.uart_fifo_reset.4239325236
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.1487108681
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/87.uart_fifo_reset.2191313367
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.573999333
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/88.uart_fifo_reset.3363155273
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.1320090586
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/89.uart_fifo_reset.673705304
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.3442965580
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_alert_test.1314095111
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.3778484605
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_fifo_reset.819254980
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_intr.4223820894
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.2090783651
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_loopback.3776188084
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_noise_filter.1116933776
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_perf.3220531733
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_rx_oversample.795440290
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.4039068910
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.3364447104
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_smoke.915197724
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_stress_all.1416295403
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/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.1145311708
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_tx_rx.181004800
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/90.uart_fifo_reset.3466510570
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/90.uart_stress_all_with_rand_reset.1969567226
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/91.uart_fifo_reset.1050442379
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/91.uart_stress_all_with_rand_reset.396986688
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/92.uart_fifo_reset.252522844
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.4139330512
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/93.uart_fifo_reset.942787986
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.4254977124
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/94.uart_fifo_reset.944463729
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.1076613011
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/95.uart_fifo_reset.2275459061
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.3621353637
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/96.uart_fifo_reset.1802651999
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.2044804858
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/97.uart_fifo_reset.2575956675
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.4051425556
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/98.uart_fifo_reset.251376410
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.4230580212
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/99.uart_fifo_reset.4288251822
/workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.758824339



Total test records in report: 1316
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_smoke.3933300822 Aug 25 03:33:00 AM UTC 24 Aug 25 03:33:04 AM UTC 24 860694181 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_rx_start_bit_filter.430373316 Aug 25 03:33:06 AM UTC 24 Aug 25 03:33:12 AM UTC 24 3519483204 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_tx_ovrd.1430271510 Aug 25 03:33:08 AM UTC 24 Aug 25 03:33:12 AM UTC 24 1391302991 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_loopback.2993469239 Aug 25 03:33:08 AM UTC 24 Aug 25 03:33:15 AM UTC 24 1871602388 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_sec_cm.394620860 Aug 25 03:33:15 AM UTC 24 Aug 25 03:33:17 AM UTC 24 70831747 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_alert_test.497641308 Aug 25 03:33:16 AM UTC 24 Aug 25 03:33:18 AM UTC 24 23816888 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_rx_oversample.2340883224 Aug 25 03:33:04 AM UTC 24 Aug 25 03:33:18 AM UTC 24 1796425117 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_smoke.2034981917 Aug 25 03:33:16 AM UTC 24 Aug 25 03:33:22 AM UTC 24 691100609 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_intr.1500428711 Aug 25 03:33:20 AM UTC 24 Aug 25 03:33:24 AM UTC 24 7147505003 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_noise_filter.3333605904 Aug 25 03:33:23 AM UTC 24 Aug 25 03:33:36 AM UTC 24 8118787528 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_fifo_full.2580564489 Aug 25 03:33:01 AM UTC 24 Aug 25 03:33:36 AM UTC 24 36889214169 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_rx_oversample.2891641240 Aug 25 03:33:20 AM UTC 24 Aug 25 03:33:48 AM UTC 24 4126869312 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_tx_ovrd.793869374 Aug 25 03:33:34 AM UTC 24 Aug 25 03:33:48 AM UTC 24 9317280586 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_loopback.4154494125 Aug 25 03:33:37 AM UTC 24 Aug 25 03:33:49 AM UTC 24 8458268858 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_tx_rx.1039504413 Aug 25 03:33:01 AM UTC 24 Aug 25 03:33:50 AM UTC 24 30586159831 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_alert_test.969902635 Aug 25 03:33:48 AM UTC 24 Aug 25 03:33:50 AM UTC 24 11815087 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_fifo_full.3326116369 Aug 25 03:33:18 AM UTC 24 Aug 25 03:33:50 AM UTC 24 50031312686 ps
T31 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_sec_cm.2456013611 Aug 25 03:33:48 AM UTC 24 Aug 25 03:33:50 AM UTC 24 83022215 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_smoke.734110810 Aug 25 03:33:49 AM UTC 24 Aug 25 03:33:52 AM UTC 24 89981844 ps
T30 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_rx_start_bit_filter.706454082 Aug 25 03:33:24 AM UTC 24 Aug 25 03:34:05 AM UTC 24 46408123072 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_loopback.2270152913 Aug 25 03:34:02 AM UTC 24 Aug 25 03:34:05 AM UTC 24 2510124849 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_tx_ovrd.3467416297 Aug 25 03:34:02 AM UTC 24 Aug 25 03:34:06 AM UTC 24 1976691389 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_tx_rx.3621348706 Aug 25 03:33:49 AM UTC 24 Aug 25 03:34:08 AM UTC 24 25108926354 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.1996309861 Aug 25 03:33:50 AM UTC 24 Aug 25 03:34:08 AM UTC 24 9730040005 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_sec_cm.1397390537 Aug 25 03:34:06 AM UTC 24 Aug 25 03:34:09 AM UTC 24 130438203 ps
T34 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_alert_test.1332190095 Aug 25 03:34:07 AM UTC 24 Aug 25 03:34:09 AM UTC 24 20827813 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_fifo_reset.2104250325 Aug 25 03:33:02 AM UTC 24 Aug 25 03:34:18 AM UTC 24 82626641906 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.1081730356 Aug 25 03:33:19 AM UTC 24 Aug 25 03:34:19 AM UTC 24 35426477779 ps
T283 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_fifo_full.815524471 Aug 25 03:33:49 AM UTC 24 Aug 25 03:34:21 AM UTC 24 16406262185 ps
T266 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_smoke.3448418515 Aug 25 03:34:07 AM UTC 24 Aug 25 03:34:22 AM UTC 24 5542952677 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_loopback.3465432162 Aug 25 03:34:24 AM UTC 24 Aug 25 03:34:27 AM UTC 24 758870725 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_rx_parity_err.2501144914 Aug 25 03:33:27 AM UTC 24 Aug 25 03:34:27 AM UTC 24 22430522391 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_tx_ovrd.1635071304 Aug 25 03:34:23 AM UTC 24 Aug 25 03:34:29 AM UTC 24 1002100312 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_rx_parity_err.1983656573 Aug 25 03:34:01 AM UTC 24 Aug 25 03:34:29 AM UTC 24 146784697881 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_rx_start_bit_filter.290759207 Aug 25 03:34:22 AM UTC 24 Aug 25 03:34:29 AM UTC 24 1713616242 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_alert_test.3788314248 Aug 25 03:34:30 AM UTC 24 Aug 25 03:34:32 AM UTC 24 79567317 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_sec_cm.282439635 Aug 25 03:34:30 AM UTC 24 Aug 25 03:34:33 AM UTC 24 39658417 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_smoke.2925068525 Aug 25 03:34:31 AM UTC 24 Aug 25 03:34:35 AM UTC 24 722050762 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_rx_oversample.3808689163 Aug 25 03:34:17 AM UTC 24 Aug 25 03:34:37 AM UTC 24 6547094278 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_rx_start_bit_filter.2830287634 Aug 25 03:34:00 AM UTC 24 Aug 25 03:34:37 AM UTC 24 44053683894 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_intr.15228816 Aug 25 03:33:04 AM UTC 24 Aug 25 03:34:41 AM UTC 24 52221531516 ps
T430 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_rx_oversample.2724195678 Aug 25 03:34:34 AM UTC 24 Aug 25 03:34:42 AM UTC 24 5420709598 ps
T282 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_smoke.955196777 Aug 25 03:35:33 AM UTC 24 Aug 25 03:35:36 AM UTC 24 315694316 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.1008397457 Aug 25 03:33:13 AM UTC 24 Aug 25 03:34:44 AM UTC 24 9259951069 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.4220016041 Aug 25 03:34:10 AM UTC 24 Aug 25 03:34:44 AM UTC 24 39202118280 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_rx_oversample.2248895156 Aug 25 03:33:51 AM UTC 24 Aug 25 03:34:49 AM UTC 24 5015158605 ps
T42 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_tx_ovrd.632024926 Aug 25 03:34:42 AM UTC 24 Aug 25 03:34:49 AM UTC 24 922358858 ps
T43 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_loopback.3657772914 Aug 25 03:34:44 AM UTC 24 Aug 25 03:34:51 AM UTC 24 2711258991 ps
T44 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_sec_cm.1808548647 Aug 25 03:34:51 AM UTC 24 Aug 25 03:34:53 AM UTC 24 65514474 ps
T45 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_alert_test.1939013477 Aug 25 03:34:52 AM UTC 24 Aug 25 03:34:53 AM UTC 24 13244889 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_noise_filter.3288641967 Aug 25 03:33:05 AM UTC 24 Aug 25 03:34:54 AM UTC 24 84224590604 ps
T47 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_fifo_reset.2616363336 Aug 25 03:34:10 AM UTC 24 Aug 25 03:34:54 AM UTC 24 136988397030 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_tx_rx.3565205706 Aug 25 03:34:08 AM UTC 24 Aug 25 03:34:55 AM UTC 24 114019650396 ps
T132 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_fifo_overflow.2094590591 Aug 25 03:35:15 AM UTC 24 Aug 25 03:35:35 AM UTC 24 39288214474 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_smoke.4033576692 Aug 25 03:34:54 AM UTC 24 Aug 25 03:34:57 AM UTC 24 293458521 ps
T395 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_tx_rx.3802313758 Aug 25 03:34:54 AM UTC 24 Aug 25 03:34:57 AM UTC 24 339121295 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_intr.3702659662 Aug 25 03:34:36 AM UTC 24 Aug 25 03:34:57 AM UTC 24 21275713794 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_stress_all_with_rand_reset.3405974165 Aug 25 03:34:06 AM UTC 24 Aug 25 03:34:58 AM UTC 24 6159717341 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_rx_start_bit_filter.1250860123 Aug 25 03:34:58 AM UTC 24 Aug 25 03:35:03 AM UTC 24 1671007381 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_tx_rx.2045283177 Aug 25 03:33:18 AM UTC 24 Aug 25 03:35:06 AM UTC 24 69825746204 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_stress_all_with_rand_reset.2276675871 Aug 25 03:34:29 AM UTC 24 Aug 25 03:35:09 AM UTC 24 2118927522 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_loopback.608300965 Aug 25 03:35:03 AM UTC 24 Aug 25 03:35:10 AM UTC 24 5967609008 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_alert_test.3027836414 Aug 25 03:35:11 AM UTC 24 Aug 25 03:35:13 AM UTC 24 12701638 ps
T52 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_perf.1516485290 Aug 25 03:34:27 AM UTC 24 Aug 25 03:35:14 AM UTC 24 1633168595 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_fifo_full.2133241885 Aug 25 03:34:10 AM UTC 24 Aug 25 03:35:14 AM UTC 24 57142032571 ps
T22 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.136272727 Aug 25 03:33:45 AM UTC 24 Aug 25 03:35:17 AM UTC 24 4275390046 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_intr.1008021201 Aug 25 03:34:57 AM UTC 24 Aug 25 03:35:18 AM UTC 24 56446057725 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_smoke.4254661016 Aug 25 03:35:14 AM UTC 24 Aug 25 03:35:19 AM UTC 24 697000945 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.2540251273 Aug 25 03:34:22 AM UTC 24 Aug 25 03:35:22 AM UTC 24 32259392735 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_rx_parity_err.3545689373 Aug 25 03:34:41 AM UTC 24 Aug 25 03:35:27 AM UTC 24 40774320427 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_rx_start_bit_filter.929390784 Aug 25 03:35:21 AM UTC 24 Aug 25 03:35:28 AM UTC 24 4595815685 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.3410840677 Aug 25 03:34:49 AM UTC 24 Aug 25 03:35:28 AM UTC 24 2333146761 ps
T142 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_fifo_full.3186558106 Aug 25 03:34:55 AM UTC 24 Aug 25 03:35:29 AM UTC 24 53592028643 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_fifo_reset.438669638 Aug 25 03:34:33 AM UTC 24 Aug 25 03:35:30 AM UTC 24 79652243448 ps
T399 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_loopback.363731971 Aug 25 03:35:28 AM UTC 24 Aug 25 03:35:30 AM UTC 24 1050394141 ps
T431 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_alert_test.3025304275 Aug 25 03:35:31 AM UTC 24 Aug 25 03:35:33 AM UTC 24 17746540 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_tx_ovrd.1406181068 Aug 25 03:35:23 AM UTC 24 Aug 25 03:35:35 AM UTC 24 15611080095 ps
T391 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_intr.3000000521 Aug 25 03:35:19 AM UTC 24 Aug 25 03:35:36 AM UTC 24 16272974949 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_rx_parity_err.532675469 Aug 25 03:34:59 AM UTC 24 Aug 25 03:35:39 AM UTC 24 50863294349 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_tx_ovrd.876301479 Aug 25 03:35:00 AM UTC 24 Aug 25 03:35:40 AM UTC 24 6438059614 ps
T432 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_rx_oversample.211570047 Aug 25 03:35:18 AM UTC 24 Aug 25 03:35:43 AM UTC 24 2647980318 ps
T339 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_tx_ovrd.1970566572 Aug 25 03:35:44 AM UTC 24 Aug 25 03:35:49 AM UTC 24 1195041021 ps
T433 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_alert_test.1929680622 Aug 25 03:35:51 AM UTC 24 Aug 25 03:35:52 AM UTC 24 41788315 ps
T288 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_noise_filter.880199476 Aug 25 03:34:37 AM UTC 24 Aug 25 03:35:53 AM UTC 24 23983794644 ps
T434 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_rx_oversample.2862125089 Aug 25 03:35:37 AM UTC 24 Aug 25 03:35:54 AM UTC 24 3605851131 ps
T270 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_rx_start_bit_filter.3672825204 Aug 25 03:35:41 AM UTC 24 Aug 25 03:35:54 AM UTC 24 3519873866 ps
T392 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_fifo_reset.176304298 Aug 25 03:33:19 AM UTC 24 Aug 25 03:35:58 AM UTC 24 99313041567 ps
T334 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_smoke.2147804221 Aug 25 03:35:53 AM UTC 24 Aug 25 03:35:58 AM UTC 24 627715025 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_noise_filter.804879147 Aug 25 03:35:21 AM UTC 24 Aug 25 03:36:00 AM UTC 24 35227592032 ps
T269 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_tx_rx.4202965751 Aug 25 03:35:15 AM UTC 24 Aug 25 03:36:01 AM UTC 24 48268419486 ps
T135 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_fifo_reset.390854919 Aug 25 03:34:56 AM UTC 24 Aug 25 03:36:02 AM UTC 24 103562671022 ps
T308 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_perf.851651197 Aug 25 03:34:45 AM UTC 24 Aug 25 03:36:05 AM UTC 24 18152279756 ps
T435 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_rx_oversample.918262272 Aug 25 03:35:57 AM UTC 24 Aug 25 03:36:06 AM UTC 24 2768078860 ps
T436 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_loopback.2935091946 Aug 25 03:35:48 AM UTC 24 Aug 25 03:36:08 AM UTC 24 11554191677 ps
T136 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_fifo_reset.1978503673 Aug 25 03:35:17 AM UTC 24 Aug 25 03:36:10 AM UTC 24 61483699840 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_fifo_reset.1450063549 Aug 25 03:33:50 AM UTC 24 Aug 25 03:36:11 AM UTC 24 81658835951 ps
T437 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_alert_test.3299468801 Aug 25 03:36:11 AM UTC 24 Aug 25 03:36:13 AM UTC 24 20084819 ps
T438 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_loopback.3781390363 Aug 25 03:36:03 AM UTC 24 Aug 25 03:36:13 AM UTC 24 8057300735 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_fifo_overflow.1410632500 Aug 25 03:34:33 AM UTC 24 Aug 25 03:36:15 AM UTC 24 104823932464 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_rx_oversample.4138669829 Aug 25 03:34:56 AM UTC 24 Aug 25 03:36:15 AM UTC 24 7564882135 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_tx_rx.290403838 Aug 25 03:35:33 AM UTC 24 Aug 25 03:36:17 AM UTC 24 23645053776 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/2.uart_noise_filter.1193760953 Aug 25 03:33:53 AM UTC 24 Aug 25 03:36:17 AM UTC 24 141799627290 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.1230665277 Aug 25 03:36:00 AM UTC 24 Aug 25 03:36:19 AM UTC 24 31116535822 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.1618556938 Aug 25 03:35:31 AM UTC 24 Aug 25 03:36:19 AM UTC 24 4206396159 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_fifo_full.3546145787 Aug 25 03:35:55 AM UTC 24 Aug 25 03:36:23 AM UTC 24 28934896548 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_stress_all_with_rand_reset.3052370553 Aug 25 03:35:50 AM UTC 24 Aug 25 03:36:24 AM UTC 24 2998392275 ps
T353 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_smoke.915197724 Aug 25 03:36:12 AM UTC 24 Aug 25 03:36:25 AM UTC 24 5865376564 ps
T439 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_rx_oversample.795440290 Aug 25 03:36:18 AM UTC 24 Aug 25 03:36:26 AM UTC 24 2746146439 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.1863615449 Aug 25 03:36:03 AM UTC 24 Aug 25 03:36:29 AM UTC 24 6455024239 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_fifo_full.3597571336 Aug 25 03:35:15 AM UTC 24 Aug 25 03:36:29 AM UTC 24 24394767865 ps
T440 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_loopback.3776188084 Aug 25 03:36:26 AM UTC 24 Aug 25 03:36:32 AM UTC 24 2436747586 ps
T441 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_alert_test.1314095111 Aug 25 03:36:30 AM UTC 24 Aug 25 03:36:32 AM UTC 24 14523590 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_smoke.1477117322 Aug 25 03:36:32 AM UTC 24 Aug 25 03:36:35 AM UTC 24 254753148 ps
T140 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.3829004777 Aug 25 03:36:01 AM UTC 24 Aug 25 03:36:39 AM UTC 24 110320032575 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_tx_rx.181004800 Aug 25 03:36:14 AM UTC 24 Aug 25 03:36:43 AM UTC 24 28660227827 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.2745212637 Aug 25 03:36:07 AM UTC 24 Aug 25 03:36:44 AM UTC 24 2105633758 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.2642198470 Aug 25 03:33:13 AM UTC 24 Aug 25 03:36:49 AM UTC 24 155281202533 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.3070598016 Aug 25 03:36:35 AM UTC 24 Aug 25 03:36:50 AM UTC 24 12956566576 ps
T365 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_rx_start_bit_filter.1516199868 Aug 25 03:36:51 AM UTC 24 Aug 25 03:36:55 AM UTC 24 709388614 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.3364447104 Aug 25 03:36:20 AM UTC 24 Aug 25 03:36:57 AM UTC 24 39386727177 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.1958588498 Aug 25 03:35:22 AM UTC 24 Aug 25 03:36:59 AM UTC 24 104074860795 ps
T394 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_intr.4223820894 Aug 25 03:36:18 AM UTC 24 Aug 25 03:36:59 AM UTC 24 11518196947 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_tx_ovrd.2968989210 Aug 25 03:36:58 AM UTC 24 Aug 25 03:37:01 AM UTC 24 1275069671 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.1477787032 Aug 25 03:33:02 AM UTC 24 Aug 25 03:37:02 AM UTC 24 138712380154 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_stress_all_with_rand_reset.3666949730 Aug 25 03:35:07 AM UTC 24 Aug 25 03:37:03 AM UTC 24 4675887060 ps
T281 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_tx_rx.3955192907 Aug 25 03:35:54 AM UTC 24 Aug 25 03:37:04 AM UTC 24 107444045351 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.1145311708 Aug 25 03:36:25 AM UTC 24 Aug 25 03:37:05 AM UTC 24 6268127455 ps
T442 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_alert_test.3253963543 Aug 25 03:37:05 AM UTC 24 Aug 25 03:37:07 AM UTC 24 11314418 ps
T443 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_rx_oversample.2775494259 Aug 25 03:36:44 AM UTC 24 Aug 25 03:37:07 AM UTC 24 2510188668 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_smoke.3884502143 Aug 25 03:37:06 AM UTC 24 Aug 25 03:37:09 AM UTC 24 499653640 ps
T294 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_fifo_overflow.118374406 Aug 25 03:34:55 AM UTC 24 Aug 25 03:39:09 AM UTC 24 167113659805 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/0.uart_perf.4004720132 Aug 25 03:33:11 AM UTC 24 Aug 25 03:37:12 AM UTC 24 15990236982 ps
T134 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_rx_parity_err.3977857368 Aug 25 03:36:56 AM UTC 24 Aug 25 03:37:14 AM UTC 24 10403682806 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_stress_all_with_rand_reset.4168673091 Aug 25 03:36:28 AM UTC 24 Aug 25 03:37:14 AM UTC 24 2489985032 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.4039068910 Aug 25 03:36:24 AM UTC 24 Aug 25 03:37:15 AM UTC 24 17785014887 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_rx_start_bit_filter.1619602013 Aug 25 03:37:16 AM UTC 24 Aug 25 03:37:21 AM UTC 24 3260541012 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_stress_all.417247497 Aug 25 03:33:47 AM UTC 24 Aug 25 03:37:21 AM UTC 24 219740088096 ps
T360 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_tx_ovrd.2021647031 Aug 25 03:37:22 AM UTC 24 Aug 25 03:37:26 AM UTC 24 535132169 ps
T444 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_rx_oversample.3410092790 Aug 25 03:37:12 AM UTC 24 Aug 25 03:37:26 AM UTC 24 4663017347 ps
T445 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_loopback.2992386031 Aug 25 03:37:27 AM UTC 24 Aug 25 03:37:29 AM UTC 24 108759833 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_intr.1959157324 Aug 25 03:37:15 AM UTC 24 Aug 25 03:37:31 AM UTC 24 20901245999 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.1478563051 Aug 25 03:37:10 AM UTC 24 Aug 25 03:37:31 AM UTC 24 24495753016 ps
T396 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_intr.2347111425 Aug 25 03:35:59 AM UTC 24 Aug 25 03:37:32 AM UTC 24 30674253699 ps
T446 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_alert_test.4220772453 Aug 25 03:37:32 AM UTC 24 Aug 25 03:37:34 AM UTC 24 25429987 ps
T370 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_smoke.3727808933 Aug 25 03:37:35 AM UTC 24 Aug 25 03:37:40 AM UTC 24 649989064 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_noise_filter.4012910618 Aug 25 03:36:51 AM UTC 24 Aug 25 03:37:43 AM UTC 24 42992911723 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_loopback.2471718808 Aug 25 03:37:00 AM UTC 24 Aug 25 03:37:50 AM UTC 24 13312981766 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_tx_rx.43495587 Aug 25 03:34:31 AM UTC 24 Aug 25 03:37:52 AM UTC 24 50722571287 ps
T290 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_stress_all.1416295403 Aug 25 03:36:30 AM UTC 24 Aug 25 03:37:55 AM UTC 24 108611083774 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_stress_all_with_rand_reset.2422344929 Aug 25 03:37:03 AM UTC 24 Aug 25 03:37:58 AM UTC 24 7068724221 ps
T267 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_noise_filter.4238447763 Aug 25 03:34:20 AM UTC 24 Aug 25 03:37:58 AM UTC 24 59745263360 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_fifo_reset.2353818863 Aug 25 03:35:36 AM UTC 24 Aug 25 03:38:03 AM UTC 24 46536727520 ps
T371 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_rx_start_bit_filter.3114864203 Aug 25 03:37:59 AM UTC 24 Aug 25 03:38:06 AM UTC 24 3105656081 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_fifo_reset.819254980 Aug 25 03:36:16 AM UTC 24 Aug 25 03:38:12 AM UTC 24 133578770733 ps
T448 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_loopback.2252918916 Aug 25 03:38:07 AM UTC 24 Aug 25 03:38:14 AM UTC 24 3325493507 ps
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T390 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.533495526 Aug 25 03:34:28 AM UTC 24 Aug 25 03:38:17 AM UTC 24 83716124293 ps
T346 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_rx_start_bit_filter.1413984225 Aug 25 03:34:37 AM UTC 24 Aug 25 03:38:19 AM UTC 24 81109398990 ps
T449 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_alert_test.1547396043 Aug 25 03:38:18 AM UTC 24 Aug 25 03:38:21 AM UTC 24 11174383 ps
T201 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_fifo_reset.3411303176 Aug 25 03:37:53 AM UTC 24 Aug 25 03:38:25 AM UTC 24 10513760560 ps
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T289 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_tx_ovrd.304591020 Aug 25 03:38:05 AM UTC 24 Aug 25 03:38:28 AM UTC 24 7301320523 ps
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T326 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_tx_rx.3721591567 Aug 25 03:37:08 AM UTC 24 Aug 25 03:38:35 AM UTC 24 105936513270 ps
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T451 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_loopback.1153643384 Aug 25 03:38:42 AM UTC 24 Aug 25 03:38:50 AM UTC 24 7421430676 ps
T321 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_tx_ovrd.392505179 Aug 25 03:38:42 AM UTC 24 Aug 25 03:38:51 AM UTC 24 9603661317 ps
T273 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.1111907341 Aug 25 03:33:37 AM UTC 24 Aug 25 03:38:52 AM UTC 24 237894483575 ps
T452 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_alert_test.2307613892 Aug 25 03:38:53 AM UTC 24 Aug 25 03:38:55 AM UTC 24 13812834 ps
T113 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_intr.2699883965 Aug 25 03:38:34 AM UTC 24 Aug 25 03:38:57 AM UTC 24 31696662498 ps
T378 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_smoke.3509569227 Aug 25 03:38:56 AM UTC 24 Aug 25 03:38:59 AM UTC 24 513054820 ps
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T89 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_stress_all_with_rand_reset.3815669426 Aug 25 03:37:32 AM UTC 24 Aug 25 03:39:02 AM UTC 24 5516703573 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/6.uart_perf.4289008868 Aug 25 03:35:29 AM UTC 24 Aug 25 03:39:05 AM UTC 24 6253830454 ps
T141 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.3778484605 Aug 25 03:36:15 AM UTC 24 Aug 25 03:39:09 AM UTC 24 101661933786 ps
T338 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_rx_parity_err.3981353129 Aug 25 03:35:43 AM UTC 24 Aug 25 03:39:10 AM UTC 24 73487734088 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_fifo_full.2825149752 Aug 25 03:36:14 AM UTC 24 Aug 25 03:39:14 AM UTC 24 209865075330 ps
T375 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_stress_all_with_rand_reset.980161751 Aug 25 03:38:52 AM UTC 24 Aug 25 03:39:15 AM UTC 24 2369907747 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/7.uart_fifo_full.1596645361 Aug 25 03:35:36 AM UTC 24 Aug 25 03:39:17 AM UTC 24 105567340508 ps
T302 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_rx_start_bit_filter.3847150553 Aug 25 03:39:09 AM UTC 24 Aug 25 03:39:19 AM UTC 24 4602223411 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_tx_ovrd.4211727795 Aug 25 03:39:16 AM UTC 24 Aug 25 03:39:20 AM UTC 24 1402198277 ps
T307 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.1106447278 Aug 25 03:37:22 AM UTC 24 Aug 25 03:39:23 AM UTC 24 62597148346 ps
T129 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_rx_parity_err.1159739994 Aug 25 03:38:40 AM UTC 24 Aug 25 03:39:23 AM UTC 24 10754610313 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/4.uart_stress_all.2793739547 Aug 25 03:34:50 AM UTC 24 Aug 25 03:39:24 AM UTC 24 102982623023 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_alert_test.1632311526 Aug 25 03:39:24 AM UTC 24 Aug 25 03:39:26 AM UTC 24 192339042 ps
T130 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_fifo_full.1047318884 Aug 25 03:37:45 AM UTC 24 Aug 25 03:39:29 AM UTC 24 29175792836 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_rx_oversample.978936912 Aug 25 03:39:06 AM UTC 24 Aug 25 03:39:30 AM UTC 24 5294043572 ps
T384 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_smoke.2216116145 Aug 25 03:39:25 AM UTC 24 Aug 25 03:39:32 AM UTC 24 649952332 ps
T303 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/9.uart_noise_filter.1116933776 Aug 25 03:36:19 AM UTC 24 Aug 25 03:39:33 AM UTC 24 58916921268 ps
T313 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_fifo_full.3997271654 Aug 25 03:38:26 AM UTC 24 Aug 25 03:39:36 AM UTC 24 17717926578 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_loopback.3190421479 Aug 25 03:39:17 AM UTC 24 Aug 25 03:39:39 AM UTC 24 6862061270 ps
T150 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/11.uart_fifo_reset.3681795058 Aug 25 03:37:10 AM UTC 24 Aug 25 03:39:43 AM UTC 24 139844252804 ps
T300 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.3418511358 Aug 25 03:39:00 AM UTC 24 Aug 25 03:39:47 AM UTC 24 55558022916 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.2887289598 Aug 25 03:35:04 AM UTC 24 Aug 25 03:39:51 AM UTC 24 101288618681 ps
T145 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/8.uart_fifo_reset.561601715 Aug 25 03:35:56 AM UTC 24 Aug 25 03:39:51 AM UTC 24 107579850421 ps
T324 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_noise_filter.1791841229 Aug 25 03:39:09 AM UTC 24 Aug 25 03:39:52 AM UTC 24 35521711060 ps
T418 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_tx_rx.781870455 Aug 25 03:39:26 AM UTC 24 Aug 25 03:39:52 AM UTC 24 29021865526 ps
T311 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.688236928 Aug 25 03:38:17 AM UTC 24 Aug 25 03:39:53 AM UTC 24 6352719509 ps
T291 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/10.uart_tx_rx.1129905578 Aug 25 03:36:33 AM UTC 24 Aug 25 03:39:54 AM UTC 24 53356917596 ps
T374 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_tx_ovrd.1456997053 Aug 25 03:39:52 AM UTC 24 Aug 25 03:39:56 AM UTC 24 579719252 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_alert_test.4005046667 Aug 25 03:39:57 AM UTC 24 Aug 25 03:39:59 AM UTC 24 83860295 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_rx_start_bit_filter.2470403612 Aug 25 03:39:44 AM UTC 24 Aug 25 03:39:59 AM UTC 24 3974436329 ps
T349 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_tx_rx.718217763 Aug 25 03:38:22 AM UTC 24 Aug 25 03:40:00 AM UTC 24 30778432990 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_smoke.2309470460 Aug 25 03:40:00 AM UTC 24 Aug 25 03:40:04 AM UTC 24 273406276 ps
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T458 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/15.uart_loopback.2654306726 Aug 25 03:39:52 AM UTC 24 Aug 25 03:40:08 AM UTC 24 9536545514 ps
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T330 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.2762243732 Aug 25 03:39:21 AM UTC 24 Aug 25 03:40:13 AM UTC 24 3006907188 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_fifo_reset.4116163464 Aug 25 03:38:29 AM UTC 24 Aug 25 03:40:15 AM UTC 24 17976275842 ps
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T385 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/13.uart_noise_filter.3663998396 Aug 25 03:38:36 AM UTC 24 Aug 25 03:40:16 AM UTC 24 28924708882 ps
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T285 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/12.uart_fifo_overflow.1897135168 Aug 25 03:37:51 AM UTC 24 Aug 25 03:40:32 AM UTC 24 94845483917 ps
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T462 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/16.uart_alert_test.2940327798 Aug 25 03:40:32 AM UTC 24 Aug 25 03:40:34 AM UTC 24 32361199 ps
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T388 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.1489218779 Aug 25 03:40:44 AM UTC 24 Aug 25 03:41:01 AM UTC 24 8527235532 ps
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T335 /workspaces/repo/scratch/os_regression_2024_08_24/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.2554760632 Aug 25 03:41:20 AM UTC 24 Aug 25 03:41:25 AM UTC 24 3451373130 ps
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