| T465 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_noise_filter.429092575 |
|
|
Aug 27 04:44:35 AM UTC 24 |
Aug 27 04:45:10 AM UTC 24 |
32259252144 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.1001278077 |
|
|
Aug 27 04:44:21 AM UTC 24 |
Aug 27 04:45:11 AM UTC 24 |
14489591731 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/11.uart_perf.3499932652 |
|
|
Aug 27 04:41:40 AM UTC 24 |
Aug 27 04:45:16 AM UTC 24 |
19661783536 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/10.uart_noise_filter.1300425624 |
|
|
Aug 27 04:40:59 AM UTC 24 |
Aug 27 04:45:16 AM UTC 24 |
84887035573 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_tx_rx.1710295706 |
|
|
Aug 27 04:45:07 AM UTC 24 |
Aug 27 04:45:21 AM UTC 24 |
3782513292 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/9.uart_fifo_full.1790972715 |
|
|
Aug 27 04:40:22 AM UTC 24 |
Aug 27 04:45:21 AM UTC 24 |
173855748841 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_intr.2991282302 |
|
|
Aug 27 04:45:17 AM UTC 24 |
Aug 27 04:45:22 AM UTC 24 |
9407164237 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_tx_rx.3158444189 |
|
|
Aug 27 04:43:32 AM UTC 24 |
Aug 27 04:45:23 AM UTC 24 |
86158702652 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_fifo_reset.1543333974 |
|
|
Aug 27 04:45:11 AM UTC 24 |
Aug 27 04:45:23 AM UTC 24 |
9020721561 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.1816327806 |
|
|
Aug 27 04:45:22 AM UTC 24 |
Aug 27 04:45:25 AM UTC 24 |
4437885193 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_rx_oversample.3753499459 |
|
|
Aug 27 04:45:12 AM UTC 24 |
Aug 27 04:45:27 AM UTC 24 |
5394245183 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.757226410 |
|
|
Aug 27 04:39:25 AM UTC 24 |
Aug 27 04:45:29 AM UTC 24 |
108595215161 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_alert_test.504800629 |
|
|
Aug 27 04:45:29 AM UTC 24 |
Aug 27 04:45:31 AM UTC 24 |
19351566 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.1592058644 |
|
|
Aug 27 04:45:24 AM UTC 24 |
Aug 27 04:45:32 AM UTC 24 |
1125418997 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/1.uart_stress_all.2771403169 |
|
|
Aug 27 04:35:46 AM UTC 24 |
Aug 27 04:45:43 AM UTC 24 |
83006204965 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/2.uart_stress_all.3139235433 |
|
|
Aug 27 04:36:27 AM UTC 24 |
Aug 27 04:45:46 AM UTC 24 |
385550046118 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.2073337210 |
|
|
Aug 27 04:45:02 AM UTC 24 |
Aug 27 04:45:50 AM UTC 24 |
2296134614 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_loopback.1163248980 |
|
|
Aug 27 04:45:24 AM UTC 24 |
Aug 27 04:45:51 AM UTC 24 |
8029694964 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_fifo_full.1072835889 |
|
|
Aug 27 04:45:10 AM UTC 24 |
Aug 27 04:45:51 AM UTC 24 |
80421734055 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_smoke.2263213313 |
|
|
Aug 27 04:45:32 AM UTC 24 |
Aug 27 04:46:01 AM UTC 24 |
5903213706 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.3925605244 |
|
|
Aug 27 04:45:26 AM UTC 24 |
Aug 27 04:46:12 AM UTC 24 |
8282222247 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_stress_all.2042133083 |
|
|
Aug 27 04:45:28 AM UTC 24 |
Aug 27 04:46:20 AM UTC 24 |
61115009980 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_fifo_reset.3842460279 |
|
|
Aug 27 04:45:50 AM UTC 24 |
Aug 27 04:46:24 AM UTC 24 |
40291179512 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.1861326413 |
|
|
Aug 27 04:46:07 AM UTC 24 |
Aug 27 04:46:25 AM UTC 24 |
5574001951 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_intr.1184703220 |
|
|
Aug 27 04:45:52 AM UTC 24 |
Aug 27 04:46:27 AM UTC 24 |
52201656770 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.289169230 |
|
|
Aug 27 04:45:22 AM UTC 24 |
Aug 27 04:46:33 AM UTC 24 |
40352490415 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_loopback.3787792727 |
|
|
Aug 27 04:46:21 AM UTC 24 |
Aug 27 04:46:34 AM UTC 24 |
7950047119 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.847808389 |
|
|
Aug 27 04:46:19 AM UTC 24 |
Aug 27 04:46:36 AM UTC 24 |
7840673282 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.3844528250 |
|
|
Aug 27 04:45:47 AM UTC 24 |
Aug 27 04:46:36 AM UTC 24 |
62113874105 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_alert_test.660814047 |
|
|
Aug 27 04:46:35 AM UTC 24 |
Aug 27 04:46:37 AM UTC 24 |
36381283 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.442533333 |
|
|
Aug 27 04:46:13 AM UTC 24 |
Aug 27 04:46:39 AM UTC 24 |
33650155279 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_smoke.2593345274 |
|
|
Aug 27 04:46:37 AM UTC 24 |
Aug 27 04:46:43 AM UTC 24 |
5584948394 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/14.uart_stress_all.439393513 |
|
|
Aug 27 04:43:26 AM UTC 24 |
Aug 27 04:46:50 AM UTC 24 |
141439041287 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.1836284458 |
|
|
Aug 27 04:43:04 AM UTC 24 |
Aug 27 04:46:56 AM UTC 24 |
128660483499 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/14.uart_perf.3058760025 |
|
|
Aug 27 04:43:24 AM UTC 24 |
Aug 27 04:46:57 AM UTC 24 |
36940545256 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_tx_rx.1036394203 |
|
|
Aug 27 04:46:37 AM UTC 24 |
Aug 27 04:46:58 AM UTC 24 |
36578338351 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_noise_filter.2747587555 |
|
|
Aug 27 04:45:17 AM UTC 24 |
Aug 27 04:47:00 AM UTC 24 |
130399554544 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/1.uart_perf.244583057 |
|
|
Aug 27 04:35:40 AM UTC 24 |
Aug 27 04:47:01 AM UTC 24 |
28013143554 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_stress_all.1784469036 |
|
|
Aug 27 04:45:03 AM UTC 24 |
Aug 27 04:47:02 AM UTC 24 |
191426574011 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.2089334201 |
|
|
Aug 27 04:47:02 AM UTC 24 |
Aug 27 04:47:06 AM UTC 24 |
618438270 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.4162422218 |
|
|
Aug 27 04:46:40 AM UTC 24 |
Aug 27 04:47:06 AM UTC 24 |
17338741139 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_fifo_reset.158851921 |
|
|
Aug 27 04:44:25 AM UTC 24 |
Aug 27 04:47:09 AM UTC 24 |
185664662195 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_intr.727893692 |
|
|
Aug 27 04:46:57 AM UTC 24 |
Aug 27 04:47:11 AM UTC 24 |
25095252127 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_rx_oversample.1433058868 |
|
|
Aug 27 04:45:52 AM UTC 24 |
Aug 27 04:47:12 AM UTC 24 |
7632381362 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_alert_test.1517450289 |
|
|
Aug 27 04:47:11 AM UTC 24 |
Aug 27 04:47:13 AM UTC 24 |
19002365 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.3342064884 |
|
|
Aug 27 04:46:59 AM UTC 24 |
Aug 27 04:47:14 AM UTC 24 |
3730952242 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_intr.2044947282 |
|
|
Aug 27 04:44:27 AM UTC 24 |
Aug 27 04:47:19 AM UTC 24 |
397415309164 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.2835976236 |
|
|
Aug 27 04:46:28 AM UTC 24 |
Aug 27 04:47:20 AM UTC 24 |
29802537239 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_loopback.374544666 |
|
|
Aug 27 04:47:03 AM UTC 24 |
Aug 27 04:47:22 AM UTC 24 |
6199897553 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_noise_filter.1087800708 |
|
|
Aug 27 04:46:02 AM UTC 24 |
Aug 27 04:47:29 AM UTC 24 |
155110009796 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_noise_filter.2741400213 |
|
|
Aug 27 04:46:58 AM UTC 24 |
Aug 27 04:47:30 AM UTC 24 |
15710731341 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_rx_oversample.3773739431 |
|
|
Aug 27 04:46:51 AM UTC 24 |
Aug 27 04:47:30 AM UTC 24 |
4550294322 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_rx_oversample.1848487036 |
|
|
Aug 27 04:47:21 AM UTC 24 |
Aug 27 04:47:39 AM UTC 24 |
5486177972 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.2668595007 |
|
|
Aug 27 04:47:30 AM UTC 24 |
Aug 27 04:47:41 AM UTC 24 |
27434076688 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.542997198 |
|
|
Aug 27 04:45:10 AM UTC 24 |
Aug 27 04:47:48 AM UTC 24 |
236286413074 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_smoke.2588195120 |
|
|
Aug 27 04:47:13 AM UTC 24 |
Aug 27 04:47:48 AM UTC 24 |
5913296663 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.1870906423 |
|
|
Aug 27 04:47:08 AM UTC 24 |
Aug 27 04:47:48 AM UTC 24 |
6488783396 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_loopback.142611166 |
|
|
Aug 27 04:49:32 AM UTC 24 |
Aug 27 04:49:37 AM UTC 24 |
3305858618 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.1142505441 |
|
|
Aug 27 04:47:35 AM UTC 24 |
Aug 27 04:47:51 AM UTC 24 |
8644235386 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_alert_test.1242869620 |
|
|
Aug 27 04:47:51 AM UTC 24 |
Aug 27 04:47:53 AM UTC 24 |
12287113 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.1691905047 |
|
|
Aug 27 04:40:46 AM UTC 24 |
Aug 27 04:47:54 AM UTC 24 |
165437450758 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_fifo_reset.701224257 |
|
|
Aug 27 04:43:41 AM UTC 24 |
Aug 27 04:47:54 AM UTC 24 |
172399582113 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_smoke.4047144839 |
|
|
Aug 27 04:47:53 AM UTC 24 |
Aug 27 04:47:56 AM UTC 24 |
1004230061 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.3957997987 |
|
|
Aug 27 04:43:38 AM UTC 24 |
Aug 27 04:47:57 AM UTC 24 |
119523711617 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.566261208 |
|
|
Aug 27 04:47:30 AM UTC 24 |
Aug 27 04:48:03 AM UTC 24 |
48238819544 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_tx_rx.3251576599 |
|
|
Aug 27 04:47:54 AM UTC 24 |
Aug 27 04:48:04 AM UTC 24 |
5970737686 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_loopback.44390368 |
|
|
Aug 27 04:47:40 AM UTC 24 |
Aug 27 04:48:06 AM UTC 24 |
8740942383 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.3180387823 |
|
|
Aug 27 04:42:28 AM UTC 24 |
Aug 27 04:48:07 AM UTC 24 |
40554114867 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_tx_rx.1429163898 |
|
|
Aug 27 04:47:15 AM UTC 24 |
Aug 27 04:48:09 AM UTC 24 |
89524372434 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.537009706 |
|
|
Aug 27 04:43:25 AM UTC 24 |
Aug 27 04:48:12 AM UTC 24 |
56157361159 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_intr.4226180749 |
|
|
Aug 27 04:48:05 AM UTC 24 |
Aug 27 04:48:12 AM UTC 24 |
12890317197 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_tx_rx.833077153 |
|
|
Aug 27 04:48:32 AM UTC 24 |
Aug 27 04:49:53 AM UTC 24 |
25565723335 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.1053893864 |
|
|
Aug 27 04:47:01 AM UTC 24 |
Aug 27 04:48:14 AM UTC 24 |
34416569098 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.1166146612 |
|
|
Aug 27 04:48:12 AM UTC 24 |
Aug 27 04:48:15 AM UTC 24 |
785381616 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_fifo_reset.829885310 |
|
|
Aug 27 04:46:44 AM UTC 24 |
Aug 27 04:48:18 AM UTC 24 |
51687955187 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.1535366520 |
|
|
Aug 27 04:43:16 AM UTC 24 |
Aug 27 04:48:20 AM UTC 24 |
111055699690 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_perf.934251192 |
|
|
Aug 27 04:46:24 AM UTC 24 |
Aug 27 04:48:27 AM UTC 24 |
9885172930 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_alert_test.1259125713 |
|
|
Aug 27 04:48:28 AM UTC 24 |
Aug 27 04:48:30 AM UTC 24 |
25980983 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_fifo_full.3800122486 |
|
|
Aug 27 04:47:54 AM UTC 24 |
Aug 27 04:48:31 AM UTC 24 |
17812421605 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/8.uart_fifo_full.3212483726 |
|
|
Aug 27 04:39:33 AM UTC 24 |
Aug 27 04:48:33 AM UTC 24 |
89131365810 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.3118240435 |
|
|
Aug 27 04:41:45 AM UTC 24 |
Aug 27 04:48:34 AM UTC 24 |
78390324750 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.2136730944 |
|
|
Aug 27 04:48:19 AM UTC 24 |
Aug 27 04:48:38 AM UTC 24 |
880417265 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_fifo_reset.1436367386 |
|
|
Aug 27 04:47:58 AM UTC 24 |
Aug 27 04:48:38 AM UTC 24 |
46188565949 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.2174795213 |
|
|
Aug 27 04:48:08 AM UTC 24 |
Aug 27 04:48:38 AM UTC 24 |
33428031300 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_rx_oversample.4280098231 |
|
|
Aug 27 04:48:05 AM UTC 24 |
Aug 27 04:48:43 AM UTC 24 |
3568800834 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.2124748404 |
|
|
Aug 27 04:48:10 AM UTC 24 |
Aug 27 04:48:46 AM UTC 24 |
20695686506 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/4.uart_stress_all.3615265693 |
|
|
Aug 27 04:37:41 AM UTC 24 |
Aug 27 04:48:47 AM UTC 24 |
247214378757 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_loopback.3029532309 |
|
|
Aug 27 04:48:13 AM UTC 24 |
Aug 27 04:48:48 AM UTC 24 |
9019541576 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_tx_rx.716486165 |
|
|
Aug 27 04:45:33 AM UTC 24 |
Aug 27 04:48:52 AM UTC 24 |
140818220507 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.3509043038 |
|
|
Aug 27 04:48:49 AM UTC 24 |
Aug 27 04:48:55 AM UTC 24 |
992493276 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_fifo_full.1233483500 |
|
|
Aug 27 04:48:34 AM UTC 24 |
Aug 27 04:48:56 AM UTC 24 |
21576581900 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.1726896907 |
|
|
Aug 27 04:48:47 AM UTC 24 |
Aug 27 04:48:59 AM UTC 24 |
3169871035 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_loopback.3523804587 |
|
|
Aug 27 04:48:53 AM UTC 24 |
Aug 27 04:49:00 AM UTC 24 |
1506415405 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.861298307 |
|
|
Aug 27 04:47:49 AM UTC 24 |
Aug 27 04:49:01 AM UTC 24 |
10366423581 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.1404675554 |
|
|
Aug 27 04:47:57 AM UTC 24 |
Aug 27 04:49:04 AM UTC 24 |
124480125329 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_alert_test.3430694923 |
|
|
Aug 27 04:49:02 AM UTC 24 |
Aug 27 04:49:04 AM UTC 24 |
26792296 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_smoke.1788817966 |
|
|
Aug 27 04:49:04 AM UTC 24 |
Aug 27 04:49:07 AM UTC 24 |
491505419 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_noise_filter.2729388326 |
|
|
Aug 27 04:48:07 AM UTC 24 |
Aug 27 04:49:10 AM UTC 24 |
62107007882 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.1789555670 |
|
|
Aug 27 04:48:48 AM UTC 24 |
Aug 27 04:49:13 AM UTC 24 |
8837322389 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_fifo_full.730102332 |
|
|
Aug 27 04:45:43 AM UTC 24 |
Aug 27 04:49:15 AM UTC 24 |
107827420188 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_smoke.2748630752 |
|
|
Aug 27 04:48:31 AM UTC 24 |
Aug 27 04:49:23 AM UTC 24 |
10570025031 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_intr.2372897434 |
|
|
Aug 27 04:48:38 AM UTC 24 |
Aug 27 04:49:23 AM UTC 24 |
36275087550 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_perf.1258450045 |
|
|
Aug 27 04:48:14 AM UTC 24 |
Aug 27 04:49:27 AM UTC 24 |
16999408831 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_intr.1702589560 |
|
|
Aug 27 04:47:23 AM UTC 24 |
Aug 27 04:49:27 AM UTC 24 |
49115684931 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.85347204 |
|
|
Aug 27 04:49:24 AM UTC 24 |
Aug 27 04:49:30 AM UTC 24 |
4575780559 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.59020265 |
|
|
Aug 27 04:49:28 AM UTC 24 |
Aug 27 04:49:33 AM UTC 24 |
2670972802 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_rx_oversample.1245184004 |
|
|
Aug 27 04:48:38 AM UTC 24 |
Aug 27 04:49:34 AM UTC 24 |
6126534165 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.108806387 |
|
|
Aug 27 04:48:34 AM UTC 24 |
Aug 27 04:49:42 AM UTC 24 |
78593776565 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_rx_oversample.576665312 |
|
|
Aug 27 04:49:16 AM UTC 24 |
Aug 27 04:49:43 AM UTC 24 |
2550688532 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.129162502 |
|
|
Aug 27 04:49:00 AM UTC 24 |
Aug 27 04:49:44 AM UTC 24 |
30893274458 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_alert_test.1720449925 |
|
|
Aug 27 04:49:44 AM UTC 24 |
Aug 27 04:49:46 AM UTC 24 |
12668705 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.679398204 |
|
|
Aug 27 04:47:17 AM UTC 24 |
Aug 27 04:49:50 AM UTC 24 |
91639572046 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.3011792946 |
|
|
Aug 27 04:47:07 AM UTC 24 |
Aug 27 04:49:51 AM UTC 24 |
264851188444 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_fifo_full.2019859557 |
|
|
Aug 27 04:44:16 AM UTC 24 |
Aug 27 04:49:54 AM UTC 24 |
148853299398 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_smoke.3790632345 |
|
|
Aug 27 04:49:45 AM UTC 24 |
Aug 27 04:49:57 AM UTC 24 |
5556017230 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_fifo_reset.2066295846 |
|
|
Aug 27 04:48:38 AM UTC 24 |
Aug 27 04:49:58 AM UTC 24 |
209364699985 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_noise_filter.1276365551 |
|
|
Aug 27 04:47:29 AM UTC 24 |
Aug 27 04:49:58 AM UTC 24 |
185667947175 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/12.uart_stress_all.668160608 |
|
|
Aug 27 04:42:33 AM UTC 24 |
Aug 27 04:49:59 AM UTC 24 |
413380571788 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_perf.980225459 |
|
|
Aug 27 04:43:59 AM UTC 24 |
Aug 27 04:50:04 AM UTC 24 |
23255217147 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.1414293220 |
|
|
Aug 27 04:49:27 AM UTC 24 |
Aug 27 04:50:04 AM UTC 24 |
33827222755 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.3053909241 |
|
|
Aug 27 04:50:04 AM UTC 24 |
Aug 27 04:50:07 AM UTC 24 |
3124905709 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_intr.3007464974 |
|
|
Aug 27 04:49:17 AM UTC 24 |
Aug 27 04:50:08 AM UTC 24 |
42204116596 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.343745882 |
|
|
Aug 27 04:48:16 AM UTC 24 |
Aug 27 04:50:14 AM UTC 24 |
51812691879 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.3741355716 |
|
|
Aug 27 04:43:59 AM UTC 24 |
Aug 27 04:50:14 AM UTC 24 |
217670176202 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_fifo_full.2849757160 |
|
|
Aug 27 04:49:08 AM UTC 24 |
Aug 27 04:50:15 AM UTC 24 |
91797813906 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_tx_rx.1731192502 |
|
|
Aug 27 04:49:06 AM UTC 24 |
Aug 27 04:50:17 AM UTC 24 |
31664847982 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_alert_test.2786244673 |
|
|
Aug 27 04:50:16 AM UTC 24 |
Aug 27 04:50:17 AM UTC 24 |
42164057 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_fifo_reset.3303268047 |
|
|
Aug 27 04:47:20 AM UTC 24 |
Aug 27 04:50:18 AM UTC 24 |
92213150884 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_rx_oversample.2038423085 |
|
|
Aug 27 04:49:55 AM UTC 24 |
Aug 27 04:50:18 AM UTC 24 |
2620447348 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_loopback.2559244681 |
|
|
Aug 27 04:50:05 AM UTC 24 |
Aug 27 04:50:19 AM UTC 24 |
10082377738 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_smoke.3866767525 |
|
|
Aug 27 04:50:18 AM UTC 24 |
Aug 27 04:50:22 AM UTC 24 |
552845390 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.226769782 |
|
|
Aug 27 04:49:52 AM UTC 24 |
Aug 27 04:50:22 AM UTC 24 |
36509304112 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_intr.3311004571 |
|
|
Aug 27 04:49:58 AM UTC 24 |
Aug 27 04:50:27 AM UTC 24 |
25442307963 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.1106361383 |
|
|
Aug 27 04:49:59 AM UTC 24 |
Aug 27 04:50:30 AM UTC 24 |
51759344542 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/13.uart_perf.2752347115 |
|
|
Aug 27 04:42:56 AM UTC 24 |
Aug 27 04:50:34 AM UTC 24 |
16982392865 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_fifo_reset.3146705481 |
|
|
Aug 27 04:49:14 AM UTC 24 |
Aug 27 04:50:35 AM UTC 24 |
113502435808 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.1602071407 |
|
|
Aug 27 04:44:40 AM UTC 24 |
Aug 27 04:50:35 AM UTC 24 |
108208465225 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_fifo_full.662006047 |
|
|
Aug 27 04:43:36 AM UTC 24 |
Aug 27 04:50:36 AM UTC 24 |
61560200492 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.3585695470 |
|
|
Aug 27 04:49:38 AM UTC 24 |
Aug 27 04:50:37 AM UTC 24 |
8546071660 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.3843237109 |
|
|
Aug 27 04:50:35 AM UTC 24 |
Aug 27 04:50:39 AM UTC 24 |
533677474 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_tx_rx.1402676598 |
|
|
Aug 27 04:49:46 AM UTC 24 |
Aug 27 04:50:40 AM UTC 24 |
19834238822 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_alert_test.2184765572 |
|
|
Aug 27 04:50:41 AM UTC 24 |
Aug 27 04:50:43 AM UTC 24 |
19524807 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.1397332234 |
|
|
Aug 27 04:50:14 AM UTC 24 |
Aug 27 04:50:55 AM UTC 24 |
9933916584 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/4.uart_rx_parity_err.2293663972 |
|
|
Aug 27 04:37:17 AM UTC 24 |
Aug 27 04:51:00 AM UTC 24 |
137694203218 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.2552865896 |
|
|
Aug 27 04:50:31 AM UTC 24 |
Aug 27 04:51:00 AM UTC 24 |
17823120234 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_loopback.4133287372 |
|
|
Aug 27 04:50:36 AM UTC 24 |
Aug 27 04:51:01 AM UTC 24 |
7974128730 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/12.uart_fifo_full.2092073343 |
|
|
Aug 27 04:41:55 AM UTC 24 |
Aug 27 04:51:04 AM UTC 24 |
192309818572 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_rx_oversample.3856649899 |
|
|
Aug 27 04:50:23 AM UTC 24 |
Aug 27 04:51:04 AM UTC 24 |
5833115368 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_tx_rx.1920129485 |
|
|
Aug 27 04:51:55 AM UTC 24 |
Aug 27 04:53:34 AM UTC 24 |
37238458548 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.3658024308 |
|
|
Aug 27 04:49:11 AM UTC 24 |
Aug 27 04:51:06 AM UTC 24 |
64339065467 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_fifo_full.122865705 |
|
|
Aug 27 04:51:00 AM UTC 24 |
Aug 27 04:51:15 AM UTC 24 |
71266600812 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_noise_filter.2126453761 |
|
|
Aug 27 04:49:59 AM UTC 24 |
Aug 27 04:51:15 AM UTC 24 |
155758033610 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_rx_oversample.545224075 |
|
|
Aug 27 04:51:05 AM UTC 24 |
Aug 27 04:51:22 AM UTC 24 |
3243316714 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.1653461369 |
|
|
Aug 27 04:51:16 AM UTC 24 |
Aug 27 04:51:23 AM UTC 24 |
6287880006 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_fifo_full.976256801 |
|
|
Aug 27 04:49:50 AM UTC 24 |
Aug 27 04:51:29 AM UTC 24 |
151483645509 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.3466911156 |
|
|
Aug 27 04:51:23 AM UTC 24 |
Aug 27 04:51:29 AM UTC 24 |
1026165567 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_loopback.1584937066 |
|
|
Aug 27 04:51:24 AM UTC 24 |
Aug 27 04:51:37 AM UTC 24 |
7046718479 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_smoke.1618705118 |
|
|
Aug 27 04:50:44 AM UTC 24 |
Aug 27 04:51:47 AM UTC 24 |
10594059025 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.2816716140 |
|
|
Aug 27 04:50:28 AM UTC 24 |
Aug 27 04:51:51 AM UTC 24 |
27735946871 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/19.uart_fifo_full.3284779078 |
|
|
Aug 27 04:46:37 AM UTC 24 |
Aug 27 04:51:53 AM UTC 24 |
157163771068 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_alert_test.2434403843 |
|
|
Aug 27 04:51:52 AM UTC 24 |
Aug 27 04:51:54 AM UTC 24 |
15535973 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.256263140 |
|
|
Aug 27 04:50:00 AM UTC 24 |
Aug 27 04:51:55 AM UTC 24 |
227065831909 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/15.uart_stress_all.87959378 |
|
|
Aug 27 04:44:03 AM UTC 24 |
Aug 27 04:51:58 AM UTC 24 |
395032475545 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_smoke.2021813901 |
|
|
Aug 27 04:51:54 AM UTC 24 |
Aug 27 04:52:00 AM UTC 24 |
649541896 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/24.uart_fifo_reset.2753521619 |
|
|
Aug 27 04:49:55 AM UTC 24 |
Aug 27 04:52:00 AM UTC 24 |
73407447350 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_noise_filter.417584102 |
|
|
Aug 27 04:50:28 AM UTC 24 |
Aug 27 04:52:11 AM UTC 24 |
149256860893 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_fifo_reset.4141296147 |
|
|
Aug 27 04:50:20 AM UTC 24 |
Aug 27 04:52:12 AM UTC 24 |
197276487562 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_intr.250799897 |
|
|
Aug 27 04:50:23 AM UTC 24 |
Aug 27 04:52:15 AM UTC 24 |
184617357919 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_rx_oversample.1524449654 |
|
|
Aug 27 04:52:01 AM UTC 24 |
Aug 27 04:52:15 AM UTC 24 |
4304273200 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_tx_rx.1887810035 |
|
|
Aug 27 04:50:19 AM UTC 24 |
Aug 27 04:52:18 AM UTC 24 |
77989406307 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.3896878303 |
|
|
Aug 27 04:52:16 AM UTC 24 |
Aug 27 04:52:19 AM UTC 24 |
4507332942 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/22.uart_noise_filter.1686866973 |
|
|
Aug 27 04:48:45 AM UTC 24 |
Aug 27 04:52:23 AM UTC 24 |
149739469382 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.2869669947 |
|
|
Aug 27 04:52:18 AM UTC 24 |
Aug 27 04:52:24 AM UTC 24 |
1051487099 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_fifo_reset.2695776363 |
|
|
Aug 27 04:52:00 AM UTC 24 |
Aug 27 04:52:28 AM UTC 24 |
115666989455 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_loopback.1630100627 |
|
|
Aug 27 04:52:20 AM UTC 24 |
Aug 27 04:52:31 AM UTC 24 |
1905475440 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_tx_rx.897242394 |
|
|
Aug 27 04:50:55 AM UTC 24 |
Aug 27 04:52:32 AM UTC 24 |
110775896095 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_alert_test.1947029638 |
|
|
Aug 27 04:52:32 AM UTC 24 |
Aug 27 04:52:34 AM UTC 24 |
61658935 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/16.uart_perf.2485195681 |
|
|
Aug 27 04:44:50 AM UTC 24 |
Aug 27 04:52:37 AM UTC 24 |
30053777118 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_smoke.3013773871 |
|
|
Aug 27 04:52:35 AM UTC 24 |
Aug 27 04:52:40 AM UTC 24 |
647999620 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_noise_filter.3085966234 |
|
|
Aug 27 04:52:14 AM UTC 24 |
Aug 27 04:52:41 AM UTC 24 |
9441032777 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_noise_filter.3561545047 |
|
|
Aug 27 04:51:07 AM UTC 24 |
Aug 27 04:52:44 AM UTC 24 |
186296629616 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.1152504059 |
|
|
Aug 27 04:50:19 AM UTC 24 |
Aug 27 04:52:45 AM UTC 24 |
76154890210 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.1714040362 |
|
|
Aug 27 04:52:17 AM UTC 24 |
Aug 27 04:52:47 AM UTC 24 |
28853440189 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_perf.3754568328 |
|
|
Aug 27 04:51:29 AM UTC 24 |
Aug 27 04:52:53 AM UTC 24 |
7173348320 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.4185981715 |
|
|
Aug 27 04:52:41 AM UTC 24 |
Aug 27 04:52:56 AM UTC 24 |
25666207012 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.2391392605 |
|
|
Aug 27 04:51:38 AM UTC 24 |
Aug 27 04:52:57 AM UTC 24 |
14217723167 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.1551117929 |
|
|
Aug 27 04:52:53 AM UTC 24 |
Aug 27 04:52:57 AM UTC 24 |
4372060498 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_rx_oversample.2590789880 |
|
|
Aug 27 04:52:45 AM UTC 24 |
Aug 27 04:53:01 AM UTC 24 |
5015825860 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.498771084 |
|
|
Aug 27 04:51:16 AM UTC 24 |
Aug 27 04:53:06 AM UTC 24 |
35783793201 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_loopback.3157389827 |
|
|
Aug 27 04:52:58 AM UTC 24 |
Aug 27 04:53:07 AM UTC 24 |
2547414989 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_intr.206832216 |
|
|
Aug 27 04:52:12 AM UTC 24 |
Aug 27 04:53:09 AM UTC 24 |
31237458511 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_perf.3205595793 |
|
|
Aug 27 04:47:42 AM UTC 24 |
Aug 27 04:53:12 AM UTC 24 |
10733158524 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/12.uart_perf.2966139064 |
|
|
Aug 27 04:42:27 AM UTC 24 |
Aug 27 04:53:13 AM UTC 24 |
11230129679 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_alert_test.2021913054 |
|
|
Aug 27 04:53:13 AM UTC 24 |
Aug 27 04:53:15 AM UTC 24 |
19163361 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.3109671528 |
|
|
Aug 27 04:52:58 AM UTC 24 |
Aug 27 04:53:19 AM UTC 24 |
7492397576 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.3130880705 |
|
|
Aug 27 04:52:28 AM UTC 24 |
Aug 27 04:53:18 AM UTC 24 |
28636113949 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/7.uart_perf.2526903011 |
|
|
Aug 27 04:39:25 AM UTC 24 |
Aug 27 04:53:39 AM UTC 24 |
14472663956 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/23.uart_noise_filter.3972534981 |
|
|
Aug 27 04:49:23 AM UTC 24 |
Aug 27 04:53:49 AM UTC 24 |
70314191332 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_rx_oversample.401509540 |
|
|
Aug 27 04:53:40 AM UTC 24 |
Aug 27 04:53:53 AM UTC 24 |
3844412485 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_smoke.4049977723 |
|
|
Aug 27 04:53:14 AM UTC 24 |
Aug 27 04:53:55 AM UTC 24 |
5365423050 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_fifo_full.280166614 |
|
|
Aug 27 04:50:19 AM UTC 24 |
Aug 27 04:54:00 AM UTC 24 |
307465354017 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_fifo_full.94261699 |
|
|
Aug 27 04:51:56 AM UTC 24 |
Aug 27 04:54:05 AM UTC 24 |
184949575041 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/27.uart_perf.2914155780 |
|
|
Aug 27 04:52:24 AM UTC 24 |
Aug 27 04:54:13 AM UTC 24 |
20078826563 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_fifo_full.248201309 |
|
|
Aug 27 04:47:16 AM UTC 24 |
Aug 27 04:54:18 AM UTC 24 |
244280614079 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.249330183 |
|
|
Aug 27 04:53:56 AM UTC 24 |
Aug 27 04:54:22 AM UTC 24 |
37564448171 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.355754051 |
|
|
Aug 27 04:54:06 AM UTC 24 |
Aug 27 04:54:22 AM UTC 24 |
6360613633 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_tx_rx.1910307338 |
|
|
Aug 27 04:52:38 AM UTC 24 |
Aug 27 04:54:25 AM UTC 24 |
71117642616 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_noise_filter.3874273266 |
|
|
Aug 27 04:53:54 AM UTC 24 |
Aug 27 04:54:26 AM UTC 24 |
84925801219 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_alert_test.2022045335 |
|
|
Aug 27 04:54:26 AM UTC 24 |
Aug 27 04:54:28 AM UTC 24 |
12860848 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.1524368534 |
|
|
Aug 27 04:54:01 AM UTC 24 |
Aug 27 04:54:28 AM UTC 24 |
67114278746 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.344514677 |
|
|
Aug 27 04:53:08 AM UTC 24 |
Aug 27 04:54:28 AM UTC 24 |
23053815202 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/17.uart_perf.656665480 |
|
|
Aug 27 04:45:24 AM UTC 24 |
Aug 27 04:54:29 AM UTC 24 |
20217595933 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.348662575 |
|
|
Aug 27 04:51:31 AM UTC 24 |
Aug 27 04:54:32 AM UTC 24 |
63559336981 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.722325905 |
|
|
Aug 27 04:41:17 AM UTC 24 |
Aug 27 04:54:35 AM UTC 24 |
106877926363 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_smoke.4274354502 |
|
|
Aug 27 04:54:27 AM UTC 24 |
Aug 27 04:54:36 AM UTC 24 |
928044712 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_tx_rx.3618646565 |
|
|
Aug 27 04:53:15 AM UTC 24 |
Aug 27 04:54:36 AM UTC 24 |
67722643919 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_fifo_reset.1316201679 |
|
|
Aug 27 04:53:35 AM UTC 24 |
Aug 27 04:54:37 AM UTC 24 |
180154551032 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_fifo_reset.189716557 |
|
|
Aug 27 04:51:02 AM UTC 24 |
Aug 27 04:54:39 AM UTC 24 |
94751551817 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.2660725088 |
|
|
Aug 27 04:51:01 AM UTC 24 |
Aug 27 04:54:42 AM UTC 24 |
125808391520 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.4028503702 |
|
|
Aug 27 04:54:38 AM UTC 24 |
Aug 27 04:54:42 AM UTC 24 |
3330308660 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.3566431165 |
|
|
Aug 27 04:54:40 AM UTC 24 |
Aug 27 04:54:43 AM UTC 24 |
848103022 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_fifo_full.627814660 |
|
|
Aug 27 04:54:29 AM UTC 24 |
Aug 27 04:54:44 AM UTC 24 |
16897109455 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.1243439770 |
|
|
Aug 27 04:54:29 AM UTC 24 |
Aug 27 04:54:45 AM UTC 24 |
6915994473 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/26.uart_stress_all.3136133326 |
|
|
Aug 27 04:51:48 AM UTC 24 |
Aug 27 04:54:46 AM UTC 24 |
212018375378 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_alert_test.3360933294 |
|
|
Aug 27 04:54:47 AM UTC 24 |
Aug 27 04:54:49 AM UTC 24 |
11395107 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_loopback.438597370 |
|
|
Aug 27 04:54:42 AM UTC 24 |
Aug 27 04:54:50 AM UTC 24 |
1904005579 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.468651531 |
|
|
Aug 27 04:54:23 AM UTC 24 |
Aug 27 04:54:57 AM UTC 24 |
9737589078 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_rx_oversample.543200303 |
|
|
Aug 27 04:54:32 AM UTC 24 |
Aug 27 04:55:01 AM UTC 24 |
3375556247 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_loopback.2181591303 |
|
|
Aug 27 04:54:14 AM UTC 24 |
Aug 27 04:55:03 AM UTC 24 |
10347027804 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/20.uart_stress_all.3686830905 |
|
|
Aug 27 04:47:49 AM UTC 24 |
Aug 27 04:55:04 AM UTC 24 |
223039468076 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_smoke.4258425753 |
|
|
Aug 27 04:54:50 AM UTC 24 |
Aug 27 04:55:07 AM UTC 24 |
5446985235 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_perf.1950714093 |
|
|
Aug 27 04:54:15 AM UTC 24 |
Aug 27 04:55:09 AM UTC 24 |
9453702841 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/18.uart_stress_all.849114958 |
|
|
Aug 27 04:46:34 AM UTC 24 |
Aug 27 04:55:22 AM UTC 24 |
269310206104 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_intr.540231528 |
|
|
Aug 27 04:55:08 AM UTC 24 |
Aug 27 04:55:23 AM UTC 24 |
27288925474 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/10.uart_perf.1329247952 |
|
|
Aug 27 04:41:15 AM UTC 24 |
Aug 27 04:55:25 AM UTC 24 |
30572361493 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.957170775 |
|
|
Aug 27 04:55:22 AM UTC 24 |
Aug 27 04:55:25 AM UTC 24 |
2989598331 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/25.uart_stress_all.3302269677 |
|
|
Aug 27 04:50:40 AM UTC 24 |
Aug 27 04:55:30 AM UTC 24 |
127392944402 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.2629332722 |
|
|
Aug 27 04:55:25 AM UTC 24 |
Aug 27 04:55:30 AM UTC 24 |
686405862 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.517116820 |
|
|
Aug 27 04:53:20 AM UTC 24 |
Aug 27 04:55:33 AM UTC 24 |
128668310342 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.3584786509 |
|
|
Aug 27 04:54:45 AM UTC 24 |
Aug 27 04:55:35 AM UTC 24 |
9986488816 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.1529134863 |
|
|
Aug 27 04:55:03 AM UTC 24 |
Aug 27 04:55:36 AM UTC 24 |
39609029741 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_alert_test.2413955987 |
|
|
Aug 27 04:55:36 AM UTC 24 |
Aug 27 04:55:38 AM UTC 24 |
37361740 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_fifo_reset.698567809 |
|
|
Aug 27 04:55:04 AM UTC 24 |
Aug 27 04:55:41 AM UTC 24 |
33573684521 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/32.uart_tx_rx.2826998331 |
|
|
Aug 27 04:55:38 AM UTC 24 |
Aug 27 04:55:41 AM UTC 24 |
998160142 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/30.uart_noise_filter.2903583759 |
|
|
Aug 27 04:54:37 AM UTC 24 |
Aug 27 04:55:41 AM UTC 24 |
241584809076 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_loopback.2430545593 |
|
|
Aug 27 04:55:26 AM UTC 24 |
Aug 27 04:55:41 AM UTC 24 |
4346913162 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_intr.228827927 |
|
|
Aug 27 04:53:50 AM UTC 24 |
Aug 27 04:55:43 AM UTC 24 |
70604497850 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/31.uart_tx_rx.342296498 |
|
|
Aug 27 04:54:50 AM UTC 24 |
Aug 27 04:55:45 AM UTC 24 |
164703830565 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/32.uart_smoke.4236906038 |
|
|
Aug 27 04:55:37 AM UTC 24 |
Aug 27 04:55:46 AM UTC 24 |
6091789838 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_26/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.120690753 |
|
|
Aug 27 04:54:19 AM UTC 24 |
Aug 27 04:55:52 AM UTC 24 |
36766703754 ps |