| T463 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_loopback.4212139609 |
|
|
Aug 29 11:12:58 AM UTC 24 |
Aug 29 11:13:03 AM UTC 24 |
2782527317 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_alert_test.3366642765 |
|
|
Aug 29 11:13:02 AM UTC 24 |
Aug 29 11:13:04 AM UTC 24 |
15782673 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_intr.1859318077 |
|
|
Aug 29 11:12:21 AM UTC 24 |
Aug 29 11:13:05 AM UTC 24 |
27443495791 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_smoke.2377250721 |
|
|
Aug 29 11:13:02 AM UTC 24 |
Aug 29 11:13:05 AM UTC 24 |
1049763790 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/15.uart_fifo_reset.1982213404 |
|
|
Aug 29 11:11:59 AM UTC 24 |
Aug 29 11:13:05 AM UTC 24 |
16466171485 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_fifo_full.3830018963 |
|
|
Aug 29 11:12:36 AM UTC 24 |
Aug 29 11:13:08 AM UTC 24 |
51932881587 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_noise_filter.3696896799 |
|
|
Aug 29 11:12:25 AM UTC 24 |
Aug 29 11:13:10 AM UTC 24 |
140618042112 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_fifo_reset.3727279196 |
|
|
Aug 29 11:12:39 AM UTC 24 |
Aug 29 11:13:13 AM UTC 24 |
26898749478 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.83304309 |
|
|
Aug 29 11:13:11 AM UTC 24 |
Aug 29 11:13:15 AM UTC 24 |
603827567 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.4145006097 |
|
|
Aug 29 11:12:32 AM UTC 24 |
Aug 29 11:13:16 AM UTC 24 |
9970786874 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/13.uart_fifo_reset.1312506851 |
|
|
Aug 29 11:10:51 AM UTC 24 |
Aug 29 11:13:16 AM UTC 24 |
75622863701 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_rx_oversample.1262359030 |
|
|
Aug 29 11:13:06 AM UTC 24 |
Aug 29 11:13:18 AM UTC 24 |
6690295729 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.2691883979 |
|
|
Aug 29 11:13:16 AM UTC 24 |
Aug 29 11:13:20 AM UTC 24 |
2336146990 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.699328371 |
|
|
Aug 29 11:12:58 AM UTC 24 |
Aug 29 11:13:22 AM UTC 24 |
15890078407 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_rx_oversample.2066124094 |
|
|
Aug 29 11:12:49 AM UTC 24 |
Aug 29 11:13:24 AM UTC 24 |
3911208026 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_alert_test.1829398425 |
|
|
Aug 29 11:13:25 AM UTC 24 |
Aug 29 11:13:26 AM UTC 24 |
39747753 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_rx_oversample.550004312 |
|
|
Aug 29 11:12:20 AM UTC 24 |
Aug 29 11:13:29 AM UTC 24 |
6107912339 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_smoke.4114805539 |
|
|
Aug 29 11:13:28 AM UTC 24 |
Aug 29 11:13:32 AM UTC 24 |
504342280 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_loopback.1705875190 |
|
|
Aug 29 11:13:17 AM UTC 24 |
Aug 29 11:13:32 AM UTC 24 |
2784663019 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_fifo_full.2224978337 |
|
|
Aug 29 11:13:04 AM UTC 24 |
Aug 29 11:13:33 AM UTC 24 |
55121394563 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_intr.2900735382 |
|
|
Aug 29 11:13:07 AM UTC 24 |
Aug 29 11:13:40 AM UTC 24 |
14127471908 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_fifo_reset.631557492 |
|
|
Aug 29 11:13:06 AM UTC 24 |
Aug 29 11:13:41 AM UTC 24 |
20807567271 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.2174809922 |
|
|
Aug 29 11:12:55 AM UTC 24 |
Aug 29 11:13:44 AM UTC 24 |
36453693296 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/15.uart_tx_rx.1678843544 |
|
|
Aug 29 11:11:58 AM UTC 24 |
Aug 29 11:13:46 AM UTC 24 |
47689761228 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.1193962033 |
|
|
Aug 29 11:13:01 AM UTC 24 |
Aug 29 11:13:48 AM UTC 24 |
5802828909 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_rx_oversample.2614736398 |
|
|
Aug 29 11:13:41 AM UTC 24 |
Aug 29 11:13:50 AM UTC 24 |
2892756613 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.320098772 |
|
|
Aug 29 11:13:46 AM UTC 24 |
Aug 29 11:13:51 AM UTC 24 |
3940462931 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_stress_all.513569479 |
|
|
Aug 29 11:13:01 AM UTC 24 |
Aug 29 11:13:51 AM UTC 24 |
25140276178 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.1245822036 |
|
|
Aug 29 11:13:33 AM UTC 24 |
Aug 29 11:13:52 AM UTC 24 |
45923022876 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.1017569976 |
|
|
Aug 29 11:13:20 AM UTC 24 |
Aug 29 11:13:53 AM UTC 24 |
2399444386 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.829690904 |
|
|
Aug 29 11:11:59 AM UTC 24 |
Aug 29 11:13:57 AM UTC 24 |
47265501743 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.273060978 |
|
|
Aug 29 11:13:51 AM UTC 24 |
Aug 29 11:13:59 AM UTC 24 |
1076015176 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_alert_test.791238668 |
|
|
Aug 29 11:14:00 AM UTC 24 |
Aug 29 11:14:02 AM UTC 24 |
21993471 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_loopback.223387921 |
|
|
Aug 29 11:13:51 AM UTC 24 |
Aug 29 11:14:06 AM UTC 24 |
7677824574 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/12.uart_fifo_reset.1583340978 |
|
|
Aug 29 11:10:14 AM UTC 24 |
Aug 29 11:14:06 AM UTC 24 |
202096231345 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/13.uart_perf.2090683027 |
|
|
Aug 29 11:11:05 AM UTC 24 |
Aug 29 11:14:07 AM UTC 24 |
5417195182 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_smoke.3568826302 |
|
|
Aug 29 11:14:03 AM UTC 24 |
Aug 29 11:14:10 AM UTC 24 |
685904152 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/14.uart_stress_all.3051396213 |
|
|
Aug 29 11:11:52 AM UTC 24 |
Aug 29 11:14:11 AM UTC 24 |
421763763298 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.4045610007 |
|
|
Aug 29 11:13:55 AM UTC 24 |
Aug 29 11:14:12 AM UTC 24 |
1202740234 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/10.uart_fifo_reset.3545390038 |
|
|
Aug 29 11:09:24 AM UTC 24 |
Aug 29 11:14:13 AM UTC 24 |
65379559251 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_tx_rx.3085610155 |
|
|
Aug 29 11:12:16 AM UTC 24 |
Aug 29 11:14:13 AM UTC 24 |
85759279411 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_rx_oversample.3211462346 |
|
|
Aug 29 11:14:10 AM UTC 24 |
Aug 29 11:14:14 AM UTC 24 |
1393306289 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.1774783512 |
|
|
Aug 29 11:13:14 AM UTC 24 |
Aug 29 11:14:17 AM UTC 24 |
19823341621 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.672712217 |
|
|
Aug 29 11:14:16 AM UTC 24 |
Aug 29 11:14:20 AM UTC 24 |
1935784487 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_intr.885311502 |
|
|
Aug 29 11:14:12 AM UTC 24 |
Aug 29 11:14:25 AM UTC 24 |
9223507124 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.1395343185 |
|
|
Aug 29 11:14:14 AM UTC 24 |
Aug 29 11:14:32 AM UTC 24 |
4061227808 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_loopback.764427665 |
|
|
Aug 29 11:14:18 AM UTC 24 |
Aug 29 11:14:35 AM UTC 24 |
7665538566 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_tx_rx.1705338710 |
|
|
Aug 29 11:13:04 AM UTC 24 |
Aug 29 11:14:37 AM UTC 24 |
115807955574 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_alert_test.3284849876 |
|
|
Aug 29 11:14:38 AM UTC 24 |
Aug 29 11:14:40 AM UTC 24 |
33182637 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.2335881237 |
|
|
Aug 29 11:14:14 AM UTC 24 |
Aug 29 11:14:42 AM UTC 24 |
23827434202 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.2106180390 |
|
|
Aug 29 11:06:30 AM UTC 24 |
Aug 29 11:14:42 AM UTC 24 |
109894364675 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_stress_all.3910019039 |
|
|
Aug 29 11:12:34 AM UTC 24 |
Aug 29 11:14:42 AM UTC 24 |
96751466636 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/12.uart_fifo_full.128204600 |
|
|
Aug 29 11:10:11 AM UTC 24 |
Aug 29 11:14:43 AM UTC 24 |
120565377986 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_smoke.3695782285 |
|
|
Aug 29 11:14:41 AM UTC 24 |
Aug 29 11:14:46 AM UTC 24 |
506638984 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_fifo_full.1441792883 |
|
|
Aug 29 11:13:33 AM UTC 24 |
Aug 29 11:14:50 AM UTC 24 |
33109983729 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_intr.4203489802 |
|
|
Aug 29 11:12:52 AM UTC 24 |
Aug 29 11:14:50 AM UTC 24 |
31200165824 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_fifo_full.3773606746 |
|
|
Aug 29 11:12:17 AM UTC 24 |
Aug 29 11:14:50 AM UTC 24 |
56681613464 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.802551485 |
|
|
Aug 29 11:14:51 AM UTC 24 |
Aug 29 11:14:56 AM UTC 24 |
2558804170 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.4138986768 |
|
|
Aug 29 11:14:57 AM UTC 24 |
Aug 29 11:15:01 AM UTC 24 |
2875985521 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_fifo_full.1991452539 |
|
|
Aug 29 11:14:07 AM UTC 24 |
Aug 29 11:15:05 AM UTC 24 |
36362601961 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.835306426 |
|
|
Aug 29 11:14:51 AM UTC 24 |
Aug 29 11:15:05 AM UTC 24 |
17408503619 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.3289115810 |
|
|
Aug 29 11:09:14 AM UTC 24 |
Aug 29 11:15:10 AM UTC 24 |
118401708131 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_tx_rx.2599697417 |
|
|
Aug 29 11:14:43 AM UTC 24 |
Aug 29 11:15:13 AM UTC 24 |
9808931478 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_loopback.3656722512 |
|
|
Aug 29 11:15:02 AM UTC 24 |
Aug 29 11:15:19 AM UTC 24 |
10083305081 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.356696812 |
|
|
Aug 29 11:14:33 AM UTC 24 |
Aug 29 11:15:20 AM UTC 24 |
494243992 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_fifo_reset.3663284815 |
|
|
Aug 29 11:14:08 AM UTC 24 |
Aug 29 11:15:21 AM UTC 24 |
104108755981 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_alert_test.3206133298 |
|
|
Aug 29 11:15:19 AM UTC 24 |
Aug 29 11:15:21 AM UTC 24 |
15245464 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_noise_filter.2705789544 |
|
|
Aug 29 11:13:45 AM UTC 24 |
Aug 29 11:15:23 AM UTC 24 |
23940822345 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.251247258 |
|
|
Aug 29 11:13:49 AM UTC 24 |
Aug 29 11:15:24 AM UTC 24 |
110166433593 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/12.uart_perf.2687060899 |
|
|
Aug 29 11:10:30 AM UTC 24 |
Aug 29 11:15:25 AM UTC 24 |
16390973838 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.3128770005 |
|
|
Aug 29 11:12:07 AM UTC 24 |
Aug 29 11:15:26 AM UTC 24 |
148555520585 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_rx_oversample.1310818904 |
|
|
Aug 29 11:14:45 AM UTC 24 |
Aug 29 11:15:26 AM UTC 24 |
3359217419 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_smoke.238211303 |
|
|
Aug 29 11:15:20 AM UTC 24 |
Aug 29 11:15:28 AM UTC 24 |
5825776070 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_tx_rx.71606706 |
|
|
Aug 29 11:13:30 AM UTC 24 |
Aug 29 11:15:29 AM UTC 24 |
108788123739 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_intr.1545748967 |
|
|
Aug 29 11:14:47 AM UTC 24 |
Aug 29 11:15:30 AM UTC 24 |
103006368458 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.2115488008 |
|
|
Aug 29 11:15:29 AM UTC 24 |
Aug 29 11:15:32 AM UTC 24 |
1739463562 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_noise_filter.772573151 |
|
|
Aug 29 11:14:13 AM UTC 24 |
Aug 29 11:15:33 AM UTC 24 |
54802182986 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_fifo_reset.3846369419 |
|
|
Aug 29 11:13:34 AM UTC 24 |
Aug 29 11:15:33 AM UTC 24 |
112922972100 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_fifo_reset.963256808 |
|
|
Aug 29 11:14:44 AM UTC 24 |
Aug 29 11:15:33 AM UTC 24 |
19813124581 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.1023864070 |
|
|
Aug 29 11:11:51 AM UTC 24 |
Aug 29 11:15:35 AM UTC 24 |
96073373980 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_tx_rx.3672490262 |
|
|
Aug 29 11:14:06 AM UTC 24 |
Aug 29 11:15:38 AM UTC 24 |
71528835639 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/7.uart_stress_all.522600624 |
|
|
Aug 29 11:08:13 AM UTC 24 |
Aug 29 11:15:39 AM UTC 24 |
661549394381 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_alert_test.1412515765 |
|
|
Aug 29 11:15:39 AM UTC 24 |
Aug 29 11:15:40 AM UTC 24 |
12147174 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.3486210766 |
|
|
Aug 29 11:15:10 AM UTC 24 |
Aug 29 11:15:41 AM UTC 24 |
10472139286 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_smoke.1841613258 |
|
|
Aug 29 11:15:40 AM UTC 24 |
Aug 29 11:15:42 AM UTC 24 |
244456435 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/12.uart_stress_all.3636505434 |
|
|
Aug 29 11:10:38 AM UTC 24 |
Aug 29 11:15:43 AM UTC 24 |
428821577401 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.663031626 |
|
|
Aug 29 11:06:56 AM UTC 24 |
Aug 29 11:15:43 AM UTC 24 |
91490971308 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_rx_oversample.3439331366 |
|
|
Aug 29 11:15:27 AM UTC 24 |
Aug 29 11:15:49 AM UTC 24 |
2833201983 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.495095594 |
|
|
Aug 29 11:13:19 AM UTC 24 |
Aug 29 11:15:52 AM UTC 24 |
76747878276 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_loopback.1521159640 |
|
|
Aug 29 11:15:33 AM UTC 24 |
Aug 29 11:15:53 AM UTC 24 |
6822583452 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_rx_oversample.2996922636 |
|
|
Aug 29 11:15:44 AM UTC 24 |
Aug 29 11:15:54 AM UTC 24 |
2000448741 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.1185110963 |
|
|
Aug 29 11:15:31 AM UTC 24 |
Aug 29 11:15:57 AM UTC 24 |
6584318591 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_fifo_reset.3209002037 |
|
|
Aug 29 11:15:25 AM UTC 24 |
Aug 29 11:16:03 AM UTC 24 |
86245149631 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.2830322950 |
|
|
Aug 29 11:15:54 AM UTC 24 |
Aug 29 11:16:08 AM UTC 24 |
3532773484 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.3404533905 |
|
|
Aug 29 11:08:38 AM UTC 24 |
Aug 29 11:16:09 AM UTC 24 |
124268798603 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_intr.544746845 |
|
|
Aug 29 11:15:50 AM UTC 24 |
Aug 29 11:16:09 AM UTC 24 |
24910656683 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_fifo_full.1843843845 |
|
|
Aug 29 11:15:42 AM UTC 24 |
Aug 29 11:16:11 AM UTC 24 |
103888122422 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_loopback.2949714356 |
|
|
Aug 29 11:16:04 AM UTC 24 |
Aug 29 11:16:15 AM UTC 24 |
3093878247 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_fifo_full.100077157 |
|
|
Aug 29 11:14:43 AM UTC 24 |
Aug 29 11:16:16 AM UTC 24 |
38730464687 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_alert_test.2518442300 |
|
|
Aug 29 11:16:16 AM UTC 24 |
Aug 29 11:16:18 AM UTC 24 |
15634413 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_smoke.3697349314 |
|
|
Aug 29 11:16:17 AM UTC 24 |
Aug 29 11:16:21 AM UTC 24 |
451876227 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_noise_filter.578254586 |
|
|
Aug 29 11:14:51 AM UTC 24 |
Aug 29 11:16:24 AM UTC 24 |
40135601318 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_tx_rx.121668993 |
|
|
Aug 29 11:15:21 AM UTC 24 |
Aug 29 11:16:31 AM UTC 24 |
54322492906 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.3534156643 |
|
|
Aug 29 11:15:54 AM UTC 24 |
Aug 29 11:16:31 AM UTC 24 |
85377415038 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_fifo_reset.1108470034 |
|
|
Aug 29 11:15:44 AM UTC 24 |
Aug 29 11:16:34 AM UTC 24 |
152787856444 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/15.uart_stress_all.3333084606 |
|
|
Aug 29 11:12:13 AM UTC 24 |
Aug 29 11:16:34 AM UTC 24 |
339160737089 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.3870522807 |
|
|
Aug 29 11:15:24 AM UTC 24 |
Aug 29 11:16:37 AM UTC 24 |
21338867469 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.1808694070 |
|
|
Aug 29 11:15:34 AM UTC 24 |
Aug 29 11:16:36 AM UTC 24 |
5794199430 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_intr.1236990565 |
|
|
Aug 29 11:16:34 AM UTC 24 |
Aug 29 11:16:42 AM UTC 24 |
2804921233 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.3926219565 |
|
|
Aug 29 11:15:57 AM UTC 24 |
Aug 29 11:16:48 AM UTC 24 |
6374120888 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.2636230955 |
|
|
Aug 29 11:07:47 AM UTC 24 |
Aug 29 11:16:48 AM UTC 24 |
109959645341 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_perf.1579520593 |
|
|
Aug 29 11:13:17 AM UTC 24 |
Aug 29 11:16:49 AM UTC 24 |
17018558545 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_intr.1919089067 |
|
|
Aug 29 11:15:27 AM UTC 24 |
Aug 29 11:16:49 AM UTC 24 |
111598302957 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.1363299596 |
|
|
Aug 29 11:16:38 AM UTC 24 |
Aug 29 11:16:49 AM UTC 24 |
2869288228 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.1213026976 |
|
|
Aug 29 11:16:43 AM UTC 24 |
Aug 29 11:16:52 AM UTC 24 |
7964738565 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_alert_test.2994655565 |
|
|
Aug 29 11:16:52 AM UTC 24 |
Aug 29 11:16:54 AM UTC 24 |
14647589 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_loopback.2576324674 |
|
|
Aug 29 11:16:49 AM UTC 24 |
Aug 29 11:16:55 AM UTC 24 |
3684256298 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_noise_filter.1782853883 |
|
|
Aug 29 11:12:54 AM UTC 24 |
Aug 29 11:16:56 AM UTC 24 |
157863654810 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_smoke.550182351 |
|
|
Aug 29 11:16:55 AM UTC 24 |
Aug 29 11:16:57 AM UTC 24 |
111520355 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_rx_oversample.2080033706 |
|
|
Aug 29 11:16:32 AM UTC 24 |
Aug 29 11:17:03 AM UTC 24 |
6276874816 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/1.uart_perf.3988321298 |
|
|
Aug 29 11:06:29 AM UTC 24 |
Aug 29 11:17:04 AM UTC 24 |
23028672411 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_noise_filter.1703495202 |
|
|
Aug 29 11:13:08 AM UTC 24 |
Aug 29 11:17:07 AM UTC 24 |
383086417222 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.3301904387 |
|
|
Aug 29 11:08:09 AM UTC 24 |
Aug 29 11:17:09 AM UTC 24 |
74768839852 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_perf.2368788452 |
|
|
Aug 29 11:12:59 AM UTC 24 |
Aug 29 11:17:09 AM UTC 24 |
20704458987 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.3141511152 |
|
|
Aug 29 11:14:07 AM UTC 24 |
Aug 29 11:17:10 AM UTC 24 |
78130992929 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.8820088 |
|
|
Aug 29 11:15:43 AM UTC 24 |
Aug 29 11:17:10 AM UTC 24 |
112478925657 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_tx_rx.402430273 |
|
|
Aug 29 11:16:18 AM UTC 24 |
Aug 29 11:17:11 AM UTC 24 |
43195103627 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.735630020 |
|
|
Aug 29 11:16:25 AM UTC 24 |
Aug 29 11:17:13 AM UTC 24 |
89214379171 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.2857207774 |
|
|
Aug 29 11:17:12 AM UTC 24 |
Aug 29 11:17:16 AM UTC 24 |
2265296246 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.4024181008 |
|
|
Aug 29 11:17:10 AM UTC 24 |
Aug 29 11:17:20 AM UTC 24 |
2162574097 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_loopback.2538420644 |
|
|
Aug 29 11:17:12 AM UTC 24 |
Aug 29 11:17:21 AM UTC 24 |
2066128080 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_tx_rx.3740634852 |
|
|
Aug 29 11:16:56 AM UTC 24 |
Aug 29 11:17:27 AM UTC 24 |
41431304700 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_stress_all.795169242 |
|
|
Aug 29 11:15:14 AM UTC 24 |
Aug 29 11:17:29 AM UTC 24 |
416511234893 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_alert_test.3526372655 |
|
|
Aug 29 11:17:28 AM UTC 24 |
Aug 29 11:17:30 AM UTC 24 |
11872303 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.3601945274 |
|
|
Aug 29 11:17:21 AM UTC 24 |
Aug 29 11:17:33 AM UTC 24 |
767206588 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_smoke.2750608734 |
|
|
Aug 29 11:17:30 AM UTC 24 |
Aug 29 11:17:34 AM UTC 24 |
293445022 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_tx_rx.114588973 |
|
|
Aug 29 11:15:41 AM UTC 24 |
Aug 29 11:17:35 AM UTC 24 |
61156793502 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.1606379046 |
|
|
Aug 29 11:16:10 AM UTC 24 |
Aug 29 11:17:38 AM UTC 24 |
12112290897 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_noise_filter.3170184124 |
|
|
Aug 29 11:15:27 AM UTC 24 |
Aug 29 11:17:38 AM UTC 24 |
207467020133 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.3647497925 |
|
|
Aug 29 11:16:57 AM UTC 24 |
Aug 29 11:17:41 AM UTC 24 |
43144254031 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.1579039691 |
|
|
Aug 29 11:16:38 AM UTC 24 |
Aug 29 11:17:48 AM UTC 24 |
27678028847 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_fifo_reset.434093960 |
|
|
Aug 29 11:16:32 AM UTC 24 |
Aug 29 11:17:48 AM UTC 24 |
187078734763 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_rx_oversample.3996518217 |
|
|
Aug 29 11:17:39 AM UTC 24 |
Aug 29 11:17:50 AM UTC 24 |
6234173339 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.3777136574 |
|
|
Aug 29 11:17:48 AM UTC 24 |
Aug 29 11:17:51 AM UTC 24 |
3385300810 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_loopback.149660502 |
|
|
Aug 29 11:17:52 AM UTC 24 |
Aug 29 11:17:57 AM UTC 24 |
3779794078 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_intr.3748639910 |
|
|
Aug 29 11:17:08 AM UTC 24 |
Aug 29 11:17:59 AM UTC 24 |
18648767286 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.1347736746 |
|
|
Aug 29 11:16:50 AM UTC 24 |
Aug 29 11:18:01 AM UTC 24 |
4132030506 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.1213363045 |
|
|
Aug 29 11:17:50 AM UTC 24 |
Aug 29 11:18:03 AM UTC 24 |
7909034480 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_rx_oversample.2379568015 |
|
|
Aug 29 11:17:05 AM UTC 24 |
Aug 29 11:18:05 AM UTC 24 |
5316654066 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_alert_test.3987146965 |
|
|
Aug 29 11:18:06 AM UTC 24 |
Aug 29 11:18:08 AM UTC 24 |
12996068 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.2118472677 |
|
|
Aug 29 11:17:36 AM UTC 24 |
Aug 29 11:18:11 AM UTC 24 |
35990026126 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_smoke.2746126421 |
|
|
Aug 29 11:18:09 AM UTC 24 |
Aug 29 11:18:14 AM UTC 24 |
696184459 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/10.uart_perf.2401611726 |
|
|
Aug 29 11:09:38 AM UTC 24 |
Aug 29 11:18:24 AM UTC 24 |
16004869154 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_tx_rx.1936176448 |
|
|
Aug 29 11:17:30 AM UTC 24 |
Aug 29 11:18:25 AM UTC 24 |
136258527163 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.2877124004 |
|
|
Aug 29 11:17:49 AM UTC 24 |
Aug 29 11:18:27 AM UTC 24 |
17828091156 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_tx_rx.851205 |
|
|
Aug 29 11:18:12 AM UTC 24 |
Aug 29 11:18:32 AM UTC 24 |
6115758947 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_intr.3692094397 |
|
|
Aug 29 11:17:39 AM UTC 24 |
Aug 29 11:18:32 AM UTC 24 |
18860550798 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_fifo_full.1137664582 |
|
|
Aug 29 11:16:56 AM UTC 24 |
Aug 29 11:18:34 AM UTC 24 |
55656174075 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_stress_all.3373021731 |
|
|
Aug 29 11:15:35 AM UTC 24 |
Aug 29 11:18:37 AM UTC 24 |
34761708655 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_fifo_full.1805204121 |
|
|
Aug 29 11:17:35 AM UTC 24 |
Aug 29 11:18:39 AM UTC 24 |
83835570282 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.3709989501 |
|
|
Aug 29 11:15:30 AM UTC 24 |
Aug 29 11:18:39 AM UTC 24 |
74883196602 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_intr.1066984453 |
|
|
Aug 29 11:13:42 AM UTC 24 |
Aug 29 11:18:40 AM UTC 24 |
88863426201 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.2618524632 |
|
|
Aug 29 11:17:12 AM UTC 24 |
Aug 29 11:18:44 AM UTC 24 |
388988482455 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.182407723 |
|
|
Aug 29 11:09:39 AM UTC 24 |
Aug 29 11:18:45 AM UTC 24 |
108300488282 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.3457721424 |
|
|
Aug 29 11:18:41 AM UTC 24 |
Aug 29 11:18:46 AM UTC 24 |
2748531200 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.395727680 |
|
|
Aug 29 11:10:34 AM UTC 24 |
Aug 29 11:18:51 AM UTC 24 |
130948993723 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_loopback.3467659337 |
|
|
Aug 29 11:18:41 AM UTC 24 |
Aug 29 11:18:53 AM UTC 24 |
4232374835 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_alert_test.4182083708 |
|
|
Aug 29 11:18:52 AM UTC 24 |
Aug 29 11:18:54 AM UTC 24 |
44375062 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_smoke.2595669586 |
|
|
Aug 29 11:18:54 AM UTC 24 |
Aug 29 11:18:57 AM UTC 24 |
732403708 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.3826304267 |
|
|
Aug 29 11:15:34 AM UTC 24 |
Aug 29 11:18:58 AM UTC 24 |
63683540337 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_fifo_full.1576586300 |
|
|
Aug 29 11:18:15 AM UTC 24 |
Aug 29 11:18:58 AM UTC 24 |
250436332098 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.3549364216 |
|
|
Aug 29 11:18:35 AM UTC 24 |
Aug 29 11:18:59 AM UTC 24 |
5686397020 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.3099519268 |
|
|
Aug 29 11:07:15 AM UTC 24 |
Aug 29 11:19:01 AM UTC 24 |
109730853028 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.884421080 |
|
|
Aug 29 11:13:06 AM UTC 24 |
Aug 29 11:19:06 AM UTC 24 |
165385247851 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.4188005326 |
|
|
Aug 29 11:18:37 AM UTC 24 |
Aug 29 11:19:07 AM UTC 24 |
15315875261 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.774082745 |
|
|
Aug 29 11:18:02 AM UTC 24 |
Aug 29 11:19:09 AM UTC 24 |
20307976745 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_rx_oversample.1899586881 |
|
|
Aug 29 11:18:28 AM UTC 24 |
Aug 29 11:19:09 AM UTC 24 |
3787287110 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_rx_oversample.2974469633 |
|
|
Aug 29 11:18:59 AM UTC 24 |
Aug 29 11:19:15 AM UTC 24 |
6966588660 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_tx_rx.1556109295 |
|
|
Aug 29 11:18:55 AM UTC 24 |
Aug 29 11:19:15 AM UTC 24 |
35959499488 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_noise_filter.665879607 |
|
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Aug 29 11:16:35 AM UTC 24 |
Aug 29 11:19:16 AM UTC 24 |
250372365434 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/18.uart_stress_all.2739602470 |
|
|
Aug 29 11:13:23 AM UTC 24 |
Aug 29 11:19:20 AM UTC 24 |
150892422922 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.3734431016 |
|
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Aug 29 11:18:46 AM UTC 24 |
Aug 29 11:19:23 AM UTC 24 |
8936502926 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_loopback.989399573 |
|
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Aug 29 11:19:16 AM UTC 24 |
Aug 29 11:19:24 AM UTC 24 |
2236180730 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_noise_filter.684905474 |
|
|
Aug 29 11:17:10 AM UTC 24 |
Aug 29 11:19:27 AM UTC 24 |
95313856470 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_alert_test.855332764 |
|
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Aug 29 11:19:25 AM UTC 24 |
Aug 29 11:19:27 AM UTC 24 |
13430864 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_smoke.315702096 |
|
|
Aug 29 11:19:27 AM UTC 24 |
Aug 29 11:19:30 AM UTC 24 |
312241294 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.2070293383 |
|
|
Aug 29 11:18:24 AM UTC 24 |
Aug 29 11:19:31 AM UTC 24 |
27216265606 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.4238314655 |
|
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Aug 29 11:19:10 AM UTC 24 |
Aug 29 11:19:38 AM UTC 24 |
6985400896 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_fifo_reset.2005251807 |
|
|
Aug 29 11:17:36 AM UTC 24 |
Aug 29 11:19:38 AM UTC 24 |
50983867722 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/22.uart_fifo_full.736063732 |
|
|
Aug 29 11:15:22 AM UTC 24 |
Aug 29 11:19:40 AM UTC 24 |
125549848699 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.3002834410 |
|
|
Aug 29 11:12:12 AM UTC 24 |
Aug 29 11:19:43 AM UTC 24 |
69950607045 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.150163327 |
|
|
Aug 29 11:18:58 AM UTC 24 |
Aug 29 11:19:46 AM UTC 24 |
16252490982 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_noise_filter.1411244246 |
|
|
Aug 29 11:17:42 AM UTC 24 |
Aug 29 11:19:55 AM UTC 24 |
106529493132 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.2720174097 |
|
|
Aug 29 11:19:20 AM UTC 24 |
Aug 29 11:19:58 AM UTC 24 |
3208374416 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.3325596710 |
|
|
Aug 29 11:19:47 AM UTC 24 |
Aug 29 11:20:02 AM UTC 24 |
4295457325 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.1214251013 |
|
|
Aug 29 11:19:59 AM UTC 24 |
Aug 29 11:20:15 AM UTC 24 |
6483023694 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.810934797 |
|
|
Aug 29 11:18:45 AM UTC 24 |
Aug 29 11:20:19 AM UTC 24 |
93596413436 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_loopback.1660506207 |
|
|
Aug 29 11:20:03 AM UTC 24 |
Aug 29 11:20:19 AM UTC 24 |
5939652118 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/27.uart_noise_filter.1629286619 |
|
|
Aug 29 11:18:33 AM UTC 24 |
Aug 29 11:20:24 AM UTC 24 |
56879893035 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_intr.1769322936 |
|
|
Aug 29 11:19:41 AM UTC 24 |
Aug 29 11:20:27 AM UTC 24 |
36039370583 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_perf.866812438 |
|
|
Aug 29 11:17:13 AM UTC 24 |
Aug 29 11:20:29 AM UTC 24 |
16835236109 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_noise_filter.1977858326 |
|
|
Aug 29 11:19:08 AM UTC 24 |
Aug 29 11:20:29 AM UTC 24 |
79543744047 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_fifo_full.3850131504 |
|
|
Aug 29 11:18:58 AM UTC 24 |
Aug 29 11:20:29 AM UTC 24 |
54784093162 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_alert_test.3445171262 |
|
|
Aug 29 11:20:28 AM UTC 24 |
Aug 29 11:20:29 AM UTC 24 |
42891577 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_smoke.3284090973 |
|
|
Aug 29 11:20:30 AM UTC 24 |
Aug 29 11:20:33 AM UTC 24 |
934660640 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_rx_oversample.3833825952 |
|
|
Aug 29 11:19:40 AM UTC 24 |
Aug 29 11:20:36 AM UTC 24 |
5970517915 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_stress_all.4029215721 |
|
|
Aug 29 11:13:58 AM UTC 24 |
Aug 29 11:20:50 AM UTC 24 |
315386305295 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_tx_rx.3409785865 |
|
|
Aug 29 11:19:28 AM UTC 24 |
Aug 29 11:20:52 AM UTC 24 |
73427054804 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.2086576547 |
|
|
Aug 29 11:20:20 AM UTC 24 |
Aug 29 11:20:57 AM UTC 24 |
6845089293 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.978428336 |
|
|
Aug 29 11:19:31 AM UTC 24 |
Aug 29 11:21:00 AM UTC 24 |
100299593605 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.321438832 |
|
|
Aug 29 11:20:58 AM UTC 24 |
Aug 29 11:21:01 AM UTC 24 |
3332806771 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.3463973993 |
|
|
Aug 29 11:14:26 AM UTC 24 |
Aug 29 11:21:01 AM UTC 24 |
114916560166 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_fifo_full.2208488133 |
|
|
Aug 29 11:20:30 AM UTC 24 |
Aug 29 11:21:08 AM UTC 24 |
18595863691 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/2.uart_stress_all.2241701730 |
|
|
Aug 29 11:06:35 AM UTC 24 |
Aug 29 11:21:10 AM UTC 24 |
213129997153 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_intr.3094767615 |
|
|
Aug 29 11:20:51 AM UTC 24 |
Aug 29 11:21:11 AM UTC 24 |
6115847949 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/25.uart_stress_all.832369870 |
|
|
Aug 29 11:17:22 AM UTC 24 |
Aug 29 11:21:11 AM UTC 24 |
174678661326 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.3990839868 |
|
|
Aug 29 11:16:10 AM UTC 24 |
Aug 29 11:21:11 AM UTC 24 |
110392409044 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_loopback.1534648515 |
|
|
Aug 29 11:21:02 AM UTC 24 |
Aug 29 11:21:13 AM UTC 24 |
5169675377 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_perf.2608346166 |
|
|
Aug 29 11:20:15 AM UTC 24 |
Aug 29 11:21:13 AM UTC 24 |
3137238414 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_alert_test.1528099300 |
|
|
Aug 29 11:21:13 AM UTC 24 |
Aug 29 11:21:15 AM UTC 24 |
14832600 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_smoke.4158204907 |
|
|
Aug 29 11:21:14 AM UTC 24 |
Aug 29 11:21:17 AM UTC 24 |
1075337914 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_rx_oversample.270365032 |
|
|
Aug 29 11:20:37 AM UTC 24 |
Aug 29 11:21:18 AM UTC 24 |
6790232618 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_noise_filter.3806589519 |
|
|
Aug 29 11:19:44 AM UTC 24 |
Aug 29 11:21:19 AM UTC 24 |
116546723715 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_noise_filter.1084632153 |
|
|
Aug 29 11:20:53 AM UTC 24 |
Aug 29 11:21:22 AM UTC 24 |
16701677899 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.358492974 |
|
|
Aug 29 11:20:31 AM UTC 24 |
Aug 29 11:21:24 AM UTC 24 |
178779072158 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.2153456353 |
|
|
Aug 29 11:21:01 AM UTC 24 |
Aug 29 11:21:27 AM UTC 24 |
6853664784 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_noise_filter.2568778927 |
|
|
Aug 29 11:15:53 AM UTC 24 |
Aug 29 11:21:29 AM UTC 24 |
120681645760 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/20.uart_stress_all.586687441 |
|
|
Aug 29 11:14:36 AM UTC 24 |
Aug 29 11:21:37 AM UTC 24 |
448444708191 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.288895150 |
|
|
Aug 29 11:21:00 AM UTC 24 |
Aug 29 11:21:38 AM UTC 24 |
54521132412 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_fifo_reset.3573895334 |
|
|
Aug 29 11:20:34 AM UTC 24 |
Aug 29 11:21:38 AM UTC 24 |
71711170804 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.4002500935 |
|
|
Aug 29 11:21:27 AM UTC 24 |
Aug 29 11:21:40 AM UTC 24 |
2739156457 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_fifo_full.1145925214 |
|
|
Aug 29 11:21:15 AM UTC 24 |
Aug 29 11:21:41 AM UTC 24 |
102355776399 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_loopback.406723256 |
|
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Aug 29 11:21:40 AM UTC 24 |
Aug 29 11:21:43 AM UTC 24 |
862852565 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.4048429413 |
|
|
Aug 29 11:21:12 AM UTC 24 |
Aug 29 11:21:45 AM UTC 24 |
3107460558 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.2531536788 |
|
|
Aug 29 11:19:10 AM UTC 24 |
Aug 29 11:21:48 AM UTC 24 |
86541703429 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_alert_test.4223675748 |
|
|
Aug 29 11:21:46 AM UTC 24 |
Aug 29 11:21:49 AM UTC 24 |
49563753 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.1310885514 |
|
|
Aug 29 11:21:30 AM UTC 24 |
Aug 29 11:21:54 AM UTC 24 |
33866255325 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.1731847234 |
|
|
Aug 29 11:21:38 AM UTC 24 |
Aug 29 11:21:54 AM UTC 24 |
6556088685 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/16.uart_perf.55890613 |
|
|
Aug 29 11:12:32 AM UTC 24 |
Aug 29 11:22:01 AM UTC 24 |
35922336161 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_fifo_reset.97507251 |
|
|
Aug 29 11:19:40 AM UTC 24 |
Aug 29 11:22:03 AM UTC 24 |
134231371700 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_stress_all.106626393 |
|
|
Aug 29 11:18:04 AM UTC 24 |
Aug 29 11:22:06 AM UTC 24 |
468057005499 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.1263597602 |
|
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Aug 29 11:19:55 AM UTC 24 |
Aug 29 11:22:08 AM UTC 24 |
107641614279 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/32.uart_rx_oversample.2129319444 |
|
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Aug 29 11:22:04 AM UTC 24 |
Aug 29 11:22:08 AM UTC 24 |
1933163515 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/32.uart_tx_rx.1778830271 |
|
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Aug 29 11:21:49 AM UTC 24 |
Aug 29 11:22:08 AM UTC 24 |
20484040967 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.1457266291 |
|
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Aug 29 11:14:43 AM UTC 24 |
Aug 29 11:22:10 AM UTC 24 |
261642671875 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.2532559202 |
|
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Aug 29 11:12:59 AM UTC 24 |
Aug 29 11:22:10 AM UTC 24 |
61909439893 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/24.uart_fifo_full.159672911 |
|
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Aug 29 11:16:21 AM UTC 24 |
Aug 29 11:22:11 AM UTC 24 |
160297619773 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/32.uart_loopback.1099578901 |
|
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Aug 29 11:22:11 AM UTC 24 |
Aug 29 11:22:14 AM UTC 24 |
3076830725 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.1811215376 |
|
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Aug 29 11:22:09 AM UTC 24 |
Aug 29 11:22:18 AM UTC 24 |
2693106037 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/31.uart_noise_filter.2251311294 |
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Aug 29 11:21:24 AM UTC 24 |
Aug 29 11:22:20 AM UTC 24 |
44604394479 ps |