T860 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/45.uart_fifo_overflow.150614923 |
|
|
Aug 29 11:30:20 AM UTC 24 |
Aug 29 11:32:08 AM UTC 24 |
34466535915 ps |
T861 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_rx_start_bit_filter.3676254110 |
|
|
Aug 29 11:32:01 AM UTC 24 |
Aug 29 11:32:08 AM UTC 24 |
3985899137 ps |
T862 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_alert_test.1774129845 |
|
|
Aug 29 11:32:09 AM UTC 24 |
Aug 29 11:32:11 AM UTC 24 |
37401644 ps |
T863 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/41.uart_stress_all.4001949681 |
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|
Aug 29 11:27:58 AM UTC 24 |
Aug 29 11:32:13 AM UTC 24 |
274319999989 ps |
T864 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_smoke.2319635368 |
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|
Aug 29 11:32:11 AM UTC 24 |
Aug 29 11:32:14 AM UTC 24 |
109570033 ps |
T865 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_intr.56436332 |
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|
Aug 29 11:31:57 AM UTC 24 |
Aug 29 11:32:16 AM UTC 24 |
15189825081 ps |
T866 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_loopback.1639312374 |
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|
Aug 29 11:32:03 AM UTC 24 |
Aug 29 11:32:16 AM UTC 24 |
4849291001 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_fifo_reset.1401229263 |
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|
Aug 29 11:31:56 AM UTC 24 |
Aug 29 11:32:17 AM UTC 24 |
9449493140 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/43.uart_perf.205821270 |
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|
Aug 29 11:29:22 AM UTC 24 |
Aug 29 11:32:18 AM UTC 24 |
17756094491 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_tx_rx.2778771136 |
|
|
Aug 29 11:31:16 AM UTC 24 |
Aug 29 11:32:20 AM UTC 24 |
86263684188 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.3634220793 |
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|
Aug 29 11:29:16 AM UTC 24 |
Aug 29 11:32:25 AM UTC 24 |
112956714640 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_rx_oversample.237602964 |
|
|
Aug 29 11:32:18 AM UTC 24 |
Aug 29 11:32:29 AM UTC 24 |
2008363175 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_tx_rx.107161105 |
|
|
Aug 29 11:31:54 AM UTC 24 |
Aug 29 11:32:29 AM UTC 24 |
54507721258 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.1425143632 |
|
|
Aug 29 11:29:56 AM UTC 24 |
Aug 29 11:32:30 AM UTC 24 |
45146316672 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_rx_start_bit_filter.2254908241 |
|
|
Aug 29 11:32:26 AM UTC 24 |
Aug 29 11:32:33 AM UTC 24 |
3796263811 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_fifo_full.2538688297 |
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|
Aug 29 11:31:55 AM UTC 24 |
Aug 29 11:32:34 AM UTC 24 |
22439734685 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/45.uart_intr.2307543384 |
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|
Aug 29 11:30:51 AM UTC 24 |
Aug 29 11:32:34 AM UTC 24 |
170952170628 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_loopback.2839440173 |
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|
Aug 29 11:32:31 AM UTC 24 |
Aug 29 11:32:35 AM UTC 24 |
2602809104 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_stress_all_with_rand_reset.2603747805 |
|
|
Aug 29 11:31:44 AM UTC 24 |
Aug 29 11:32:35 AM UTC 24 |
3409271178 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_alert_test.970308176 |
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|
Aug 29 11:32:36 AM UTC 24 |
Aug 29 11:32:38 AM UTC 24 |
19509769 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.2091903782 |
|
|
Aug 29 11:13:53 AM UTC 24 |
Aug 29 11:32:38 AM UTC 24 |
150666037552 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_stress_all_with_rand_reset.1779508463 |
|
|
Aug 29 11:32:09 AM UTC 24 |
Aug 29 11:32:38 AM UTC 24 |
6978870056 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_smoke.3765116247 |
|
|
Aug 29 11:32:39 AM UTC 24 |
Aug 29 11:32:42 AM UTC 24 |
127700294 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/34.uart_perf.3989994313 |
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|
Aug 29 11:23:18 AM UTC 24 |
Aug 29 11:32:42 AM UTC 24 |
12254535135 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_fifo_reset.2257735246 |
|
|
Aug 29 11:31:19 AM UTC 24 |
Aug 29 11:32:43 AM UTC 24 |
61053580325 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_noise_filter.20981513 |
|
|
Aug 29 11:31:23 AM UTC 24 |
Aug 29 11:32:48 AM UTC 24 |
83632889998 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/43.uart_long_xfer_wo_dly.1431164381 |
|
|
Aug 29 11:29:22 AM UTC 24 |
Aug 29 11:32:52 AM UTC 24 |
106643024329 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.1389588206 |
|
|
Aug 29 11:18:00 AM UTC 24 |
Aug 29 11:32:52 AM UTC 24 |
114000909925 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_noise_filter.2675754217 |
|
|
Aug 29 11:32:20 AM UTC 24 |
Aug 29 11:32:55 AM UTC 24 |
9839853455 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/37.uart_perf.2204824756 |
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|
Aug 29 11:25:08 AM UTC 24 |
Aug 29 11:32:55 AM UTC 24 |
9787879985 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_noise_filter.2713185758 |
|
|
Aug 29 11:32:00 AM UTC 24 |
Aug 29 11:32:57 AM UTC 24 |
50764419784 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_rx_oversample.1439231789 |
|
|
Aug 29 11:32:44 AM UTC 24 |
Aug 29 11:32:58 AM UTC 24 |
1700925360 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_tx_ovrd.845002999 |
|
|
Aug 29 11:32:30 AM UTC 24 |
Aug 29 11:33:00 AM UTC 24 |
6948257281 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/41.uart_long_xfer_wo_dly.828336796 |
|
|
Aug 29 11:27:56 AM UTC 24 |
Aug 29 11:33:01 AM UTC 24 |
99089696183 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_loopback.2204593084 |
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|
Aug 29 11:32:58 AM UTC 24 |
Aug 29 11:33:03 AM UTC 24 |
14547506363 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_fifo_full.2283311710 |
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|
Aug 29 11:32:15 AM UTC 24 |
Aug 29 11:33:03 AM UTC 24 |
50156640321 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_intr.1297061893 |
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|
Aug 29 11:32:49 AM UTC 24 |
Aug 29 11:33:03 AM UTC 24 |
6902276092 ps |
T203 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_fifo_reset.552990991 |
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|
Aug 29 11:32:17 AM UTC 24 |
Aug 29 11:33:03 AM UTC 24 |
147258787595 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_fifo_overflow.1673229954 |
|
|
Aug 29 11:32:17 AM UTC 24 |
Aug 29 11:33:04 AM UTC 24 |
111604705718 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_tx_ovrd.350620007 |
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|
Aug 29 11:32:56 AM UTC 24 |
Aug 29 11:33:06 AM UTC 24 |
8648389461 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_alert_test.1558421068 |
|
|
Aug 29 11:33:04 AM UTC 24 |
Aug 29 11:33:06 AM UTC 24 |
26966522 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_rx_start_bit_filter.351310793 |
|
|
Aug 29 11:32:54 AM UTC 24 |
Aug 29 11:33:10 AM UTC 24 |
5909801579 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_rx_parity_err.2121547156 |
|
|
Aug 29 11:31:29 AM UTC 24 |
Aug 29 11:33:16 AM UTC 24 |
280505370921 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_rx_start_bit_filter.2268496076 |
|
|
Aug 29 11:31:23 AM UTC 24 |
Aug 29 11:33:16 AM UTC 24 |
65877672366 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_rx_oversample.3894348274 |
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|
Aug 29 11:31:56 AM UTC 24 |
Aug 29 11:33:21 AM UTC 24 |
6400583755 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_intr.4002926412 |
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|
Aug 29 11:32:19 AM UTC 24 |
Aug 29 11:33:25 AM UTC 24 |
56231706429 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/50.uart_stress_all_with_rand_reset.3414142497 |
|
|
Aug 29 11:33:04 AM UTC 24 |
Aug 29 11:33:27 AM UTC 24 |
1301605820 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/29.uart_stress_all.1591404066 |
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|
Aug 29 11:20:25 AM UTC 24 |
Aug 29 11:33:29 AM UTC 24 |
185328819879 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/44.uart_fifo_reset.4204145672 |
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|
Aug 29 11:29:31 AM UTC 24 |
Aug 29 11:33:35 AM UTC 24 |
130643574038 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_intr.2564545438 |
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|
Aug 29 11:31:20 AM UTC 24 |
Aug 29 11:33:36 AM UTC 24 |
64778314570 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/52.uart_stress_all_with_rand_reset.3923203860 |
|
|
Aug 29 11:33:11 AM UTC 24 |
Aug 29 11:33:40 AM UTC 24 |
3055719719 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_fifo_overflow.1087247143 |
|
|
Aug 29 11:32:43 AM UTC 24 |
Aug 29 11:33:41 AM UTC 24 |
15353769161 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/45.uart_stress_all.4026782108 |
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|
Aug 29 11:31:12 AM UTC 24 |
Aug 29 11:33:41 AM UTC 24 |
95795847120 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_rx_parity_err.1355974618 |
|
|
Aug 29 11:32:02 AM UTC 24 |
Aug 29 11:33:42 AM UTC 24 |
149307980005 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_tx_rx.714019770 |
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|
Aug 29 11:32:39 AM UTC 24 |
Aug 29 11:33:44 AM UTC 24 |
16404577463 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_perf.2709794708 |
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|
Aug 29 11:32:03 AM UTC 24 |
Aug 29 11:33:50 AM UTC 24 |
4654969818 ps |
T255 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/53.uart_fifo_reset.2914674725 |
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|
Aug 29 11:33:16 AM UTC 24 |
Aug 29 11:33:52 AM UTC 24 |
36215996757 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/51.uart_fifo_reset.707929628 |
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|
Aug 29 11:33:05 AM UTC 24 |
Aug 29 11:33:54 AM UTC 24 |
23928736338 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/51.uart_stress_all_with_rand_reset.2362235769 |
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|
Aug 29 11:33:07 AM UTC 24 |
Aug 29 11:33:59 AM UTC 24 |
3337296707 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/57.uart_stress_all_with_rand_reset.1661263243 |
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|
Aug 29 11:33:42 AM UTC 24 |
Aug 29 11:34:02 AM UTC 24 |
1165266183 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/38.uart_long_xfer_wo_dly.1677197930 |
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|
Aug 29 11:25:39 AM UTC 24 |
Aug 29 11:34:03 AM UTC 24 |
66974254430 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/50.uart_fifo_reset.4168624704 |
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|
Aug 29 11:33:04 AM UTC 24 |
Aug 29 11:34:05 AM UTC 24 |
20011041190 ps |
T236 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/58.uart_fifo_reset.3272438364 |
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|
Aug 29 11:33:43 AM UTC 24 |
Aug 29 11:34:09 AM UTC 24 |
52886918871 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/52.uart_fifo_reset.2150598398 |
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|
Aug 29 11:33:07 AM UTC 24 |
Aug 29 11:34:14 AM UTC 24 |
20336581380 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/59.uart_stress_all_with_rand_reset.2641713302 |
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|
Aug 29 11:33:51 AM UTC 24 |
Aug 29 11:34:15 AM UTC 24 |
6349086036 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/56.uart_stress_all_with_rand_reset.3420797057 |
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|
Aug 29 11:33:36 AM UTC 24 |
Aug 29 11:34:22 AM UTC 24 |
8168657304 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_noise_filter.1314971862 |
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|
Aug 29 11:32:52 AM UTC 24 |
Aug 29 11:34:29 AM UTC 24 |
69463769001 ps |
T205 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/56.uart_fifo_reset.76689777 |
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|
Aug 29 11:33:36 AM UTC 24 |
Aug 29 11:34:31 AM UTC 24 |
65072601121 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/60.uart_fifo_reset.793416544 |
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|
Aug 29 11:33:53 AM UTC 24 |
Aug 29 11:34:32 AM UTC 24 |
20928743360 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/58.uart_stress_all_with_rand_reset.3233525033 |
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|
Aug 29 11:33:43 AM UTC 24 |
Aug 29 11:34:33 AM UTC 24 |
3155758078 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/35.uart_perf.1123662588 |
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|
Aug 29 11:23:43 AM UTC 24 |
Aug 29 11:34:35 AM UTC 24 |
10928957501 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/63.uart_stress_all_with_rand_reset.485913924 |
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|
Aug 29 11:34:10 AM UTC 24 |
Aug 29 11:34:36 AM UTC 24 |
6849622152 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/61.uart_stress_all_with_rand_reset.3148001402 |
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|
Aug 29 11:33:59 AM UTC 24 |
Aug 29 11:34:38 AM UTC 24 |
5681650339 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/62.uart_fifo_reset.1315579924 |
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|
Aug 29 11:34:02 AM UTC 24 |
Aug 29 11:34:44 AM UTC 24 |
66226816386 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/62.uart_stress_all_with_rand_reset.2556904464 |
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|
Aug 29 11:34:04 AM UTC 24 |
Aug 29 11:34:46 AM UTC 24 |
7046399164 ps |
T246 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/64.uart_fifo_reset.3246692407 |
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|
Aug 29 11:34:15 AM UTC 24 |
Aug 29 11:34:47 AM UTC 24 |
20670338876 ps |
T179 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/55.uart_fifo_reset.3862823089 |
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|
Aug 29 11:33:28 AM UTC 24 |
Aug 29 11:34:53 AM UTC 24 |
107993115048 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/60.uart_stress_all_with_rand_reset.358713139 |
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|
Aug 29 11:33:55 AM UTC 24 |
Aug 29 11:34:54 AM UTC 24 |
55579849270 ps |
T221 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/59.uart_fifo_reset.4049702408 |
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|
Aug 29 11:33:45 AM UTC 24 |
Aug 29 11:34:58 AM UTC 24 |
40005419736 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/65.uart_stress_all_with_rand_reset.3397435723 |
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|
Aug 29 11:34:30 AM UTC 24 |
Aug 29 11:34:58 AM UTC 24 |
4136951503 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_perf.1899504283 |
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Aug 29 11:31:40 AM UTC 24 |
Aug 29 11:34:59 AM UTC 24 |
9410066498 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_stress_all_with_rand_reset.2695734969 |
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Aug 29 11:33:02 AM UTC 24 |
Aug 29 11:34:59 AM UTC 24 |
6366264973 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/39.uart_long_xfer_wo_dly.2717546657 |
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|
Aug 29 11:26:25 AM UTC 24 |
Aug 29 11:35:02 AM UTC 24 |
98106476409 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.875602459 |
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|
Aug 29 11:22:53 AM UTC 24 |
Aug 29 11:35:06 AM UTC 24 |
120734436852 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_fifo_full.1626151514 |
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|
Aug 29 11:31:17 AM UTC 24 |
Aug 29 11:35:06 AM UTC 24 |
231891167237 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/64.uart_stress_all_with_rand_reset.2821306349 |
|
|
Aug 29 11:34:16 AM UTC 24 |
Aug 29 11:35:07 AM UTC 24 |
2749060712 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/68.uart_stress_all_with_rand_reset.3555701304 |
|
|
Aug 29 11:34:40 AM UTC 24 |
Aug 29 11:35:10 AM UTC 24 |
2870048090 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/66.uart_stress_all_with_rand_reset.3155703249 |
|
|
Aug 29 11:34:33 AM UTC 24 |
Aug 29 11:35:11 AM UTC 24 |
3335567054 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/71.uart_stress_all_with_rand_reset.1658098708 |
|
|
Aug 29 11:34:59 AM UTC 24 |
Aug 29 11:35:19 AM UTC 24 |
5226957949 ps |
T217 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/67.uart_fifo_reset.2814495820 |
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|
Aug 29 11:34:34 AM UTC 24 |
Aug 29 11:35:21 AM UTC 24 |
231955065630 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/45.uart_rx_parity_err.263148770 |
|
|
Aug 29 11:30:55 AM UTC 24 |
Aug 29 11:35:25 AM UTC 24 |
108295964528 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/72.uart_stress_all_with_rand_reset.3673324313 |
|
|
Aug 29 11:35:00 AM UTC 24 |
Aug 29 11:35:27 AM UTC 24 |
5164200338 ps |
T158 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/39.uart_stress_all.3782313623 |
|
|
Aug 29 11:26:30 AM UTC 24 |
Aug 29 11:35:28 AM UTC 24 |
302708609267 ps |
T210 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/73.uart_fifo_reset.365928458 |
|
|
Aug 29 11:35:00 AM UTC 24 |
Aug 29 11:35:29 AM UTC 24 |
18092305043 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/67.uart_stress_all_with_rand_reset.267578676 |
|
|
Aug 29 11:34:35 AM UTC 24 |
Aug 29 11:35:32 AM UTC 24 |
696858669 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/45.uart_fifo_reset.791628577 |
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|
Aug 29 11:30:25 AM UTC 24 |
Aug 29 11:35:32 AM UTC 24 |
121048101752 ps |
T238 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/61.uart_fifo_reset.2182788779 |
|
|
Aug 29 11:33:56 AM UTC 24 |
Aug 29 11:35:34 AM UTC 24 |
183751825486 ps |
T223 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/63.uart_fifo_reset.653644431 |
|
|
Aug 29 11:34:06 AM UTC 24 |
Aug 29 11:35:34 AM UTC 24 |
35400222877 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/40.uart_long_xfer_wo_dly.2632185529 |
|
|
Aug 29 11:27:27 AM UTC 24 |
Aug 29 11:35:35 AM UTC 24 |
86682330566 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/75.uart_stress_all_with_rand_reset.396241656 |
|
|
Aug 29 11:35:08 AM UTC 24 |
Aug 29 11:35:35 AM UTC 24 |
1332062188 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/74.uart_stress_all_with_rand_reset.2181041660 |
|
|
Aug 29 11:35:07 AM UTC 24 |
Aug 29 11:35:37 AM UTC 24 |
10767912993 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/71.uart_fifo_reset.444795019 |
|
|
Aug 29 11:34:55 AM UTC 24 |
Aug 29 11:35:38 AM UTC 24 |
37920140653 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/40.uart_fifo_full.4055252299 |
|
|
Aug 29 11:26:52 AM UTC 24 |
Aug 29 11:35:38 AM UTC 24 |
146613649674 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_tx_rx.201838635 |
|
|
Aug 29 11:32:15 AM UTC 24 |
Aug 29 11:35:40 AM UTC 24 |
117094880686 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_long_xfer_wo_dly.1013584371 |
|
|
Aug 29 11:32:08 AM UTC 24 |
Aug 29 11:35:40 AM UTC 24 |
327047543433 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/73.uart_stress_all_with_rand_reset.3922761420 |
|
|
Aug 29 11:35:02 AM UTC 24 |
Aug 29 11:35:47 AM UTC 24 |
1942244295 ps |
T224 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/65.uart_fifo_reset.953968785 |
|
|
Aug 29 11:34:23 AM UTC 24 |
Aug 29 11:35:53 AM UTC 24 |
39527343497 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_fifo_overflow.1718492145 |
|
|
Aug 29 11:31:55 AM UTC 24 |
Aug 29 11:35:53 AM UTC 24 |
146238022967 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/53.uart_stress_all_with_rand_reset.1408803489 |
|
|
Aug 29 11:33:17 AM UTC 24 |
Aug 29 11:35:57 AM UTC 24 |
5781678795 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/78.uart_stress_all_with_rand_reset.4032717905 |
|
|
Aug 29 11:35:27 AM UTC 24 |
Aug 29 11:35:57 AM UTC 24 |
20237777725 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/54.uart_stress_all_with_rand_reset.2552301243 |
|
|
Aug 29 11:33:26 AM UTC 24 |
Aug 29 11:35:57 AM UTC 24 |
5464968783 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/69.uart_stress_all_with_rand_reset.2575800512 |
|
|
Aug 29 11:34:47 AM UTC 24 |
Aug 29 11:36:02 AM UTC 24 |
4562785540 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/74.uart_fifo_reset.3840235769 |
|
|
Aug 29 11:35:04 AM UTC 24 |
Aug 29 11:36:02 AM UTC 24 |
67423362404 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/69.uart_fifo_reset.3667993692 |
|
|
Aug 29 11:34:45 AM UTC 24 |
Aug 29 11:36:03 AM UTC 24 |
102149591432 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/70.uart_stress_all_with_rand_reset.2143015713 |
|
|
Aug 29 11:34:55 AM UTC 24 |
Aug 29 11:36:04 AM UTC 24 |
21414575154 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/83.uart_fifo_reset.1790319058 |
|
|
Aug 29 11:35:38 AM UTC 24 |
Aug 29 11:36:05 AM UTC 24 |
14827374437 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/79.uart_stress_all_with_rand_reset.4146430898 |
|
|
Aug 29 11:35:30 AM UTC 24 |
Aug 29 11:36:10 AM UTC 24 |
10937190616 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/87.uart_fifo_reset.402801242 |
|
|
Aug 29 11:35:59 AM UTC 24 |
Aug 29 11:36:13 AM UTC 24 |
26907836762 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/70.uart_fifo_reset.2694063665 |
|
|
Aug 29 11:34:48 AM UTC 24 |
Aug 29 11:36:15 AM UTC 24 |
20884923374 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/54.uart_fifo_reset.845736851 |
|
|
Aug 29 11:33:22 AM UTC 24 |
Aug 29 11:36:15 AM UTC 24 |
121299445545 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/76.uart_stress_all_with_rand_reset.1769212525 |
|
|
Aug 29 11:35:12 AM UTC 24 |
Aug 29 11:36:19 AM UTC 24 |
3561188672 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/80.uart_fifo_reset.2498305596 |
|
|
Aug 29 11:35:33 AM UTC 24 |
Aug 29 11:36:23 AM UTC 24 |
37894446438 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.2345817434 |
|
|
Aug 29 11:35:54 AM UTC 24 |
Aug 29 11:36:24 AM UTC 24 |
3816521622 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/77.uart_stress_all_with_rand_reset.2745453937 |
|
|
Aug 29 11:35:22 AM UTC 24 |
Aug 29 11:36:24 AM UTC 24 |
5881758527 ps |
T200 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/68.uart_fifo_reset.1532695396 |
|
|
Aug 29 11:34:37 AM UTC 24 |
Aug 29 11:36:24 AM UTC 24 |
77761719823 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/90.uart_fifo_reset.3790032593 |
|
|
Aug 29 11:36:06 AM UTC 24 |
Aug 29 11:36:24 AM UTC 24 |
46928183732 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/57.uart_fifo_reset.1493316068 |
|
|
Aug 29 11:33:42 AM UTC 24 |
Aug 29 11:36:30 AM UTC 24 |
110443457700 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_rx_parity_err.3011539947 |
|
|
Aug 29 11:32:30 AM UTC 24 |
Aug 29 11:36:31 AM UTC 24 |
93230087326 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.4002168735 |
|
|
Aug 29 11:36:25 AM UTC 24 |
Aug 29 11:36:32 AM UTC 24 |
243759064 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/88.uart_fifo_reset.951656741 |
|
|
Aug 29 11:35:59 AM UTC 24 |
Aug 29 11:36:32 AM UTC 24 |
13045261079 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/75.uart_fifo_reset.1919620895 |
|
|
Aug 29 11:35:07 AM UTC 24 |
Aug 29 11:36:33 AM UTC 24 |
116313919011 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/81.uart_stress_all_with_rand_reset.2676484512 |
|
|
Aug 29 11:35:36 AM UTC 24 |
Aug 29 11:36:33 AM UTC 24 |
2875797273 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/79.uart_fifo_reset.2891009219 |
|
|
Aug 29 11:35:29 AM UTC 24 |
Aug 29 11:36:33 AM UTC 24 |
90700119217 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/83.uart_stress_all_with_rand_reset.2617386537 |
|
|
Aug 29 11:35:39 AM UTC 24 |
Aug 29 11:36:33 AM UTC 24 |
13179784342 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.2234687419 |
|
|
Aug 29 11:36:24 AM UTC 24 |
Aug 29 11:36:34 AM UTC 24 |
806032053 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/77.uart_fifo_reset.456345209 |
|
|
Aug 29 11:35:20 AM UTC 24 |
Aug 29 11:36:35 AM UTC 24 |
56020154835 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/82.uart_fifo_reset.3330191150 |
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|
Aug 29 11:35:36 AM UTC 24 |
Aug 29 11:36:35 AM UTC 24 |
89464438945 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/91.uart_stress_all_with_rand_reset.4211421518 |
|
|
Aug 29 11:36:14 AM UTC 24 |
Aug 29 11:36:35 AM UTC 24 |
1074661025 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/85.uart_stress_all_with_rand_reset.2545205290 |
|
|
Aug 29 11:35:49 AM UTC 24 |
Aug 29 11:36:36 AM UTC 24 |
10565205175 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/84.uart_stress_all_with_rand_reset.3520559946 |
|
|
Aug 29 11:35:41 AM UTC 24 |
Aug 29 11:36:38 AM UTC 24 |
7299075861 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.2024509024 |
|
|
Aug 29 11:36:16 AM UTC 24 |
Aug 29 11:36:43 AM UTC 24 |
1554053460 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/81.uart_fifo_reset.4021495392 |
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|
Aug 29 11:35:36 AM UTC 24 |
Aug 29 11:36:47 AM UTC 24 |
119751786842 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.2609731074 |
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|
Aug 29 11:35:33 AM UTC 24 |
Aug 29 11:36:49 AM UTC 24 |
31370296177 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/84.uart_fifo_reset.2451848662 |
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|
Aug 29 11:35:39 AM UTC 24 |
Aug 29 11:36:52 AM UTC 24 |
21853868819 ps |
T214 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/76.uart_fifo_reset.2061272810 |
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|
Aug 29 11:35:10 AM UTC 24 |
Aug 29 11:36:55 AM UTC 24 |
50789418936 ps |
T219 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/92.uart_fifo_reset.1875203285 |
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|
Aug 29 11:36:16 AM UTC 24 |
Aug 29 11:36:55 AM UTC 24 |
58763948374 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.3701737293 |
|
|
Aug 29 11:35:59 AM UTC 24 |
Aug 29 11:36:56 AM UTC 24 |
22045690146 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/105.uart_fifo_reset.4212501480 |
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|
Aug 29 11:36:39 AM UTC 24 |
Aug 29 11:36:57 AM UTC 24 |
54721996023 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.565978817 |
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|
Aug 29 11:36:35 AM UTC 24 |
Aug 29 11:36:58 AM UTC 24 |
4672988833 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.3829148414 |
|
|
Aug 29 11:36:33 AM UTC 24 |
Aug 29 11:36:58 AM UTC 24 |
1738359583 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/90.uart_stress_all_with_rand_reset.1321718773 |
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|
Aug 29 11:36:06 AM UTC 24 |
Aug 29 11:36:59 AM UTC 24 |
3641665422 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/103.uart_fifo_reset.2031303522 |
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|
Aug 29 11:36:36 AM UTC 24 |
Aug 29 11:37:00 AM UTC 24 |
64858536186 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/82.uart_stress_all_with_rand_reset.1897480609 |
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|
Aug 29 11:35:36 AM UTC 24 |
Aug 29 11:37:01 AM UTC 24 |
24391870198 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.3336909066 |
|
|
Aug 29 11:36:25 AM UTC 24 |
Aug 29 11:37:04 AM UTC 24 |
2739107296 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/91.uart_fifo_reset.351594854 |
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|
Aug 29 11:36:11 AM UTC 24 |
Aug 29 11:37:05 AM UTC 24 |
128763351058 ps |
T185 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/104.uart_fifo_reset.2008666760 |
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|
Aug 29 11:36:37 AM UTC 24 |
Aug 29 11:37:10 AM UTC 24 |
50294169236 ps |
T159 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/94.uart_fifo_reset.2728190340 |
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|
Aug 29 11:36:25 AM UTC 24 |
Aug 29 11:37:11 AM UTC 24 |
19101201347 ps |
T234 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/66.uart_fifo_reset.3030139546 |
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|
Aug 29 11:34:32 AM UTC 24 |
Aug 29 11:37:13 AM UTC 24 |
167056779347 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.143877033 |
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|
Aug 29 11:36:35 AM UTC 24 |
Aug 29 11:37:14 AM UTC 24 |
7020913849 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_stress_all.1279533457 |
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|
Aug 29 11:31:49 AM UTC 24 |
Aug 29 11:37:15 AM UTC 24 |
151556983473 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/110.uart_fifo_reset.1406411197 |
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|
Aug 29 11:36:56 AM UTC 24 |
Aug 29 11:37:24 AM UTC 24 |
31568278487 ps |
T215 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/101.uart_fifo_reset.2129504046 |
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Aug 29 11:36:36 AM UTC 24 |
Aug 29 11:37:25 AM UTC 24 |
19297654078 ps |
T231 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/118.uart_fifo_reset.3133868228 |
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Aug 29 11:37:02 AM UTC 24 |
Aug 29 11:37:25 AM UTC 24 |
13469663941 ps |
T222 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/119.uart_fifo_reset.3074534110 |
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Aug 29 11:37:05 AM UTC 24 |
Aug 29 11:37:35 AM UTC 24 |
29489445099 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.2456178468 |
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Aug 29 11:36:04 AM UTC 24 |
Aug 29 11:37:36 AM UTC 24 |
5461614389 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/123.uart_fifo_reset.1400124789 |
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Aug 29 11:37:14 AM UTC 24 |
Aug 29 11:37:36 AM UTC 24 |
52659692797 ps |
T216 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/109.uart_fifo_reset.2466505802 |
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Aug 29 11:36:52 AM UTC 24 |
Aug 29 11:37:36 AM UTC 24 |
16390440708 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/124.uart_fifo_reset.4260046075 |
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Aug 29 11:37:15 AM UTC 24 |
Aug 29 11:37:36 AM UTC 24 |
22864290305 ps |
T249 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/107.uart_fifo_reset.1032232035 |
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Aug 29 11:36:48 AM UTC 24 |
Aug 29 11:37:36 AM UTC 24 |
82789161129 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_fifo_full.2976026088 |
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|
Aug 29 11:32:40 AM UTC 24 |
Aug 29 11:37:37 AM UTC 24 |
192223686490 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/89.uart_fifo_reset.2833453750 |
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|
Aug 29 11:36:03 AM UTC 24 |
Aug 29 11:37:37 AM UTC 24 |
21516650077 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/127.uart_fifo_reset.3993421149 |
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|
Aug 29 11:37:26 AM UTC 24 |
Aug 29 11:37:40 AM UTC 24 |
11337263859 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/120.uart_fifo_reset.1902206692 |
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|
Aug 29 11:37:06 AM UTC 24 |
Aug 29 11:37:40 AM UTC 24 |
41152060978 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/97.uart_fifo_reset.3380919456 |
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|
Aug 29 11:36:33 AM UTC 24 |
Aug 29 11:37:40 AM UTC 24 |
41372450162 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/42.uart_long_xfer_wo_dly.811650784 |
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|
Aug 29 11:28:43 AM UTC 24 |
Aug 29 11:37:41 AM UTC 24 |
175938696669 ps |
T213 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/111.uart_fifo_reset.2019099316 |
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|
Aug 29 11:36:57 AM UTC 24 |
Aug 29 11:37:43 AM UTC 24 |
15761175833 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/121.uart_fifo_reset.2235995505 |
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Aug 29 11:37:10 AM UTC 24 |
Aug 29 11:37:47 AM UTC 24 |
264146579412 ps |
T1006 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/95.uart_fifo_reset.3882973274 |
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Aug 29 11:36:25 AM UTC 24 |
Aug 29 11:37:47 AM UTC 24 |
154936111317 ps |
T239 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/126.uart_fifo_reset.2754815233 |
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|
Aug 29 11:37:26 AM UTC 24 |
Aug 29 11:37:48 AM UTC 24 |
18165044923 ps |
T1007 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/23.uart_perf.840499216 |
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|
Aug 29 11:16:08 AM UTC 24 |
Aug 29 11:37:48 AM UTC 24 |
23757631463 ps |
T1008 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/98.uart_fifo_reset.3109254452 |
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|
Aug 29 11:36:35 AM UTC 24 |
Aug 29 11:37:49 AM UTC 24 |
45644414287 ps |
T228 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/116.uart_fifo_reset.1106562718 |
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|
Aug 29 11:37:00 AM UTC 24 |
Aug 29 11:37:52 AM UTC 24 |
85344147493 ps |
T1009 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/122.uart_fifo_reset.432588846 |
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|
Aug 29 11:37:12 AM UTC 24 |
Aug 29 11:37:55 AM UTC 24 |
252593791455 ps |
T229 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/139.uart_fifo_reset.3674286001 |
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|
Aug 29 11:37:42 AM UTC 24 |
Aug 29 11:37:57 AM UTC 24 |
15538825465 ps |
T1010 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/131.uart_fifo_reset.1559255574 |
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|
Aug 29 11:37:38 AM UTC 24 |
Aug 29 11:38:01 AM UTC 24 |
36376431896 ps |
T1011 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/46.uart_long_xfer_wo_dly.2909960455 |
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|
Aug 29 11:31:42 AM UTC 24 |
Aug 29 11:38:04 AM UTC 24 |
91421043077 ps |
T1012 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/129.uart_fifo_reset.2430027632 |
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|
Aug 29 11:37:36 AM UTC 24 |
Aug 29 11:38:06 AM UTC 24 |
61803251526 ps |
T1013 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.3415759502 |
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|
Aug 29 11:36:33 AM UTC 24 |
Aug 29 11:38:06 AM UTC 24 |
18498759746 ps |
T1014 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/133.uart_fifo_reset.3538910395 |
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|
Aug 29 11:37:38 AM UTC 24 |
Aug 29 11:38:09 AM UTC 24 |
36880569823 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/138.uart_fifo_reset.4105390290 |
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|
Aug 29 11:37:42 AM UTC 24 |
Aug 29 11:38:10 AM UTC 24 |
7761978200 ps |
T1015 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.689924054 |
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|
Aug 29 11:36:03 AM UTC 24 |
Aug 29 11:38:11 AM UTC 24 |
23792444059 ps |
T1016 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/108.uart_fifo_reset.624012472 |
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|
Aug 29 11:36:50 AM UTC 24 |
Aug 29 11:38:15 AM UTC 24 |
35722193796 ps |
T1017 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/100.uart_fifo_reset.519970011 |
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|
Aug 29 11:36:35 AM UTC 24 |
Aug 29 11:38:16 AM UTC 24 |
230687071032 ps |
T1018 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/146.uart_fifo_reset.1434281991 |
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|
Aug 29 11:37:51 AM UTC 24 |
Aug 29 11:38:17 AM UTC 24 |
30991265365 ps |
T218 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/99.uart_fifo_reset.1490641245 |
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|
Aug 29 11:36:35 AM UTC 24 |
Aug 29 11:38:27 AM UTC 24 |
141787789919 ps |
T1019 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/86.uart_fifo_reset.3987024380 |
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|
Aug 29 11:35:54 AM UTC 24 |
Aug 29 11:38:32 AM UTC 24 |
57195040457 ps |
T1020 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/152.uart_fifo_reset.3633582826 |
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|
Aug 29 11:38:07 AM UTC 24 |
Aug 29 11:38:34 AM UTC 24 |
9190625495 ps |
T1021 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/113.uart_fifo_reset.1650849863 |
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|
Aug 29 11:36:58 AM UTC 24 |
Aug 29 11:38:34 AM UTC 24 |
150449047179 ps |
T254 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/128.uart_fifo_reset.1405726287 |
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|
Aug 29 11:37:27 AM UTC 24 |
Aug 29 11:38:36 AM UTC 24 |
71951813236 ps |
T1022 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/145.uart_fifo_reset.523104511 |
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|
Aug 29 11:37:50 AM UTC 24 |
Aug 29 11:38:38 AM UTC 24 |
72768471317 ps |
T166 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/142.uart_fifo_reset.3365929532 |
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|
Aug 29 11:37:47 AM UTC 24 |
Aug 29 11:38:44 AM UTC 24 |
22336727381 ps |
T1023 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/49.uart_rx_parity_err.3762853128 |
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|
Aug 29 11:32:56 AM UTC 24 |
Aug 29 11:38:46 AM UTC 24 |
143823354968 ps |
T1024 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/102.uart_fifo_reset.1865938750 |
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|
Aug 29 11:36:36 AM UTC 24 |
Aug 29 11:38:47 AM UTC 24 |
159503728851 ps |
T1025 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/148.uart_fifo_reset.3964573666 |
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|
Aug 29 11:37:56 AM UTC 24 |
Aug 29 11:38:49 AM UTC 24 |
77249504367 ps |
T1026 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/134.uart_fifo_reset.991961663 |
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|
Aug 29 11:37:38 AM UTC 24 |
Aug 29 11:38:50 AM UTC 24 |
65753733274 ps |
T240 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/160.uart_fifo_reset.2549392517 |
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|
Aug 29 11:38:27 AM UTC 24 |
Aug 29 11:38:55 AM UTC 24 |
14876242161 ps |
T1027 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/156.uart_fifo_reset.4121544306 |
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|
Aug 29 11:38:12 AM UTC 24 |
Aug 29 11:38:55 AM UTC 24 |
164137481046 ps |
T1028 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/164.uart_fifo_reset.63283666 |
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|
Aug 29 11:38:37 AM UTC 24 |
Aug 29 11:38:57 AM UTC 24 |
11901419642 ps |
T1029 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/153.uart_fifo_reset.694418697 |
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|
Aug 29 11:38:07 AM UTC 24 |
Aug 29 11:38:57 AM UTC 24 |
35443566768 ps |
T1030 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/137.uart_fifo_reset.4013598578 |
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|
Aug 29 11:37:40 AM UTC 24 |
Aug 29 11:38:59 AM UTC 24 |
69527719455 ps |
T242 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/144.uart_fifo_reset.2092027694 |
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|
Aug 29 11:37:50 AM UTC 24 |
Aug 29 11:39:00 AM UTC 24 |
23588013506 ps |
T1031 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/140.uart_fifo_reset.4164924317 |
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|
Aug 29 11:37:43 AM UTC 24 |
Aug 29 11:39:01 AM UTC 24 |
98340817752 ps |
T1032 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_stress_all.1927225556 |
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|
Aug 29 11:32:36 AM UTC 24 |
Aug 29 11:39:01 AM UTC 24 |
189212612873 ps |
T1033 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/19.uart_perf.3778727784 |
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|
Aug 29 11:13:51 AM UTC 24 |
Aug 29 11:39:07 AM UTC 24 |
25858856604 ps |
T241 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/168.uart_fifo_reset.684482776 |
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|
Aug 29 11:38:46 AM UTC 24 |
Aug 29 11:39:09 AM UTC 24 |
15519445060 ps |
T1034 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/159.uart_fifo_reset.2656801897 |
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|
Aug 29 11:38:17 AM UTC 24 |
Aug 29 11:39:09 AM UTC 24 |
22727005327 ps |
T1035 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/170.uart_fifo_reset.17510561 |
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|
Aug 29 11:38:48 AM UTC 24 |
Aug 29 11:39:12 AM UTC 24 |
18239622031 ps |
T1036 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/147.uart_fifo_reset.2591593896 |
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|
Aug 29 11:37:53 AM UTC 24 |
Aug 29 11:39:13 AM UTC 24 |
31059892515 ps |
T1037 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/150.uart_fifo_reset.1729245266 |
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|
Aug 29 11:38:02 AM UTC 24 |
Aug 29 11:39:18 AM UTC 24 |
104407519075 ps |
T1038 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/149.uart_fifo_reset.156243405 |
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|
Aug 29 11:37:58 AM UTC 24 |
Aug 29 11:39:21 AM UTC 24 |
27013562995 ps |
T1039 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/72.uart_fifo_reset.1824740872 |
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|
Aug 29 11:34:59 AM UTC 24 |
Aug 29 11:39:26 AM UTC 24 |
282589820373 ps |
T1040 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/115.uart_fifo_reset.1332311534 |
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|
Aug 29 11:37:00 AM UTC 24 |
Aug 29 11:39:27 AM UTC 24 |
157269077732 ps |
T1041 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/180.uart_fifo_reset.2081672962 |
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|
Aug 29 11:39:02 AM UTC 24 |
Aug 29 11:39:27 AM UTC 24 |
33023455186 ps |
T225 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/135.uart_fifo_reset.4281754909 |
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|
Aug 29 11:37:38 AM UTC 24 |
Aug 29 11:39:28 AM UTC 24 |
98990663179 ps |
T1042 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/141.uart_fifo_reset.3218921164 |
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|
Aug 29 11:37:44 AM UTC 24 |
Aug 29 11:39:31 AM UTC 24 |
54210323440 ps |
T1043 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/166.uart_fifo_reset.2328986988 |
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|
Aug 29 11:38:42 AM UTC 24 |
Aug 29 11:39:32 AM UTC 24 |
13872038763 ps |
T1044 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/154.uart_fifo_reset.3745064860 |
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|
Aug 29 11:38:10 AM UTC 24 |
Aug 29 11:39:33 AM UTC 24 |
104016311461 ps |
T1045 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/158.uart_fifo_reset.4285168243 |
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|
Aug 29 11:38:17 AM UTC 24 |
Aug 29 11:39:36 AM UTC 24 |
32686968497 ps |
T250 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/155.uart_fifo_reset.1345498332 |
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|
Aug 29 11:38:10 AM UTC 24 |
Aug 29 11:39:39 AM UTC 24 |
85946047643 ps |
T1046 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/157.uart_fifo_reset.4035250147 |
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|
Aug 29 11:38:16 AM UTC 24 |
Aug 29 11:39:39 AM UTC 24 |
31376197768 ps |
T1047 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/48.uart_perf.2771532222 |
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|
Aug 29 11:32:34 AM UTC 24 |
Aug 29 11:39:39 AM UTC 24 |
27501985457 ps |
T232 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/151.uart_fifo_reset.246564658 |
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|
Aug 29 11:38:05 AM UTC 24 |
Aug 29 11:39:39 AM UTC 24 |
130999082158 ps |
T1048 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/178.uart_fifo_reset.1100041338 |
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|
Aug 29 11:39:01 AM UTC 24 |
Aug 29 11:39:40 AM UTC 24 |
40037536537 ps |
T1049 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/85.uart_fifo_reset.3196842871 |
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|
Aug 29 11:35:41 AM UTC 24 |
Aug 29 11:39:41 AM UTC 24 |
92399179085 ps |
T1050 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/179.uart_fifo_reset.2571563417 |
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|
Aug 29 11:39:02 AM UTC 24 |
Aug 29 11:39:41 AM UTC 24 |
84892688755 ps |
T1051 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/184.uart_fifo_reset.2457620404 |
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|
Aug 29 11:39:13 AM UTC 24 |
Aug 29 11:39:43 AM UTC 24 |
7004985853 ps |
T1052 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/36.uart_intr.2216219100 |
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|
Aug 29 11:23:55 AM UTC 24 |
Aug 29 11:39:45 AM UTC 24 |
356476006795 ps |
T1053 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/136.uart_fifo_reset.1346196602 |
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|
Aug 29 11:37:39 AM UTC 24 |
Aug 29 11:39:45 AM UTC 24 |
49160469155 ps |
T1054 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/165.uart_fifo_reset.2516450574 |
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|
Aug 29 11:38:39 AM UTC 24 |
Aug 29 11:39:46 AM UTC 24 |
71645638516 ps |
T1055 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/45.uart_long_xfer_wo_dly.3599801468 |
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|
Aug 29 11:31:02 AM UTC 24 |
Aug 29 11:39:48 AM UTC 24 |
258348223523 ps |
T226 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/176.uart_fifo_reset.1476315739 |
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|
Aug 29 11:38:58 AM UTC 24 |
Aug 29 11:39:49 AM UTC 24 |
19913738534 ps |
T1056 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/130.uart_fifo_reset.1732804655 |
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|
Aug 29 11:37:38 AM UTC 24 |
Aug 29 11:39:50 AM UTC 24 |
88603200975 ps |
T1057 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/186.uart_fifo_reset.1120674213 |
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|
Aug 29 11:39:19 AM UTC 24 |
Aug 29 11:39:52 AM UTC 24 |
14084306191 ps |
T1058 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/106.uart_fifo_reset.4160203010 |
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|
Aug 29 11:36:44 AM UTC 24 |
Aug 29 11:39:53 AM UTC 24 |
86109628929 ps |
T1059 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/47.uart_stress_all.3974232803 |
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|
Aug 29 11:32:09 AM UTC 24 |
Aug 29 11:39:55 AM UTC 24 |
451462023461 ps |
T1060 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/201.uart_fifo_reset.883656200 |
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|
Aug 29 11:39:42 AM UTC 24 |
Aug 29 11:39:57 AM UTC 24 |
16374143035 ps |
T227 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/96.uart_fifo_reset.3617986163 |
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|
Aug 29 11:36:31 AM UTC 24 |
Aug 29 11:39:58 AM UTC 24 |
168567754715 ps |
T207 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/182.uart_fifo_reset.4090976373 |
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|
Aug 29 11:39:11 AM UTC 24 |
Aug 29 11:39:59 AM UTC 24 |
77555683438 ps |
T1061 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/213.uart_fifo_reset.1715033421 |
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Aug 29 11:39:55 AM UTC 24 |
Aug 29 11:40:02 AM UTC 24 |
6330147083 ps |
T1062 |
/workspaces/repo/scratch/os_regression_2024_08_28/uart-sim-vcs/coverage/default/205.uart_fifo_reset.2909405932 |
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Aug 29 11:39:47 AM UTC 24 |
Aug 29 11:40:02 AM UTC 24 |
71754568167 ps |