| T494 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_loopback.1448644576 |
|
|
Sep 01 06:30:50 AM UTC 24 |
Sep 01 06:31:07 AM UTC 24 |
9324416467 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_fifo_reset.211500983 |
|
|
Sep 01 06:30:40 AM UTC 24 |
Sep 01 06:31:07 AM UTC 24 |
18084400515 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_intr.2753892914 |
|
|
Sep 01 06:30:46 AM UTC 24 |
Sep 01 06:31:08 AM UTC 24 |
8659857022 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_noise_filter.1382119076 |
|
|
Sep 01 06:30:18 AM UTC 24 |
Sep 01 06:31:08 AM UTC 24 |
31511480226 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_fifo_full.3522302706 |
|
|
Sep 01 06:30:37 AM UTC 24 |
Sep 01 06:31:10 AM UTC 24 |
42276075578 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_rx_oversample.3514570638 |
|
|
Sep 01 06:31:07 AM UTC 24 |
Sep 01 06:31:16 AM UTC 24 |
4498823976 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.3036117847 |
|
|
Sep 01 06:31:03 AM UTC 24 |
Sep 01 06:31:22 AM UTC 24 |
21647512786 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.3352599878 |
|
|
Sep 01 06:30:57 AM UTC 24 |
Sep 01 06:31:23 AM UTC 24 |
3508771998 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.1757286973 |
|
|
Sep 01 06:26:51 AM UTC 24 |
Sep 01 06:31:25 AM UTC 24 |
98097681312 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_noise_filter.2993067309 |
|
|
Sep 01 06:28:53 AM UTC 24 |
Sep 01 06:31:26 AM UTC 24 |
112924705568 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.954790400 |
|
|
Sep 01 06:30:38 AM UTC 24 |
Sep 01 06:31:26 AM UTC 24 |
280021626926 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.3548894736 |
|
|
Sep 01 06:30:30 AM UTC 24 |
Sep 01 06:31:26 AM UTC 24 |
7575642827 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.1403783157 |
|
|
Sep 01 06:31:08 AM UTC 24 |
Sep 01 06:31:29 AM UTC 24 |
45560617412 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_alert_test.1245784382 |
|
|
Sep 01 06:31:27 AM UTC 24 |
Sep 01 06:31:29 AM UTC 24 |
11210403 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_tx_rx.756288985 |
|
|
Sep 01 06:31:03 AM UTC 24 |
Sep 01 06:31:30 AM UTC 24 |
7657127092 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_loopback.2006353829 |
|
|
Sep 01 06:31:18 AM UTC 24 |
Sep 01 06:31:30 AM UTC 24 |
2598332683 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_smoke.1515344098 |
|
|
Sep 01 06:31:27 AM UTC 24 |
Sep 01 06:31:31 AM UTC 24 |
1020892597 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_fifo_reset.3915727942 |
|
|
Sep 01 06:31:04 AM UTC 24 |
Sep 01 06:31:32 AM UTC 24 |
28450189616 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_stress_all.4094163417 |
|
|
Sep 01 06:29:07 AM UTC 24 |
Sep 01 06:31:35 AM UTC 24 |
186479171728 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.2460221994 |
|
|
Sep 01 06:31:10 AM UTC 24 |
Sep 01 06:31:36 AM UTC 24 |
22531536833 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.1913114747 |
|
|
Sep 01 06:31:36 AM UTC 24 |
Sep 01 06:31:41 AM UTC 24 |
3829607132 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_fifo_reset.3577378092 |
|
|
Sep 01 06:30:05 AM UTC 24 |
Sep 01 06:31:43 AM UTC 24 |
143829801103 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_stress_all.3482461331 |
|
|
Sep 01 06:29:29 AM UTC 24 |
Sep 01 06:31:45 AM UTC 24 |
48282147030 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.2603173916 |
|
|
Sep 01 06:27:30 AM UTC 24 |
Sep 01 06:31:48 AM UTC 24 |
108550091599 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.3920923831 |
|
|
Sep 01 06:31:26 AM UTC 24 |
Sep 01 06:31:49 AM UTC 24 |
7419574512 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.2089398794 |
|
|
Sep 01 06:31:42 AM UTC 24 |
Sep 01 06:31:51 AM UTC 24 |
1301160109 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_loopback.2890325710 |
|
|
Sep 01 06:31:44 AM UTC 24 |
Sep 01 06:31:53 AM UTC 24 |
6386423967 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_perf.1765465121 |
|
|
Sep 01 06:30:25 AM UTC 24 |
Sep 01 06:31:55 AM UTC 24 |
7081751966 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_alert_test.1703317639 |
|
|
Sep 01 06:31:54 AM UTC 24 |
Sep 01 06:31:56 AM UTC 24 |
14012672 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_intr.2033098573 |
|
|
Sep 01 06:34:10 AM UTC 24 |
Sep 01 06:34:25 AM UTC 24 |
6653931377 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_perf.2121251256 |
|
|
Sep 01 06:27:30 AM UTC 24 |
Sep 01 06:31:57 AM UTC 24 |
20981380454 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.1808075397 |
|
|
Sep 01 06:31:36 AM UTC 24 |
Sep 01 06:31:58 AM UTC 24 |
10375433894 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.624908003 |
|
|
Sep 01 06:30:02 AM UTC 24 |
Sep 01 06:31:58 AM UTC 24 |
145724295661 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_smoke.2028963943 |
|
|
Sep 01 06:31:56 AM UTC 24 |
Sep 01 06:31:58 AM UTC 24 |
156803385 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_tx_rx.596759397 |
|
|
Sep 01 06:28:17 AM UTC 24 |
Sep 01 06:31:59 AM UTC 24 |
238999621317 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_tx_rx.1865674825 |
|
|
Sep 01 06:31:29 AM UTC 24 |
Sep 01 06:32:02 AM UTC 24 |
10310137721 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_intr.1790121949 |
|
|
Sep 01 06:31:33 AM UTC 24 |
Sep 01 06:32:03 AM UTC 24 |
34808284635 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.155465016 |
|
|
Sep 01 06:31:11 AM UTC 24 |
Sep 01 06:32:06 AM UTC 24 |
12773667563 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_stress_all.1273563533 |
|
|
Sep 01 06:27:51 AM UTC 24 |
Sep 01 06:32:07 AM UTC 24 |
173904665722 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.2173174437 |
|
|
Sep 01 06:32:08 AM UTC 24 |
Sep 01 06:32:11 AM UTC 24 |
764463391 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.3354917255 |
|
|
Sep 01 06:25:18 AM UTC 24 |
Sep 01 06:32:12 AM UTC 24 |
114474663023 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_noise_filter.2466680730 |
|
|
Sep 01 06:30:46 AM UTC 24 |
Sep 01 06:32:12 AM UTC 24 |
138520288238 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_fifo_full.2963896984 |
|
|
Sep 01 06:31:03 AM UTC 24 |
Sep 01 06:32:18 AM UTC 24 |
154080638661 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_perf.3513192185 |
|
|
Sep 01 06:26:50 AM UTC 24 |
Sep 01 06:32:19 AM UTC 24 |
6071905429 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.2089388257 |
|
|
Sep 01 06:32:04 AM UTC 24 |
Sep 01 06:32:20 AM UTC 24 |
3947920678 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_fifo_full.1585801421 |
|
|
Sep 01 06:31:30 AM UTC 24 |
Sep 01 06:32:22 AM UTC 24 |
45659299395 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_intr.478725191 |
|
|
Sep 01 06:31:07 AM UTC 24 |
Sep 01 06:32:22 AM UTC 24 |
27582100616 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_alert_test.2260253940 |
|
|
Sep 01 06:32:21 AM UTC 24 |
Sep 01 06:32:23 AM UTC 24 |
145641553 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_smoke.1015953299 |
|
|
Sep 01 06:32:23 AM UTC 24 |
Sep 01 06:32:26 AM UTC 24 |
745982958 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_tx_rx.4098672629 |
|
|
Sep 01 06:27:57 AM UTC 24 |
Sep 01 06:32:26 AM UTC 24 |
90732734842 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_fifo_reset.3566157351 |
|
|
Sep 01 06:31:59 AM UTC 24 |
Sep 01 06:32:26 AM UTC 24 |
116968950172 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.456351448 |
|
|
Sep 01 06:31:49 AM UTC 24 |
Sep 01 06:32:27 AM UTC 24 |
2883404351 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_loopback.3065680111 |
|
|
Sep 01 06:32:12 AM UTC 24 |
Sep 01 06:32:28 AM UTC 24 |
4714268946 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_rx_oversample.117374608 |
|
|
Sep 01 06:31:32 AM UTC 24 |
Sep 01 06:32:33 AM UTC 24 |
5486312241 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_stress_all.2706208178 |
|
|
Sep 01 06:30:58 AM UTC 24 |
Sep 01 06:32:37 AM UTC 24 |
180972588950 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.2909395020 |
|
|
Sep 01 06:32:19 AM UTC 24 |
Sep 01 06:32:37 AM UTC 24 |
3272562873 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_intr.1242606911 |
|
|
Sep 01 06:30:12 AM UTC 24 |
Sep 01 06:32:42 AM UTC 24 |
222158607373 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_fifo_full.2770849377 |
|
|
Sep 01 06:30:02 AM UTC 24 |
Sep 01 06:32:44 AM UTC 24 |
115637793521 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.1870675371 |
|
|
Sep 01 06:32:07 AM UTC 24 |
Sep 01 06:32:46 AM UTC 24 |
36485822139 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_tx_rx.2942581480 |
|
|
Sep 01 06:28:39 AM UTC 24 |
Sep 01 06:32:46 AM UTC 24 |
102062282240 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.2087246206 |
|
|
Sep 01 06:32:34 AM UTC 24 |
Sep 01 06:32:47 AM UTC 24 |
3557568073 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_loopback.1694363180 |
|
|
Sep 01 06:32:43 AM UTC 24 |
Sep 01 06:32:49 AM UTC 24 |
2510717104 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_fifo_full.3366552202 |
|
|
Sep 01 06:31:58 AM UTC 24 |
Sep 01 06:32:50 AM UTC 24 |
66842016419 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_alert_test.4244179618 |
|
|
Sep 01 06:32:49 AM UTC 24 |
Sep 01 06:32:51 AM UTC 24 |
11998949 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.520686681 |
|
|
Sep 01 06:32:38 AM UTC 24 |
Sep 01 06:32:53 AM UTC 24 |
6250960358 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_rx_oversample.1672624451 |
|
|
Sep 01 06:31:59 AM UTC 24 |
Sep 01 06:32:53 AM UTC 24 |
4839613201 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_perf.1415977901 |
|
|
Sep 01 06:31:23 AM UTC 24 |
Sep 01 06:32:53 AM UTC 24 |
22099654701 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.2074530611 |
|
|
Sep 01 06:25:32 AM UTC 24 |
Sep 01 06:32:58 AM UTC 24 |
202178741631 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_rx_oversample.3449346884 |
|
|
Sep 01 06:32:27 AM UTC 24 |
Sep 01 06:33:00 AM UTC 24 |
3886571205 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_tx_rx.2650217765 |
|
|
Sep 01 06:31:57 AM UTC 24 |
Sep 01 06:33:09 AM UTC 24 |
102279911488 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_noise_filter.2863913812 |
|
|
Sep 01 06:31:33 AM UTC 24 |
Sep 01 06:33:09 AM UTC 24 |
293782315677 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_fifo_full.1854536963 |
|
|
Sep 01 06:32:23 AM UTC 24 |
Sep 01 06:33:14 AM UTC 24 |
72228089813 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_fifo_reset.450811622 |
|
|
Sep 01 06:32:54 AM UTC 24 |
Sep 01 06:33:18 AM UTC 24 |
43834199185 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_smoke.2384262736 |
|
|
Sep 01 06:32:52 AM UTC 24 |
Sep 01 06:33:19 AM UTC 24 |
5852820500 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_perf.1693545167 |
|
|
Sep 01 06:28:08 AM UTC 24 |
Sep 01 06:33:21 AM UTC 24 |
18516282432 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_loopback.4252867990 |
|
|
Sep 01 06:33:20 AM UTC 24 |
Sep 01 06:33:21 AM UTC 24 |
26115490 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_noise_filter.1284034104 |
|
|
Sep 01 06:32:29 AM UTC 24 |
Sep 01 06:33:24 AM UTC 24 |
161984348196 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_perf.525508176 |
|
|
Sep 01 06:27:45 AM UTC 24 |
Sep 01 06:33:28 AM UTC 24 |
18449240968 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_rx_oversample.2369621335 |
|
|
Sep 01 06:32:59 AM UTC 24 |
Sep 01 06:33:29 AM UTC 24 |
5359357214 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_fifo_reset.1436536056 |
|
|
Sep 01 06:32:26 AM UTC 24 |
Sep 01 06:33:30 AM UTC 24 |
82182281100 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.2764243051 |
|
|
Sep 01 06:32:54 AM UTC 24 |
Sep 01 06:33:31 AM UTC 24 |
18617514528 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_alert_test.1564013600 |
|
|
Sep 01 06:33:30 AM UTC 24 |
Sep 01 06:33:32 AM UTC 24 |
13249395 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_smoke.2233238454 |
|
|
Sep 01 06:33:31 AM UTC 24 |
Sep 01 06:33:34 AM UTC 24 |
569169883 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_noise_filter.3701590177 |
|
|
Sep 01 06:32:02 AM UTC 24 |
Sep 01 06:33:35 AM UTC 24 |
106409213250 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_fifo_full.4196197276 |
|
|
Sep 01 06:32:54 AM UTC 24 |
Sep 01 06:33:38 AM UTC 24 |
12475342798 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.18969998 |
|
|
Sep 01 06:33:09 AM UTC 24 |
Sep 01 06:33:42 AM UTC 24 |
47302171994 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_stress_all.1188698704 |
|
|
Sep 01 06:32:20 AM UTC 24 |
Sep 01 06:33:42 AM UTC 24 |
61865316017 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.34039287 |
|
|
Sep 01 06:31:31 AM UTC 24 |
Sep 01 06:33:49 AM UTC 24 |
74700166989 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.3166567482 |
|
|
Sep 01 06:33:25 AM UTC 24 |
Sep 01 06:33:51 AM UTC 24 |
3160577036 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.1450855495 |
|
|
Sep 01 06:33:50 AM UTC 24 |
Sep 01 06:33:53 AM UTC 24 |
5794088384 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_perf.1343830997 |
|
|
Sep 01 06:30:51 AM UTC 24 |
Sep 01 06:33:54 AM UTC 24 |
18867927300 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_rx_parity_err.2682141363 |
|
|
Sep 01 06:28:57 AM UTC 24 |
Sep 01 06:33:54 AM UTC 24 |
131812216842 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.593485813 |
|
|
Sep 01 06:33:18 AM UTC 24 |
Sep 01 06:33:56 AM UTC 24 |
6221030253 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.1615892110 |
|
|
Sep 01 06:33:54 AM UTC 24 |
Sep 01 06:33:58 AM UTC 24 |
2192139989 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.1248477505 |
|
|
Sep 01 06:28:36 AM UTC 24 |
Sep 01 06:34:00 AM UTC 24 |
76816083834 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.1526461541 |
|
|
Sep 01 06:32:26 AM UTC 24 |
Sep 01 06:34:01 AM UTC 24 |
94578924736 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_tx_rx.3974709428 |
|
|
Sep 01 06:33:32 AM UTC 24 |
Sep 01 06:34:04 AM UTC 24 |
37216279642 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_alert_test.2177419503 |
|
|
Sep 01 06:34:02 AM UTC 24 |
Sep 01 06:34:04 AM UTC 24 |
13588939 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_intr.3046084625 |
|
|
Sep 01 06:33:01 AM UTC 24 |
Sep 01 06:34:05 AM UTC 24 |
18214956774 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_fifo_full.3207620542 |
|
|
Sep 01 06:33:33 AM UTC 24 |
Sep 01 06:34:06 AM UTC 24 |
19420122231 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.4216113710 |
|
|
Sep 01 06:32:47 AM UTC 24 |
Sep 01 06:34:08 AM UTC 24 |
15369998748 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_smoke.2490986954 |
|
|
Sep 01 06:34:05 AM UTC 24 |
Sep 01 06:34:08 AM UTC 24 |
770691123 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_loopback.1637760140 |
|
|
Sep 01 06:33:55 AM UTC 24 |
Sep 01 06:34:09 AM UTC 24 |
10536090044 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_stress_all.3193378786 |
|
|
Sep 01 06:26:36 AM UTC 24 |
Sep 01 06:34:12 AM UTC 24 |
256158895809 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_stress_all.2044118709 |
|
|
Sep 01 06:26:15 AM UTC 24 |
Sep 01 06:34:15 AM UTC 24 |
487663572845 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_noise_filter.1394419484 |
|
|
Sep 01 06:33:44 AM UTC 24 |
Sep 01 06:34:17 AM UTC 24 |
71199641792 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_fifo_reset.1189806371 |
|
|
Sep 01 06:31:31 AM UTC 24 |
Sep 01 06:34:19 AM UTC 24 |
113867678922 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.748532052 |
|
|
Sep 01 06:27:49 AM UTC 24 |
Sep 01 06:34:21 AM UTC 24 |
77937786375 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_tx_rx.877455564 |
|
|
Sep 01 06:32:53 AM UTC 24 |
Sep 01 06:34:26 AM UTC 24 |
383258605379 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.380338402 |
|
|
Sep 01 06:34:20 AM UTC 24 |
Sep 01 06:34:26 AM UTC 24 |
960328497 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.331266349 |
|
|
Sep 01 06:27:14 AM UTC 24 |
Sep 01 06:34:28 AM UTC 24 |
72574728228 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.511750841 |
|
|
Sep 01 06:34:16 AM UTC 24 |
Sep 01 06:34:28 AM UTC 24 |
2448570027 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_alert_test.1976469336 |
|
|
Sep 01 06:34:29 AM UTC 24 |
Sep 01 06:34:31 AM UTC 24 |
45122243 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_intr.2360259107 |
|
|
Sep 01 06:32:29 AM UTC 24 |
Sep 01 06:34:32 AM UTC 24 |
63953078405 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_loopback.3918401555 |
|
|
Sep 01 06:34:22 AM UTC 24 |
Sep 01 06:34:35 AM UTC 24 |
5921149457 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_tx_rx.187103590 |
|
|
Sep 01 06:32:23 AM UTC 24 |
Sep 01 06:34:35 AM UTC 24 |
44335337029 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_perf.1106809408 |
|
|
Sep 01 06:29:57 AM UTC 24 |
Sep 01 06:34:35 AM UTC 24 |
16668288865 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_smoke.2562936517 |
|
|
Sep 01 06:34:32 AM UTC 24 |
Sep 01 06:34:36 AM UTC 24 |
504303448 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.2190935477 |
|
|
Sep 01 06:33:52 AM UTC 24 |
Sep 01 06:34:40 AM UTC 24 |
26305555343 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_stress_all.1492231088 |
|
|
Sep 01 06:25:54 AM UTC 24 |
Sep 01 06:34:41 AM UTC 24 |
120903283013 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_rx_oversample.2902099220 |
|
|
Sep 01 06:33:38 AM UTC 24 |
Sep 01 06:34:41 AM UTC 24 |
5158324089 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_stress_all.2855492711 |
|
|
Sep 01 06:32:47 AM UTC 24 |
Sep 01 06:34:43 AM UTC 24 |
28574412031 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.3689073583 |
|
|
Sep 01 06:33:59 AM UTC 24 |
Sep 01 06:34:44 AM UTC 24 |
3876576400 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_rx_oversample.991499710 |
|
|
Sep 01 06:34:37 AM UTC 24 |
Sep 01 06:34:45 AM UTC 24 |
3563136100 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_intr.478654592 |
|
|
Sep 01 06:33:44 AM UTC 24 |
Sep 01 06:34:48 AM UTC 24 |
31799686390 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_noise_filter.1261174392 |
|
|
Sep 01 06:34:42 AM UTC 24 |
Sep 01 06:34:49 AM UTC 24 |
1533364020 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.175843646 |
|
|
Sep 01 06:34:45 AM UTC 24 |
Sep 01 06:34:50 AM UTC 24 |
716470020 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.3047180887 |
|
|
Sep 01 06:34:42 AM UTC 24 |
Sep 01 06:34:50 AM UTC 24 |
3992756220 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.3319869621 |
|
|
Sep 01 06:34:07 AM UTC 24 |
Sep 01 06:34:56 AM UTC 24 |
215244671403 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_perf.479056225 |
|
|
Sep 01 06:34:49 AM UTC 24 |
Sep 01 06:34:56 AM UTC 24 |
2289774380 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_rx_oversample.3656267261 |
|
|
Sep 01 06:34:09 AM UTC 24 |
Sep 01 06:34:56 AM UTC 24 |
5590914679 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_fifo_full.3316033524 |
|
|
Sep 01 06:34:06 AM UTC 24 |
Sep 01 06:34:57 AM UTC 24 |
58659226984 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_alert_test.246431330 |
|
|
Sep 01 06:34:56 AM UTC 24 |
Sep 01 06:34:58 AM UTC 24 |
14810084 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.3163587519 |
|
|
Sep 01 06:33:35 AM UTC 24 |
Sep 01 06:34:59 AM UTC 24 |
46581754407 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_smoke.1346398849 |
|
|
Sep 01 06:34:56 AM UTC 24 |
Sep 01 06:34:59 AM UTC 24 |
320618371 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_loopback.2357318032 |
|
|
Sep 01 06:34:46 AM UTC 24 |
Sep 01 06:35:02 AM UTC 24 |
7535313745 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_fifo_full.448661049 |
|
|
Sep 01 06:27:34 AM UTC 24 |
Sep 01 06:35:05 AM UTC 24 |
195127253103 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_fifo_full.848584370 |
|
|
Sep 01 06:27:23 AM UTC 24 |
Sep 01 06:35:06 AM UTC 24 |
217880450029 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.3255062994 |
|
|
Sep 01 06:34:27 AM UTC 24 |
Sep 01 06:35:10 AM UTC 24 |
3536421009 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_stress_all.3871492176 |
|
|
Sep 01 06:34:51 AM UTC 24 |
Sep 01 06:35:11 AM UTC 24 |
87194167393 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_tx_rx.3124053583 |
|
|
Sep 01 06:34:06 AM UTC 24 |
Sep 01 06:35:15 AM UTC 24 |
56166816932 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.4135871573 |
|
|
Sep 01 06:35:12 AM UTC 24 |
Sep 01 06:35:16 AM UTC 24 |
2106649266 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.2500704315 |
|
|
Sep 01 06:34:51 AM UTC 24 |
Sep 01 06:35:16 AM UTC 24 |
7442490666 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_rx_oversample.100487256 |
|
|
Sep 01 06:35:00 AM UTC 24 |
Sep 01 06:35:17 AM UTC 24 |
4777047921 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_fifo_reset.2413298988 |
|
|
Sep 01 06:33:35 AM UTC 24 |
Sep 01 06:35:17 AM UTC 24 |
62268468500 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_noise_filter.2817428431 |
|
|
Sep 01 06:33:09 AM UTC 24 |
Sep 01 06:35:22 AM UTC 24 |
229579392547 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_alert_test.1363097979 |
|
|
Sep 01 06:35:23 AM UTC 24 |
Sep 01 06:35:25 AM UTC 24 |
17003754 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_loopback.92542864 |
|
|
Sep 01 06:35:15 AM UTC 24 |
Sep 01 06:35:28 AM UTC 24 |
2657598517 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_fifo_reset.3838986466 |
|
|
Sep 01 06:34:09 AM UTC 24 |
Sep 01 06:35:28 AM UTC 24 |
26791891487 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_intr.3442612940 |
|
|
Sep 01 06:35:03 AM UTC 24 |
Sep 01 06:35:29 AM UTC 24 |
25482717126 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_perf.2749289550 |
|
|
Sep 01 06:33:22 AM UTC 24 |
Sep 01 06:35:31 AM UTC 24 |
5368056736 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_fifo_full.1419516226 |
|
|
Sep 01 06:34:35 AM UTC 24 |
Sep 01 06:35:34 AM UTC 24 |
260454639140 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_stress_all.2405843983 |
|
|
Sep 01 06:34:00 AM UTC 24 |
Sep 01 06:35:35 AM UTC 24 |
174930295295 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_stress_all.167488022 |
|
|
Sep 01 06:33:29 AM UTC 24 |
Sep 01 06:35:37 AM UTC 24 |
75426016486 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.1898850807 |
|
|
Sep 01 06:34:45 AM UTC 24 |
Sep 01 06:35:44 AM UTC 24 |
26737764954 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_tx_rx.1843278933 |
|
|
Sep 01 06:34:32 AM UTC 24 |
Sep 01 06:35:51 AM UTC 24 |
135287804003 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_intr.4004351021 |
|
|
Sep 01 06:34:40 AM UTC 24 |
Sep 01 06:35:51 AM UTC 24 |
51955643726 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.863030872 |
|
|
Sep 01 06:35:52 AM UTC 24 |
Sep 01 06:35:55 AM UTC 24 |
1637651037 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.3062621955 |
|
|
Sep 01 06:33:57 AM UTC 24 |
Sep 01 06:35:56 AM UTC 24 |
121375455299 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.3625849092 |
|
|
Sep 01 06:35:18 AM UTC 24 |
Sep 01 06:35:58 AM UTC 24 |
26012091219 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.3748223020 |
|
|
Sep 01 06:33:23 AM UTC 24 |
Sep 01 06:36:02 AM UTC 24 |
64422394686 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_smoke.702412999 |
|
|
Sep 01 06:35:26 AM UTC 24 |
Sep 01 06:36:04 AM UTC 24 |
6050096276 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_noise_filter.1406701520 |
|
|
Sep 01 06:34:13 AM UTC 24 |
Sep 01 06:36:04 AM UTC 24 |
77235517856 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.2509045440 |
|
|
Sep 01 06:35:44 AM UTC 24 |
Sep 01 06:36:05 AM UTC 24 |
4762674383 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.2183810012 |
|
|
Sep 01 06:31:48 AM UTC 24 |
Sep 01 06:36:05 AM UTC 24 |
120657715160 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.545942538 |
|
|
Sep 01 06:35:11 AM UTC 24 |
Sep 01 06:36:06 AM UTC 24 |
27107386628 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_alert_test.3599741350 |
|
|
Sep 01 06:36:05 AM UTC 24 |
Sep 01 06:36:07 AM UTC 24 |
21518823 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_perf.540078471 |
|
|
Sep 01 06:26:32 AM UTC 24 |
Sep 01 06:36:16 AM UTC 24 |
18777306284 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_tx_rx.4212001387 |
|
|
Sep 01 06:36:06 AM UTC 24 |
Sep 01 06:36:18 AM UTC 24 |
5401572433 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.4162319873 |
|
|
Sep 01 06:35:52 AM UTC 24 |
Sep 01 06:36:19 AM UTC 24 |
50577861573 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_loopback.2165508988 |
|
|
Sep 01 06:35:56 AM UTC 24 |
Sep 01 06:36:23 AM UTC 24 |
8838871523 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_noise_filter.2660085717 |
|
|
Sep 01 06:35:06 AM UTC 24 |
Sep 01 06:36:27 AM UTC 24 |
20023674432 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_fifo_full.2568493709 |
|
|
Sep 01 06:34:58 AM UTC 24 |
Sep 01 06:36:27 AM UTC 24 |
25906937700 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_stress_all.3706861858 |
|
|
Sep 01 06:28:37 AM UTC 24 |
Sep 01 06:36:28 AM UTC 24 |
254202650426 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_fifo_full.1419621761 |
|
|
Sep 01 06:36:07 AM UTC 24 |
Sep 01 06:36:31 AM UTC 24 |
24740128694 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.2307771292 |
|
|
Sep 01 06:35:07 AM UTC 24 |
Sep 01 06:36:33 AM UTC 24 |
37895683503 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.643555169 |
|
|
Sep 01 06:32:13 AM UTC 24 |
Sep 01 06:36:33 AM UTC 24 |
79421591675 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.3175279196 |
|
|
Sep 01 06:36:03 AM UTC 24 |
Sep 01 06:36:34 AM UTC 24 |
2266293870 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.2026761074 |
|
|
Sep 01 06:36:28 AM UTC 24 |
Sep 01 06:36:35 AM UTC 24 |
3037220396 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_fifo_reset.3655571944 |
|
|
Sep 01 06:35:31 AM UTC 24 |
Sep 01 06:36:40 AM UTC 24 |
104262714882 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_smoke.751347587 |
|
|
Sep 01 06:36:05 AM UTC 24 |
Sep 01 06:36:40 AM UTC 24 |
5374255024 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.907399437 |
|
|
Sep 01 06:26:11 AM UTC 24 |
Sep 01 06:36:40 AM UTC 24 |
104886742626 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_rx_oversample.371769437 |
|
|
Sep 01 06:35:34 AM UTC 24 |
Sep 01 06:36:41 AM UTC 24 |
6692010476 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_alert_test.159087697 |
|
|
Sep 01 06:36:41 AM UTC 24 |
Sep 01 06:36:43 AM UTC 24 |
17387085 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_stress_all.3966509334 |
|
|
Sep 01 06:25:19 AM UTC 24 |
Sep 01 06:37:05 AM UTC 24 |
373827535620 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_smoke.2714510119 |
|
|
Sep 01 06:36:41 AM UTC 24 |
Sep 01 06:36:44 AM UTC 24 |
523104260 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_loopback.1628019314 |
|
|
Sep 01 06:36:31 AM UTC 24 |
Sep 01 06:36:45 AM UTC 24 |
3025622840 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.1587513714 |
|
|
Sep 01 06:32:38 AM UTC 24 |
Sep 01 06:36:46 AM UTC 24 |
112561351657 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_rx_oversample.3947384630 |
|
|
Sep 01 06:36:20 AM UTC 24 |
Sep 01 06:36:46 AM UTC 24 |
7748818530 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.2882670291 |
|
|
Sep 01 06:35:30 AM UTC 24 |
Sep 01 06:36:46 AM UTC 24 |
21839320082 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.3086462421 |
|
|
Sep 01 06:36:28 AM UTC 24 |
Sep 01 06:36:48 AM UTC 24 |
7930857813 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.3233063274 |
|
|
Sep 01 06:36:47 AM UTC 24 |
Sep 01 06:37:05 AM UTC 24 |
4138370718 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.2732878723 |
|
|
Sep 01 06:36:29 AM UTC 24 |
Sep 01 06:36:49 AM UTC 24 |
6269841405 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.1860001373 |
|
|
Sep 01 06:36:49 AM UTC 24 |
Sep 01 06:36:53 AM UTC 24 |
1847182375 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_fifo_reset.811961612 |
|
|
Sep 01 06:36:17 AM UTC 24 |
Sep 01 06:37:00 AM UTC 24 |
45372194606 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_rx_oversample.1169629590 |
|
|
Sep 01 06:36:46 AM UTC 24 |
Sep 01 06:37:05 AM UTC 24 |
5830788021 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_intr.3665514512 |
|
|
Sep 01 06:36:46 AM UTC 24 |
Sep 01 06:37:08 AM UTC 24 |
21931823977 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_noise_filter.2056231620 |
|
|
Sep 01 06:35:37 AM UTC 24 |
Sep 01 06:37:09 AM UTC 24 |
96706005280 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_alert_test.2057103850 |
|
|
Sep 01 06:37:08 AM UTC 24 |
Sep 01 06:37:10 AM UTC 24 |
214619278 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_perf.3481513521 |
|
|
Sep 01 06:34:26 AM UTC 24 |
Sep 01 06:37:12 AM UTC 24 |
14844625754 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_smoke.3710807022 |
|
|
Sep 01 06:37:09 AM UTC 24 |
Sep 01 06:37:12 AM UTC 24 |
503283274 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.399594423 |
|
|
Sep 01 06:36:49 AM UTC 24 |
Sep 01 06:37:12 AM UTC 24 |
56848010260 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_tx_rx.840714331 |
|
|
Sep 01 06:36:41 AM UTC 24 |
Sep 01 06:37:13 AM UTC 24 |
68858000076 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.2687144139 |
|
|
Sep 01 06:25:52 AM UTC 24 |
Sep 01 06:37:16 AM UTC 24 |
99482075904 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_tx_rx.4153917260 |
|
|
Sep 01 06:34:57 AM UTC 24 |
Sep 01 06:37:16 AM UTC 24 |
50600999616 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.3788508282 |
|
|
Sep 01 06:31:24 AM UTC 24 |
Sep 01 06:37:17 AM UTC 24 |
123362187976 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.265701427 |
|
|
Sep 01 06:33:15 AM UTC 24 |
Sep 01 06:37:21 AM UTC 24 |
235105018508 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_loopback.2581749319 |
|
|
Sep 01 06:36:55 AM UTC 24 |
Sep 01 06:37:23 AM UTC 24 |
6817793609 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.1089756017 |
|
|
Sep 01 06:37:18 AM UTC 24 |
Sep 01 06:37:24 AM UTC 24 |
4595292048 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_fifo_reset.1605463941 |
|
|
Sep 01 06:37:13 AM UTC 24 |
Sep 01 06:37:24 AM UTC 24 |
25406393087 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_noise_filter.304630028 |
|
|
Sep 01 06:36:24 AM UTC 24 |
Sep 01 06:37:24 AM UTC 24 |
86230458308 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_fifo_full.520575614 |
|
|
Sep 01 06:36:42 AM UTC 24 |
Sep 01 06:37:29 AM UTC 24 |
114200750996 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.2727905423 |
|
|
Sep 01 06:34:59 AM UTC 24 |
Sep 01 06:37:30 AM UTC 24 |
41958408179 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.2317907407 |
|
|
Sep 01 06:37:24 AM UTC 24 |
Sep 01 06:37:30 AM UTC 24 |
765999467 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_stress_all.1091057065 |
|
|
Sep 01 06:36:05 AM UTC 24 |
Sep 01 06:37:33 AM UTC 24 |
49888831347 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_alert_test.3102956619 |
|
|
Sep 01 06:37:31 AM UTC 24 |
Sep 01 06:37:33 AM UTC 24 |
29592153 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_noise_filter.2690432175 |
|
|
Sep 01 06:36:47 AM UTC 24 |
Sep 01 06:37:35 AM UTC 24 |
56738340335 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.1951551280 |
|
|
Sep 01 06:36:07 AM UTC 24 |
Sep 01 06:37:39 AM UTC 24 |
75205895132 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.987301480 |
|
|
Sep 01 06:34:36 AM UTC 24 |
Sep 01 06:37:40 AM UTC 24 |
104607484603 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_tx_rx.2799633844 |
|
|
Sep 01 06:37:11 AM UTC 24 |
Sep 01 06:37:41 AM UTC 24 |
113559217234 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_intr.45809327 |
|
|
Sep 01 06:36:20 AM UTC 24 |
Sep 01 06:37:41 AM UTC 24 |
58276393877 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.79920536 |
|
|
Sep 01 06:37:06 AM UTC 24 |
Sep 01 06:37:45 AM UTC 24 |
6438835951 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.2382029152 |
|
|
Sep 01 06:31:58 AM UTC 24 |
Sep 01 06:37:56 AM UTC 24 |
113736307327 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_tx_rx.3429002497 |
|
|
Sep 01 06:37:35 AM UTC 24 |
Sep 01 06:37:58 AM UTC 24 |
11421493800 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.4043868665 |
|
|
Sep 01 06:36:34 AM UTC 24 |
Sep 01 06:38:01 AM UTC 24 |
6249086529 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_loopback.4261047530 |
|
|
Sep 01 06:37:25 AM UTC 24 |
Sep 01 06:38:04 AM UTC 24 |
8316192289 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_noise_filter.4238448026 |
|
|
Sep 01 06:37:17 AM UTC 24 |
Sep 01 06:38:05 AM UTC 24 |
129995986376 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_smoke.4077504646 |
|
|
Sep 01 06:37:33 AM UTC 24 |
Sep 01 06:38:10 AM UTC 24 |
5994629174 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_intr.713584590 |
|
|
Sep 01 06:32:00 AM UTC 24 |
Sep 01 06:38:13 AM UTC 24 |
257856014398 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.903845255 |
|
|
Sep 01 06:38:02 AM UTC 24 |
Sep 01 06:38:13 AM UTC 24 |
11105928550 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_loopback.827339365 |
|
|
Sep 01 06:38:05 AM UTC 24 |
Sep 01 06:38:15 AM UTC 24 |
6113726699 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_intr.976258512 |
|
|
Sep 01 06:37:17 AM UTC 24 |
Sep 01 06:38:15 AM UTC 24 |
37151813431 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_alert_test.400214652 |
|
|
Sep 01 06:38:16 AM UTC 24 |
Sep 01 06:38:18 AM UTC 24 |
30163294 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_rx_oversample.1374482327 |
|
|
Sep 01 06:37:42 AM UTC 24 |
Sep 01 06:38:18 AM UTC 24 |
4847439647 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.3898293132 |
|
|
Sep 01 06:34:18 AM UTC 24 |
Sep 01 06:38:18 AM UTC 24 |
199951522642 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_fifo_reset.1718424290 |
|
|
Sep 01 06:34:36 AM UTC 24 |
Sep 01 06:38:19 AM UTC 24 |
138786080820 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_smoke.2733486930 |
|
|
Sep 01 06:38:16 AM UTC 24 |
Sep 01 06:38:22 AM UTC 24 |
843707399 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.3414093452 |
|
|
Sep 01 06:37:13 AM UTC 24 |
Sep 01 06:38:28 AM UTC 24 |
102828845087 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.2431819400 |
|
|
Sep 01 06:37:57 AM UTC 24 |
Sep 01 06:38:30 AM UTC 24 |
44751629026 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_rx_oversample.3225623649 |
|
|
Sep 01 06:37:15 AM UTC 24 |
Sep 01 06:38:32 AM UTC 24 |
6463104668 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.1256546866 |
|
|
Sep 01 06:38:33 AM UTC 24 |
Sep 01 06:38:36 AM UTC 24 |
4395928286 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_rx_oversample.936941414 |
|
|
Sep 01 06:38:22 AM UTC 24 |
Sep 01 06:38:48 AM UTC 24 |
6648072432 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_fifo_reset.863139649 |
|
|
Sep 01 06:35:00 AM UTC 24 |
Sep 01 06:38:51 AM UTC 24 |
174396819461 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.3617039592 |
|
|
Sep 01 06:38:49 AM UTC 24 |
Sep 01 06:38:54 AM UTC 24 |
1682200608 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_tx_rx.775043549 |
|
|
Sep 01 06:35:29 AM UTC 24 |
Sep 01 06:38:54 AM UTC 24 |
89737982629 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_rx_parity_err.938910605 |
|
|
Sep 01 06:28:27 AM UTC 24 |
Sep 01 06:38:55 AM UTC 24 |
113921805530 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_stress_all.2825989467 |
|
|
Sep 01 06:28:09 AM UTC 24 |
Sep 01 06:38:55 AM UTC 24 |
11688576604 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.3938738348 |
|
|
Sep 01 06:32:46 AM UTC 24 |
Sep 01 06:38:57 AM UTC 24 |
79985365896 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_fifo_full.3065655422 |
|
|
Sep 01 06:38:18 AM UTC 24 |
Sep 01 06:38:57 AM UTC 24 |
35257356518 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_loopback.1961320111 |
|
|
Sep 01 06:38:52 AM UTC 24 |
Sep 01 06:38:58 AM UTC 24 |
7156972495 ps |