| T650 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_alert_test.2281348613 |
|
|
Sep 01 06:38:57 AM UTC 24 |
Sep 01 06:38:59 AM UTC 24 |
27365548 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_smoke.1849915608 |
|
|
Sep 01 06:38:58 AM UTC 24 |
Sep 01 06:39:03 AM UTC 24 |
431371123 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_fifo_reset.4089320797 |
|
|
Sep 01 06:38:20 AM UTC 24 |
Sep 01 06:39:03 AM UTC 24 |
34495708757 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.329488523 |
|
|
Sep 01 06:37:59 AM UTC 24 |
Sep 01 06:39:03 AM UTC 24 |
16754090595 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_fifo_full.22346652 |
|
|
Sep 01 06:37:12 AM UTC 24 |
Sep 01 06:39:07 AM UTC 24 |
94584530504 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.3422059276 |
|
|
Sep 01 06:37:29 AM UTC 24 |
Sep 01 06:39:14 AM UTC 24 |
8225107093 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_tx_rx.4161527609 |
|
|
Sep 01 06:38:18 AM UTC 24 |
Sep 01 06:39:17 AM UTC 24 |
55252323591 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_noise_filter.4066136569 |
|
|
Sep 01 06:38:31 AM UTC 24 |
Sep 01 06:39:17 AM UTC 24 |
135875498557 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_fifo_full.3141363793 |
|
|
Sep 01 06:35:29 AM UTC 24 |
Sep 01 06:39:20 AM UTC 24 |
114168472231 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.4042391497 |
|
|
Sep 01 06:39:17 AM UTC 24 |
Sep 01 06:39:22 AM UTC 24 |
1983567315 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.33246128 |
|
|
Sep 01 06:25:16 AM UTC 24 |
Sep 01 06:39:25 AM UTC 24 |
76107469437 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.58196738 |
|
|
Sep 01 06:38:37 AM UTC 24 |
Sep 01 06:39:30 AM UTC 24 |
25413817983 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.4006358199 |
|
|
Sep 01 06:29:57 AM UTC 24 |
Sep 01 06:39:36 AM UTC 24 |
109517746932 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_fifo_full.3380956394 |
|
|
Sep 01 06:37:37 AM UTC 24 |
Sep 01 06:39:38 AM UTC 24 |
138458188751 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.3482403641 |
|
|
Sep 01 06:38:19 AM UTC 24 |
Sep 01 06:39:40 AM UTC 24 |
20254294788 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_loopback.2394989830 |
|
|
Sep 01 06:39:23 AM UTC 24 |
Sep 01 06:39:42 AM UTC 24 |
4833885952 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_alert_test.3340664301 |
|
|
Sep 01 06:39:41 AM UTC 24 |
Sep 01 06:39:43 AM UTC 24 |
14198494 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_smoke.3176576261 |
|
|
Sep 01 06:39:43 AM UTC 24 |
Sep 01 06:39:46 AM UTC 24 |
567715044 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_perf.3332251118 |
|
|
Sep 01 06:33:55 AM UTC 24 |
Sep 01 06:39:46 AM UTC 24 |
8572977643 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_noise_filter.2446387873 |
|
|
Sep 01 06:39:15 AM UTC 24 |
Sep 01 06:39:47 AM UTC 24 |
8251937627 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.3671974744 |
|
|
Sep 01 06:38:55 AM UTC 24 |
Sep 01 06:39:49 AM UTC 24 |
6164737125 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_fifo_reset.1321196507 |
|
|
Sep 01 06:37:41 AM UTC 24 |
Sep 01 06:39:50 AM UTC 24 |
270246455327 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_perf.3271990828 |
|
|
Sep 01 06:26:10 AM UTC 24 |
Sep 01 06:39:50 AM UTC 24 |
15234616921 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_rx_oversample.774648140 |
|
|
Sep 01 06:39:49 AM UTC 24 |
Sep 01 06:39:53 AM UTC 24 |
3149420162 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_perf.2715923414 |
|
|
Sep 01 06:28:35 AM UTC 24 |
Sep 01 06:39:55 AM UTC 24 |
13102507816 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.4071278069 |
|
|
Sep 01 06:39:37 AM UTC 24 |
Sep 01 06:40:01 AM UTC 24 |
10467420747 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_perf.598869216 |
|
|
Sep 01 06:32:13 AM UTC 24 |
Sep 01 06:40:03 AM UTC 24 |
24816097517 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_fifo_reset.2503934086 |
|
|
Sep 01 06:39:04 AM UTC 24 |
Sep 01 06:40:10 AM UTC 24 |
39814012205 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_rx_oversample.2893747014 |
|
|
Sep 01 06:39:04 AM UTC 24 |
Sep 01 06:40:13 AM UTC 24 |
6508601119 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_fifo_full.3250880202 |
|
|
Sep 01 06:39:00 AM UTC 24 |
Sep 01 06:40:13 AM UTC 24 |
127950328405 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.1514202848 |
|
|
Sep 01 06:39:54 AM UTC 24 |
Sep 01 06:40:14 AM UTC 24 |
4725978978 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.272941468 |
|
|
Sep 01 06:37:06 AM UTC 24 |
Sep 01 06:40:14 AM UTC 24 |
194457094695 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_alert_test.551223313 |
|
|
Sep 01 06:40:15 AM UTC 24 |
Sep 01 06:40:17 AM UTC 24 |
21133160 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_tx_rx.2578114453 |
|
|
Sep 01 06:39:44 AM UTC 24 |
Sep 01 06:40:18 AM UTC 24 |
63229442489 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.3418965628 |
|
|
Sep 01 06:40:02 AM UTC 24 |
Sep 01 06:40:20 AM UTC 24 |
8356776808 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.2486760777 |
|
|
Sep 01 06:35:59 AM UTC 24 |
Sep 01 06:40:21 AM UTC 24 |
84958747280 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_smoke.2263136785 |
|
|
Sep 01 06:40:18 AM UTC 24 |
Sep 01 06:40:22 AM UTC 24 |
454392549 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.119590742 |
|
|
Sep 01 06:39:21 AM UTC 24 |
Sep 01 06:40:22 AM UTC 24 |
12672871480 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.2565781013 |
|
|
Sep 01 06:36:34 AM UTC 24 |
Sep 01 06:40:23 AM UTC 24 |
108145134972 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_intr.2745145080 |
|
|
Sep 01 06:38:29 AM UTC 24 |
Sep 01 06:40:24 AM UTC 24 |
55422193617 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_stress_all.4065607754 |
|
|
Sep 01 06:38:14 AM UTC 24 |
Sep 01 06:40:24 AM UTC 24 |
144050687525 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_fifo_reset.2115378210 |
|
|
Sep 01 06:36:45 AM UTC 24 |
Sep 01 06:40:26 AM UTC 24 |
111724261301 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.3175095901 |
|
|
Sep 01 06:40:25 AM UTC 24 |
Sep 01 06:40:28 AM UTC 24 |
403844773 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_tx_rx.1464580979 |
|
|
Sep 01 06:40:20 AM UTC 24 |
Sep 01 06:40:29 AM UTC 24 |
8020781763 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.338431937 |
|
|
Sep 01 06:39:17 AM UTC 24 |
Sep 01 06:40:38 AM UTC 24 |
39293833040 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_loopback.2068935682 |
|
|
Sep 01 06:40:04 AM UTC 24 |
Sep 01 06:40:39 AM UTC 24 |
11495184364 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.3431407644 |
|
|
Sep 01 06:38:14 AM UTC 24 |
Sep 01 06:40:39 AM UTC 24 |
8851614259 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_rx_oversample.2876701516 |
|
|
Sep 01 06:40:23 AM UTC 24 |
Sep 01 06:40:39 AM UTC 24 |
6038763497 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.3039085603 |
|
|
Sep 01 06:40:29 AM UTC 24 |
Sep 01 06:40:41 AM UTC 24 |
6932568202 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.1813476002 |
|
|
Sep 01 06:30:56 AM UTC 24 |
Sep 01 06:40:43 AM UTC 24 |
69236614736 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_alert_test.1254417519 |
|
|
Sep 01 06:40:42 AM UTC 24 |
Sep 01 06:40:44 AM UTC 24 |
27311394 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_smoke.3662640193 |
|
|
Sep 01 06:40:44 AM UTC 24 |
Sep 01 06:40:47 AM UTC 24 |
305054316 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_loopback.819863900 |
|
|
Sep 01 06:40:29 AM UTC 24 |
Sep 01 06:40:49 AM UTC 24 |
4682419606 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_intr.3493335040 |
|
|
Sep 01 06:39:50 AM UTC 24 |
Sep 01 06:40:52 AM UTC 24 |
29545451602 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.1466984483 |
|
|
Sep 01 06:40:27 AM UTC 24 |
Sep 01 06:40:52 AM UTC 24 |
30471320497 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.1777271314 |
|
|
Sep 01 06:29:14 AM UTC 24 |
Sep 01 06:41:00 AM UTC 24 |
87304756730 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_noise_filter.2645906144 |
|
|
Sep 01 06:39:51 AM UTC 24 |
Sep 01 06:41:00 AM UTC 24 |
17533082354 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_intr.3731087089 |
|
|
Sep 01 06:37:42 AM UTC 24 |
Sep 01 06:41:00 AM UTC 24 |
257806094793 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.3033620764 |
|
|
Sep 01 06:41:02 AM UTC 24 |
Sep 01 06:41:07 AM UTC 24 |
1924893892 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_fifo_full.2282273937 |
|
|
Sep 01 06:39:46 AM UTC 24 |
Sep 01 06:41:08 AM UTC 24 |
147230510760 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.76743022 |
|
|
Sep 01 06:37:22 AM UTC 24 |
Sep 01 06:41:11 AM UTC 24 |
132235897446 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.1901627623 |
|
|
Sep 01 06:40:40 AM UTC 24 |
Sep 01 06:41:12 AM UTC 24 |
2034534100 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_stress_all.1563028026 |
|
|
Sep 01 06:29:57 AM UTC 24 |
Sep 01 06:41:12 AM UTC 24 |
329870664458 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.952082685 |
|
|
Sep 01 06:41:09 AM UTC 24 |
Sep 01 06:41:16 AM UTC 24 |
1054100274 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_tx_rx.2611168868 |
|
|
Sep 01 06:40:45 AM UTC 24 |
Sep 01 06:41:18 AM UTC 24 |
9317636942 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_fifo_full.2345616327 |
|
|
Sep 01 06:40:47 AM UTC 24 |
Sep 01 06:41:20 AM UTC 24 |
13480366557 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_loopback.926184640 |
|
|
Sep 01 06:41:12 AM UTC 24 |
Sep 01 06:41:21 AM UTC 24 |
6595743814 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_perf.1242884802 |
|
|
Sep 01 06:36:33 AM UTC 24 |
Sep 01 06:41:22 AM UTC 24 |
11354460500 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_fifo_reset.3081516969 |
|
|
Sep 01 06:40:52 AM UTC 24 |
Sep 01 06:41:23 AM UTC 24 |
16897869329 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_perf.1980424419 |
|
|
Sep 01 06:25:39 AM UTC 24 |
Sep 01 06:41:23 AM UTC 24 |
14046598621 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_alert_test.166385615 |
|
|
Sep 01 06:41:22 AM UTC 24 |
Sep 01 06:41:23 AM UTC 24 |
15747960 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.3972925110 |
|
|
Sep 01 06:39:57 AM UTC 24 |
Sep 01 06:41:24 AM UTC 24 |
20083618511 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.3289635818 |
|
|
Sep 01 06:40:14 AM UTC 24 |
Sep 01 06:41:25 AM UTC 24 |
16512834413 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_rx_oversample.2678002962 |
|
|
Sep 01 06:40:52 AM UTC 24 |
Sep 01 06:41:25 AM UTC 24 |
5761282869 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_noise_filter.1965791570 |
|
|
Sep 01 06:41:01 AM UTC 24 |
Sep 01 06:41:25 AM UTC 24 |
16198194895 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_smoke.1250053795 |
|
|
Sep 01 06:41:23 AM UTC 24 |
Sep 01 06:41:26 AM UTC 24 |
740017704 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_fifo_reset.92648931 |
|
|
Sep 01 06:39:48 AM UTC 24 |
Sep 01 06:41:30 AM UTC 24 |
51181047727 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_tx_rx.1078473353 |
|
|
Sep 01 06:39:00 AM UTC 24 |
Sep 01 06:41:30 AM UTC 24 |
46935928912 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.3424988049 |
|
|
Sep 01 06:30:26 AM UTC 24 |
Sep 01 06:41:31 AM UTC 24 |
240158920397 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_noise_filter.296463661 |
|
|
Sep 01 06:40:25 AM UTC 24 |
Sep 01 06:41:32 AM UTC 24 |
29361509208 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_rx_oversample.1175693624 |
|
|
Sep 01 06:41:25 AM UTC 24 |
Sep 01 06:41:33 AM UTC 24 |
2664746321 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_stress_all.945790873 |
|
|
Sep 01 06:39:39 AM UTC 24 |
Sep 01 06:41:35 AM UTC 24 |
218940561832 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.3697466457 |
|
|
Sep 01 06:38:12 AM UTC 24 |
Sep 01 06:41:35 AM UTC 24 |
359723952317 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.3100107108 |
|
|
Sep 01 06:37:25 AM UTC 24 |
Sep 01 06:41:36 AM UTC 24 |
35100644636 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.7859015 |
|
|
Sep 01 06:41:31 AM UTC 24 |
Sep 01 06:41:36 AM UTC 24 |
1233283908 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_intr.6151126 |
|
|
Sep 01 06:41:01 AM UTC 24 |
Sep 01 06:41:37 AM UTC 24 |
53309393528 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_intr.3903074122 |
|
|
Sep 01 06:39:07 AM UTC 24 |
Sep 01 06:41:37 AM UTC 24 |
59378657724 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_noise_filter.3544558620 |
|
|
Sep 01 06:37:45 AM UTC 24 |
Sep 01 06:41:37 AM UTC 24 |
140075445884 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_alert_test.1620768602 |
|
|
Sep 01 06:41:36 AM UTC 24 |
Sep 01 06:41:38 AM UTC 24 |
13643893 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_smoke.4261185031 |
|
|
Sep 01 06:41:37 AM UTC 24 |
Sep 01 06:41:41 AM UTC 24 |
467119721 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_loopback.256466977 |
|
|
Sep 01 06:41:31 AM UTC 24 |
Sep 01 06:41:41 AM UTC 24 |
8900624324 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.2349950381 |
|
|
Sep 01 06:41:17 AM UTC 24 |
Sep 01 06:41:42 AM UTC 24 |
1756929340 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_intr.3242624316 |
|
|
Sep 01 06:40:24 AM UTC 24 |
Sep 01 06:41:42 AM UTC 24 |
22144412138 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.2513682038 |
|
|
Sep 01 06:40:50 AM UTC 24 |
Sep 01 06:41:43 AM UTC 24 |
99837993200 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.3203649500 |
|
|
Sep 01 06:37:40 AM UTC 24 |
Sep 01 06:41:45 AM UTC 24 |
137061733280 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.1406226712 |
|
|
Sep 01 06:41:44 AM UTC 24 |
Sep 01 06:41:46 AM UTC 24 |
614760064 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_noise_filter.1024239627 |
|
|
Sep 01 06:41:41 AM UTC 24 |
Sep 01 06:41:47 AM UTC 24 |
2080984208 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_rx_oversample.1792058313 |
|
|
Sep 01 06:41:38 AM UTC 24 |
Sep 01 06:41:47 AM UTC 24 |
4949570375 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.1179885828 |
|
|
Sep 01 06:41:43 AM UTC 24 |
Sep 01 06:41:47 AM UTC 24 |
4762219794 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.3667931436 |
|
|
Sep 01 06:41:26 AM UTC 24 |
Sep 01 06:42:01 AM UTC 24 |
75966773240 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.3413155101 |
|
|
Sep 01 06:39:04 AM UTC 24 |
Sep 01 06:42:02 AM UTC 24 |
121779218085 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.3461477526 |
|
|
Sep 01 06:41:24 AM UTC 24 |
Sep 01 06:42:02 AM UTC 24 |
22669247180 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_fifo_full.2848913468 |
|
|
Sep 01 06:40:21 AM UTC 24 |
Sep 01 06:42:02 AM UTC 24 |
46863785938 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_alert_test.4097491923 |
|
|
Sep 01 06:42:02 AM UTC 24 |
Sep 01 06:42:04 AM UTC 24 |
38242314 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.2507479651 |
|
|
Sep 01 06:41:48 AM UTC 24 |
Sep 01 06:42:04 AM UTC 24 |
2128773472 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_smoke.3962219640 |
|
|
Sep 01 06:42:03 AM UTC 24 |
Sep 01 06:42:06 AM UTC 24 |
715081493 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_noise_filter.2024762266 |
|
|
Sep 01 06:41:26 AM UTC 24 |
Sep 01 06:42:07 AM UTC 24 |
25699115113 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_loopback.1023147299 |
|
|
Sep 01 06:41:46 AM UTC 24 |
Sep 01 06:42:08 AM UTC 24 |
5193369122 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_tx_rx.3358943084 |
|
|
Sep 01 06:41:37 AM UTC 24 |
Sep 01 06:42:13 AM UTC 24 |
62204704649 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.2710085558 |
|
|
Sep 01 06:41:08 AM UTC 24 |
Sep 01 06:42:13 AM UTC 24 |
24477502270 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_fifo_reset.3459058590 |
|
|
Sep 01 06:41:24 AM UTC 24 |
Sep 01 06:42:16 AM UTC 24 |
70100236164 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.3099291833 |
|
|
Sep 01 06:42:14 AM UTC 24 |
Sep 01 06:42:17 AM UTC 24 |
1307713205 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_fifo_full.163615730 |
|
|
Sep 01 06:41:38 AM UTC 24 |
Sep 01 06:42:20 AM UTC 24 |
26365136693 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.2266574280 |
|
|
Sep 01 06:34:49 AM UTC 24 |
Sep 01 06:42:20 AM UTC 24 |
131068368569 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.4273654516 |
|
|
Sep 01 06:42:17 AM UTC 24 |
Sep 01 06:42:23 AM UTC 24 |
2362123902 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/28.uart_stress_all.3789197129 |
|
|
Sep 01 06:36:35 AM UTC 24 |
Sep 01 06:42:24 AM UTC 24 |
534414132252 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.340243662 |
|
|
Sep 01 06:41:26 AM UTC 24 |
Sep 01 06:42:25 AM UTC 24 |
66320043397 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.164936898 |
|
|
Sep 01 06:41:34 AM UTC 24 |
Sep 01 06:42:26 AM UTC 24 |
2843888912 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_alert_test.2443601908 |
|
|
Sep 01 06:42:26 AM UTC 24 |
Sep 01 06:42:28 AM UTC 24 |
78072172 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_rx_oversample.3987047806 |
|
|
Sep 01 06:42:07 AM UTC 24 |
Sep 01 06:42:30 AM UTC 24 |
7270455508 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_smoke.1380498310 |
|
|
Sep 01 06:42:27 AM UTC 24 |
Sep 01 06:42:31 AM UTC 24 |
863653366 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_fifo_full.1943222784 |
|
|
Sep 01 06:41:24 AM UTC 24 |
Sep 01 06:42:33 AM UTC 24 |
117402498212 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_intr.914359953 |
|
|
Sep 01 06:41:41 AM UTC 24 |
Sep 01 06:42:35 AM UTC 24 |
17393313441 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_loopback.39893832 |
|
|
Sep 01 06:42:18 AM UTC 24 |
Sep 01 06:42:42 AM UTC 24 |
5519292368 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_fifo_reset.3927685621 |
|
|
Sep 01 06:41:38 AM UTC 24 |
Sep 01 06:42:47 AM UTC 24 |
173310020283 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.3511411526 |
|
|
Sep 01 06:42:24 AM UTC 24 |
Sep 01 06:42:48 AM UTC 24 |
3140622270 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_intr.2611275885 |
|
|
Sep 01 06:41:26 AM UTC 24 |
Sep 01 06:42:49 AM UTC 24 |
41238247319 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_stress_all.2519808781 |
|
|
Sep 01 06:37:06 AM UTC 24 |
Sep 01 06:42:50 AM UTC 24 |
297144760237 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_long_xfer_wo_dly.3697745654 |
|
|
Sep 01 06:40:13 AM UTC 24 |
Sep 01 06:42:53 AM UTC 24 |
48040268328 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.3306164967 |
|
|
Sep 01 06:42:50 AM UTC 24 |
Sep 01 06:42:54 AM UTC 24 |
747395890 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_long_xfer_wo_dly.3563700335 |
|
|
Sep 01 06:38:54 AM UTC 24 |
Sep 01 06:42:54 AM UTC 24 |
93754530773 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_perf.957325166 |
|
|
Sep 01 06:41:33 AM UTC 24 |
Sep 01 06:42:55 AM UTC 24 |
5211044320 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/21.uart_perf.1980059776 |
|
|
Sep 01 06:32:45 AM UTC 24 |
Sep 01 06:42:55 AM UTC 24 |
10038173319 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_stress_all.3540438971 |
|
|
Sep 01 06:37:31 AM UTC 24 |
Sep 01 06:42:56 AM UTC 24 |
313298661691 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_fifo_overflow.1454434205 |
|
|
Sep 01 06:39:47 AM UTC 24 |
Sep 01 06:42:56 AM UTC 24 |
129514037080 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_tx_rx.3380655222 |
|
|
Sep 01 06:42:28 AM UTC 24 |
Sep 01 06:42:56 AM UTC 24 |
32577404677 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_fifo_reset.1996685893 |
|
|
Sep 01 06:42:06 AM UTC 24 |
Sep 01 06:42:58 AM UTC 24 |
45650195662 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_alert_test.2429262340 |
|
|
Sep 01 06:42:57 AM UTC 24 |
Sep 01 06:42:59 AM UTC 24 |
14840920 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_smoke.2349520169 |
|
|
Sep 01 06:42:57 AM UTC 24 |
Sep 01 06:43:00 AM UTC 24 |
965256674 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_loopback.2766700984 |
|
|
Sep 01 06:42:54 AM UTC 24 |
Sep 01 06:43:04 AM UTC 24 |
6105510850 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_perf.4097711724 |
|
|
Sep 01 06:41:47 AM UTC 24 |
Sep 01 06:43:08 AM UTC 24 |
3489795990 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.282713409 |
|
|
Sep 01 06:42:31 AM UTC 24 |
Sep 01 06:43:09 AM UTC 24 |
13888946925 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_rx_oversample.2564388926 |
|
|
Sep 01 06:42:35 AM UTC 24 |
Sep 01 06:43:10 AM UTC 24 |
3663025272 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_intr.1413389107 |
|
|
Sep 01 06:43:09 AM UTC 24 |
Sep 01 06:43:15 AM UTC 24 |
4106352245 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.3908746194 |
|
|
Sep 01 06:41:43 AM UTC 24 |
Sep 01 06:43:15 AM UTC 24 |
69421600366 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_rx_oversample.1993847593 |
|
|
Sep 01 06:43:05 AM UTC 24 |
Sep 01 06:43:17 AM UTC 24 |
3672646313 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/31.uart_perf.1942438398 |
|
|
Sep 01 06:38:06 AM UTC 24 |
Sep 01 06:43:18 AM UTC 24 |
30473190560 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.83313720 |
|
|
Sep 01 06:43:16 AM UTC 24 |
Sep 01 06:43:20 AM UTC 24 |
1814556240 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_fifo_full.1631693708 |
|
|
Sep 01 06:42:31 AM UTC 24 |
Sep 01 06:43:21 AM UTC 24 |
453434282758 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/32.uart_perf.1499886703 |
|
|
Sep 01 06:38:54 AM UTC 24 |
Sep 01 06:43:23 AM UTC 24 |
8197256207 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_perf.300120905 |
|
|
Sep 01 06:40:11 AM UTC 24 |
Sep 01 06:43:23 AM UTC 24 |
32927339194 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_noise_filter.820744824 |
|
|
Sep 01 06:42:09 AM UTC 24 |
Sep 01 06:43:26 AM UTC 24 |
187013842574 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_alert_test.1443226785 |
|
|
Sep 01 06:43:25 AM UTC 24 |
Sep 01 06:43:27 AM UTC 24 |
82305750 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.2811276228 |
|
|
Sep 01 06:42:56 AM UTC 24 |
Sep 01 06:43:28 AM UTC 24 |
4773220825 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_perf.3467247414 |
|
|
Sep 01 06:40:39 AM UTC 24 |
Sep 01 06:43:28 AM UTC 24 |
19365192248 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.3636674501 |
|
|
Sep 01 06:42:51 AM UTC 24 |
Sep 01 06:43:30 AM UTC 24 |
6783989139 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_tx_rx.65341378 |
|
|
Sep 01 06:42:57 AM UTC 24 |
Sep 01 06:43:32 AM UTC 24 |
19503754776 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_fifo_full.1914140882 |
|
|
Sep 01 06:42:03 AM UTC 24 |
Sep 01 06:43:32 AM UTC 24 |
35936392464 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_stress_all.2563060594 |
|
|
Sep 01 06:31:26 AM UTC 24 |
Sep 01 06:43:37 AM UTC 24 |
137816114596 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/26.uart_perf.4244725607 |
|
|
Sep 01 06:35:16 AM UTC 24 |
Sep 01 06:43:39 AM UTC 24 |
26696628445 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_perf.1015753565 |
|
|
Sep 01 06:35:57 AM UTC 24 |
Sep 01 06:43:39 AM UTC 24 |
29882139917 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_loopback.567275069 |
|
|
Sep 01 06:43:17 AM UTC 24 |
Sep 01 06:43:39 AM UTC 24 |
7749312069 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_smoke.1888683853 |
|
|
Sep 01 06:43:27 AM UTC 24 |
Sep 01 06:43:41 AM UTC 24 |
6101498582 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.4241989831 |
|
|
Sep 01 06:43:39 AM UTC 24 |
Sep 01 06:43:43 AM UTC 24 |
4555238423 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_rx_oversample.968948747 |
|
|
Sep 01 06:43:33 AM UTC 24 |
Sep 01 06:43:43 AM UTC 24 |
1377120829 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_loopback.171762036 |
|
|
Sep 01 06:43:43 AM UTC 24 |
Sep 01 06:43:46 AM UTC 24 |
122259809 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.3020183852 |
|
|
Sep 01 06:43:21 AM UTC 24 |
Sep 01 06:43:46 AM UTC 24 |
3194222205 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_fifo_reset.308343191 |
|
|
Sep 01 06:43:31 AM UTC 24 |
Sep 01 06:43:47 AM UTC 24 |
24209669793 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.50568816 |
|
|
Sep 01 06:43:41 AM UTC 24 |
Sep 01 06:43:47 AM UTC 24 |
903877477 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_alert_test.1469534697 |
|
|
Sep 01 06:43:48 AM UTC 24 |
Sep 01 06:43:50 AM UTC 24 |
27499922 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_fifo_full.3456537120 |
|
|
Sep 01 06:42:59 AM UTC 24 |
Sep 01 06:43:52 AM UTC 24 |
33644968791 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_fifo_reset.3300104370 |
|
|
Sep 01 06:42:34 AM UTC 24 |
Sep 01 06:43:52 AM UTC 24 |
75997906460 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_intr.3039812429 |
|
|
Sep 01 06:42:08 AM UTC 24 |
Sep 01 06:43:54 AM UTC 24 |
44119072029 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_smoke.1789258772 |
|
|
Sep 01 06:43:48 AM UTC 24 |
Sep 01 06:43:55 AM UTC 24 |
840873033 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_intr.3481887847 |
|
|
Sep 01 06:43:33 AM UTC 24 |
Sep 01 06:43:56 AM UTC 24 |
22033311040 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/34.uart_stress_all.2368373183 |
|
|
Sep 01 06:40:15 AM UTC 24 |
Sep 01 06:44:00 AM UTC 24 |
95897162372 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_stress_all.1511830801 |
|
|
Sep 01 06:41:36 AM UTC 24 |
Sep 01 06:44:04 AM UTC 24 |
239701478003 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_tx_rx.954968211 |
|
|
Sep 01 06:42:03 AM UTC 24 |
Sep 01 06:44:05 AM UTC 24 |
67009774104 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.3358797230 |
|
|
Sep 01 06:42:14 AM UTC 24 |
Sep 01 06:44:05 AM UTC 24 |
140312763728 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_perf.3148242367 |
|
|
Sep 01 06:39:26 AM UTC 24 |
Sep 01 06:44:07 AM UTC 24 |
23678133231 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.3171969879 |
|
|
Sep 01 06:43:00 AM UTC 24 |
Sep 01 06:44:08 AM UTC 24 |
170731648712 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.4163605102 |
|
|
Sep 01 06:34:27 AM UTC 24 |
Sep 01 06:44:09 AM UTC 24 |
196732780996 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_fifo_reset.2574956350 |
|
|
Sep 01 06:43:01 AM UTC 24 |
Sep 01 06:44:09 AM UTC 24 |
76167155436 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.3197184713 |
|
|
Sep 01 06:44:06 AM UTC 24 |
Sep 01 06:44:11 AM UTC 24 |
3880740857 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_intr.2546582280 |
|
|
Sep 01 06:42:42 AM UTC 24 |
Sep 01 06:44:12 AM UTC 24 |
24320334262 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.180403262 |
|
|
Sep 01 06:44:05 AM UTC 24 |
Sep 01 06:44:13 AM UTC 24 |
1867693892 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_alert_test.1827587076 |
|
|
Sep 01 06:44:13 AM UTC 24 |
Sep 01 06:44:14 AM UTC 24 |
26131711 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_fifo_full.1100262582 |
|
|
Sep 01 06:43:29 AM UTC 24 |
Sep 01 06:44:18 AM UTC 24 |
44697294438 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_smoke.3934101835 |
|
|
Sep 01 06:44:14 AM UTC 24 |
Sep 01 06:44:18 AM UTC 24 |
479061138 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.3114807996 |
|
|
Sep 01 06:43:11 AM UTC 24 |
Sep 01 06:44:28 AM UTC 24 |
42812416160 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_loopback.1555667691 |
|
|
Sep 01 06:44:08 AM UTC 24 |
Sep 01 06:44:29 AM UTC 24 |
5601568910 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.3948995159 |
|
|
Sep 01 06:43:16 AM UTC 24 |
Sep 01 06:44:31 AM UTC 24 |
283618397307 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_rx_parity_err.151227051 |
|
|
Sep 01 06:43:39 AM UTC 24 |
Sep 01 06:44:31 AM UTC 24 |
37075101081 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_noise_filter.1942561167 |
|
|
Sep 01 06:43:38 AM UTC 24 |
Sep 01 06:44:33 AM UTC 24 |
89107950576 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.2053678847 |
|
|
Sep 01 06:44:06 AM UTC 24 |
Sep 01 06:44:34 AM UTC 24 |
52440760438 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_rx_oversample.801702027 |
|
|
Sep 01 06:43:57 AM UTC 24 |
Sep 01 06:44:36 AM UTC 24 |
6316468085 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.2043750126 |
|
|
Sep 01 06:44:36 AM UTC 24 |
Sep 01 06:44:40 AM UTC 24 |
2142325708 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_noise_filter.1034317417 |
|
|
Sep 01 06:42:48 AM UTC 24 |
Sep 01 06:44:40 AM UTC 24 |
381856077735 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/40.uart_stress_all.1320411432 |
|
|
Sep 01 06:42:56 AM UTC 24 |
Sep 01 06:44:44 AM UTC 24 |
321650668001 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_loopback.2520048287 |
|
|
Sep 01 06:44:37 AM UTC 24 |
Sep 01 06:44:45 AM UTC 24 |
5877725075 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_long_xfer_wo_dly.4287790752 |
|
|
Sep 01 06:43:21 AM UTC 24 |
Sep 01 06:44:47 AM UTC 24 |
149419206407 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_alert_test.1305305632 |
|
|
Sep 01 06:44:48 AM UTC 24 |
Sep 01 06:44:50 AM UTC 24 |
12933356 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.3286320731 |
|
|
Sep 01 06:44:33 AM UTC 24 |
Sep 01 06:44:52 AM UTC 24 |
34547744686 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_smoke.704141483 |
|
|
Sep 01 06:44:51 AM UTC 24 |
Sep 01 06:44:53 AM UTC 24 |
123398376 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_tx_rx.584023019 |
|
|
Sep 01 06:43:51 AM UTC 24 |
Sep 01 06:44:55 AM UTC 24 |
29762415614 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.1280539334 |
|
|
Sep 01 06:43:46 AM UTC 24 |
Sep 01 06:44:56 AM UTC 24 |
8781679545 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_tx_rx.2642364935 |
|
|
Sep 01 06:41:24 AM UTC 24 |
Sep 01 06:44:56 AM UTC 24 |
93994586821 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_rx_oversample.3174348533 |
|
|
Sep 01 06:44:30 AM UTC 24 |
Sep 01 06:44:56 AM UTC 24 |
2984045620 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_stress_all_with_rand_reset.2530018224 |
|
|
Sep 01 06:44:44 AM UTC 24 |
Sep 01 06:44:59 AM UTC 24 |
810259655 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.3082970682 |
|
|
Sep 01 06:29:29 AM UTC 24 |
Sep 01 06:45:04 AM UTC 24 |
137268180539 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_intr.3677977495 |
|
|
Sep 01 06:44:32 AM UTC 24 |
Sep 01 06:45:05 AM UTC 24 |
19936728365 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_noise_filter.3783082481 |
|
|
Sep 01 06:44:01 AM UTC 24 |
Sep 01 06:45:06 AM UTC 24 |
78589457864 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_fifo_full.1791586222 |
|
|
Sep 01 06:44:54 AM UTC 24 |
Sep 01 06:45:12 AM UTC 24 |
154608914202 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.510891750 |
|
|
Sep 01 06:44:35 AM UTC 24 |
Sep 01 06:45:14 AM UTC 24 |
45279788220 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_stress_all.409700045 |
|
|
Sep 01 06:41:18 AM UTC 24 |
Sep 01 06:45:16 AM UTC 24 |
82413961683 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/41.uart_perf.1913221598 |
|
|
Sep 01 06:43:18 AM UTC 24 |
Sep 01 06:45:17 AM UTC 24 |
7773939771 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_rx_start_bit_filter.3963816587 |
|
|
Sep 01 06:45:04 AM UTC 24 |
Sep 01 06:45:19 AM UTC 24 |
4053818559 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.4103820737 |
|
|
Sep 01 06:42:05 AM UTC 24 |
Sep 01 06:45:24 AM UTC 24 |
90831867519 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.4256102547 |
|
|
Sep 01 06:45:06 AM UTC 24 |
Sep 01 06:45:26 AM UTC 24 |
6697065443 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_noise_filter.2785506891 |
|
|
Sep 01 06:44:32 AM UTC 24 |
Sep 01 06:45:26 AM UTC 24 |
109525461288 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_alert_test.1706330102 |
|
|
Sep 01 06:45:25 AM UTC 24 |
Sep 01 06:45:27 AM UTC 24 |
19227046 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/36.uart_perf.3229233495 |
|
|
Sep 01 06:41:12 AM UTC 24 |
Sep 01 06:45:30 AM UTC 24 |
8488563655 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/27.uart_intr.2037145037 |
|
|
Sep 01 06:35:35 AM UTC 24 |
Sep 01 06:45:33 AM UTC 24 |
305951385284 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.3026765263 |
|
|
Sep 01 06:44:09 AM UTC 24 |
Sep 01 06:45:38 AM UTC 24 |
19672665967 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_smoke.691954161 |
|
|
Sep 01 06:45:27 AM UTC 24 |
Sep 01 06:45:39 AM UTC 24 |
5366619332 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/35.uart_fifo_reset.107159343 |
|
|
Sep 01 06:40:23 AM UTC 24 |
Sep 01 06:45:42 AM UTC 24 |
123651147197 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_fifo_reset.4270587507 |
|
|
Sep 01 06:44:29 AM UTC 24 |
Sep 01 06:45:43 AM UTC 24 |
111812996650 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_stress_all_with_rand_reset.1959582552 |
|
|
Sep 01 06:45:19 AM UTC 24 |
Sep 01 06:45:44 AM UTC 24 |
12743455123 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.1834468977 |
|
|
Sep 01 06:41:34 AM UTC 24 |
Sep 01 06:45:45 AM UTC 24 |
63687940402 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_loopback.1959161431 |
|
|
Sep 01 06:45:13 AM UTC 24 |
Sep 01 06:45:46 AM UTC 24 |
10452153481 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_fifo_full.1126730956 |
|
|
Sep 01 06:45:27 AM UTC 24 |
Sep 01 06:45:47 AM UTC 24 |
30040017980 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_fifo_full.3384410633 |
|
|
Sep 01 06:43:52 AM UTC 24 |
Sep 01 06:45:48 AM UTC 24 |
75230272126 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_tx_rx.1734180720 |
|
|
Sep 01 06:44:15 AM UTC 24 |
Sep 01 06:45:50 AM UTC 24 |
142924169466 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/42.uart_tx_rx.1598120268 |
|
|
Sep 01 06:43:28 AM UTC 24 |
Sep 01 06:45:53 AM UTC 24 |
59759138829 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_rx_oversample.3620231139 |
|
|
Sep 01 06:44:57 AM UTC 24 |
Sep 01 06:45:54 AM UTC 24 |
6330914197 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_loopback.716390511 |
|
|
Sep 01 06:45:47 AM UTC 24 |
Sep 01 06:45:56 AM UTC 24 |
4618888249 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.3878894583 |
|
|
Sep 01 06:43:53 AM UTC 24 |
Sep 01 06:45:56 AM UTC 24 |
136650779720 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_alert_test.3883483231 |
|
|
Sep 01 06:45:55 AM UTC 24 |
Sep 01 06:45:57 AM UTC 24 |
63069662 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/44.uart_stress_all.1673993904 |
|
|
Sep 01 06:44:46 AM UTC 24 |
Sep 01 06:45:57 AM UTC 24 |
76591903587 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.9186462 |
|
|
Sep 01 06:45:31 AM UTC 24 |
Sep 01 06:45:58 AM UTC 24 |
159334887193 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_intr.3124892430 |
|
|
Sep 01 06:44:57 AM UTC 24 |
Sep 01 06:46:01 AM UTC 24 |
42409221279 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_intr.4290783580 |
|
|
Sep 01 06:45:40 AM UTC 24 |
Sep 01 06:46:01 AM UTC 24 |
20719641390 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_tx_ovrd.1038219351 |
|
|
Sep 01 06:45:46 AM UTC 24 |
Sep 01 06:46:12 AM UTC 24 |
6627618519 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_rx_oversample.4188886200 |
|
|
Sep 01 06:45:39 AM UTC 24 |
Sep 01 06:46:13 AM UTC 24 |
3068368667 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/46.uart_rx_start_bit_filter.2803819518 |
|
|
Sep 01 06:45:44 AM UTC 24 |
Sep 01 06:46:20 AM UTC 24 |
42755753863 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/47.uart_rx_start_bit_filter.4145077822 |
|
|
Sep 01 06:46:13 AM UTC 24 |
Sep 01 06:46:27 AM UTC 24 |
4098498619 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/47.uart_fifo_reset.2972857981 |
|
|
Sep 01 06:45:59 AM UTC 24 |
Sep 01 06:46:30 AM UTC 24 |
36908500493 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/47.uart_rx_oversample.4111222903 |
|
|
Sep 01 06:46:02 AM UTC 24 |
Sep 01 06:46:31 AM UTC 24 |
2970659808 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/47.uart_tx_ovrd.537818086 |
|
|
Sep 01 06:46:27 AM UTC 24 |
Sep 01 06:46:34 AM UTC 24 |
913242598 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/45.uart_fifo_reset.4258042585 |
|
|
Sep 01 06:44:57 AM UTC 24 |
Sep 01 06:46:41 AM UTC 24 |
54953273826 ps |