| T374 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/14.uart_fifo_full.1255216295 |
|
|
Sep 09 06:39:22 AM UTC 24 |
Sep 09 06:41:45 AM UTC 24 |
157247314237 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.356782575 |
|
|
Sep 09 06:40:31 AM UTC 24 |
Sep 09 06:41:46 AM UTC 24 |
79492074355 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_intr.1362169269 |
|
|
Sep 09 06:41:03 AM UTC 24 |
Sep 09 06:41:51 AM UTC 24 |
19275955969 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.3841833366 |
|
|
Sep 09 06:30:56 AM UTC 24 |
Sep 09 06:41:52 AM UTC 24 |
120145966399 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.3976480820 |
|
|
Sep 09 06:40:57 AM UTC 24 |
Sep 09 06:41:52 AM UTC 24 |
61403223649 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.3213922473 |
|
|
Sep 09 06:39:16 AM UTC 24 |
Sep 09 06:41:53 AM UTC 24 |
47068731060 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/8.uart_noise_filter.3566003602 |
|
|
Sep 09 06:34:39 AM UTC 24 |
Sep 09 06:41:53 AM UTC 24 |
162891267223 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/13.uart_intr.1708445820 |
|
|
Sep 09 06:38:53 AM UTC 24 |
Sep 09 06:41:54 AM UTC 24 |
101808719990 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/14.uart_stress_all.1014839286 |
|
|
Sep 09 06:39:58 AM UTC 24 |
Sep 09 06:41:54 AM UTC 24 |
111175265417 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.322264149 |
|
|
Sep 09 06:41:52 AM UTC 24 |
Sep 09 06:41:55 AM UTC 24 |
4490415099 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_tx_rx.4183122473 |
|
|
Sep 09 06:41:36 AM UTC 24 |
Sep 09 06:41:55 AM UTC 24 |
9452616612 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_fifo_full.1278564442 |
|
|
Sep 09 06:41:39 AM UTC 24 |
Sep 09 06:41:57 AM UTC 24 |
49638239609 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.2323529073 |
|
|
Sep 09 06:41:54 AM UTC 24 |
Sep 09 06:41:59 AM UTC 24 |
1874102637 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_alert_test.351728054 |
|
|
Sep 09 06:41:58 AM UTC 24 |
Sep 09 06:42:00 AM UTC 24 |
56497479 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_loopback.155656581 |
|
|
Sep 09 06:41:54 AM UTC 24 |
Sep 09 06:42:00 AM UTC 24 |
2343518695 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_rx_oversample.2679950663 |
|
|
Sep 09 06:41:46 AM UTC 24 |
Sep 09 06:42:01 AM UTC 24 |
2095456323 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.3495158682 |
|
|
Sep 09 06:36:34 AM UTC 24 |
Sep 09 06:42:03 AM UTC 24 |
102854978635 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_fifo_reset.668803895 |
|
|
Sep 09 06:41:46 AM UTC 24 |
Sep 09 06:42:06 AM UTC 24 |
45063032560 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.118072545 |
|
|
Sep 09 06:34:22 AM UTC 24 |
Sep 09 06:42:09 AM UTC 24 |
50428435738 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.481302436 |
|
|
Sep 09 06:41:16 AM UTC 24 |
Sep 09 06:42:09 AM UTC 24 |
15964950303 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.1324222203 |
|
|
Sep 09 06:42:10 AM UTC 24 |
Sep 09 06:42:16 AM UTC 24 |
847788320 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.884036096 |
|
|
Sep 09 06:28:58 AM UTC 24 |
Sep 09 06:42:18 AM UTC 24 |
123235072835 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_smoke.3996928419 |
|
|
Sep 09 06:42:00 AM UTC 24 |
Sep 09 06:42:20 AM UTC 24 |
5534818249 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_fifo_full.2119271398 |
|
|
Sep 09 06:40:50 AM UTC 24 |
Sep 09 06:42:20 AM UTC 24 |
443760088019 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.3139691025 |
|
|
Sep 09 06:41:28 AM UTC 24 |
Sep 09 06:42:21 AM UTC 24 |
6887579788 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.1806422934 |
|
|
Sep 09 06:42:19 AM UTC 24 |
Sep 09 06:42:23 AM UTC 24 |
2183456728 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.1907211017 |
|
|
Sep 09 06:41:55 AM UTC 24 |
Sep 09 06:42:23 AM UTC 24 |
2625943604 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_noise_filter.580225401 |
|
|
Sep 09 06:41:04 AM UTC 24 |
Sep 09 06:42:24 AM UTC 24 |
33004677229 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_alert_test.3894998099 |
|
|
Sep 09 06:42:23 AM UTC 24 |
Sep 09 06:42:25 AM UTC 24 |
39781386 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.1222934273 |
|
|
Sep 09 06:41:53 AM UTC 24 |
Sep 09 06:42:29 AM UTC 24 |
114803936777 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_smoke.4162849065 |
|
|
Sep 09 06:42:24 AM UTC 24 |
Sep 09 06:42:29 AM UTC 24 |
470617582 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_intr.1344852744 |
|
|
Sep 09 06:42:06 AM UTC 24 |
Sep 09 06:42:29 AM UTC 24 |
20598878686 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_loopback.3936526591 |
|
|
Sep 09 06:42:20 AM UTC 24 |
Sep 09 06:42:36 AM UTC 24 |
4505988565 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/15.uart_fifo_full.4039756249 |
|
|
Sep 09 06:40:03 AM UTC 24 |
Sep 09 06:42:43 AM UTC 24 |
174033209038 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_tx_rx.4220394485 |
|
|
Sep 09 06:42:01 AM UTC 24 |
Sep 09 06:42:50 AM UTC 24 |
28123858872 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.4162519772 |
|
|
Sep 09 06:42:30 AM UTC 24 |
Sep 09 06:42:51 AM UTC 24 |
26309503523 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_rx_start_bit_filter.3678724497 |
|
|
Sep 09 06:41:14 AM UTC 24 |
Sep 09 06:42:55 AM UTC 24 |
38826188007 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_rx_oversample.1683727979 |
|
|
Sep 09 06:42:30 AM UTC 24 |
Sep 09 06:43:02 AM UTC 24 |
5867246358 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_stress_all.1847787136 |
|
|
Sep 09 06:41:29 AM UTC 24 |
Sep 09 06:43:02 AM UTC 24 |
221057378819 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_intr.1603525937 |
|
|
Sep 09 06:42:36 AM UTC 24 |
Sep 09 06:43:04 AM UTC 24 |
31808825679 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.75878889 |
|
|
Sep 09 06:42:51 AM UTC 24 |
Sep 09 06:43:04 AM UTC 24 |
3211415881 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_rx_oversample.1473679510 |
|
|
Sep 09 06:42:05 AM UTC 24 |
Sep 09 06:43:04 AM UTC 24 |
6315882238 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.2672599969 |
|
|
Sep 09 06:42:02 AM UTC 24 |
Sep 09 06:43:06 AM UTC 24 |
19566402101 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_alert_test.2081187505 |
|
|
Sep 09 06:43:07 AM UTC 24 |
Sep 09 06:43:09 AM UTC 24 |
14208088 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_tx_rx.1430361517 |
|
|
Sep 09 06:42:25 AM UTC 24 |
Sep 09 06:43:11 AM UTC 24 |
18744095990 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/5.uart_stress_all.716034345 |
|
|
Sep 09 06:32:36 AM UTC 24 |
Sep 09 06:43:12 AM UTC 24 |
134555994047 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_smoke.2198082806 |
|
|
Sep 09 06:43:10 AM UTC 24 |
Sep 09 06:43:14 AM UTC 24 |
435160690 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.402959416 |
|
|
Sep 09 06:42:21 AM UTC 24 |
Sep 09 06:43:16 AM UTC 24 |
20374008564 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.3738793013 |
|
|
Sep 09 06:42:16 AM UTC 24 |
Sep 09 06:43:23 AM UTC 24 |
22236866493 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_fifo_full.1329150761 |
|
|
Sep 09 06:42:01 AM UTC 24 |
Sep 09 06:43:25 AM UTC 24 |
251429336363 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/10.uart_perf.773047669 |
|
|
Sep 09 06:36:26 AM UTC 24 |
Sep 09 06:43:29 AM UTC 24 |
11319057424 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/13.uart_fifo_full.1077586500 |
|
|
Sep 09 06:38:42 AM UTC 24 |
Sep 09 06:43:34 AM UTC 24 |
240049227356 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.2722407168 |
|
|
Sep 09 06:43:05 AM UTC 24 |
Sep 09 06:43:35 AM UTC 24 |
2179503941 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_fifo_reset.1347557991 |
|
|
Sep 09 06:42:03 AM UTC 24 |
Sep 09 06:43:35 AM UTC 24 |
64800904115 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.2898236798 |
|
|
Sep 09 06:43:35 AM UTC 24 |
Sep 09 06:43:39 AM UTC 24 |
765330654 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_loopback.4275591033 |
|
|
Sep 09 06:43:03 AM UTC 24 |
Sep 09 06:43:40 AM UTC 24 |
12517155136 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.1000571814 |
|
|
Sep 09 06:43:36 AM UTC 24 |
Sep 09 06:43:41 AM UTC 24 |
570296929 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_perf.1371614989 |
|
|
Sep 09 06:41:54 AM UTC 24 |
Sep 09 06:43:47 AM UTC 24 |
7729546297 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.666134644 |
|
|
Sep 09 06:42:56 AM UTC 24 |
Sep 09 06:43:49 AM UTC 24 |
12426969335 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_loopback.557075360 |
|
|
Sep 09 06:43:40 AM UTC 24 |
Sep 09 06:43:50 AM UTC 24 |
2990531466 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_alert_test.3692510415 |
|
|
Sep 09 06:43:50 AM UTC 24 |
Sep 09 06:43:52 AM UTC 24 |
147786192 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_smoke.2594771011 |
|
|
Sep 09 06:43:52 AM UTC 24 |
Sep 09 06:43:57 AM UTC 24 |
554004372 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_noise_filter.2664026261 |
|
|
Sep 09 06:42:44 AM UTC 24 |
Sep 09 06:44:14 AM UTC 24 |
150507757179 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.497729193 |
|
|
Sep 09 06:41:39 AM UTC 24 |
Sep 09 06:44:18 AM UTC 24 |
196946906211 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_tx_rx.1493218672 |
|
|
Sep 09 06:43:53 AM UTC 24 |
Sep 09 06:44:19 AM UTC 24 |
17327928596 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_fifo_reset.2813013209 |
|
|
Sep 09 06:43:17 AM UTC 24 |
Sep 09 06:44:24 AM UTC 24 |
93701161677 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.999139783 |
|
|
Sep 09 06:43:36 AM UTC 24 |
Sep 09 06:44:32 AM UTC 24 |
13879407810 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_noise_filter.87113391 |
|
|
Sep 09 06:41:52 AM UTC 24 |
Sep 09 06:44:32 AM UTC 24 |
143258685598 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_rx_oversample.1297385442 |
|
|
Sep 09 06:43:24 AM UTC 24 |
Sep 09 06:44:35 AM UTC 24 |
6547917829 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.2634554785 |
|
|
Sep 09 06:44:32 AM UTC 24 |
Sep 09 06:44:37 AM UTC 24 |
3435755929 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_intr.1304238591 |
|
|
Sep 09 06:44:19 AM UTC 24 |
Sep 09 06:44:39 AM UTC 24 |
40996326077 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.3013926472 |
|
|
Sep 09 06:33:38 AM UTC 24 |
Sep 09 06:44:41 AM UTC 24 |
137755207578 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.2772201332 |
|
|
Sep 09 06:44:36 AM UTC 24 |
Sep 09 06:44:41 AM UTC 24 |
621105420 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_noise_filter.3924759912 |
|
|
Sep 09 06:42:09 AM UTC 24 |
Sep 09 06:44:47 AM UTC 24 |
104927604838 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_alert_test.1375555127 |
|
|
Sep 09 06:44:48 AM UTC 24 |
Sep 09 06:44:50 AM UTC 24 |
111156645 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_smoke.195072167 |
|
|
Sep 09 06:44:50 AM UTC 24 |
Sep 09 06:44:53 AM UTC 24 |
332007365 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_noise_filter.2893963732 |
|
|
Sep 09 06:44:25 AM UTC 24 |
Sep 09 06:44:55 AM UTC 24 |
38657934276 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_rx_oversample.3072083943 |
|
|
Sep 09 06:44:19 AM UTC 24 |
Sep 09 06:44:55 AM UTC 24 |
6096272387 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.2626893114 |
|
|
Sep 09 06:44:32 AM UTC 24 |
Sep 09 06:44:55 AM UTC 24 |
176631298007 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.1018303857 |
|
|
Sep 09 06:43:44 AM UTC 24 |
Sep 09 06:45:05 AM UTC 24 |
2948463974 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_fifo_reset.1457020054 |
|
|
Sep 09 06:42:30 AM UTC 24 |
Sep 09 06:45:06 AM UTC 24 |
136595768909 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_fifo_full.2918075066 |
|
|
Sep 09 06:44:55 AM UTC 24 |
Sep 09 06:45:08 AM UTC 24 |
34941097274 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_intr.3029621616 |
|
|
Sep 09 06:45:05 AM UTC 24 |
Sep 09 06:45:09 AM UTC 24 |
4893460138 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_loopback.3566573383 |
|
|
Sep 09 06:44:38 AM UTC 24 |
Sep 09 06:45:10 AM UTC 24 |
10406536701 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_fifo_full.953020864 |
|
|
Sep 09 06:42:25 AM UTC 24 |
Sep 09 06:45:14 AM UTC 24 |
97839382403 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.3161826138 |
|
|
Sep 09 06:43:15 AM UTC 24 |
Sep 09 06:45:27 AM UTC 24 |
126234581693 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_fifo_full.3770899378 |
|
|
Sep 09 06:43:57 AM UTC 24 |
Sep 09 06:45:28 AM UTC 24 |
43571057738 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.675958123 |
|
|
Sep 09 06:42:21 AM UTC 24 |
Sep 09 06:45:28 AM UTC 24 |
123647651337 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.3583981706 |
|
|
Sep 09 06:45:11 AM UTC 24 |
Sep 09 06:45:28 AM UTC 24 |
9194583150 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.1980158299 |
|
|
Sep 09 06:45:10 AM UTC 24 |
Sep 09 06:45:29 AM UTC 24 |
44936047229 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.3496987445 |
|
|
Sep 09 06:45:10 AM UTC 24 |
Sep 09 06:45:31 AM UTC 24 |
12938413584 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_alert_test.2308183001 |
|
|
Sep 09 06:45:30 AM UTC 24 |
Sep 09 06:45:32 AM UTC 24 |
48221761 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_loopback.1202406488 |
|
|
Sep 09 06:45:15 AM UTC 24 |
Sep 09 06:45:35 AM UTC 24 |
11329837827 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_smoke.715693472 |
|
|
Sep 09 06:45:31 AM UTC 24 |
Sep 09 06:45:36 AM UTC 24 |
658129782 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/11.uart_perf.2093796495 |
|
|
Sep 09 06:37:29 AM UTC 24 |
Sep 09 06:45:38 AM UTC 24 |
32889263419 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.3237942463 |
|
|
Sep 09 06:44:42 AM UTC 24 |
Sep 09 06:45:39 AM UTC 24 |
21227668359 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_rx_oversample.2498763573 |
|
|
Sep 09 06:45:02 AM UTC 24 |
Sep 09 06:45:39 AM UTC 24 |
4828851630 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/2.uart_stress_all.1920672843 |
|
|
Sep 09 06:30:04 AM UTC 24 |
Sep 09 06:45:40 AM UTC 24 |
588690496817 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/13.uart_stress_all.1363333920 |
|
|
Sep 09 06:39:18 AM UTC 24 |
Sep 09 06:45:45 AM UTC 24 |
361101141568 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/12.uart_stress_all.4123315195 |
|
|
Sep 09 06:38:30 AM UTC 24 |
Sep 09 06:45:47 AM UTC 24 |
101103758900 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.811940215 |
|
|
Sep 09 06:45:45 AM UTC 24 |
Sep 09 06:45:52 AM UTC 24 |
3426383368 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.459384079 |
|
|
Sep 09 06:45:48 AM UTC 24 |
Sep 09 06:45:52 AM UTC 24 |
1102426260 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_fifo_reset.1634866292 |
|
|
Sep 09 06:44:56 AM UTC 24 |
Sep 09 06:45:53 AM UTC 24 |
132550423196 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_loopback.1923701062 |
|
|
Sep 09 06:45:53 AM UTC 24 |
Sep 09 06:46:01 AM UTC 24 |
9330659084 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.3913339089 |
|
|
Sep 09 06:45:29 AM UTC 24 |
Sep 09 06:46:01 AM UTC 24 |
2957483988 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_tx_rx.3830697664 |
|
|
Sep 09 06:45:33 AM UTC 24 |
Sep 09 06:46:09 AM UTC 24 |
47570172662 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/11.uart_stress_all.4101487754 |
|
|
Sep 09 06:37:51 AM UTC 24 |
Sep 09 06:46:09 AM UTC 24 |
109898181449 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_rx_oversample.3243060617 |
|
|
Sep 09 06:45:40 AM UTC 24 |
Sep 09 06:46:09 AM UTC 24 |
2960474891 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_alert_test.2481237919 |
|
|
Sep 09 06:46:10 AM UTC 24 |
Sep 09 06:46:11 AM UTC 24 |
15393642 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_smoke.1113292553 |
|
|
Sep 09 06:46:10 AM UTC 24 |
Sep 09 06:46:13 AM UTC 24 |
754599342 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.3928904103 |
|
|
Sep 09 06:44:15 AM UTC 24 |
Sep 09 06:46:13 AM UTC 24 |
107111083880 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.542567280 |
|
|
Sep 09 06:44:55 AM UTC 24 |
Sep 09 06:46:14 AM UTC 24 |
257103451928 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_fifo_reset.391026914 |
|
|
Sep 09 06:44:19 AM UTC 24 |
Sep 09 06:46:17 AM UTC 24 |
33776317043 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/15.uart_noise_filter.2948360279 |
|
|
Sep 09 06:40:21 AM UTC 24 |
Sep 09 06:46:20 AM UTC 24 |
87892180113 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_noise_filter.2748726740 |
|
|
Sep 09 06:45:41 AM UTC 24 |
Sep 09 06:46:24 AM UTC 24 |
41822962479 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_rx_oversample.2681171866 |
|
|
Sep 09 06:46:15 AM UTC 24 |
Sep 09 06:46:24 AM UTC 24 |
1885357016 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.1319329035 |
|
|
Sep 09 06:46:24 AM UTC 24 |
Sep 09 06:46:30 AM UTC 24 |
2109438514 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/15.uart_stress_all.3513067931 |
|
|
Sep 09 06:40:43 AM UTC 24 |
Sep 09 06:46:30 AM UTC 24 |
181835102398 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.2688629746 |
|
|
Sep 09 06:46:26 AM UTC 24 |
Sep 09 06:46:33 AM UTC 24 |
7607214134 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.2604337952 |
|
|
Sep 09 06:45:38 AM UTC 24 |
Sep 09 06:46:34 AM UTC 24 |
138676363741 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_intr.3428455196 |
|
|
Sep 09 06:46:18 AM UTC 24 |
Sep 09 06:46:39 AM UTC 24 |
7024154277 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_loopback.1420483374 |
|
|
Sep 09 06:46:30 AM UTC 24 |
Sep 09 06:46:45 AM UTC 24 |
4966744559 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_fifo_full.92459903 |
|
|
Sep 09 06:45:36 AM UTC 24 |
Sep 09 06:46:47 AM UTC 24 |
33341985347 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_alert_test.466788958 |
|
|
Sep 09 06:46:46 AM UTC 24 |
Sep 09 06:46:48 AM UTC 24 |
20884591 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_tx_rx.1567365830 |
|
|
Sep 09 06:43:12 AM UTC 24 |
Sep 09 06:46:49 AM UTC 24 |
79689708176 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_smoke.1232072664 |
|
|
Sep 09 06:46:48 AM UTC 24 |
Sep 09 06:46:51 AM UTC 24 |
296959387 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.843792410 |
|
|
Sep 09 06:46:01 AM UTC 24 |
Sep 09 06:46:57 AM UTC 24 |
10398430604 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/7.uart_stress_all.3026717902 |
|
|
Sep 09 06:34:28 AM UTC 24 |
Sep 09 06:47:02 AM UTC 24 |
108791078551 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_intr.1021627917 |
|
|
Sep 09 06:45:40 AM UTC 24 |
Sep 09 06:47:02 AM UTC 24 |
39609567364 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.601010981 |
|
|
Sep 09 06:46:25 AM UTC 24 |
Sep 09 06:47:13 AM UTC 24 |
28778111440 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_stress_all.3358943998 |
|
|
Sep 09 06:44:46 AM UTC 24 |
Sep 09 06:47:19 AM UTC 24 |
180866266385 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_fifo_full.819557500 |
|
|
Sep 09 06:46:49 AM UTC 24 |
Sep 09 06:47:21 AM UTC 24 |
140352636481 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_tx_rx.929237926 |
|
|
Sep 09 06:46:49 AM UTC 24 |
Sep 09 06:47:22 AM UTC 24 |
36910049619 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.3047689759 |
|
|
Sep 09 06:47:21 AM UTC 24 |
Sep 09 06:47:24 AM UTC 24 |
7178636380 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/15.uart_perf.3807384599 |
|
|
Sep 09 06:40:38 AM UTC 24 |
Sep 09 06:47:24 AM UTC 24 |
11915315296 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.3219041943 |
|
|
Sep 09 06:47:23 AM UTC 24 |
Sep 09 06:47:25 AM UTC 24 |
304871256 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_noise_filter.1062519116 |
|
|
Sep 09 06:47:14 AM UTC 24 |
Sep 09 06:47:27 AM UTC 24 |
4498963133 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_loopback.1081707400 |
|
|
Sep 09 06:47:24 AM UTC 24 |
Sep 09 06:47:28 AM UTC 24 |
2920556123 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_rx_oversample.1358457170 |
|
|
Sep 09 06:47:03 AM UTC 24 |
Sep 09 06:47:29 AM UTC 24 |
4526314165 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_fifo_full.970240708 |
|
|
Sep 09 06:46:13 AM UTC 24 |
Sep 09 06:47:29 AM UTC 24 |
42432466628 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_alert_test.4087576641 |
|
|
Sep 09 06:47:29 AM UTC 24 |
Sep 09 06:47:31 AM UTC 24 |
131634493 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_smoke.508946119 |
|
|
Sep 09 06:47:30 AM UTC 24 |
Sep 09 06:47:33 AM UTC 24 |
453980390 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_fifo_reset.972163905 |
|
|
Sep 09 06:46:58 AM UTC 24 |
Sep 09 06:47:35 AM UTC 24 |
20495221375 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_noise_filter.3244013624 |
|
|
Sep 09 06:46:20 AM UTC 24 |
Sep 09 06:47:42 AM UTC 24 |
36120733427 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_perf.2751065347 |
|
|
Sep 09 06:45:53 AM UTC 24 |
Sep 09 06:47:54 AM UTC 24 |
19445511557 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.3394810921 |
|
|
Sep 09 06:42:52 AM UTC 24 |
Sep 09 06:47:55 AM UTC 24 |
207747792954 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/14.uart_perf.251097495 |
|
|
Sep 09 06:39:47 AM UTC 24 |
Sep 09 06:47:57 AM UTC 24 |
9241678980 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.1382850071 |
|
|
Sep 09 06:47:22 AM UTC 24 |
Sep 09 06:48:03 AM UTC 24 |
25695598618 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/10.uart_stress_all.3061120420 |
|
|
Sep 09 06:36:41 AM UTC 24 |
Sep 09 06:48:04 AM UTC 24 |
113478929591 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.1045517508 |
|
|
Sep 09 06:31:36 AM UTC 24 |
Sep 09 06:48:07 AM UTC 24 |
133733684284 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_rx_oversample.213365356 |
|
|
Sep 09 06:47:55 AM UTC 24 |
Sep 09 06:48:09 AM UTC 24 |
5392754593 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_tx_rx.1459861253 |
|
|
Sep 09 06:47:32 AM UTC 24 |
Sep 09 06:48:10 AM UTC 24 |
9194306513 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.829588946 |
|
|
Sep 09 06:47:36 AM UTC 24 |
Sep 09 06:48:13 AM UTC 24 |
16167921902 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_loopback.2327841825 |
|
|
Sep 09 06:48:08 AM UTC 24 |
Sep 09 06:48:17 AM UTC 24 |
3181192562 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_stress_all.3873849612 |
|
|
Sep 09 06:47:29 AM UTC 24 |
Sep 09 06:48:18 AM UTC 24 |
42867834082 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_alert_test.1780572470 |
|
|
Sep 09 06:48:19 AM UTC 24 |
Sep 09 06:48:20 AM UTC 24 |
12619464 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.733252875 |
|
|
Sep 09 06:48:07 AM UTC 24 |
Sep 09 06:48:21 AM UTC 24 |
7059018727 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_fifo_reset.4165144043 |
|
|
Sep 09 06:45:40 AM UTC 24 |
Sep 09 06:48:22 AM UTC 24 |
68244293146 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/6.uart_perf.434834814 |
|
|
Sep 09 06:33:36 AM UTC 24 |
Sep 09 06:48:23 AM UTC 24 |
12486687459 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_smoke.11157243 |
|
|
Sep 09 06:48:21 AM UTC 24 |
Sep 09 06:48:23 AM UTC 24 |
90845839 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.3489052237 |
|
|
Sep 09 06:46:14 AM UTC 24 |
Sep 09 06:48:29 AM UTC 24 |
136712461105 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_noise_filter.87692763 |
|
|
Sep 09 06:45:07 AM UTC 24 |
Sep 09 06:48:33 AM UTC 24 |
78590700752 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.3850893530 |
|
|
Sep 09 06:47:27 AM UTC 24 |
Sep 09 06:48:34 AM UTC 24 |
14806327091 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_intr.2289726441 |
|
|
Sep 09 06:47:03 AM UTC 24 |
Sep 09 06:48:37 AM UTC 24 |
49312163360 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_tx_rx.2222727623 |
|
|
Sep 09 06:46:10 AM UTC 24 |
Sep 09 06:48:38 AM UTC 24 |
53880139323 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_perf.1897168064 |
|
|
Sep 09 06:45:28 AM UTC 24 |
Sep 09 06:48:42 AM UTC 24 |
4385555397 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.1478268103 |
|
|
Sep 09 06:48:43 AM UTC 24 |
Sep 09 06:48:49 AM UTC 24 |
870359065 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.3619310248 |
|
|
Sep 09 06:46:35 AM UTC 24 |
Sep 09 06:48:52 AM UTC 24 |
9852143823 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_noise_filter.2675637141 |
|
|
Sep 09 06:43:30 AM UTC 24 |
Sep 09 06:48:53 AM UTC 24 |
107502318703 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.1914902545 |
|
|
Sep 09 06:48:37 AM UTC 24 |
Sep 09 06:48:54 AM UTC 24 |
5427936507 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_rx_oversample.2944298362 |
|
|
Sep 09 06:48:30 AM UTC 24 |
Sep 09 06:48:55 AM UTC 24 |
2548914396 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.3082247838 |
|
|
Sep 09 06:48:24 AM UTC 24 |
Sep 09 06:48:57 AM UTC 24 |
115417088305 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_alert_test.2546375486 |
|
|
Sep 09 06:48:56 AM UTC 24 |
Sep 09 06:48:58 AM UTC 24 |
43612111 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_stress_all.2965419480 |
|
|
Sep 09 06:42:22 AM UTC 24 |
Sep 09 06:49:02 AM UTC 24 |
518645961001 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.3820102006 |
|
|
Sep 09 06:43:41 AM UTC 24 |
Sep 09 06:49:02 AM UTC 24 |
171733353888 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.1361622562 |
|
|
Sep 09 06:48:38 AM UTC 24 |
Sep 09 06:49:04 AM UTC 24 |
43095355013 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_perf.2849696617 |
|
|
Sep 09 06:47:25 AM UTC 24 |
Sep 09 06:49:10 AM UTC 24 |
6152851220 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_smoke.1699044215 |
|
|
Sep 09 06:48:58 AM UTC 24 |
Sep 09 06:49:15 AM UTC 24 |
5383931224 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_perf.1927923304 |
|
|
Sep 09 06:43:41 AM UTC 24 |
Sep 09 06:49:16 AM UTC 24 |
27308980237 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.794080413 |
|
|
Sep 09 06:44:42 AM UTC 24 |
Sep 09 06:49:17 AM UTC 24 |
73581370051 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/12.uart_perf.1429772817 |
|
|
Sep 09 06:38:23 AM UTC 24 |
Sep 09 06:49:18 AM UTC 24 |
19662105369 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_loopback.499497397 |
|
|
Sep 09 06:48:50 AM UTC 24 |
Sep 09 06:49:20 AM UTC 24 |
12789839849 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.2211155426 |
|
|
Sep 09 06:49:17 AM UTC 24 |
Sep 09 06:49:22 AM UTC 24 |
1932972793 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.2011727338 |
|
|
Sep 09 06:48:14 AM UTC 24 |
Sep 09 06:49:23 AM UTC 24 |
20031993695 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_intr.3026569785 |
|
|
Sep 09 06:48:33 AM UTC 24 |
Sep 09 06:49:25 AM UTC 24 |
28513600008 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.1378597682 |
|
|
Sep 09 06:38:23 AM UTC 24 |
Sep 09 06:49:25 AM UTC 24 |
110880327956 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.826047520 |
|
|
Sep 09 06:48:54 AM UTC 24 |
Sep 09 06:49:26 AM UTC 24 |
1510906856 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_loopback.1061481586 |
|
|
Sep 09 06:49:21 AM UTC 24 |
Sep 09 06:49:26 AM UTC 24 |
4061153409 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_alert_test.2448533343 |
|
|
Sep 09 06:49:26 AM UTC 24 |
Sep 09 06:49:28 AM UTC 24 |
28496460 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_tx_rx.3825366611 |
|
|
Sep 09 06:48:22 AM UTC 24 |
Sep 09 06:49:29 AM UTC 24 |
33240180469 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_noise_filter.1387986851 |
|
|
Sep 09 06:48:35 AM UTC 24 |
Sep 09 06:49:29 AM UTC 24 |
79263636873 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_smoke.3338771318 |
|
|
Sep 09 06:49:27 AM UTC 24 |
Sep 09 06:49:31 AM UTC 24 |
271784669 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_fifo_reset.3551799698 |
|
|
Sep 09 06:49:04 AM UTC 24 |
Sep 09 06:49:32 AM UTC 24 |
27888944283 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/7.uart_perf.1121494488 |
|
|
Sep 09 06:34:22 AM UTC 24 |
Sep 09 06:49:33 AM UTC 24 |
28140755211 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.4093283573 |
|
|
Sep 09 06:48:04 AM UTC 24 |
Sep 09 06:49:34 AM UTC 24 |
44773071518 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_intr.1363345778 |
|
|
Sep 09 06:47:56 AM UTC 24 |
Sep 09 06:49:35 AM UTC 24 |
106062047765 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.2816990157 |
|
|
Sep 09 06:49:19 AM UTC 24 |
Sep 09 06:49:36 AM UTC 24 |
5961387584 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_intr.1121098023 |
|
|
Sep 09 06:49:34 AM UTC 24 |
Sep 09 06:49:41 AM UTC 24 |
5270627593 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.842217107 |
|
|
Sep 09 06:45:29 AM UTC 24 |
Sep 09 06:49:44 AM UTC 24 |
80984022565 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.2252577599 |
|
|
Sep 09 06:49:36 AM UTC 24 |
Sep 09 06:49:44 AM UTC 24 |
4319285573 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_loopback.3655007285 |
|
|
Sep 09 06:49:44 AM UTC 24 |
Sep 09 06:49:47 AM UTC 24 |
352746282 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.3646949912 |
|
|
Sep 09 06:48:05 AM UTC 24 |
Sep 09 06:49:53 AM UTC 24 |
85080857688 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_tx_rx.1189917192 |
|
|
Sep 09 06:44:53 AM UTC 24 |
Sep 09 06:49:57 AM UTC 24 |
58271156133 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_fifo_full.43723822 |
|
|
Sep 09 06:49:30 AM UTC 24 |
Sep 09 06:49:59 AM UTC 24 |
11229809251 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_alert_test.2530031825 |
|
|
Sep 09 06:49:59 AM UTC 24 |
Sep 09 06:50:00 AM UTC 24 |
39768646 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_fifo_reset.3857775645 |
|
|
Sep 09 06:47:43 AM UTC 24 |
Sep 09 06:50:01 AM UTC 24 |
98053077602 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_rx_oversample.578206166 |
|
|
Sep 09 06:49:10 AM UTC 24 |
Sep 09 06:50:02 AM UTC 24 |
6126538664 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_smoke.441420290 |
|
|
Sep 09 06:50:00 AM UTC 24 |
Sep 09 06:50:02 AM UTC 24 |
102947360 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_noise_filter.3465780141 |
|
|
Sep 09 06:49:16 AM UTC 24 |
Sep 09 06:50:03 AM UTC 24 |
44608889286 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_rx_oversample.1399717283 |
|
|
Sep 09 06:49:33 AM UTC 24 |
Sep 09 06:50:04 AM UTC 24 |
6699079821 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.228817473 |
|
|
Sep 09 06:43:04 AM UTC 24 |
Sep 09 06:50:04 AM UTC 24 |
192912371788 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.196487889 |
|
|
Sep 09 06:39:50 AM UTC 24 |
Sep 09 06:50:07 AM UTC 24 |
182840177274 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/61.uart_fifo_reset.317005872 |
|
|
Sep 09 07:00:49 AM UTC 24 |
Sep 09 07:02:50 AM UTC 24 |
168802587450 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_fifo_reset.2676780303 |
|
|
Sep 09 06:49:32 AM UTC 24 |
Sep 09 06:50:10 AM UTC 24 |
10855579701 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.566770269 |
|
|
Sep 09 06:49:26 AM UTC 24 |
Sep 09 06:50:11 AM UTC 24 |
2537455986 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.1488665933 |
|
|
Sep 09 06:49:41 AM UTC 24 |
Sep 09 06:50:12 AM UTC 24 |
6524175656 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_fifo_full.3501606718 |
|
|
Sep 09 06:48:23 AM UTC 24 |
Sep 09 06:50:13 AM UTC 24 |
56745253673 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_intr.3368521583 |
|
|
Sep 09 06:43:26 AM UTC 24 |
Sep 09 06:50:15 AM UTC 24 |
92284501483 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.99953703 |
|
|
Sep 09 06:50:11 AM UTC 24 |
Sep 09 06:50:15 AM UTC 24 |
1107946935 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_tx_rx.281104515 |
|
|
Sep 09 06:48:59 AM UTC 24 |
Sep 09 06:50:17 AM UTC 24 |
63919706253 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.3586127776 |
|
|
Sep 09 06:49:37 AM UTC 24 |
Sep 09 06:50:17 AM UTC 24 |
49335960920 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.1172439287 |
|
|
Sep 09 06:50:08 AM UTC 24 |
Sep 09 06:50:17 AM UTC 24 |
3327011096 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_noise_filter.1910274346 |
|
|
Sep 09 06:49:35 AM UTC 24 |
Sep 09 06:50:18 AM UTC 24 |
78477181649 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_alert_test.3868204397 |
|
|
Sep 09 06:50:18 AM UTC 24 |
Sep 09 06:50:20 AM UTC 24 |
45385477 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_smoke.4144133795 |
|
|
Sep 09 06:50:18 AM UTC 24 |
Sep 09 06:50:20 AM UTC 24 |
726460911 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_intr.4060811203 |
|
|
Sep 09 06:50:04 AM UTC 24 |
Sep 09 06:50:22 AM UTC 24 |
33855255186 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_fifo_reset.4286709754 |
|
|
Sep 09 06:50:03 AM UTC 24 |
Sep 09 06:50:25 AM UTC 24 |
39675607745 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_fifo_reset.2082190522 |
|
|
Sep 09 06:46:14 AM UTC 24 |
Sep 09 06:50:26 AM UTC 24 |
122455887815 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.3240390212 |
|
|
Sep 09 06:49:53 AM UTC 24 |
Sep 09 06:50:26 AM UTC 24 |
10054968269 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_rx_oversample.3767637014 |
|
|
Sep 09 06:50:04 AM UTC 24 |
Sep 09 06:50:31 AM UTC 24 |
4404281817 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.3156840934 |
|
|
Sep 09 06:49:03 AM UTC 24 |
Sep 09 06:50:34 AM UTC 24 |
50010157814 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_loopback.3415204400 |
|
|
Sep 09 06:50:12 AM UTC 24 |
Sep 09 06:50:34 AM UTC 24 |
7126973962 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_fifo_full.3225308288 |
|
|
Sep 09 06:49:02 AM UTC 24 |
Sep 09 06:50:35 AM UTC 24 |
45916699028 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.3540910209 |
|
|
Sep 09 06:48:11 AM UTC 24 |
Sep 09 06:50:35 AM UTC 24 |
27900691342 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.3560675057 |
|
|
Sep 09 06:50:27 AM UTC 24 |
Sep 09 06:50:38 AM UTC 24 |
5772552878 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.2458837317 |
|
|
Sep 09 06:45:46 AM UTC 24 |
Sep 09 06:50:40 AM UTC 24 |
164764164287 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.3656214729 |
|
|
Sep 09 06:50:35 AM UTC 24 |
Sep 09 06:50:41 AM UTC 24 |
1223674171 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_fifo_full.3660617551 |
|
|
Sep 09 06:50:02 AM UTC 24 |
Sep 09 06:50:42 AM UTC 24 |
55916796827 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_alert_test.614135562 |
|
|
Sep 09 06:50:41 AM UTC 24 |
Sep 09 06:50:43 AM UTC 24 |
38330148 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_smoke.3673566097 |
|
|
Sep 09 06:50:42 AM UTC 24 |
Sep 09 06:50:45 AM UTC 24 |
106468328 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.938830516 |
|
|
Sep 09 06:47:26 AM UTC 24 |
Sep 09 06:50:49 AM UTC 24 |
134247715102 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_tx_rx.1681771955 |
|
|
Sep 09 06:50:18 AM UTC 24 |
Sep 09 06:50:51 AM UTC 24 |
37623421057 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_rx_oversample.3701000950 |
|
|
Sep 09 06:50:24 AM UTC 24 |
Sep 09 06:50:52 AM UTC 24 |
3070705504 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_noise_filter.70364879 |
|
|
Sep 09 06:47:58 AM UTC 24 |
Sep 09 06:50:55 AM UTC 24 |
125696742117 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.556930877 |
|
|
Sep 09 06:50:20 AM UTC 24 |
Sep 09 06:50:58 AM UTC 24 |
24796173924 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.2057468541 |
|
|
Sep 09 06:49:18 AM UTC 24 |
Sep 09 06:50:59 AM UTC 24 |
118886893462 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_fifo_full.1648737607 |
|
|
Sep 09 06:50:19 AM UTC 24 |
Sep 09 06:51:03 AM UTC 24 |
35671185587 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_loopback.821482582 |
|
|
Sep 09 06:50:35 AM UTC 24 |
Sep 09 06:51:04 AM UTC 24 |
6585423394 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.1236827217 |
|
|
Sep 09 06:50:03 AM UTC 24 |
Sep 09 06:51:06 AM UTC 24 |
83497112369 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.2545649236 |
|
|
Sep 09 06:51:04 AM UTC 24 |
Sep 09 06:51:07 AM UTC 24 |
1870784251 ps |