T638 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.4113132510 |
|
|
Sep 09 06:50:58 AM UTC 24 |
Sep 09 06:51:13 AM UTC 24 |
3419500387 ps |
T183 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.2096100752 |
|
|
Sep 09 06:50:59 AM UTC 24 |
Sep 09 06:51:15 AM UTC 24 |
80616628332 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_intr.2901039414 |
|
|
Sep 09 06:50:53 AM UTC 24 |
Sep 09 06:51:16 AM UTC 24 |
23377810461 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_loopback.225528003 |
|
|
Sep 09 06:51:05 AM UTC 24 |
Sep 09 06:51:17 AM UTC 24 |
6906969702 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_tx_rx.3484575937 |
|
|
Sep 09 06:50:44 AM UTC 24 |
Sep 09 06:51:17 AM UTC 24 |
43141155008 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_alert_test.4285959150 |
|
|
Sep 09 06:51:17 AM UTC 24 |
Sep 09 06:51:18 AM UTC 24 |
40549966 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.1562483226 |
|
|
Sep 09 06:50:38 AM UTC 24 |
Sep 09 06:51:20 AM UTC 24 |
8813039397 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.4091290530 |
|
|
Sep 09 06:41:25 AM UTC 24 |
Sep 09 06:51:23 AM UTC 24 |
78893261188 ps |
T166 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.930088563 |
|
|
Sep 09 06:50:16 AM UTC 24 |
Sep 09 06:51:26 AM UTC 24 |
21723873198 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_stress_all.77702139 |
|
|
Sep 09 06:48:55 AM UTC 24 |
Sep 09 06:51:26 AM UTC 24 |
195578922317 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.645219289 |
|
|
Sep 09 06:41:55 AM UTC 24 |
Sep 09 06:51:28 AM UTC 24 |
96722942353 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_intr.2086856657 |
|
|
Sep 09 06:51:27 AM UTC 24 |
Sep 09 06:51:34 AM UTC 24 |
17161849653 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_fifo_reset.3305058426 |
|
|
Sep 09 06:51:24 AM UTC 24 |
Sep 09 06:51:36 AM UTC 24 |
22815888578 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.4007859797 |
|
|
Sep 09 06:49:31 AM UTC 24 |
Sep 09 06:51:37 AM UTC 24 |
74245550151 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_perf.2388815829 |
|
|
Sep 09 06:48:53 AM UTC 24 |
Sep 09 06:51:37 AM UTC 24 |
11474666279 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_smoke.3882509461 |
|
|
Sep 09 06:51:18 AM UTC 24 |
Sep 09 06:51:38 AM UTC 24 |
5894930819 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_rx_oversample.2815620468 |
|
|
Sep 09 06:51:26 AM UTC 24 |
Sep 09 06:51:38 AM UTC 24 |
2537392869 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.2825719042 |
|
|
Sep 09 06:51:37 AM UTC 24 |
Sep 09 06:52:02 AM UTC 24 |
28195794639 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_tx_rx.1220513407 |
|
|
Sep 09 06:50:01 AM UTC 24 |
Sep 09 06:51:39 AM UTC 24 |
40581389576 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_tx_rx.2734574421 |
|
|
Sep 09 06:49:29 AM UTC 24 |
Sep 09 06:51:41 AM UTC 24 |
63046109494 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.1234644511 |
|
|
Sep 09 06:51:37 AM UTC 24 |
Sep 09 06:51:42 AM UTC 24 |
1375392332 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_loopback.299817366 |
|
|
Sep 09 06:51:39 AM UTC 24 |
Sep 09 06:51:42 AM UTC 24 |
3302773795 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.1355562225 |
|
|
Sep 09 06:51:34 AM UTC 24 |
Sep 09 06:51:43 AM UTC 24 |
2374379969 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_fifo_reset.315794960 |
|
|
Sep 09 06:50:50 AM UTC 24 |
Sep 09 06:51:44 AM UTC 24 |
81185541803 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_intr.2530580910 |
|
|
Sep 09 06:49:15 AM UTC 24 |
Sep 09 06:51:45 AM UTC 24 |
93111104368 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_alert_test.2358434752 |
|
|
Sep 09 06:51:43 AM UTC 24 |
Sep 09 06:51:45 AM UTC 24 |
20050431 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_noise_filter.3184450146 |
|
|
Sep 09 06:50:05 AM UTC 24 |
Sep 09 06:51:50 AM UTC 24 |
48662933705 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.2819932226 |
|
|
Sep 09 06:49:24 AM UTC 24 |
Sep 09 06:51:51 AM UTC 24 |
46888676190 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_smoke.3976100751 |
|
|
Sep 09 06:51:43 AM UTC 24 |
Sep 09 06:51:54 AM UTC 24 |
5573759600 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.2049302205 |
|
|
Sep 09 06:51:14 AM UTC 24 |
Sep 09 06:51:57 AM UTC 24 |
2484714412 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_noise_filter.1457056899 |
|
|
Sep 09 06:50:56 AM UTC 24 |
Sep 09 06:52:01 AM UTC 24 |
57545909304 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.777721507 |
|
|
Sep 09 06:50:46 AM UTC 24 |
Sep 09 06:52:01 AM UTC 24 |
35649214469 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.3987153856 |
|
|
Sep 09 06:50:32 AM UTC 24 |
Sep 09 06:52:04 AM UTC 24 |
174179134041 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_loopback.967214827 |
|
|
Sep 09 06:52:03 AM UTC 24 |
Sep 09 06:52:06 AM UTC 24 |
1586500456 ps |
T168 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.840810158 |
|
|
Sep 09 06:51:40 AM UTC 24 |
Sep 09 06:52:09 AM UTC 24 |
3800551471 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.45532489 |
|
|
Sep 09 06:50:36 AM UTC 24 |
Sep 09 06:52:13 AM UTC 24 |
26895108082 ps |
T184 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.3137759500 |
|
|
Sep 09 06:50:11 AM UTC 24 |
Sep 09 06:52:13 AM UTC 24 |
102840727425 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_rx_oversample.326992438 |
|
|
Sep 09 06:50:52 AM UTC 24 |
Sep 09 06:52:14 AM UTC 24 |
7160569540 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.1530077890 |
|
|
Sep 09 06:52:02 AM UTC 24 |
Sep 09 06:52:15 AM UTC 24 |
11060909329 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_alert_test.787136865 |
|
|
Sep 09 06:52:14 AM UTC 24 |
Sep 09 06:52:16 AM UTC 24 |
48863514 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/22.uart_stress_all.3612077062 |
|
|
Sep 09 06:45:29 AM UTC 24 |
Sep 09 06:52:16 AM UTC 24 |
284787072322 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_smoke.4208765908 |
|
|
Sep 09 06:52:15 AM UTC 24 |
Sep 09 06:52:18 AM UTC 24 |
127314868 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_fifo_overflow.1761925848 |
|
|
Sep 09 06:51:45 AM UTC 24 |
Sep 09 06:52:21 AM UTC 24 |
28273299985 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_tx_rx.2820850517 |
|
|
Sep 09 06:51:18 AM UTC 24 |
Sep 09 06:52:22 AM UTC 24 |
95055153942 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.2799805034 |
|
|
Sep 09 06:52:02 AM UTC 24 |
Sep 09 06:52:24 AM UTC 24 |
10417448254 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_tx_rx.2722613456 |
|
|
Sep 09 06:51:43 AM UTC 24 |
Sep 09 06:52:27 AM UTC 24 |
94161539500 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_noise_filter.3706631463 |
|
|
Sep 09 06:51:28 AM UTC 24 |
Sep 09 06:52:30 AM UTC 24 |
132528677182 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_intr.912469636 |
|
|
Sep 09 06:52:23 AM UTC 24 |
Sep 09 06:52:35 AM UTC 24 |
11498854092 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.868220119 |
|
|
Sep 09 06:51:21 AM UTC 24 |
Sep 09 06:52:35 AM UTC 24 |
62382503421 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_fifo_full.119507158 |
|
|
Sep 09 06:50:44 AM UTC 24 |
Sep 09 06:52:38 AM UTC 24 |
125510261409 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.852858508 |
|
|
Sep 09 06:51:58 AM UTC 24 |
Sep 09 06:52:39 AM UTC 24 |
36736255828 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.3992796244 |
|
|
Sep 09 06:52:36 AM UTC 24 |
Sep 09 06:52:41 AM UTC 24 |
953126929 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_perf.377003757 |
|
|
Sep 09 06:49:45 AM UTC 24 |
Sep 09 06:52:43 AM UTC 24 |
13329929382 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.2817772167 |
|
|
Sep 09 06:52:28 AM UTC 24 |
Sep 09 06:52:45 AM UTC 24 |
4512298312 ps |
T162 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.472923395 |
|
|
Sep 09 06:46:52 AM UTC 24 |
Sep 09 06:52:46 AM UTC 24 |
137285539385 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_alert_test.2435287348 |
|
|
Sep 09 06:52:46 AM UTC 24 |
Sep 09 06:52:47 AM UTC 24 |
17161812 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_noise_filter.2121332139 |
|
|
Sep 09 06:51:54 AM UTC 24 |
Sep 09 06:52:50 AM UTC 24 |
105375226461 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_smoke.2528819693 |
|
|
Sep 09 06:52:47 AM UTC 24 |
Sep 09 06:52:52 AM UTC 24 |
551136550 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/13.uart_perf.3974957798 |
|
|
Sep 09 06:39:15 AM UTC 24 |
Sep 09 06:52:53 AM UTC 24 |
15236466191 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_intr.2833832431 |
|
|
Sep 09 06:51:51 AM UTC 24 |
Sep 09 06:52:56 AM UTC 24 |
77297114301 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_tx_rx.3634121341 |
|
|
Sep 09 06:52:15 AM UTC 24 |
Sep 09 06:52:56 AM UTC 24 |
26057788602 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_loopback.1913357673 |
|
|
Sep 09 06:52:36 AM UTC 24 |
Sep 09 06:52:57 AM UTC 24 |
6012404408 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_rx_oversample.3510454657 |
|
|
Sep 09 06:51:50 AM UTC 24 |
Sep 09 06:52:59 AM UTC 24 |
6598232596 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.2950702945 |
|
|
Sep 09 06:53:00 AM UTC 24 |
Sep 09 06:53:04 AM UTC 24 |
732333455 ps |
T156 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_fifo_reset.1920990018 |
|
|
Sep 09 06:50:21 AM UTC 24 |
Sep 09 06:53:06 AM UTC 24 |
75752766927 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.3719080595 |
|
|
Sep 09 06:52:42 AM UTC 24 |
Sep 09 06:53:06 AM UTC 24 |
1269733438 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_fifo_reset.1629689877 |
|
|
Sep 09 06:51:45 AM UTC 24 |
Sep 09 06:53:07 AM UTC 24 |
143673395866 ps |
T213 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_fifo_reset.1377008210 |
|
|
Sep 09 06:52:54 AM UTC 24 |
Sep 09 06:53:12 AM UTC 24 |
126835433803 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_stress_all.3875371467 |
|
|
Sep 09 06:43:49 AM UTC 24 |
Sep 09 06:53:14 AM UTC 24 |
42918862304 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_perf.4188959554 |
|
|
Sep 09 06:51:06 AM UTC 24 |
Sep 09 06:53:14 AM UTC 24 |
8661488285 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_rx_oversample.828652687 |
|
|
Sep 09 06:52:22 AM UTC 24 |
Sep 09 06:53:15 AM UTC 24 |
5897757272 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.454443134 |
|
|
Sep 09 06:52:18 AM UTC 24 |
Sep 09 06:53:15 AM UTC 24 |
18174871740 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.1247660445 |
|
|
Sep 09 06:53:06 AM UTC 24 |
Sep 09 06:53:15 AM UTC 24 |
6895390221 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_loopback.963016624 |
|
|
Sep 09 06:53:06 AM UTC 24 |
Sep 09 06:53:17 AM UTC 24 |
7151457122 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_alert_test.2757650629 |
|
|
Sep 09 06:53:16 AM UTC 24 |
Sep 09 06:53:18 AM UTC 24 |
33698499 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.3425311502 |
|
|
Sep 09 06:52:53 AM UTC 24 |
Sep 09 06:53:18 AM UTC 24 |
26094558383 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_noise_filter.1882097078 |
|
|
Sep 09 06:52:25 AM UTC 24 |
Sep 09 06:53:20 AM UTC 24 |
267546339141 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_smoke.270375459 |
|
|
Sep 09 06:53:16 AM UTC 24 |
Sep 09 06:53:20 AM UTC 24 |
846847666 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.1318691498 |
|
|
Sep 09 06:51:40 AM UTC 24 |
Sep 09 06:53:23 AM UTC 24 |
39779743877 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_stress_all.2110272513 |
|
|
Sep 09 06:50:40 AM UTC 24 |
Sep 09 06:53:25 AM UTC 24 |
68313382888 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_intr.497326404 |
|
|
Sep 09 06:52:57 AM UTC 24 |
Sep 09 06:53:29 AM UTC 24 |
37339383882 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_stress_all.142811985 |
|
|
Sep 09 06:51:17 AM UTC 24 |
Sep 09 06:53:30 AM UTC 24 |
58342676863 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_tx_rx.237699982 |
|
|
Sep 09 06:52:48 AM UTC 24 |
Sep 09 06:53:31 AM UTC 24 |
14991449512 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.758943727 |
|
|
Sep 09 06:53:26 AM UTC 24 |
Sep 09 06:53:31 AM UTC 24 |
4077561179 ps |
T160 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/28.uart_stress_all.3097829908 |
|
|
Sep 09 06:49:26 AM UTC 24 |
Sep 09 06:53:32 AM UTC 24 |
359253622949 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_fifo_full.2905340661 |
|
|
Sep 09 06:52:16 AM UTC 24 |
Sep 09 06:53:33 AM UTC 24 |
106965714577 ps |
T210 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_fifo_reset.2639441199 |
|
|
Sep 09 06:48:24 AM UTC 24 |
Sep 09 06:53:34 AM UTC 24 |
156990014888 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.1256198615 |
|
|
Sep 09 06:52:10 AM UTC 24 |
Sep 09 06:53:36 AM UTC 24 |
19460175540 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.380349523 |
|
|
Sep 09 06:53:31 AM UTC 24 |
Sep 09 06:53:38 AM UTC 24 |
979888930 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_alert_test.331995495 |
|
|
Sep 09 06:53:37 AM UTC 24 |
Sep 09 06:53:39 AM UTC 24 |
12325928 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_rx_oversample.2220332076 |
|
|
Sep 09 06:52:56 AM UTC 24 |
Sep 09 06:53:40 AM UTC 24 |
4984981643 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.733593325 |
|
|
Sep 09 06:52:31 AM UTC 24 |
Sep 09 06:53:44 AM UTC 24 |
186736933837 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_stress_all.3023143610 |
|
|
Sep 09 06:43:05 AM UTC 24 |
Sep 09 06:53:44 AM UTC 24 |
306122275930 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_smoke.1010087073 |
|
|
Sep 09 06:53:39 AM UTC 24 |
Sep 09 06:53:46 AM UTC 24 |
5828221167 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_fifo_reset.992452832 |
|
|
Sep 09 06:52:19 AM UTC 24 |
Sep 09 06:53:46 AM UTC 24 |
33813394513 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_rx_oversample.2441000488 |
|
|
Sep 09 06:53:21 AM UTC 24 |
Sep 09 06:53:48 AM UTC 24 |
3260290482 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_loopback.280225563 |
|
|
Sep 09 06:53:32 AM UTC 24 |
Sep 09 06:54:03 AM UTC 24 |
9440224002 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_perf.2134642816 |
|
|
Sep 09 06:46:31 AM UTC 24 |
Sep 09 06:54:04 AM UTC 24 |
8285403190 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_fifo_reset.2203695640 |
|
|
Sep 09 06:53:44 AM UTC 24 |
Sep 09 06:54:07 AM UTC 24 |
43392088851 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_fifo_full.4210278689 |
|
|
Sep 09 06:51:45 AM UTC 24 |
Sep 09 06:54:07 AM UTC 24 |
124251878230 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.3325445605 |
|
|
Sep 09 06:53:18 AM UTC 24 |
Sep 09 06:54:07 AM UTC 24 |
146485948123 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.546402924 |
|
|
Sep 09 06:54:04 AM UTC 24 |
Sep 09 06:54:08 AM UTC 24 |
3680048165 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.185558895 |
|
|
Sep 09 06:54:07 AM UTC 24 |
Sep 09 06:54:11 AM UTC 24 |
1256649289 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_rx_oversample.1595084812 |
|
|
Sep 09 06:53:48 AM UTC 24 |
Sep 09 06:54:19 AM UTC 24 |
3081442149 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_fifo_reset.768889296 |
|
|
Sep 09 06:53:18 AM UTC 24 |
Sep 09 06:54:22 AM UTC 24 |
44050826869 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_tx_rx.3471698982 |
|
|
Sep 09 06:53:39 AM UTC 24 |
Sep 09 06:54:23 AM UTC 24 |
56471788917 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_fifo_full.2934787102 |
|
|
Sep 09 06:53:17 AM UTC 24 |
Sep 09 06:54:23 AM UTC 24 |
28188249337 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_alert_test.3049976099 |
|
|
Sep 09 06:54:23 AM UTC 24 |
Sep 09 06:54:25 AM UTC 24 |
14587736 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_tx_rx.20244634 |
|
|
Sep 09 06:53:16 AM UTC 24 |
Sep 09 06:54:26 AM UTC 24 |
28677578225 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_smoke.2136641647 |
|
|
Sep 09 06:54:23 AM UTC 24 |
Sep 09 06:54:29 AM UTC 24 |
741744606 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_fifo_full.236263354 |
|
|
Sep 09 06:53:40 AM UTC 24 |
Sep 09 06:54:29 AM UTC 24 |
85709141720 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_intr.2390110233 |
|
|
Sep 09 06:50:26 AM UTC 24 |
Sep 09 06:54:30 AM UTC 24 |
129495369377 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_noise_filter.2893329849 |
|
|
Sep 09 06:50:27 AM UTC 24 |
Sep 09 06:54:31 AM UTC 24 |
114312202569 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.1720523619 |
|
|
Sep 09 06:53:34 AM UTC 24 |
Sep 09 06:54:35 AM UTC 24 |
4947826683 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_loopback.3177627979 |
|
|
Sep 09 06:54:07 AM UTC 24 |
Sep 09 06:54:36 AM UTC 24 |
8398874478 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.1681564456 |
|
|
Sep 09 06:54:12 AM UTC 24 |
Sep 09 06:54:40 AM UTC 24 |
1871759206 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.1797118056 |
|
|
Sep 09 06:54:40 AM UTC 24 |
Sep 09 06:54:44 AM UTC 24 |
707336066 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.2341590649 |
|
|
Sep 09 06:48:54 AM UTC 24 |
Sep 09 06:54:45 AM UTC 24 |
76293811504 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.438993454 |
|
|
Sep 09 06:53:44 AM UTC 24 |
Sep 09 06:54:45 AM UTC 24 |
64633664981 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.2054903862 |
|
|
Sep 09 06:46:34 AM UTC 24 |
Sep 09 06:54:45 AM UTC 24 |
62804842552 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_noise_filter.2588176706 |
|
|
Sep 09 06:53:49 AM UTC 24 |
Sep 09 06:54:46 AM UTC 24 |
110295761336 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.1147740080 |
|
|
Sep 09 06:54:35 AM UTC 24 |
Sep 09 06:54:49 AM UTC 24 |
33425828500 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/9.uart_stress_all.540872500 |
|
|
Sep 09 06:35:49 AM UTC 24 |
Sep 09 06:54:51 AM UTC 24 |
109130734889 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_alert_test.3268608555 |
|
|
Sep 09 06:54:50 AM UTC 24 |
Sep 09 06:54:51 AM UTC 24 |
21120321 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_fifo_full.4099246226 |
|
|
Sep 09 06:51:19 AM UTC 24 |
Sep 09 06:54:53 AM UTC 24 |
170348822888 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_smoke.3684801597 |
|
|
Sep 09 06:54:52 AM UTC 24 |
Sep 09 06:54:55 AM UTC 24 |
960738716 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_rx_oversample.3182935387 |
|
|
Sep 09 06:54:30 AM UTC 24 |
Sep 09 06:54:56 AM UTC 24 |
3056220614 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.1344117994 |
|
|
Sep 09 06:53:05 AM UTC 24 |
Sep 09 06:54:58 AM UTC 24 |
196379224927 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_fifo_reset.1424459101 |
|
|
Sep 09 06:54:30 AM UTC 24 |
Sep 09 06:55:00 AM UTC 24 |
26284423192 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_tx_rx.4235962654 |
|
|
Sep 09 06:54:25 AM UTC 24 |
Sep 09 06:55:01 AM UTC 24 |
14393794589 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_fifo_full.2226887461 |
|
|
Sep 09 06:52:51 AM UTC 24 |
Sep 09 06:55:03 AM UTC 24 |
133013020491 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.1090365869 |
|
|
Sep 09 06:53:15 AM UTC 24 |
Sep 09 06:55:03 AM UTC 24 |
4500723199 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/21.uart_perf.3139081108 |
|
|
Sep 09 06:44:40 AM UTC 24 |
Sep 09 06:55:05 AM UTC 24 |
9039541868 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_loopback.456260937 |
|
|
Sep 09 06:54:44 AM UTC 24 |
Sep 09 06:55:08 AM UTC 24 |
4956309513 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.459235444 |
|
|
Sep 09 06:54:05 AM UTC 24 |
Sep 09 06:55:09 AM UTC 24 |
86183278566 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.1417690496 |
|
|
Sep 09 06:55:06 AM UTC 24 |
Sep 09 06:55:09 AM UTC 24 |
3032860138 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_noise_filter.2075705976 |
|
|
Sep 09 06:53:23 AM UTC 24 |
Sep 09 06:55:10 AM UTC 24 |
58945525478 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_rx_oversample.179072704 |
|
|
Sep 09 06:54:59 AM UTC 24 |
Sep 09 06:55:14 AM UTC 24 |
4350778482 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/31.uart_perf.296462203 |
|
|
Sep 09 06:50:36 AM UTC 24 |
Sep 09 06:55:16 AM UTC 24 |
28432870896 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.3273300062 |
|
|
Sep 09 06:53:30 AM UTC 24 |
Sep 09 06:55:16 AM UTC 24 |
257525678089 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.26899762 |
|
|
Sep 09 06:55:04 AM UTC 24 |
Sep 09 06:55:18 AM UTC 24 |
11644579946 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_alert_test.3350536894 |
|
|
Sep 09 06:55:16 AM UTC 24 |
Sep 09 06:55:19 AM UTC 24 |
15047247 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_noise_filter.3714603507 |
|
|
Sep 09 06:54:32 AM UTC 24 |
Sep 09 06:55:19 AM UTC 24 |
106188492228 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.3660319800 |
|
|
Sep 09 06:54:46 AM UTC 24 |
Sep 09 06:55:20 AM UTC 24 |
3367511613 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.740557581 |
|
|
Sep 09 06:32:30 AM UTC 24 |
Sep 09 06:55:20 AM UTC 24 |
146439716086 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_smoke.51413343 |
|
|
Sep 09 06:55:17 AM UTC 24 |
Sep 09 06:55:21 AM UTC 24 |
483639240 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_fifo_full.1484186801 |
|
|
Sep 09 06:54:54 AM UTC 24 |
Sep 09 06:55:21 AM UTC 24 |
199434275893 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.1632588883 |
|
|
Sep 09 06:55:11 AM UTC 24 |
Sep 09 06:55:24 AM UTC 24 |
1934065020 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_tx_rx.3061575958 |
|
|
Sep 09 06:55:18 AM UTC 24 |
Sep 09 06:55:27 AM UTC 24 |
36525789430 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.2317015158 |
|
|
Sep 09 06:53:33 AM UTC 24 |
Sep 09 06:55:28 AM UTC 24 |
57685354218 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_stress_all.2181611172 |
|
|
Sep 09 06:48:18 AM UTC 24 |
Sep 09 06:55:30 AM UTC 24 |
594605405868 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_rx_oversample.420520864 |
|
|
Sep 09 06:55:20 AM UTC 24 |
Sep 09 06:55:32 AM UTC 24 |
4702710279 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_intr.2772920428 |
|
|
Sep 09 06:53:48 AM UTC 24 |
Sep 09 06:55:32 AM UTC 24 |
47714906219 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/18.uart_perf.2997979460 |
|
|
Sep 09 06:42:21 AM UTC 24 |
Sep 09 06:55:35 AM UTC 24 |
14952938471 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_intr.1695388588 |
|
|
Sep 09 06:55:22 AM UTC 24 |
Sep 09 06:55:37 AM UTC 24 |
5947461889 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_loopback.3200630050 |
|
|
Sep 09 06:55:10 AM UTC 24 |
Sep 09 06:55:38 AM UTC 24 |
8805765937 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_alert_test.2244319024 |
|
|
Sep 09 06:55:38 AM UTC 24 |
Sep 09 06:55:40 AM UTC 24 |
14825141 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.205439084 |
|
|
Sep 09 06:55:25 AM UTC 24 |
Sep 09 06:55:43 AM UTC 24 |
78835211793 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.3113046965 |
|
|
Sep 09 06:55:29 AM UTC 24 |
Sep 09 06:55:45 AM UTC 24 |
7746482991 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_long_xfer_wo_dly.4095740081 |
|
|
Sep 09 06:52:40 AM UTC 24 |
Sep 09 06:55:47 AM UTC 24 |
131099216687 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_smoke.1225523685 |
|
|
Sep 09 06:55:41 AM UTC 24 |
Sep 09 06:55:47 AM UTC 24 |
5641066610 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_loopback.4078453426 |
|
|
Sep 09 06:55:31 AM UTC 24 |
Sep 09 06:55:54 AM UTC 24 |
5380792433 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.2654831392 |
|
|
Sep 09 06:55:29 AM UTC 24 |
Sep 09 06:55:56 AM UTC 24 |
30266089667 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/32.uart_long_xfer_wo_dly.3373365221 |
|
|
Sep 09 06:51:08 AM UTC 24 |
Sep 09 06:55:59 AM UTC 24 |
324353371222 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_fifo_full.2898443517 |
|
|
Sep 09 06:54:26 AM UTC 24 |
Sep 09 06:56:00 AM UTC 24 |
253743699390 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/20.uart_fifo_full.3949600969 |
|
|
Sep 09 06:43:12 AM UTC 24 |
Sep 09 06:56:04 AM UTC 24 |
283324381639 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.2499912866 |
|
|
Sep 09 06:56:01 AM UTC 24 |
Sep 09 06:56:12 AM UTC 24 |
38240948574 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.2401235837 |
|
|
Sep 09 06:40:40 AM UTC 24 |
Sep 09 06:56:12 AM UTC 24 |
100430388538 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_fifo_full.3470015817 |
|
|
Sep 09 06:55:19 AM UTC 24 |
Sep 09 06:56:14 AM UTC 24 |
53573330894 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_fifo_full.3184848385 |
|
|
Sep 09 06:55:46 AM UTC 24 |
Sep 09 06:56:15 AM UTC 24 |
16119912798 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.3974668560 |
|
|
Sep 09 06:56:13 AM UTC 24 |
Sep 09 06:56:17 AM UTC 24 |
6953425080 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.972047297 |
|
|
Sep 09 06:55:04 AM UTC 24 |
Sep 09 06:56:17 AM UTC 24 |
36115615362 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_loopback.799472520 |
|
|
Sep 09 06:56:13 AM UTC 24 |
Sep 09 06:56:24 AM UTC 24 |
8643280342 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_long_xfer_wo_dly.3488534693 |
|
|
Sep 09 06:54:09 AM UTC 24 |
Sep 09 06:56:25 AM UTC 24 |
58649564360 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_alert_test.2457129429 |
|
|
Sep 09 06:56:25 AM UTC 24 |
Sep 09 06:56:26 AM UTC 24 |
64195700 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/17.uart_stress_all.4293252245 |
|
|
Sep 09 06:41:57 AM UTC 24 |
Sep 09 06:56:27 AM UTC 24 |
398711682465 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.1439326345 |
|
|
Sep 09 06:55:19 AM UTC 24 |
Sep 09 06:56:28 AM UTC 24 |
39371891422 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_smoke.2767556285 |
|
|
Sep 09 06:56:26 AM UTC 24 |
Sep 09 06:56:29 AM UTC 24 |
468059590 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.969790708 |
|
|
Sep 09 06:56:17 AM UTC 24 |
Sep 09 06:56:32 AM UTC 24 |
1198800767 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_stress_all.195045373 |
|
|
Sep 09 06:50:16 AM UTC 24 |
Sep 09 06:56:33 AM UTC 24 |
594027099605 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_noise_filter.45968061 |
|
|
Sep 09 06:55:22 AM UTC 24 |
Sep 09 06:56:34 AM UTC 24 |
43482979614 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/34.uart_stress_all.350518074 |
|
|
Sep 09 06:52:13 AM UTC 24 |
Sep 09 06:56:38 AM UTC 24 |
72995210961 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/19.uart_perf.3906827862 |
|
|
Sep 09 06:43:03 AM UTC 24 |
Sep 09 06:56:39 AM UTC 24 |
33130213491 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/16.uart_perf.1898133772 |
|
|
Sep 09 06:41:23 AM UTC 24 |
Sep 09 06:56:40 AM UTC 24 |
13914859515 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_noise_filter.2159230236 |
|
|
Sep 09 06:52:58 AM UTC 24 |
Sep 09 06:56:42 AM UTC 24 |
97871025116 ps |
T802 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.2561229401 |
|
|
Sep 09 06:55:36 AM UTC 24 |
Sep 09 06:56:43 AM UTC 24 |
66670416947 ps |
T803 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_long_xfer_wo_dly.1181405903 |
|
|
Sep 09 06:53:13 AM UTC 24 |
Sep 09 06:56:44 AM UTC 24 |
124809323076 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_loopback.3068795451 |
|
|
Sep 09 06:56:43 AM UTC 24 |
Sep 09 06:56:49 AM UTC 24 |
2936617699 ps |
T805 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_intr.3161555842 |
|
|
Sep 09 06:55:01 AM UTC 24 |
Sep 09 06:56:51 AM UTC 24 |
48554128870 ps |
T806 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/26.uart_perf.3621682925 |
|
|
Sep 09 06:48:09 AM UTC 24 |
Sep 09 06:56:56 AM UTC 24 |
18997520325 ps |
T807 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_alert_test.3869957102 |
|
|
Sep 09 06:56:57 AM UTC 24 |
Sep 09 06:56:59 AM UTC 24 |
11771812 ps |
T808 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/36.uart_stress_all.665642665 |
|
|
Sep 09 06:53:15 AM UTC 24 |
Sep 09 06:57:02 AM UTC 24 |
44488971789 ps |
T809 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_tx_rx.4183469697 |
|
|
Sep 09 06:55:44 AM UTC 24 |
Sep 09 06:57:05 AM UTC 24 |
115878591769 ps |
T810 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_smoke.2595245167 |
|
|
Sep 09 06:57:00 AM UTC 24 |
Sep 09 06:57:06 AM UTC 24 |
693807959 ps |
T811 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.1111644772 |
|
|
Sep 09 06:56:40 AM UTC 24 |
Sep 09 06:57:08 AM UTC 24 |
54039699068 ps |
T812 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/38.uart_perf.35989956 |
|
|
Sep 09 06:54:08 AM UTC 24 |
Sep 09 06:57:09 AM UTC 24 |
14197428221 ps |
T813 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.1571347364 |
|
|
Sep 09 06:56:39 AM UTC 24 |
Sep 09 06:57:12 AM UTC 24 |
39038348636 ps |
T814 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.3107938620 |
|
|
Sep 09 06:56:29 AM UTC 24 |
Sep 09 06:57:13 AM UTC 24 |
20233821384 ps |
T815 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.595531160 |
|
|
Sep 09 06:56:41 AM UTC 24 |
Sep 09 06:57:13 AM UTC 24 |
6928053805 ps |
T816 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/30.uart_perf.2689734387 |
|
|
Sep 09 06:50:13 AM UTC 24 |
Sep 09 06:57:14 AM UTC 24 |
9075023063 ps |
T817 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_intr.259229718 |
|
|
Sep 09 06:55:57 AM UTC 24 |
Sep 09 06:57:24 AM UTC 24 |
203794948434 ps |
T818 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.3108244470 |
|
|
Sep 09 06:57:14 AM UTC 24 |
Sep 09 06:57:25 AM UTC 24 |
3672920484 ps |
T819 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.319305834 |
|
|
Sep 09 06:57:25 AM UTC 24 |
Sep 09 06:57:29 AM UTC 24 |
567982323 ps |
T220 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_fifo_reset.552407721 |
|
|
Sep 09 06:56:30 AM UTC 24 |
Sep 09 06:57:32 AM UTC 24 |
87992549621 ps |
T820 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_intr.3767341816 |
|
|
Sep 09 06:56:34 AM UTC 24 |
Sep 09 06:57:35 AM UTC 24 |
54957954285 ps |
T821 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_intr.944021822 |
|
|
Sep 09 06:54:31 AM UTC 24 |
Sep 09 06:57:35 AM UTC 24 |
327351269866 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.2140083054 |
|
|
Sep 09 06:54:37 AM UTC 24 |
Sep 09 06:57:36 AM UTC 24 |
93642155533 ps |
T822 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_rx_oversample.604435402 |
|
|
Sep 09 06:55:56 AM UTC 24 |
Sep 09 06:57:36 AM UTC 24 |
7718544308 ps |
T823 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/49.uart_smoke.3088967033 |
|
|
Sep 09 06:59:23 AM UTC 24 |
Sep 09 06:59:59 AM UTC 24 |
6218561808 ps |
T824 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_noise_filter.281917432 |
|
|
Sep 09 06:55:02 AM UTC 24 |
Sep 09 06:57:38 AM UTC 24 |
85293491784 ps |
T825 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_alert_test.3814609008 |
|
|
Sep 09 06:57:36 AM UTC 24 |
Sep 09 06:57:38 AM UTC 24 |
26954163 ps |
T826 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_smoke.1143542796 |
|
|
Sep 09 06:57:37 AM UTC 24 |
Sep 09 06:57:40 AM UTC 24 |
265033790 ps |
T827 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_loopback.3133898262 |
|
|
Sep 09 06:57:26 AM UTC 24 |
Sep 09 06:57:41 AM UTC 24 |
10244363303 ps |
T828 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.2119771261 |
|
|
Sep 09 06:57:15 AM UTC 24 |
Sep 09 06:57:41 AM UTC 24 |
37483003986 ps |
T829 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/33.uart_perf.3071532760 |
|
|
Sep 09 06:51:39 AM UTC 24 |
Sep 09 06:57:47 AM UTC 24 |
9275082852 ps |
T830 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_rx_oversample.659723738 |
|
|
Sep 09 06:56:32 AM UTC 24 |
Sep 09 06:57:47 AM UTC 24 |
7051028803 ps |
T831 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.4222026153 |
|
|
Sep 09 06:54:27 AM UTC 24 |
Sep 09 06:57:49 AM UTC 24 |
108111593477 ps |
T832 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_intr.2137001367 |
|
|
Sep 09 06:57:48 AM UTC 24 |
Sep 09 06:57:52 AM UTC 24 |
5484772288 ps |
T833 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_rx_oversample.279429007 |
|
|
Sep 09 06:57:10 AM UTC 24 |
Sep 09 06:57:52 AM UTC 24 |
5243193476 ps |
T834 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_rx_start_bit_filter.2458765361 |
|
|
Sep 09 06:57:50 AM UTC 24 |
Sep 09 06:57:53 AM UTC 24 |
1596370136 ps |
T835 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/49.uart_alert_test.1111783489 |
|
|
Sep 09 06:59:48 AM UTC 24 |
Sep 09 06:59:49 AM UTC 24 |
11545110 ps |
T836 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/49.uart_loopback.2582552654 |
|
|
Sep 09 06:59:41 AM UTC 24 |
Sep 09 06:59:59 AM UTC 24 |
4172269054 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_fifo_full.4220543033 |
|
|
Sep 09 06:57:06 AM UTC 24 |
Sep 09 06:57:55 AM UTC 24 |
103544897308 ps |
T203 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/41.uart_fifo_reset.2796555957 |
|
|
Sep 09 06:55:20 AM UTC 24 |
Sep 09 06:57:58 AM UTC 24 |
77282714995 ps |
T837 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_rx_oversample.87348649 |
|
|
Sep 09 06:57:42 AM UTC 24 |
Sep 09 06:57:59 AM UTC 24 |
5852910219 ps |
T838 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_noise_filter.1417876057 |
|
|
Sep 09 06:57:14 AM UTC 24 |
Sep 09 06:58:01 AM UTC 24 |
102201692665 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/42.uart_fifo_reset.3763749311 |
|
|
Sep 09 06:55:49 AM UTC 24 |
Sep 09 06:58:01 AM UTC 24 |
61957357936 ps |
T839 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/24.uart_stress_all.3847535495 |
|
|
Sep 09 06:46:40 AM UTC 24 |
Sep 09 06:58:02 AM UTC 24 |
291391948813 ps |
T840 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/23.uart_stress_all.2681756286 |
|
|
Sep 09 06:46:01 AM UTC 24 |
Sep 09 06:58:03 AM UTC 24 |
185942139757 ps |
T841 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.2474654058 |
|
|
Sep 09 06:49:47 AM UTC 24 |
Sep 09 06:58:04 AM UTC 24 |
90814625061 ps |
T842 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_alert_test.4040532944 |
|
|
Sep 09 06:58:03 AM UTC 24 |
Sep 09 06:58:04 AM UTC 24 |
10428519 ps |
T843 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/46.uart_smoke.708492012 |
|
|
Sep 09 06:58:04 AM UTC 24 |
Sep 09 06:58:07 AM UTC 24 |
505862077 ps |
T844 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_tx_rx.2093449321 |
|
|
Sep 09 06:57:39 AM UTC 24 |
Sep 09 06:58:09 AM UTC 24 |
71919027493 ps |
T845 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.2945431514 |
|
|
Sep 09 06:57:06 AM UTC 24 |
Sep 09 06:58:13 AM UTC 24 |
32208174366 ps |
T846 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_loopback.1595551876 |
|
|
Sep 09 06:57:54 AM UTC 24 |
Sep 09 06:58:17 AM UTC 24 |
5230369596 ps |
T847 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.220480069 |
|
|
Sep 09 06:57:53 AM UTC 24 |
Sep 09 06:58:20 AM UTC 24 |
6062221168 ps |
T848 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_noise_filter.2400171290 |
|
|
Sep 09 06:56:34 AM UTC 24 |
Sep 09 06:58:21 AM UTC 24 |
104865774187 ps |
T849 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/46.uart_rx_oversample.1371362360 |
|
|
Sep 09 06:58:10 AM UTC 24 |
Sep 09 06:58:21 AM UTC 24 |
1697833196 ps |
T850 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/35.uart_perf.1269093114 |
|
|
Sep 09 06:52:39 AM UTC 24 |
Sep 09 06:58:22 AM UTC 24 |
16670710970 ps |
T392 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.4124632518 |
|
|
Sep 09 06:56:50 AM UTC 24 |
Sep 09 06:58:25 AM UTC 24 |
12508164599 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/46.uart_tx_ovrd.1416727330 |
|
|
Sep 09 06:58:21 AM UTC 24 |
Sep 09 06:58:26 AM UTC 24 |
2232507987 ps |
T852 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_fifo_overflow.2907852579 |
|
|
Sep 09 06:57:41 AM UTC 24 |
Sep 09 06:58:27 AM UTC 24 |
26788903235 ps |
T208 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/44.uart_fifo_reset.362939988 |
|
|
Sep 09 06:57:08 AM UTC 24 |
Sep 09 06:58:30 AM UTC 24 |
61162436380 ps |
T853 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/46.uart_loopback.3654296613 |
|
|
Sep 09 06:58:22 AM UTC 24 |
Sep 09 06:58:30 AM UTC 24 |
6031184822 ps |
T237 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_fifo_reset.4037934293 |
|
|
Sep 09 06:57:42 AM UTC 24 |
Sep 09 06:58:31 AM UTC 24 |
19889186914 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/46.uart_alert_test.1004671384 |
|
|
Sep 09 06:58:31 AM UTC 24 |
Sep 09 06:58:33 AM UTC 24 |
17255377 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/45.uart_fifo_full.127216146 |
|
|
Sep 09 06:57:39 AM UTC 24 |
Sep 09 06:58:34 AM UTC 24 |
129459503408 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/47.uart_smoke.747737197 |
|
|
Sep 09 06:58:32 AM UTC 24 |
Sep 09 06:58:35 AM UTC 24 |
585955281 ps |
T188 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/40.uart_fifo_reset.3921901417 |
|
|
Sep 09 06:54:57 AM UTC 24 |
Sep 09 06:58:35 AM UTC 24 |
196952707306 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_09_08/uart-sim-vcs/coverage/default/46.uart_intr.2475406277 |
|
|
Sep 09 06:58:14 AM UTC 24 |
Sep 09 06:58:36 AM UTC 24 |
38299360901 ps |