T455 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/15.uart_rx_start_bit_filter.1691696095 |
|
|
Sep 11 03:01:18 AM UTC 24 |
Sep 11 03:02:36 AM UTC 24 |
42235625794 ps |
T94 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/15.uart_fifo_reset.1037420152 |
|
|
Sep 11 03:01:16 AM UTC 24 |
Sep 11 03:02:37 AM UTC 24 |
60192562360 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_smoke.2734436461 |
|
|
Sep 11 03:02:34 AM UTC 24 |
Sep 11 03:02:37 AM UTC 24 |
966031770 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_tx_rx.2072706516 |
|
|
Sep 11 03:02:10 AM UTC 24 |
Sep 11 03:02:41 AM UTC 24 |
25196237614 ps |
T136 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_fifo_full.2614750693 |
|
|
Sep 11 03:01:44 AM UTC 24 |
Sep 11 03:02:41 AM UTC 24 |
53130954257 ps |
T303 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.3309698400 |
|
|
Sep 11 02:55:59 AM UTC 24 |
Sep 11 03:02:42 AM UTC 24 |
63191056555 ps |
T323 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.1168159221 |
|
|
Sep 11 02:57:48 AM UTC 24 |
Sep 11 03:02:45 AM UTC 24 |
106709699445 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.3479089244 |
|
|
Sep 11 03:02:21 AM UTC 24 |
Sep 11 03:02:46 AM UTC 24 |
33054589899 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.655255920 |
|
|
Sep 11 03:02:43 AM UTC 24 |
Sep 11 03:02:46 AM UTC 24 |
1745828104 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.776754456 |
|
|
Sep 11 03:02:46 AM UTC 24 |
Sep 11 03:02:51 AM UTC 24 |
1580965968 ps |
T80 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.1013087180 |
|
|
Sep 11 03:02:03 AM UTC 24 |
Sep 11 03:02:51 AM UTC 24 |
29404937456 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_rx_oversample.2020319533 |
|
|
Sep 11 03:02:39 AM UTC 24 |
Sep 11 03:02:53 AM UTC 24 |
5085986331 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_rx_oversample.4027832744 |
|
|
Sep 11 03:02:12 AM UTC 24 |
Sep 11 03:02:59 AM UTC 24 |
5079266158 ps |
T333 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.2740611768 |
|
|
Sep 11 03:00:27 AM UTC 24 |
Sep 11 03:02:59 AM UTC 24 |
20685754745 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_loopback.2855646978 |
|
|
Sep 11 03:02:47 AM UTC 24 |
Sep 11 03:03:00 AM UTC 24 |
2549898199 ps |
T162 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.1541517368 |
|
|
Sep 11 03:01:54 AM UTC 24 |
Sep 11 03:03:00 AM UTC 24 |
65656521024 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_perf.3171559014 |
|
|
Sep 11 03:01:55 AM UTC 24 |
Sep 11 03:03:01 AM UTC 24 |
7445765447 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_alert_test.2311694064 |
|
|
Sep 11 03:02:59 AM UTC 24 |
Sep 11 03:03:01 AM UTC 24 |
41783920 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_smoke.2614125388 |
|
|
Sep 11 03:03:00 AM UTC 24 |
Sep 11 03:03:07 AM UTC 24 |
841647335 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_fifo_reset.2578067712 |
|
|
Sep 11 03:02:37 AM UTC 24 |
Sep 11 03:03:05 AM UTC 24 |
109344601757 ps |
T254 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.2575749646 |
|
|
Sep 11 03:01:46 AM UTC 24 |
Sep 11 03:03:09 AM UTC 24 |
108278312307 ps |
T341 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.3923311864 |
|
|
Sep 11 02:59:27 AM UTC 24 |
Sep 11 03:03:12 AM UTC 24 |
102451835489 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_tx_rx.3065316123 |
|
|
Sep 11 03:03:01 AM UTC 24 |
Sep 11 03:03:13 AM UTC 24 |
13517547783 ps |
T316 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_noise_filter.3575831103 |
|
|
Sep 11 03:01:50 AM UTC 24 |
Sep 11 03:03:16 AM UTC 24 |
148090543201 ps |
T331 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.4166977175 |
|
|
Sep 11 03:02:11 AM UTC 24 |
Sep 11 03:03:26 AM UTC 24 |
64824156362 ps |
T378 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.4130344606 |
|
|
Sep 11 03:02:53 AM UTC 24 |
Sep 11 03:03:29 AM UTC 24 |
4726231585 ps |
T151 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/8.uart_fifo_full.4159744033 |
|
|
Sep 11 02:57:44 AM UTC 24 |
Sep 11 03:03:30 AM UTC 24 |
269619007423 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.418388258 |
|
|
Sep 11 03:03:27 AM UTC 24 |
Sep 11 03:03:31 AM UTC 24 |
615126482 ps |
T343 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_noise_filter.2448278131 |
|
|
Sep 11 03:02:15 AM UTC 24 |
Sep 11 03:03:33 AM UTC 24 |
117379154636 ps |
T283 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/11.uart_stress_all.3861265763 |
|
|
Sep 11 02:59:29 AM UTC 24 |
Sep 11 03:03:34 AM UTC 24 |
127116306427 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_loopback.4115239267 |
|
|
Sep 11 03:03:29 AM UTC 24 |
Sep 11 03:03:36 AM UTC 24 |
9118417072 ps |
T349 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_noise_filter.847107417 |
|
|
Sep 11 03:02:42 AM UTC 24 |
Sep 11 03:03:36 AM UTC 24 |
98454851096 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_intr.34568910 |
|
|
Sep 11 03:02:42 AM UTC 24 |
Sep 11 03:03:37 AM UTC 24 |
57731141776 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_alert_test.56909973 |
|
|
Sep 11 03:03:37 AM UTC 24 |
Sep 11 03:03:39 AM UTC 24 |
28395104 ps |
T329 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_smoke.1025397716 |
|
|
Sep 11 03:03:37 AM UTC 24 |
Sep 11 03:03:40 AM UTC 24 |
269669609 ps |
T137 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.1919845076 |
|
|
Sep 11 03:01:11 AM UTC 24 |
Sep 11 03:03:42 AM UTC 24 |
86654534925 ps |
T281 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_tx_rx.2042179482 |
|
|
Sep 11 03:02:36 AM UTC 24 |
Sep 11 03:03:42 AM UTC 24 |
89026010022 ps |
T353 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/7.uart_perf.3910994679 |
|
|
Sep 11 02:57:33 AM UTC 24 |
Sep 11 03:03:42 AM UTC 24 |
24333238236 ps |
T350 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_fifo_full.959558012 |
|
|
Sep 11 03:02:10 AM UTC 24 |
Sep 11 03:03:43 AM UTC 24 |
148518364662 ps |
T81 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.353906225 |
|
|
Sep 11 03:02:32 AM UTC 24 |
Sep 11 03:03:44 AM UTC 24 |
5053109061 ps |
T131 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/15.uart_fifo_full.2901456542 |
|
|
Sep 11 03:01:08 AM UTC 24 |
Sep 11 03:03:45 AM UTC 24 |
74350071202 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_fifo_full.1591416245 |
|
|
Sep 11 03:02:37 AM UTC 24 |
Sep 11 03:03:45 AM UTC 24 |
37208786677 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.3787205702 |
|
|
Sep 11 03:03:34 AM UTC 24 |
Sep 11 03:03:51 AM UTC 24 |
2616962717 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.1701439300 |
|
|
Sep 11 03:03:47 AM UTC 24 |
Sep 11 03:03:52 AM UTC 24 |
1302860301 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_intr.1940731048 |
|
|
Sep 11 03:03:43 AM UTC 24 |
Sep 11 03:03:53 AM UTC 24 |
29542186085 ps |
T221 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_fifo_reset.4085630786 |
|
|
Sep 11 03:03:07 AM UTC 24 |
Sep 11 03:03:53 AM UTC 24 |
217519264028 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_rx_oversample.2373691749 |
|
|
Sep 11 03:03:43 AM UTC 24 |
Sep 11 03:03:53 AM UTC 24 |
3862676054 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.676557115 |
|
|
Sep 11 03:03:45 AM UTC 24 |
Sep 11 03:03:57 AM UTC 24 |
4909805321 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_alert_test.2291277973 |
|
|
Sep 11 03:03:58 AM UTC 24 |
Sep 11 03:04:00 AM UTC 24 |
21654345 ps |
T134 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.4146312815 |
|
|
Sep 11 03:02:37 AM UTC 24 |
Sep 11 03:04:00 AM UTC 24 |
115847172986 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_noise_filter.4057788960 |
|
|
Sep 11 03:03:13 AM UTC 24 |
Sep 11 03:04:00 AM UTC 24 |
376908779669 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_smoke.2071139749 |
|
|
Sep 11 03:04:01 AM UTC 24 |
Sep 11 03:04:03 AM UTC 24 |
93589065 ps |
T262 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_tx_rx.14688186 |
|
|
Sep 11 03:03:38 AM UTC 24 |
Sep 11 03:04:04 AM UTC 24 |
87546183675 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_loopback.869138183 |
|
|
Sep 11 03:03:52 AM UTC 24 |
Sep 11 03:04:05 AM UTC 24 |
10271315388 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.3893349760 |
|
|
Sep 11 03:03:14 AM UTC 24 |
Sep 11 03:04:07 AM UTC 24 |
45716329711 ps |
T154 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.614027011 |
|
|
Sep 11 03:03:02 AM UTC 24 |
Sep 11 03:04:11 AM UTC 24 |
23223575529 ps |
T128 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.271932663 |
|
|
Sep 11 03:03:16 AM UTC 24 |
Sep 11 03:04:11 AM UTC 24 |
20565966066 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.4284080232 |
|
|
Sep 11 03:04:12 AM UTC 24 |
Sep 11 03:04:15 AM UTC 24 |
1962294335 ps |
T184 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/12.uart_fifo_reset.3314568567 |
|
|
Sep 11 02:59:38 AM UTC 24 |
Sep 11 03:04:16 AM UTC 24 |
112245438341 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_perf.3681764751 |
|
|
Sep 11 03:02:52 AM UTC 24 |
Sep 11 03:04:17 AM UTC 24 |
5786272130 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_rx_oversample.1977292684 |
|
|
Sep 11 03:04:05 AM UTC 24 |
Sep 11 03:04:19 AM UTC 24 |
2213784592 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_rx_oversample.3725862041 |
|
|
Sep 11 03:03:08 AM UTC 24 |
Sep 11 03:04:19 AM UTC 24 |
6171092571 ps |
T364 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/12.uart_perf.1819863147 |
|
|
Sep 11 02:59:48 AM UTC 24 |
Sep 11 03:04:20 AM UTC 24 |
19617092411 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.3676266600 |
|
|
Sep 11 03:04:17 AM UTC 24 |
Sep 11 03:04:23 AM UTC 24 |
934940707 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_loopback.2167276735 |
|
|
Sep 11 03:04:18 AM UTC 24 |
Sep 11 03:04:26 AM UTC 24 |
6480348544 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_alert_test.1632277371 |
|
|
Sep 11 03:04:27 AM UTC 24 |
Sep 11 03:04:30 AM UTC 24 |
13590037 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_fifo_full.1281622438 |
|
|
Sep 11 03:03:39 AM UTC 24 |
Sep 11 03:04:32 AM UTC 24 |
17340539832 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_intr.2684166931 |
|
|
Sep 11 03:03:10 AM UTC 24 |
Sep 11 03:04:32 AM UTC 24 |
49745345804 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_smoke.3941507628 |
|
|
Sep 11 03:04:30 AM UTC 24 |
Sep 11 03:04:34 AM UTC 24 |
631868885 ps |
T157 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.126456118 |
|
|
Sep 11 03:03:41 AM UTC 24 |
Sep 11 03:04:35 AM UTC 24 |
95467376722 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_intr.1873849510 |
|
|
Sep 11 03:04:08 AM UTC 24 |
Sep 11 03:04:35 AM UTC 24 |
17292554034 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/14.uart_perf.3995940316 |
|
|
Sep 11 03:00:57 AM UTC 24 |
Sep 11 03:04:42 AM UTC 24 |
16947280058 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_noise_filter.2009817104 |
|
|
Sep 11 03:03:43 AM UTC 24 |
Sep 11 03:04:46 AM UTC 24 |
35259522120 ps |
T290 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_stress_all.813459436 |
|
|
Sep 11 03:02:05 AM UTC 24 |
Sep 11 03:04:49 AM UTC 24 |
1141884316650 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.3915456822 |
|
|
Sep 11 03:03:54 AM UTC 24 |
Sep 11 03:04:52 AM UTC 24 |
17094149113 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.923890437 |
|
|
Sep 11 03:04:49 AM UTC 24 |
Sep 11 03:04:53 AM UTC 24 |
4448331926 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_perf.3233956775 |
|
|
Sep 11 03:02:31 AM UTC 24 |
Sep 11 03:04:54 AM UTC 24 |
14137689422 ps |
T387 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_fifo_reset.4088035227 |
|
|
Sep 11 03:04:36 AM UTC 24 |
Sep 11 03:04:56 AM UTC 24 |
21848209567 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_intr.1731109171 |
|
|
Sep 11 03:04:43 AM UTC 24 |
Sep 11 03:05:06 AM UTC 24 |
12160059298 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.18224787 |
|
|
Sep 11 03:04:53 AM UTC 24 |
Sep 11 03:05:08 AM UTC 24 |
8726708893 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_loopback.2982029929 |
|
|
Sep 11 03:04:55 AM UTC 24 |
Sep 11 03:05:09 AM UTC 24 |
5015552356 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/10.uart_perf.4063849241 |
|
|
Sep 11 02:58:49 AM UTC 24 |
Sep 11 03:05:10 AM UTC 24 |
6752966477 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_rx_oversample.1087425747 |
|
|
Sep 11 03:04:36 AM UTC 24 |
Sep 11 03:05:10 AM UTC 24 |
4182719751 ps |
T129 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_fifo_reset.1914869027 |
|
|
Sep 11 03:02:11 AM UTC 24 |
Sep 11 03:05:12 AM UTC 24 |
64208383929 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_alert_test.1867504785 |
|
|
Sep 11 03:05:11 AM UTC 24 |
Sep 11 03:05:13 AM UTC 24 |
31287094 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.57283218 |
|
|
Sep 11 03:04:04 AM UTC 24 |
Sep 11 03:05:17 AM UTC 24 |
23621736755 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_smoke.45357661 |
|
|
Sep 11 03:05:12 AM UTC 24 |
Sep 11 03:05:17 AM UTC 24 |
444118053 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_tx_rx.3923779775 |
|
|
Sep 11 03:04:01 AM UTC 24 |
Sep 11 03:05:18 AM UTC 24 |
106416244043 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.1805715428 |
|
|
Sep 11 03:04:16 AM UTC 24 |
Sep 11 03:05:18 AM UTC 24 |
37106532565 ps |
T299 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_fifo_full.4174579569 |
|
|
Sep 11 03:04:34 AM UTC 24 |
Sep 11 03:05:21 AM UTC 24 |
38542039157 ps |
T155 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.4294447924 |
|
|
Sep 11 02:59:05 AM UTC 24 |
Sep 11 03:05:21 AM UTC 24 |
144080055646 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_stress_all.4093646966 |
|
|
Sep 11 03:05:10 AM UTC 24 |
Sep 11 03:05:22 AM UTC 24 |
25909236332 ps |
T282 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.408644389 |
|
|
Sep 11 03:03:45 AM UTC 24 |
Sep 11 03:05:23 AM UTC 24 |
141574119375 ps |
T96 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_stress_all.239819928 |
|
|
Sep 11 03:04:24 AM UTC 24 |
Sep 11 03:05:24 AM UTC 24 |
64225209698 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.3721633048 |
|
|
Sep 11 03:05:22 AM UTC 24 |
Sep 11 03:05:25 AM UTC 24 |
3146447235 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.2062440925 |
|
|
Sep 11 03:05:24 AM UTC 24 |
Sep 11 03:05:28 AM UTC 24 |
2376916698 ps |
T135 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.593473026 |
|
|
Sep 11 03:04:21 AM UTC 24 |
Sep 11 03:05:29 AM UTC 24 |
28972687980 ps |
T126 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_fifo_reset.4027615631 |
|
|
Sep 11 03:04:04 AM UTC 24 |
Sep 11 03:05:30 AM UTC 24 |
32321775936 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_rx_oversample.2168599597 |
|
|
Sep 11 03:05:18 AM UTC 24 |
Sep 11 03:05:33 AM UTC 24 |
4636711696 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_loopback.4126398144 |
|
|
Sep 11 03:05:25 AM UTC 24 |
Sep 11 03:05:35 AM UTC 24 |
5206561600 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_alert_test.241405482 |
|
|
Sep 11 03:05:34 AM UTC 24 |
Sep 11 03:05:36 AM UTC 24 |
70880656 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_smoke.3275703212 |
|
|
Sep 11 03:05:35 AM UTC 24 |
Sep 11 03:05:38 AM UTC 24 |
322403145 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.4241707417 |
|
|
Sep 11 03:04:53 AM UTC 24 |
Sep 11 03:05:38 AM UTC 24 |
116963615870 ps |
T287 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_noise_filter.1372465674 |
|
|
Sep 11 03:04:12 AM UTC 24 |
Sep 11 03:05:39 AM UTC 24 |
47196508544 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_stress_all.1921833621 |
|
|
Sep 11 03:02:33 AM UTC 24 |
Sep 11 03:05:40 AM UTC 24 |
230672887252 ps |
T344 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.85114488 |
|
|
Sep 11 03:05:23 AM UTC 24 |
Sep 11 03:05:56 AM UTC 24 |
21423582868 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.3878980425 |
|
|
Sep 11 03:02:46 AM UTC 24 |
Sep 11 03:05:59 AM UTC 24 |
131100651275 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_rx_oversample.496002491 |
|
|
Sep 11 03:05:40 AM UTC 24 |
Sep 11 03:05:59 AM UTC 24 |
1983183110 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_fifo_full.287352104 |
|
|
Sep 11 03:03:02 AM UTC 24 |
Sep 11 03:05:59 AM UTC 24 |
229278088461 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/15.uart_stress_all.1394020518 |
|
|
Sep 11 03:01:31 AM UTC 24 |
Sep 11 03:06:01 AM UTC 24 |
360702409561 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_tx_rx.170441308 |
|
|
Sep 11 03:05:13 AM UTC 24 |
Sep 11 03:06:05 AM UTC 24 |
97121992061 ps |
T142 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_fifo_reset.2208711962 |
|
|
Sep 11 03:05:17 AM UTC 24 |
Sep 11 03:06:06 AM UTC 24 |
112169584779 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.344034562 |
|
|
Sep 11 02:59:49 AM UTC 24 |
Sep 11 03:06:06 AM UTC 24 |
213565996295 ps |
T186 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_fifo_reset.2227325028 |
|
|
Sep 11 03:03:43 AM UTC 24 |
Sep 11 03:06:06 AM UTC 24 |
87822080369 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.3324140270 |
|
|
Sep 11 03:04:35 AM UTC 24 |
Sep 11 03:06:07 AM UTC 24 |
104470363900 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.3259555939 |
|
|
Sep 11 02:57:35 AM UTC 24 |
Sep 11 03:06:10 AM UTC 24 |
171037974172 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_noise_filter.1756289051 |
|
|
Sep 11 03:04:47 AM UTC 24 |
Sep 11 03:06:10 AM UTC 24 |
245878624760 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_fifo_full.743899917 |
|
|
Sep 11 03:04:01 AM UTC 24 |
Sep 11 03:06:11 AM UTC 24 |
145049739267 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.234228945 |
|
|
Sep 11 03:06:02 AM UTC 24 |
Sep 11 03:06:11 AM UTC 24 |
1210285926 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.356508274 |
|
|
Sep 11 02:58:32 AM UTC 24 |
Sep 11 03:06:11 AM UTC 24 |
125408067884 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_alert_test.3057006228 |
|
|
Sep 11 03:06:10 AM UTC 24 |
Sep 11 03:06:12 AM UTC 24 |
20185092 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_loopback.2895729821 |
|
|
Sep 11 03:06:06 AM UTC 24 |
Sep 11 03:06:13 AM UTC 24 |
7241612740 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.1860939068 |
|
|
Sep 11 03:06:00 AM UTC 24 |
Sep 11 03:06:19 AM UTC 24 |
5594563777 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.3558891854 |
|
|
Sep 11 03:06:12 AM UTC 24 |
Sep 11 03:06:21 AM UTC 24 |
20423811913 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/9.uart_stress_all.966217554 |
|
|
Sep 11 02:58:24 AM UTC 24 |
Sep 11 03:06:24 AM UTC 24 |
233123122874 ps |
T82 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.2281394933 |
|
|
Sep 11 03:05:30 AM UTC 24 |
Sep 11 03:06:26 AM UTC 24 |
9809990621 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_fifo_reset.1840932529 |
|
|
Sep 11 03:06:13 AM UTC 24 |
Sep 11 03:06:27 AM UTC 24 |
4152932292 ps |
T192 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.3112066891 |
|
|
Sep 11 03:05:09 AM UTC 24 |
Sep 11 03:06:29 AM UTC 24 |
20871878289 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.3981394186 |
|
|
Sep 11 02:58:23 AM UTC 24 |
Sep 11 03:06:30 AM UTC 24 |
76308808572 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_smoke.2948374399 |
|
|
Sep 11 03:06:11 AM UTC 24 |
Sep 11 03:06:31 AM UTC 24 |
6033625682 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.4254965799 |
|
|
Sep 11 03:06:27 AM UTC 24 |
Sep 11 03:06:31 AM UTC 24 |
1345486277 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_loopback.661364540 |
|
|
Sep 11 03:06:29 AM UTC 24 |
Sep 11 03:06:34 AM UTC 24 |
3146217807 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_tx_rx.404843432 |
|
|
Sep 11 03:06:12 AM UTC 24 |
Sep 11 03:06:37 AM UTC 24 |
54649990513 ps |
T309 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/8.uart_tx_rx.889024225 |
|
|
Sep 11 02:57:44 AM UTC 24 |
Sep 11 03:06:38 AM UTC 24 |
108267798249 ps |
T348 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_tx_rx.2686301680 |
|
|
Sep 11 03:05:37 AM UTC 24 |
Sep 11 03:06:39 AM UTC 24 |
98382779479 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_alert_test.3290394187 |
|
|
Sep 11 03:06:38 AM UTC 24 |
Sep 11 03:06:40 AM UTC 24 |
35644255 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_smoke.1350899154 |
|
|
Sep 11 03:06:39 AM UTC 24 |
Sep 11 03:06:41 AM UTC 24 |
308769672 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_tx_rx.706166454 |
|
|
Sep 11 03:04:34 AM UTC 24 |
Sep 11 03:06:45 AM UTC 24 |
42650362705 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.3264561797 |
|
|
Sep 11 03:06:07 AM UTC 24 |
Sep 11 03:06:48 AM UTC 24 |
2355066767 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_rx_oversample.1605972193 |
|
|
Sep 11 03:06:14 AM UTC 24 |
Sep 11 03:06:53 AM UTC 24 |
2982790503 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_intr.3137672162 |
|
|
Sep 11 03:05:19 AM UTC 24 |
Sep 11 03:06:57 AM UTC 24 |
50790581473 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.704231403 |
|
|
Sep 11 03:06:33 AM UTC 24 |
Sep 11 03:06:59 AM UTC 24 |
4322022907 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_fifo_full.2933869650 |
|
|
Sep 11 03:05:38 AM UTC 24 |
Sep 11 03:07:06 AM UTC 24 |
40755450517 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_intr.671154192 |
|
|
Sep 11 03:06:54 AM UTC 24 |
Sep 11 03:07:08 AM UTC 24 |
27891772869 ps |
T187 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_fifo_reset.560985153 |
|
|
Sep 11 03:06:46 AM UTC 24 |
Sep 11 03:07:13 AM UTC 24 |
11081817118 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.2052695732 |
|
|
Sep 11 03:07:10 AM UTC 24 |
Sep 11 03:07:15 AM UTC 24 |
2383293379 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.2481756865 |
|
|
Sep 11 03:06:25 AM UTC 24 |
Sep 11 03:07:19 AM UTC 24 |
35864757299 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.4154890368 |
|
|
Sep 11 03:06:07 AM UTC 24 |
Sep 11 03:07:19 AM UTC 24 |
182432641384 ps |
T138 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_fifo_full.956925950 |
|
|
Sep 11 03:05:14 AM UTC 24 |
Sep 11 03:07:24 AM UTC 24 |
143144347522 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_noise_filter.1416321132 |
|
|
Sep 11 03:06:58 AM UTC 24 |
Sep 11 03:07:25 AM UTC 24 |
14996750799 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_alert_test.3065801415 |
|
|
Sep 11 03:07:26 AM UTC 24 |
Sep 11 03:07:28 AM UTC 24 |
35528569 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_intr.716165456 |
|
|
Sep 11 03:05:58 AM UTC 24 |
Sep 11 03:07:29 AM UTC 24 |
25081669028 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_smoke.1857469947 |
|
|
Sep 11 03:07:29 AM UTC 24 |
Sep 11 03:07:31 AM UTC 24 |
155568753 ps |
T182 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_fifo_reset.4284256603 |
|
|
Sep 11 03:05:39 AM UTC 24 |
Sep 11 03:07:33 AM UTC 24 |
96585586925 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_fifo_full.3444886445 |
|
|
Sep 11 03:06:12 AM UTC 24 |
Sep 11 03:07:33 AM UTC 24 |
34168291212 ps |
T161 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.3638515429 |
|
|
Sep 11 03:06:27 AM UTC 24 |
Sep 11 03:07:34 AM UTC 24 |
73785484472 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.3730687147 |
|
|
Sep 11 03:05:38 AM UTC 24 |
Sep 11 03:07:36 AM UTC 24 |
102559769311 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.1982506710 |
|
|
Sep 11 03:07:00 AM UTC 24 |
Sep 11 03:07:38 AM UTC 24 |
42079756530 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.1831916719 |
|
|
Sep 11 03:07:20 AM UTC 24 |
Sep 11 03:07:41 AM UTC 24 |
1777555410 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.463119751 |
|
|
Sep 11 03:07:08 AM UTC 24 |
Sep 11 03:07:42 AM UTC 24 |
19540328020 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_loopback.4027293965 |
|
|
Sep 11 03:07:14 AM UTC 24 |
Sep 11 03:07:45 AM UTC 24 |
11518530393 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_rx_oversample.2488309613 |
|
|
Sep 11 03:06:49 AM UTC 24 |
Sep 11 03:07:45 AM UTC 24 |
5759862987 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_rx_oversample.4134109034 |
|
|
Sep 11 03:07:35 AM UTC 24 |
Sep 11 03:07:46 AM UTC 24 |
3281400944 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.2086473154 |
|
|
Sep 11 03:07:42 AM UTC 24 |
Sep 11 03:07:46 AM UTC 24 |
5692093711 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_tx_rx.999207882 |
|
|
Sep 11 03:06:40 AM UTC 24 |
Sep 11 03:07:46 AM UTC 24 |
31847649900 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_loopback.838530301 |
|
|
Sep 11 03:07:46 AM UTC 24 |
Sep 11 03:07:48 AM UTC 24 |
34339973 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.2399034876 |
|
|
Sep 11 03:07:46 AM UTC 24 |
Sep 11 03:07:52 AM UTC 24 |
971439188 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_alert_test.3826121746 |
|
|
Sep 11 03:07:52 AM UTC 24 |
Sep 11 03:07:54 AM UTC 24 |
41652644 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.3761969809 |
|
|
Sep 11 03:05:06 AM UTC 24 |
Sep 11 03:07:56 AM UTC 24 |
160758948875 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/22.uart_perf.3421604655 |
|
|
Sep 11 03:04:57 AM UTC 24 |
Sep 11 03:07:58 AM UTC 24 |
15491312255 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_smoke.1115763506 |
|
|
Sep 11 03:07:55 AM UTC 24 |
Sep 11 03:07:59 AM UTC 24 |
626175137 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.3405594135 |
|
|
Sep 11 03:03:32 AM UTC 24 |
Sep 11 03:08:03 AM UTC 24 |
183178084873 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.3639883690 |
|
|
Sep 11 02:57:03 AM UTC 24 |
Sep 11 03:08:04 AM UTC 24 |
109142920261 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_intr.2550335458 |
|
|
Sep 11 03:06:20 AM UTC 24 |
Sep 11 03:08:05 AM UTC 24 |
27072060875 ps |
T163 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.3969614928 |
|
|
Sep 11 03:07:33 AM UTC 24 |
Sep 11 03:08:10 AM UTC 24 |
41181101667 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_fifo_full.585544710 |
|
|
Sep 11 03:07:32 AM UTC 24 |
Sep 11 03:08:14 AM UTC 24 |
20724460232 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_intr.4258923124 |
|
|
Sep 11 03:08:06 AM UTC 24 |
Sep 11 03:08:14 AM UTC 24 |
4422330183 ps |
T391 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_noise_filter.2227256067 |
|
|
Sep 11 03:05:21 AM UTC 24 |
Sep 11 03:08:15 AM UTC 24 |
143454943617 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.2638074695 |
|
|
Sep 11 03:08:16 AM UTC 24 |
Sep 11 03:08:20 AM UTC 24 |
1679969303 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_noise_filter.2080107529 |
|
|
Sep 11 03:07:40 AM UTC 24 |
Sep 11 03:08:20 AM UTC 24 |
19242180424 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.2299242919 |
|
|
Sep 11 03:06:42 AM UTC 24 |
Sep 11 03:08:22 AM UTC 24 |
23780165365 ps |
T354 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/11.uart_fifo_full.5348442 |
|
|
Sep 11 02:59:04 AM UTC 24 |
Sep 11 03:08:22 AM UTC 24 |
219162438079 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.1385077615 |
|
|
Sep 11 03:08:14 AM UTC 24 |
Sep 11 03:08:23 AM UTC 24 |
1876785097 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_fifo_reset.867837378 |
|
|
Sep 11 03:07:34 AM UTC 24 |
Sep 11 03:08:24 AM UTC 24 |
81100554574 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_alert_test.3709852372 |
|
|
Sep 11 03:08:25 AM UTC 24 |
Sep 11 03:08:26 AM UTC 24 |
30979095 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/9.uart_perf.2862584025 |
|
|
Sep 11 02:58:18 AM UTC 24 |
Sep 11 03:08:27 AM UTC 24 |
8500226868 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_smoke.3030973200 |
|
|
Sep 11 03:08:27 AM UTC 24 |
Sep 11 03:08:30 AM UTC 24 |
990470651 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_loopback.2663521365 |
|
|
Sep 11 03:08:20 AM UTC 24 |
Sep 11 03:08:36 AM UTC 24 |
9527569737 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.2649844279 |
|
|
Sep 11 03:07:47 AM UTC 24 |
Sep 11 03:08:38 AM UTC 24 |
4521402238 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.2085748942 |
|
|
Sep 11 03:07:43 AM UTC 24 |
Sep 11 03:08:41 AM UTC 24 |
121939969710 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_intr.245073749 |
|
|
Sep 11 03:01:50 AM UTC 24 |
Sep 11 03:08:41 AM UTC 24 |
62260107532 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_rx_oversample.660572507 |
|
|
Sep 11 03:08:41 AM UTC 24 |
Sep 11 03:08:53 AM UTC 24 |
3580726224 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_perf.1667612048 |
|
|
Sep 11 03:06:30 AM UTC 24 |
Sep 11 03:08:43 AM UTC 24 |
4352522548 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_fifo_reset.2357529833 |
|
|
Sep 11 03:08:05 AM UTC 24 |
Sep 11 03:08:50 AM UTC 24 |
62845142016 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_rx_oversample.4220939241 |
|
|
Sep 11 03:08:05 AM UTC 24 |
Sep 11 03:08:54 AM UTC 24 |
4284828788 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_intr.639319309 |
|
|
Sep 11 03:08:41 AM UTC 24 |
Sep 11 03:08:57 AM UTC 24 |
18062208376 ps |
T359 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.1927261567 |
|
|
Sep 11 03:08:56 AM UTC 24 |
Sep 11 03:08:59 AM UTC 24 |
1136548272 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_tx_rx.381068344 |
|
|
Sep 11 03:08:28 AM UTC 24 |
Sep 11 03:09:00 AM UTC 24 |
56739536805 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.1571929663 |
|
|
Sep 11 03:08:50 AM UTC 24 |
Sep 11 03:09:03 AM UTC 24 |
38367663140 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_intr.3081318386 |
|
|
Sep 11 03:07:38 AM UTC 24 |
Sep 11 03:09:03 AM UTC 24 |
44298907342 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_perf.341816518 |
|
|
Sep 11 03:08:21 AM UTC 24 |
Sep 11 03:09:08 AM UTC 24 |
4424844764 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_alert_test.316994521 |
|
|
Sep 11 03:09:08 AM UTC 24 |
Sep 11 03:09:10 AM UTC 24 |
15789495 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_noise_filter.3086693885 |
|
|
Sep 11 03:06:22 AM UTC 24 |
Sep 11 03:09:11 AM UTC 24 |
66847067835 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.621542720 |
|
|
Sep 11 03:08:53 AM UTC 24 |
Sep 11 03:09:12 AM UTC 24 |
42551950951 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.1952472995 |
|
|
Sep 11 03:08:24 AM UTC 24 |
Sep 11 03:09:15 AM UTC 24 |
8412072264 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_smoke.769293518 |
|
|
Sep 11 03:09:11 AM UTC 24 |
Sep 11 03:09:17 AM UTC 24 |
535301294 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_fifo_full.2178887628 |
|
|
Sep 11 03:07:59 AM UTC 24 |
Sep 11 03:09:18 AM UTC 24 |
35854137590 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.997040254 |
|
|
Sep 11 03:04:20 AM UTC 24 |
Sep 11 03:09:20 AM UTC 24 |
135359585151 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_loopback.2047356977 |
|
|
Sep 11 03:08:58 AM UTC 24 |
Sep 11 03:09:23 AM UTC 24 |
9072696775 ps |
T127 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_stress_all.4240059816 |
|
|
Sep 11 03:07:49 AM UTC 24 |
Sep 11 03:09:28 AM UTC 24 |
178183608743 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_rx_oversample.4257515519 |
|
|
Sep 11 03:09:19 AM UTC 24 |
Sep 11 03:09:28 AM UTC 24 |
7116875641 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_intr.3974722533 |
|
|
Sep 11 03:09:21 AM UTC 24 |
Sep 11 03:09:32 AM UTC 24 |
12409246246 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.736187494 |
|
|
Sep 11 03:09:29 AM UTC 24 |
Sep 11 03:09:32 AM UTC 24 |
1657584823 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.3127151890 |
|
|
Sep 11 03:09:33 AM UTC 24 |
Sep 11 03:09:37 AM UTC 24 |
814626689 ps |
T315 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_fifo_full.1597035902 |
|
|
Sep 11 03:08:31 AM UTC 24 |
Sep 11 03:09:37 AM UTC 24 |
40719085466 ps |
T139 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.2733612052 |
|
|
Sep 11 03:05:17 AM UTC 24 |
Sep 11 03:09:38 AM UTC 24 |
94639235136 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.1516494099 |
|
|
Sep 11 03:09:38 AM UTC 24 |
Sep 11 03:09:44 AM UTC 24 |
871242099 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_loopback.3361108635 |
|
|
Sep 11 03:09:33 AM UTC 24 |
Sep 11 03:09:46 AM UTC 24 |
2778292308 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_alert_test.1954817976 |
|
|
Sep 11 03:09:46 AM UTC 24 |
Sep 11 03:09:49 AM UTC 24 |
12299330 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.558060776 |
|
|
Sep 11 03:03:54 AM UTC 24 |
Sep 11 03:09:49 AM UTC 24 |
106161849777 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.2201105846 |
|
|
Sep 11 03:02:26 AM UTC 24 |
Sep 11 03:09:54 AM UTC 24 |
167433231500 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.427114239 |
|
|
Sep 11 03:09:29 AM UTC 24 |
Sep 11 03:09:59 AM UTC 24 |
67034287842 ps |
T143 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.3382195867 |
|
|
Sep 11 03:06:00 AM UTC 24 |
Sep 11 03:10:01 AM UTC 24 |
118032223572 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_fifo_full.1585256070 |
|
|
Sep 11 03:06:41 AM UTC 24 |
Sep 11 03:10:01 AM UTC 24 |
94655669742 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.1286924339 |
|
|
Sep 11 03:08:15 AM UTC 24 |
Sep 11 03:10:03 AM UTC 24 |
59511979986 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_fifo_full.2380508279 |
|
|
Sep 11 03:09:12 AM UTC 24 |
Sep 11 03:10:05 AM UTC 24 |
57819226210 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_tx_rx.1635053697 |
|
|
Sep 11 03:07:30 AM UTC 24 |
Sep 11 03:10:07 AM UTC 24 |
78063212060 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_noise_filter.3457333245 |
|
|
Sep 11 03:09:24 AM UTC 24 |
Sep 11 03:10:08 AM UTC 24 |
76142079202 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_tx_rx.481400187 |
|
|
Sep 11 03:07:57 AM UTC 24 |
Sep 11 03:10:10 AM UTC 24 |
128324500839 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_smoke.1172217083 |
|
|
Sep 11 03:09:49 AM UTC 24 |
Sep 11 03:10:12 AM UTC 24 |
5428352432 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.1917063601 |
|
|
Sep 11 03:01:00 AM UTC 24 |
Sep 11 03:10:22 AM UTC 24 |
298810254591 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.275780407 |
|
|
Sep 11 03:10:08 AM UTC 24 |
Sep 11 03:10:24 AM UTC 24 |
34024846029 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_rx_oversample.2395299013 |
|
|
Sep 11 03:10:02 AM UTC 24 |
Sep 11 03:10:25 AM UTC 24 |
4000452574 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_tx_rx.1296531447 |
|
|
Sep 11 03:09:50 AM UTC 24 |
Sep 11 03:10:26 AM UTC 24 |
33874333932 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_fifo_reset.297273560 |
|
|
Sep 11 03:09:17 AM UTC 24 |
Sep 11 03:10:26 AM UTC 24 |
23257527501 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.3419697206 |
|
|
Sep 11 03:10:11 AM UTC 24 |
Sep 11 03:10:27 AM UTC 24 |
8690765400 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.3677386601 |
|
|
Sep 11 03:08:00 AM UTC 24 |
Sep 11 03:10:28 AM UTC 24 |
149942397480 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_alert_test.3360894581 |
|
|
Sep 11 03:10:27 AM UTC 24 |
Sep 11 03:10:29 AM UTC 24 |
39109634 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.3301386900 |
|
|
Sep 11 03:05:29 AM UTC 24 |
Sep 11 03:10:31 AM UTC 24 |
177581621329 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_smoke.3964897608 |
|
|
Sep 11 03:10:28 AM UTC 24 |
Sep 11 03:10:31 AM UTC 24 |
291372405 ps |
T388 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_stress_all.3335636815 |
|
|
Sep 11 03:07:25 AM UTC 24 |
Sep 11 03:10:33 AM UTC 24 |
218098412759 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.203053731 |
|
|
Sep 11 03:09:04 AM UTC 24 |
Sep 11 03:10:37 AM UTC 24 |
4995072364 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/23.uart_perf.1904033321 |
|
|
Sep 11 03:05:26 AM UTC 24 |
Sep 11 03:10:37 AM UTC 24 |
4684555497 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_loopback.4273873510 |
|
|
Sep 11 03:10:12 AM UTC 24 |
Sep 11 03:10:39 AM UTC 24 |
7664360117 ps |
T132 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_fifo_reset.2116598453 |
|
|
Sep 11 03:10:02 AM UTC 24 |
Sep 11 03:10:40 AM UTC 24 |
14955674141 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.372393693 |
|
|
Sep 11 03:08:37 AM UTC 24 |
Sep 11 03:10:41 AM UTC 24 |
32361080574 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.3040653400 |
|
|
Sep 11 03:07:20 AM UTC 24 |
Sep 11 03:10:41 AM UTC 24 |
41165784133 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_noise_filter.1183774235 |
|
|
Sep 11 03:06:00 AM UTC 24 |
Sep 11 03:10:42 AM UTC 24 |
90729670495 ps |
T200 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/13.uart_stress_all.2779820650 |
|
|
Sep 11 03:00:29 AM UTC 24 |
Sep 11 03:10:44 AM UTC 24 |
331388746361 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.2920388509 |
|
|
Sep 11 03:10:42 AM UTC 24 |
Sep 11 03:10:47 AM UTC 24 |
4885815676 ps |