| T626 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_loopback.3372194106 |
|
|
Sep 11 03:10:42 AM UTC 24 |
Sep 11 03:10:49 AM UTC 24 |
2619365106 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_tx_rx.1573620498 |
|
|
Sep 11 03:10:29 AM UTC 24 |
Sep 11 03:10:51 AM UTC 24 |
19453393238 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/2.uart_perf.66874519 |
|
|
Sep 11 02:56:17 AM UTC 24 |
Sep 11 03:10:51 AM UTC 24 |
13277912530 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_alert_test.2798688290 |
|
|
Sep 11 03:10:51 AM UTC 24 |
Sep 11 03:10:53 AM UTC 24 |
19447215 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_fifo_reset.2603390557 |
|
|
Sep 11 03:10:32 AM UTC 24 |
Sep 11 03:10:57 AM UTC 24 |
136757618055 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_fifo_full.634753624 |
|
|
Sep 11 03:10:29 AM UTC 24 |
Sep 11 03:10:57 AM UTC 24 |
81004632391 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_rx_oversample.1831237343 |
|
|
Sep 11 03:10:33 AM UTC 24 |
Sep 11 03:10:58 AM UTC 24 |
6051381974 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_noise_filter.3412643132 |
|
|
Sep 11 03:08:11 AM UTC 24 |
Sep 11 03:10:58 AM UTC 24 |
222889827841 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.2427325435 |
|
|
Sep 11 03:10:40 AM UTC 24 |
Sep 11 03:10:59 AM UTC 24 |
31121967116 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_intr.17160690 |
|
|
Sep 11 03:10:03 AM UTC 24 |
Sep 11 03:10:59 AM UTC 24 |
27897674011 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_smoke.2901480535 |
|
|
Sep 11 03:10:51 AM UTC 24 |
Sep 11 03:11:05 AM UTC 24 |
6337362977 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_tx_rx.1662265761 |
|
|
Sep 11 03:10:54 AM UTC 24 |
Sep 11 03:11:08 AM UTC 24 |
11168272882 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_intr.803020421 |
|
|
Sep 11 03:10:37 AM UTC 24 |
Sep 11 03:11:11 AM UTC 24 |
9057093338 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_rx_oversample.3926283775 |
|
|
Sep 11 03:11:00 AM UTC 24 |
Sep 11 03:11:13 AM UTC 24 |
1971594550 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.4094941299 |
|
|
Sep 11 03:11:11 AM UTC 24 |
Sep 11 03:11:15 AM UTC 24 |
996736435 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.2868859127 |
|
|
Sep 11 03:10:48 AM UTC 24 |
Sep 11 03:11:15 AM UTC 24 |
13113507692 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.1336236644 |
|
|
Sep 11 03:10:41 AM UTC 24 |
Sep 11 03:11:28 AM UTC 24 |
46986304039 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.3409108196 |
|
|
Sep 11 03:02:32 AM UTC 24 |
Sep 11 03:11:29 AM UTC 24 |
136514197309 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_perf.1621190689 |
|
|
Sep 11 03:10:23 AM UTC 24 |
Sep 11 03:11:29 AM UTC 24 |
4468654446 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/10.uart_stress_all.199986610 |
|
|
Sep 11 02:58:56 AM UTC 24 |
Sep 11 03:11:30 AM UTC 24 |
418429092456 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/12.uart_stress_all.149377143 |
|
|
Sep 11 02:59:51 AM UTC 24 |
Sep 11 03:11:31 AM UTC 24 |
30379002630 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_alert_test.784295389 |
|
|
Sep 11 03:11:29 AM UTC 24 |
Sep 11 03:11:32 AM UTC 24 |
45445014 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_smoke.72555515 |
|
|
Sep 11 03:11:31 AM UTC 24 |
Sep 11 03:11:34 AM UTC 24 |
778094900 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_noise_filter.2741073099 |
|
|
Sep 11 03:11:00 AM UTC 24 |
Sep 11 03:11:39 AM UTC 24 |
87056106985 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_intr.3009793114 |
|
|
Sep 11 03:11:00 AM UTC 24 |
Sep 11 03:11:43 AM UTC 24 |
50246285470 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_noise_filter.2232783404 |
|
|
Sep 11 03:10:38 AM UTC 24 |
Sep 11 03:11:44 AM UTC 24 |
52907534088 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.2303786521 |
|
|
Sep 11 03:07:47 AM UTC 24 |
Sep 11 03:11:44 AM UTC 24 |
69961811173 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.4241289374 |
|
|
Sep 11 03:09:16 AM UTC 24 |
Sep 11 03:11:51 AM UTC 24 |
245540715911 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_loopback.1881959853 |
|
|
Sep 11 03:11:14 AM UTC 24 |
Sep 11 03:11:52 AM UTC 24 |
8942299315 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_perf.387264893 |
|
|
Sep 11 03:10:43 AM UTC 24 |
Sep 11 03:11:54 AM UTC 24 |
26611533614 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.2195970576 |
|
|
Sep 11 03:11:28 AM UTC 24 |
Sep 11 03:11:59 AM UTC 24 |
7547125710 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_rx_oversample.1476369962 |
|
|
Sep 11 03:11:44 AM UTC 24 |
Sep 11 03:12:00 AM UTC 24 |
5818372627 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_fifo_full.3896007279 |
|
|
Sep 11 03:09:55 AM UTC 24 |
Sep 11 03:12:01 AM UTC 24 |
139983585317 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.698322015 |
|
|
Sep 11 03:11:55 AM UTC 24 |
Sep 11 03:12:02 AM UTC 24 |
673762200 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_fifo_reset.2526888459 |
|
|
Sep 11 03:11:40 AM UTC 24 |
Sep 11 03:12:02 AM UTC 24 |
10301081071 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_intr.2172832417 |
|
|
Sep 11 03:11:45 AM UTC 24 |
Sep 11 03:12:05 AM UTC 24 |
23417962901 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_alert_test.4078013814 |
|
|
Sep 11 03:12:06 AM UTC 24 |
Sep 11 03:12:08 AM UTC 24 |
27420855 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.1204336154 |
|
|
Sep 11 03:11:52 AM UTC 24 |
Sep 11 03:12:08 AM UTC 24 |
41872966668 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/27.uart_perf.3313510844 |
|
|
Sep 11 03:07:47 AM UTC 24 |
Sep 11 03:12:15 AM UTC 24 |
12494577304 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.283490838 |
|
|
Sep 11 03:11:06 AM UTC 24 |
Sep 11 03:12:29 AM UTC 24 |
35301022152 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.3908255123 |
|
|
Sep 11 03:10:01 AM UTC 24 |
Sep 11 03:12:32 AM UTC 24 |
123623823423 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.2327713298 |
|
|
Sep 11 03:10:09 AM UTC 24 |
Sep 11 03:12:39 AM UTC 24 |
61024925043 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_smoke.3366072426 |
|
|
Sep 11 03:12:08 AM UTC 24 |
Sep 11 03:12:41 AM UTC 24 |
5471329994 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_loopback.670385107 |
|
|
Sep 11 03:12:00 AM UTC 24 |
Sep 11 03:12:42 AM UTC 24 |
12005389251 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_tx_rx.3843666363 |
|
|
Sep 11 03:09:12 AM UTC 24 |
Sep 11 03:12:43 AM UTC 24 |
48842658741 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_fifo_full.931287821 |
|
|
Sep 11 03:12:16 AM UTC 24 |
Sep 11 03:12:47 AM UTC 24 |
37025615569 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_intr.679855354 |
|
|
Sep 11 03:12:42 AM UTC 24 |
Sep 11 03:12:48 AM UTC 24 |
8995749400 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.1935361715 |
|
|
Sep 11 03:12:45 AM UTC 24 |
Sep 11 03:12:50 AM UTC 24 |
3133520611 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_fifo_overflow.16478694 |
|
|
Sep 11 03:11:35 AM UTC 24 |
Sep 11 03:12:59 AM UTC 24 |
25358829098 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_loopback.2665187581 |
|
|
Sep 11 03:12:51 AM UTC 24 |
Sep 11 03:13:00 AM UTC 24 |
3659803698 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.3175430811 |
|
|
Sep 11 03:12:49 AM UTC 24 |
Sep 11 03:13:02 AM UTC 24 |
7769673710 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.4005872433 |
|
|
Sep 11 03:12:03 AM UTC 24 |
Sep 11 03:13:03 AM UTC 24 |
3395863347 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.966512747 |
|
|
Sep 11 03:10:58 AM UTC 24 |
Sep 11 03:13:06 AM UTC 24 |
66475192121 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_alert_test.879655694 |
|
|
Sep 11 03:13:06 AM UTC 24 |
Sep 11 03:13:08 AM UTC 24 |
22866031 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.2263954269 |
|
|
Sep 11 03:11:09 AM UTC 24 |
Sep 11 03:13:09 AM UTC 24 |
124976063496 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.681681768 |
|
|
Sep 11 03:10:26 AM UTC 24 |
Sep 11 03:13:11 AM UTC 24 |
5645701562 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_tx_rx.2910458847 |
|
|
Sep 11 03:12:09 AM UTC 24 |
Sep 11 03:13:12 AM UTC 24 |
77926763500 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_stress_all.2862288456 |
|
|
Sep 11 03:06:35 AM UTC 24 |
Sep 11 03:13:14 AM UTC 24 |
553814952618 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_tx_rx.1102203954 |
|
|
Sep 11 03:11:32 AM UTC 24 |
Sep 11 03:13:17 AM UTC 24 |
37107433900 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/5.uart_stress_all.2769504240 |
|
|
Sep 11 02:57:07 AM UTC 24 |
Sep 11 03:13:20 AM UTC 24 |
141228341966 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_stress_all.749242627 |
|
|
Sep 11 03:03:35 AM UTC 24 |
Sep 11 03:13:21 AM UTC 24 |
164905268913 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.638315143 |
|
|
Sep 11 03:13:02 AM UTC 24 |
Sep 11 03:13:22 AM UTC 24 |
2471030642 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_stress_all.3763170516 |
|
|
Sep 11 03:03:54 AM UTC 24 |
Sep 11 03:13:24 AM UTC 24 |
183475822052 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_fifo_reset.28025769 |
|
|
Sep 11 03:12:32 AM UTC 24 |
Sep 11 03:13:26 AM UTC 24 |
25841002821 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.3731916510 |
|
|
Sep 11 03:13:27 AM UTC 24 |
Sep 11 03:13:31 AM UTC 24 |
4148877536 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_smoke.96036178 |
|
|
Sep 11 03:13:09 AM UTC 24 |
Sep 11 03:13:33 AM UTC 24 |
6068393251 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_noise_filter.1875451440 |
|
|
Sep 11 03:08:43 AM UTC 24 |
Sep 11 03:13:34 AM UTC 24 |
61930331597 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.877431775 |
|
|
Sep 11 03:13:23 AM UTC 24 |
Sep 11 03:13:35 AM UTC 24 |
5403382733 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.3560101273 |
|
|
Sep 11 03:13:25 AM UTC 24 |
Sep 11 03:13:42 AM UTC 24 |
42593387713 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.2713236137 |
|
|
Sep 11 03:12:30 AM UTC 24 |
Sep 11 03:13:46 AM UTC 24 |
54944812247 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_alert_test.3422128889 |
|
|
Sep 11 03:13:46 AM UTC 24 |
Sep 11 03:13:48 AM UTC 24 |
23850891 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_stress_all.3926917173 |
|
|
Sep 11 03:12:03 AM UTC 24 |
Sep 11 03:13:49 AM UTC 24 |
113226908166 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_loopback.3239510402 |
|
|
Sep 11 03:13:31 AM UTC 24 |
Sep 11 03:13:49 AM UTC 24 |
5217017545 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_smoke.3649521120 |
|
|
Sep 11 03:13:49 AM UTC 24 |
Sep 11 03:13:52 AM UTC 24 |
436155285 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_rx_oversample.3794326797 |
|
|
Sep 11 03:12:39 AM UTC 24 |
Sep 11 03:13:52 AM UTC 24 |
5832809149 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/28.uart_stress_all.1819218265 |
|
|
Sep 11 03:08:24 AM UTC 24 |
Sep 11 03:13:54 AM UTC 24 |
222488432727 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_rx_oversample.2034245997 |
|
|
Sep 11 03:13:55 AM UTC 24 |
Sep 11 03:13:58 AM UTC 24 |
1502353662 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.1374026489 |
|
|
Sep 11 03:10:32 AM UTC 24 |
Sep 11 03:14:04 AM UTC 24 |
169216367885 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_rx_oversample.1112006272 |
|
|
Sep 11 03:13:18 AM UTC 24 |
Sep 11 03:14:08 AM UTC 24 |
5453315971 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_noise_filter.1945538416 |
|
|
Sep 11 03:11:45 AM UTC 24 |
Sep 11 03:14:08 AM UTC 24 |
58690325471 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_tx_rx.1797577241 |
|
|
Sep 11 03:13:50 AM UTC 24 |
Sep 11 03:14:09 AM UTC 24 |
9275963638 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_intr.1982111768 |
|
|
Sep 11 03:13:21 AM UTC 24 |
Sep 11 03:14:10 AM UTC 24 |
55237461833 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/31.uart_noise_filter.2103674305 |
|
|
Sep 11 03:10:06 AM UTC 24 |
Sep 11 03:14:12 AM UTC 24 |
71993029926 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/7.uart_stress_all.3048046658 |
|
|
Sep 11 02:57:37 AM UTC 24 |
Sep 11 03:14:13 AM UTC 24 |
141253709515 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.953847509 |
|
|
Sep 11 03:13:12 AM UTC 24 |
Sep 11 03:14:14 AM UTC 24 |
46828071434 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.569004727 |
|
|
Sep 11 03:14:08 AM UTC 24 |
Sep 11 03:14:16 AM UTC 24 |
5682576929 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_fifo_reset.3078827633 |
|
|
Sep 11 03:08:39 AM UTC 24 |
Sep 11 03:14:19 AM UTC 24 |
99899171671 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/14.uart_intr.2196738674 |
|
|
Sep 11 03:00:36 AM UTC 24 |
Sep 11 03:14:20 AM UTC 24 |
432395140050 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_loopback.3505991823 |
|
|
Sep 11 03:14:11 AM UTC 24 |
Sep 11 03:14:21 AM UTC 24 |
3835713255 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_alert_test.198397588 |
|
|
Sep 11 03:14:20 AM UTC 24 |
Sep 11 03:14:21 AM UTC 24 |
21767329 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.3307509532 |
|
|
Sep 11 03:14:10 AM UTC 24 |
Sep 11 03:14:22 AM UTC 24 |
11307982434 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_smoke.3582265408 |
|
|
Sep 11 03:14:21 AM UTC 24 |
Sep 11 03:14:23 AM UTC 24 |
750458252 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_noise_filter.3336092832 |
|
|
Sep 11 03:12:43 AM UTC 24 |
Sep 11 03:14:30 AM UTC 24 |
95623972124 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.1247119171 |
|
|
Sep 11 03:13:36 AM UTC 24 |
Sep 11 03:14:30 AM UTC 24 |
7279596880 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/24.uart_stress_all.2569710815 |
|
|
Sep 11 03:06:08 AM UTC 24 |
Sep 11 03:14:35 AM UTC 24 |
353907846514 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.3544118462 |
|
|
Sep 11 03:11:16 AM UTC 24 |
Sep 11 03:14:37 AM UTC 24 |
55078422709 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_fifo_reset.2992786197 |
|
|
Sep 11 03:13:14 AM UTC 24 |
Sep 11 03:14:42 AM UTC 24 |
41164096800 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.1183108135 |
|
|
Sep 11 03:14:38 AM UTC 24 |
Sep 11 03:14:42 AM UTC 24 |
5776327244 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.1431102033 |
|
|
Sep 11 03:14:15 AM UTC 24 |
Sep 11 03:14:45 AM UTC 24 |
2520262765 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_rx_oversample.1089805523 |
|
|
Sep 11 03:14:32 AM UTC 24 |
Sep 11 03:14:45 AM UTC 24 |
2013431503 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_fifo_full.3788619610 |
|
|
Sep 11 03:13:12 AM UTC 24 |
Sep 11 03:14:49 AM UTC 24 |
72238899330 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.2631720765 |
|
|
Sep 11 03:14:43 AM UTC 24 |
Sep 11 03:14:49 AM UTC 24 |
1060779248 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.4055597494 |
|
|
Sep 11 03:14:23 AM UTC 24 |
Sep 11 03:14:52 AM UTC 24 |
36369839163 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_intr.1177630760 |
|
|
Sep 11 03:13:59 AM UTC 24 |
Sep 11 03:14:54 AM UTC 24 |
71851984735 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_fifo_reset.1591404799 |
|
|
Sep 11 03:14:24 AM UTC 24 |
Sep 11 03:14:55 AM UTC 24 |
31653410052 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_alert_test.4134974841 |
|
|
Sep 11 03:14:53 AM UTC 24 |
Sep 11 03:14:55 AM UTC 24 |
32421541 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_smoke.1894055389 |
|
|
Sep 11 03:14:54 AM UTC 24 |
Sep 11 03:14:58 AM UTC 24 |
445203925 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/26.uart_perf.2553809607 |
|
|
Sep 11 03:07:16 AM UTC 24 |
Sep 11 03:14:59 AM UTC 24 |
6876961902 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.1725376898 |
|
|
Sep 11 03:13:53 AM UTC 24 |
Sep 11 03:15:00 AM UTC 24 |
40913246647 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_perf.1740262712 |
|
|
Sep 11 03:11:15 AM UTC 24 |
Sep 11 03:15:03 AM UTC 24 |
2948006722 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.4070348345 |
|
|
Sep 11 02:58:49 AM UTC 24 |
Sep 11 03:15:05 AM UTC 24 |
148999863777 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_fifo_full.751292615 |
|
|
Sep 11 03:13:51 AM UTC 24 |
Sep 11 03:15:07 AM UTC 24 |
43936667196 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_fifo_reset.3313587943 |
|
|
Sep 11 03:15:00 AM UTC 24 |
Sep 11 03:15:13 AM UTC 24 |
15728667683 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_rx_oversample.1516977744 |
|
|
Sep 11 03:15:01 AM UTC 24 |
Sep 11 03:15:15 AM UTC 24 |
5635268694 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.4261825765 |
|
|
Sep 11 03:15:07 AM UTC 24 |
Sep 11 03:15:19 AM UTC 24 |
3696401582 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.3538396156 |
|
|
Sep 11 03:15:16 AM UTC 24 |
Sep 11 03:15:21 AM UTC 24 |
3372323760 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_loopback.3475304457 |
|
|
Sep 11 03:14:44 AM UTC 24 |
Sep 11 03:15:22 AM UTC 24 |
7371831719 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_fifo_full.4111546450 |
|
|
Sep 11 03:10:58 AM UTC 24 |
Sep 11 03:15:22 AM UTC 24 |
174861318930 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.2210507808 |
|
|
Sep 11 03:11:53 AM UTC 24 |
Sep 11 03:15:22 AM UTC 24 |
72784616701 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_loopback.206258227 |
|
|
Sep 11 03:15:19 AM UTC 24 |
Sep 11 03:15:27 AM UTC 24 |
8897523266 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_noise_filter.3227420056 |
|
|
Sep 11 03:14:36 AM UTC 24 |
Sep 11 03:15:29 AM UTC 24 |
108784381505 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_fifo_full.987665282 |
|
|
Sep 11 03:14:22 AM UTC 24 |
Sep 11 03:15:29 AM UTC 24 |
86620815156 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_alert_test.1099755956 |
|
|
Sep 11 03:15:28 AM UTC 24 |
Sep 11 03:15:30 AM UTC 24 |
12944894 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/6.uart_perf.2429072589 |
|
|
Sep 11 02:57:20 AM UTC 24 |
Sep 11 03:15:31 AM UTC 24 |
21183626532 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/21.uart_perf.907378322 |
|
|
Sep 11 03:04:19 AM UTC 24 |
Sep 11 03:15:31 AM UTC 24 |
11840148888 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.244908711 |
|
|
Sep 11 03:12:48 AM UTC 24 |
Sep 11 03:15:42 AM UTC 24 |
76214246399 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_tx_rx.158206738 |
|
|
Sep 11 03:14:56 AM UTC 24 |
Sep 11 03:15:42 AM UTC 24 |
186050824002 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_intr.3301833599 |
|
|
Sep 11 03:14:32 AM UTC 24 |
Sep 11 03:15:43 AM UTC 24 |
32480873441 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_intr.283601381 |
|
|
Sep 11 03:15:04 AM UTC 24 |
Sep 11 03:15:43 AM UTC 24 |
18262322917 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_tx_rx.2589310857 |
|
|
Sep 11 03:14:22 AM UTC 24 |
Sep 11 03:15:43 AM UTC 24 |
34357596972 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.3237090706 |
|
|
Sep 11 03:01:28 AM UTC 24 |
Sep 11 03:15:44 AM UTC 24 |
192344424753 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_fifo_reset.3445971546 |
|
|
Sep 11 03:13:53 AM UTC 24 |
Sep 11 03:15:45 AM UTC 24 |
94754195376 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_long_xfer_wo_dly.2198276062 |
|
|
Sep 11 03:13:34 AM UTC 24 |
Sep 11 03:15:46 AM UTC 24 |
79072132079 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.293198979 |
|
|
Sep 11 03:15:44 AM UTC 24 |
Sep 11 03:15:48 AM UTC 24 |
474858609 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_noise_filter.4026369025 |
|
|
Sep 11 03:13:22 AM UTC 24 |
Sep 11 03:15:48 AM UTC 24 |
87077037492 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.1888267926 |
|
|
Sep 11 03:15:45 AM UTC 24 |
Sep 11 03:15:48 AM UTC 24 |
3807671701 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_smoke.2370668721 |
|
|
Sep 11 03:15:30 AM UTC 24 |
Sep 11 03:15:49 AM UTC 24 |
5983156501 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_noise_filter.2411024436 |
|
|
Sep 11 03:14:05 AM UTC 24 |
Sep 11 03:15:50 AM UTC 24 |
35415191156 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/19.uart_perf.1063659794 |
|
|
Sep 11 03:03:30 AM UTC 24 |
Sep 11 03:15:50 AM UTC 24 |
23883326136 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_alert_test.3939452051 |
|
|
Sep 11 03:15:50 AM UTC 24 |
Sep 11 03:15:52 AM UTC 24 |
52042324 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.3508540803 |
|
|
Sep 11 03:14:49 AM UTC 24 |
Sep 11 03:15:52 AM UTC 24 |
3038118357 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_smoke.2435439943 |
|
|
Sep 11 03:15:51 AM UTC 24 |
Sep 11 03:15:54 AM UTC 24 |
766706884 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_fifo_full.418414598 |
|
|
Sep 11 03:11:33 AM UTC 24 |
Sep 11 03:15:57 AM UTC 24 |
119887388708 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_rx_oversample.3484162602 |
|
|
Sep 11 03:15:42 AM UTC 24 |
Sep 11 03:15:57 AM UTC 24 |
4892772024 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/18.uart_stress_all.3468873696 |
|
|
Sep 11 03:02:59 AM UTC 24 |
Sep 11 03:15:59 AM UTC 24 |
482546913268 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.3345399378 |
|
|
Sep 11 03:15:32 AM UTC 24 |
Sep 11 03:16:08 AM UTC 24 |
74071983319 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_rx_oversample.1893469889 |
|
|
Sep 11 03:15:57 AM UTC 24 |
Sep 11 03:16:09 AM UTC 24 |
4654051087 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/33.uart_fifo_reset.1476199716 |
|
|
Sep 11 03:10:59 AM UTC 24 |
Sep 11 03:16:13 AM UTC 24 |
198327539469 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.1026013309 |
|
|
Sep 11 03:14:59 AM UTC 24 |
Sep 11 03:16:15 AM UTC 24 |
35704746026 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_intr.2811933458 |
|
|
Sep 11 03:15:58 AM UTC 24 |
Sep 11 03:16:16 AM UTC 24 |
9915444649 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.452088213 |
|
|
Sep 11 03:01:56 AM UTC 24 |
Sep 11 03:16:16 AM UTC 24 |
127480146530 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_loopback.1108559353 |
|
|
Sep 11 03:15:46 AM UTC 24 |
Sep 11 03:16:25 AM UTC 24 |
9868156794 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_loopback.4058539098 |
|
|
Sep 11 03:16:16 AM UTC 24 |
Sep 11 03:16:26 AM UTC 24 |
3759239778 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_fifo_full.3452775058 |
|
|
Sep 11 03:15:31 AM UTC 24 |
Sep 11 03:16:27 AM UTC 24 |
39061032365 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_tx_rx.3054133045 |
|
|
Sep 11 03:15:51 AM UTC 24 |
Sep 11 03:16:27 AM UTC 24 |
92990470092 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.3904266873 |
|
|
Sep 11 03:15:49 AM UTC 24 |
Sep 11 03:16:28 AM UTC 24 |
13413949882 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.939714495 |
|
|
Sep 11 03:16:09 AM UTC 24 |
Sep 11 03:16:28 AM UTC 24 |
5519067823 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_fifo_reset.680013642 |
|
|
Sep 11 03:15:55 AM UTC 24 |
Sep 11 03:16:28 AM UTC 24 |
15261699442 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_alert_test.901923441 |
|
|
Sep 11 03:16:28 AM UTC 24 |
Sep 11 03:16:30 AM UTC 24 |
11135299 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_smoke.2259267112 |
|
|
Sep 11 03:16:28 AM UTC 24 |
Sep 11 03:16:33 AM UTC 24 |
462531232 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_intr.1079643125 |
|
|
Sep 11 03:15:42 AM UTC 24 |
Sep 11 03:16:40 AM UTC 24 |
69058559495 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_fifo_full.2386808788 |
|
|
Sep 11 03:16:29 AM UTC 24 |
Sep 11 03:16:42 AM UTC 24 |
12149141593 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/30.uart_perf.897793517 |
|
|
Sep 11 03:09:38 AM UTC 24 |
Sep 11 03:16:44 AM UTC 24 |
7014938843 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.1287910283 |
|
|
Sep 11 03:14:43 AM UTC 24 |
Sep 11 03:16:47 AM UTC 24 |
101314497000 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_fifo_full.1069106346 |
|
|
Sep 11 03:14:57 AM UTC 24 |
Sep 11 03:16:48 AM UTC 24 |
129517535059 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_noise_filter.328622940 |
|
|
Sep 11 03:16:00 AM UTC 24 |
Sep 11 03:16:48 AM UTC 24 |
27994844900 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.3539756515 |
|
|
Sep 11 03:16:45 AM UTC 24 |
Sep 11 03:16:50 AM UTC 24 |
1683856775 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_rx_oversample.2010684578 |
|
|
Sep 11 03:16:34 AM UTC 24 |
Sep 11 03:16:50 AM UTC 24 |
2006342880 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_loopback.515791625 |
|
|
Sep 11 03:16:49 AM UTC 24 |
Sep 11 03:16:51 AM UTC 24 |
249266402 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.569685641 |
|
|
Sep 11 03:16:48 AM UTC 24 |
Sep 11 03:16:51 AM UTC 24 |
1134338658 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.1502438148 |
|
|
Sep 11 03:16:14 AM UTC 24 |
Sep 11 03:16:52 AM UTC 24 |
6541929940 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.3494561120 |
|
|
Sep 11 03:15:23 AM UTC 24 |
Sep 11 03:16:54 AM UTC 24 |
21539514998 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_alert_test.884780472 |
|
|
Sep 11 03:16:53 AM UTC 24 |
Sep 11 03:16:54 AM UTC 24 |
45107092 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_tx_rx.3836234138 |
|
|
Sep 11 03:16:28 AM UTC 24 |
Sep 11 03:16:58 AM UTC 24 |
100694968960 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_stress_all.3414849835 |
|
|
Sep 11 03:16:26 AM UTC 24 |
Sep 11 03:16:58 AM UTC 24 |
17270026568 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.1855543426 |
|
|
Sep 11 03:14:09 AM UTC 24 |
Sep 11 03:17:00 AM UTC 24 |
85656503779 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_smoke.791122920 |
|
|
Sep 11 03:16:55 AM UTC 24 |
Sep 11 03:17:00 AM UTC 24 |
669402461 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/36.uart_tx_rx.342686507 |
|
|
Sep 11 03:13:09 AM UTC 24 |
Sep 11 03:17:02 AM UTC 24 |
109013857426 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_noise_filter.1749989516 |
|
|
Sep 11 03:15:43 AM UTC 24 |
Sep 11 03:17:05 AM UTC 24 |
66703981806 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/20.uart_perf.3991555331 |
|
|
Sep 11 03:03:53 AM UTC 24 |
Sep 11 03:17:05 AM UTC 24 |
14237161905 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_tx_rx.3812122922 |
|
|
Sep 11 03:15:30 AM UTC 24 |
Sep 11 03:17:07 AM UTC 24 |
44799128842 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_fifo_reset.1662834704 |
|
|
Sep 11 03:16:31 AM UTC 24 |
Sep 11 03:17:09 AM UTC 24 |
63630102866 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_fifo_full.1945855457 |
|
|
Sep 11 03:16:59 AM UTC 24 |
Sep 11 03:17:11 AM UTC 24 |
20648570352 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_rx_oversample.294015815 |
|
|
Sep 11 03:17:01 AM UTC 24 |
Sep 11 03:17:12 AM UTC 24 |
3701260980 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.4289507011 |
|
|
Sep 11 03:17:06 AM UTC 24 |
Sep 11 03:17:13 AM UTC 24 |
5983377220 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_loopback.4238609371 |
|
|
Sep 11 03:17:12 AM UTC 24 |
Sep 11 03:17:14 AM UTC 24 |
1075745999 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_stress_all.1285914849 |
|
|
Sep 11 03:09:04 AM UTC 24 |
Sep 11 03:17:16 AM UTC 24 |
329807718519 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.1281042765 |
|
|
Sep 11 03:16:53 AM UTC 24 |
Sep 11 03:17:18 AM UTC 24 |
2382274958 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_long_xfer_wo_dly.154376906 |
|
|
Sep 11 03:10:45 AM UTC 24 |
Sep 11 03:17:18 AM UTC 24 |
80969657323 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_alert_test.1396598619 |
|
|
Sep 11 03:17:19 AM UTC 24 |
Sep 11 03:17:21 AM UTC 24 |
14272776 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.980692063 |
|
|
Sep 11 03:15:44 AM UTC 24 |
Sep 11 03:17:22 AM UTC 24 |
92167613363 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_fifo_reset.507921032 |
|
|
Sep 11 03:17:00 AM UTC 24 |
Sep 11 03:17:22 AM UTC 24 |
22286065549 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_smoke.4165212000 |
|
|
Sep 11 03:17:19 AM UTC 24 |
Sep 11 03:17:23 AM UTC 24 |
490187775 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/37.uart_perf.887348515 |
|
|
Sep 11 03:14:13 AM UTC 24 |
Sep 11 03:17:24 AM UTC 24 |
6457908167 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_perf.264467638 |
|
|
Sep 11 03:14:45 AM UTC 24 |
Sep 11 03:17:25 AM UTC 24 |
7777226931 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_fifo_full.1269081734 |
|
|
Sep 11 03:15:52 AM UTC 24 |
Sep 11 03:17:34 AM UTC 24 |
99191648036 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_tx_rx.1124327675 |
|
|
Sep 11 03:17:22 AM UTC 24 |
Sep 11 03:17:36 AM UTC 24 |
5888234281 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_noise_filter.2262281149 |
|
|
Sep 11 03:16:42 AM UTC 24 |
Sep 11 03:17:41 AM UTC 24 |
485459144769 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.345250001 |
|
|
Sep 11 02:56:04 AM UTC 24 |
Sep 11 03:17:44 AM UTC 24 |
138092687414 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.946808071 |
|
|
Sep 11 03:17:10 AM UTC 24 |
Sep 11 03:17:45 AM UTC 24 |
12099789622 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.3320579744 |
|
|
Sep 11 03:16:26 AM UTC 24 |
Sep 11 03:17:46 AM UTC 24 |
6049037265 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.3828180294 |
|
|
Sep 11 03:17:23 AM UTC 24 |
Sep 11 03:17:48 AM UTC 24 |
18442939132 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_fifo_reset.364766367 |
|
|
Sep 11 03:17:24 AM UTC 24 |
Sep 11 03:17:49 AM UTC 24 |
9339617990 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_loopback.1300893796 |
|
|
Sep 11 03:17:46 AM UTC 24 |
Sep 11 03:17:50 AM UTC 24 |
2369715342 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_rx_parity_err.3378774146 |
|
|
Sep 11 03:16:48 AM UTC 24 |
Sep 11 03:17:51 AM UTC 24 |
61660619984 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.910662170 |
|
|
Sep 11 03:16:30 AM UTC 24 |
Sep 11 03:17:52 AM UTC 24 |
44997273984 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_tx_rx.2633084307 |
|
|
Sep 11 03:16:55 AM UTC 24 |
Sep 11 03:17:54 AM UTC 24 |
97140812221 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_alert_test.2223164224 |
|
|
Sep 11 03:17:52 AM UTC 24 |
Sep 11 03:17:54 AM UTC 24 |
14233127 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_smoke.1143369106 |
|
|
Sep 11 03:17:52 AM UTC 24 |
Sep 11 03:17:55 AM UTC 24 |
735064802 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/38.uart_stress_all.4087270521 |
|
|
Sep 11 03:14:50 AM UTC 24 |
Sep 11 03:17:56 AM UTC 24 |
334499461197 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.2098668590 |
|
|
Sep 11 03:17:37 AM UTC 24 |
Sep 11 03:17:59 AM UTC 24 |
5310134592 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/29.uart_perf.3530071029 |
|
|
Sep 11 03:09:00 AM UTC 24 |
Sep 11 03:18:01 AM UTC 24 |
14133163008 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_stress_all.1206130941 |
|
|
Sep 11 03:15:23 AM UTC 24 |
Sep 11 03:18:05 AM UTC 24 |
237149015432 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_long_xfer_wo_dly.2683703986 |
|
|
Sep 11 03:12:03 AM UTC 24 |
Sep 11 03:18:05 AM UTC 24 |
65684772832 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.2403156654 |
|
|
Sep 11 03:17:45 AM UTC 24 |
Sep 11 03:18:10 AM UTC 24 |
7346246220 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.426255445 |
|
|
Sep 11 03:06:31 AM UTC 24 |
Sep 11 03:18:11 AM UTC 24 |
106464486667 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_intr.3334186398 |
|
|
Sep 11 03:17:25 AM UTC 24 |
Sep 11 03:18:12 AM UTC 24 |
38645355238 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.1506577489 |
|
|
Sep 11 03:16:59 AM UTC 24 |
Sep 11 03:18:13 AM UTC 24 |
161654243202 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_noise_filter.557650781 |
|
|
Sep 11 03:17:36 AM UTC 24 |
Sep 11 03:18:13 AM UTC 24 |
53814112080 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/44.uart_rx_oversample.1277080648 |
|
|
Sep 11 03:17:25 AM UTC 24 |
Sep 11 03:18:15 AM UTC 24 |
4438870679 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_rx_start_bit_filter.2752714125 |
|
|
Sep 11 03:18:06 AM UTC 24 |
Sep 11 03:18:16 AM UTC 24 |
2735761419 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.214226279 |
|
|
Sep 11 03:18:12 AM UTC 24 |
Sep 11 03:18:17 AM UTC 24 |
818491795 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_intr.2284968688 |
|
|
Sep 11 03:18:02 AM UTC 24 |
Sep 11 03:18:18 AM UTC 24 |
14859640374 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_loopback.3433294292 |
|
|
Sep 11 03:18:13 AM UTC 24 |
Sep 11 03:18:19 AM UTC 24 |
5189614523 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_alert_test.1135129711 |
|
|
Sep 11 03:18:18 AM UTC 24 |
Sep 11 03:18:19 AM UTC 24 |
32635667 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_smoke.2292400701 |
|
|
Sep 11 03:18:19 AM UTC 24 |
Sep 11 03:18:21 AM UTC 24 |
477518112 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_fifo_reset.2797943411 |
|
|
Sep 11 03:15:32 AM UTC 24 |
Sep 11 03:18:22 AM UTC 24 |
62725983692 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.3174352320 |
|
|
Sep 11 03:17:08 AM UTC 24 |
Sep 11 03:18:32 AM UTC 24 |
40737960000 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.2255158058 |
|
|
Sep 11 03:17:16 AM UTC 24 |
Sep 11 03:18:33 AM UTC 24 |
4254726707 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_rx_oversample.3791989523 |
|
|
Sep 11 03:18:00 AM UTC 24 |
Sep 11 03:18:33 AM UTC 24 |
6321724260 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_noise_filter.1352805932 |
|
|
Sep 11 03:15:06 AM UTC 24 |
Sep 11 03:18:34 AM UTC 24 |
126779771037 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/42.uart_intr.2534566957 |
|
|
Sep 11 03:16:41 AM UTC 24 |
Sep 11 03:18:35 AM UTC 24 |
58181618600 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_fifo_reset.3183974618 |
|
|
Sep 11 03:17:57 AM UTC 24 |
Sep 11 03:18:39 AM UTC 24 |
85744815238 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_perf.3805170928 |
|
|
Sep 11 03:15:47 AM UTC 24 |
Sep 11 03:18:40 AM UTC 24 |
14944570341 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_rx_start_bit_filter.2661410713 |
|
|
Sep 11 03:18:34 AM UTC 24 |
Sep 11 03:18:42 AM UTC 24 |
3487898004 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_fifo_full.423896788 |
|
|
Sep 11 03:17:54 AM UTC 24 |
Sep 11 03:18:44 AM UTC 24 |
59587269786 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_stress_all_with_rand_reset.86278292 |
|
|
Sep 11 03:18:15 AM UTC 24 |
Sep 11 03:18:46 AM UTC 24 |
4602729360 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.1453581528 |
|
|
Sep 11 03:18:22 AM UTC 24 |
Sep 11 03:18:46 AM UTC 24 |
12644266963 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.4144577521 |
|
|
Sep 11 03:15:52 AM UTC 24 |
Sep 11 03:18:47 AM UTC 24 |
64759708980 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/39.uart_perf.1312076113 |
|
|
Sep 11 03:15:21 AM UTC 24 |
Sep 11 03:18:49 AM UTC 24 |
6468748085 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_alert_test.1692737183 |
|
|
Sep 11 03:18:48 AM UTC 24 |
Sep 11 03:18:50 AM UTC 24 |
81986588 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_loopback.2513753462 |
|
|
Sep 11 03:18:41 AM UTC 24 |
Sep 11 03:18:56 AM UTC 24 |
7516357886 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_noise_filter.2120873538 |
|
|
Sep 11 03:18:34 AM UTC 24 |
Sep 11 03:18:57 AM UTC 24 |
6973155042 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/40.uart_stress_all.818962708 |
|
|
Sep 11 03:15:49 AM UTC 24 |
Sep 11 03:18:58 AM UTC 24 |
272901521538 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/47.uart_smoke.2941535543 |
|
|
Sep 11 03:18:50 AM UTC 24 |
Sep 11 03:18:59 AM UTC 24 |
5591424487 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/32.uart_stress_all.982449160 |
|
|
Sep 11 03:10:50 AM UTC 24 |
Sep 11 03:19:00 AM UTC 24 |
223247888536 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/34.uart_perf.2797619581 |
|
|
Sep 11 03:12:01 AM UTC 24 |
Sep 11 03:19:02 AM UTC 24 |
7580278118 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/46.uart_tx_ovrd.3747813057 |
|
|
Sep 11 03:18:39 AM UTC 24 |
Sep 11 03:19:02 AM UTC 24 |
6805256617 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/43.uart_noise_filter.1410131223 |
|
|
Sep 11 03:17:05 AM UTC 24 |
Sep 11 03:19:03 AM UTC 24 |
199536636376 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_10/uart-sim-vcs/coverage/default/45.uart_tx_rx.714427716 |
|
|
Sep 11 03:17:54 AM UTC 24 |
Sep 11 03:19:05 AM UTC 24 |
40935469408 ps |