| T480 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_rx_start_bit_filter.3434958281 |
|
|
Sep 24 06:10:02 AM UTC 24 |
Sep 24 06:10:30 AM UTC 24 |
35503819526 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_smoke.708772354 |
|
|
Sep 24 06:10:29 AM UTC 24 |
Sep 24 06:10:34 AM UTC 24 |
717780503 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_noise_filter.643561843 |
|
|
Sep 24 06:06:50 AM UTC 24 |
Sep 24 06:10:38 AM UTC 24 |
240366123363 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_rx_oversample.3115191165 |
|
|
Sep 24 06:09:57 AM UTC 24 |
Sep 24 06:10:40 AM UTC 24 |
4589668034 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_fifo_reset.1725576395 |
|
|
Sep 24 06:09:57 AM UTC 24 |
Sep 24 06:10:43 AM UTC 24 |
60999337958 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.3538205652 |
|
|
Sep 24 06:10:23 AM UTC 24 |
Sep 24 06:10:45 AM UTC 24 |
1679518155 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_fifo_full.3671942525 |
|
|
Sep 24 06:09:15 AM UTC 24 |
Sep 24 06:10:46 AM UTC 24 |
37686319907 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.1068233422 |
|
|
Sep 24 06:10:47 AM UTC 24 |
Sep 24 06:10:51 AM UTC 24 |
1526428890 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_loopback.4061390249 |
|
|
Sep 24 06:10:52 AM UTC 24 |
Sep 24 06:10:54 AM UTC 24 |
23585998 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_fifo_reset.4195866470 |
|
|
Sep 24 06:09:19 AM UTC 24 |
Sep 24 06:11:00 AM UTC 24 |
49742675961 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_tx_rx.558207759 |
|
|
Sep 24 06:10:29 AM UTC 24 |
Sep 24 06:11:01 AM UTC 24 |
41811595098 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.2704881256 |
|
|
Sep 24 06:10:44 AM UTC 24 |
Sep 24 06:11:01 AM UTC 24 |
4570558763 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_noise_filter.2120128296 |
|
|
Sep 24 06:09:27 AM UTC 24 |
Sep 24 06:11:01 AM UTC 24 |
124883584454 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_perf.1130745390 |
|
|
Sep 24 06:07:35 AM UTC 24 |
Sep 24 06:11:02 AM UTC 24 |
6447638992 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_alert_test.2693253038 |
|
|
Sep 24 06:11:02 AM UTC 24 |
Sep 24 06:11:04 AM UTC 24 |
12493289 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.3470980441 |
|
|
Sep 24 06:08:20 AM UTC 24 |
Sep 24 06:11:05 AM UTC 24 |
102983970938 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_rx_oversample.315008181 |
|
|
Sep 24 06:10:35 AM UTC 24 |
Sep 24 06:11:05 AM UTC 24 |
2942181249 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_rx_start_bit_filter.656808096 |
|
|
Sep 24 06:09:29 AM UTC 24 |
Sep 24 06:11:09 AM UTC 24 |
54529251234 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_perf.3599557656 |
|
|
Sep 24 06:09:08 AM UTC 24 |
Sep 24 06:11:09 AM UTC 24 |
34542007144 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_intr.3895999234 |
|
|
Sep 24 06:10:40 AM UTC 24 |
Sep 24 06:11:20 AM UTC 24 |
20900387437 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_noise_filter.854711639 |
|
|
Sep 24 06:10:41 AM UTC 24 |
Sep 24 06:11:10 AM UTC 24 |
30304285192 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_rx_oversample.2440033312 |
|
|
Sep 24 06:11:10 AM UTC 24 |
Sep 24 06:11:21 AM UTC 24 |
5724311451 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.3842046941 |
|
|
Sep 24 06:07:38 AM UTC 24 |
Sep 24 06:11:24 AM UTC 24 |
77081254773 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_smoke.3966964223 |
|
|
Sep 24 06:11:02 AM UTC 24 |
Sep 24 06:11:25 AM UTC 24 |
6168558899 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.1410095743 |
|
|
Sep 24 06:11:24 AM UTC 24 |
Sep 24 06:11:30 AM UTC 24 |
1604917822 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_fifo_full.3623507308 |
|
|
Sep 24 06:11:06 AM UTC 24 |
Sep 24 06:11:32 AM UTC 24 |
26719954619 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.205661511 |
|
|
Sep 24 06:04:33 AM UTC 24 |
Sep 24 06:11:34 AM UTC 24 |
275753339078 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_intr.3366121634 |
|
|
Sep 24 06:11:11 AM UTC 24 |
Sep 24 06:11:40 AM UTC 24 |
43971035767 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.321800584 |
|
|
Sep 24 06:11:21 AM UTC 24 |
Sep 24 06:11:45 AM UTC 24 |
45345951492 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_loopback.3314503189 |
|
|
Sep 24 06:11:26 AM UTC 24 |
Sep 24 06:11:45 AM UTC 24 |
5185502113 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_alert_test.3826055067 |
|
|
Sep 24 06:11:46 AM UTC 24 |
Sep 24 06:11:47 AM UTC 24 |
29781678 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_fifo_reset.3984412100 |
|
|
Sep 24 06:10:31 AM UTC 24 |
Sep 24 06:11:49 AM UTC 24 |
342193011246 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.3216785868 |
|
|
Sep 24 06:10:30 AM UTC 24 |
Sep 24 06:11:49 AM UTC 24 |
155283470575 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_smoke.812895473 |
|
|
Sep 24 06:11:46 AM UTC 24 |
Sep 24 06:11:49 AM UTC 24 |
734559411 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.412428292 |
|
|
Sep 24 06:11:22 AM UTC 24 |
Sep 24 06:11:53 AM UTC 24 |
316954712201 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.1840120803 |
|
|
Sep 24 06:06:12 AM UTC 24 |
Sep 24 06:11:57 AM UTC 24 |
123761527657 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.1306415390 |
|
|
Sep 24 06:11:01 AM UTC 24 |
Sep 24 06:12:01 AM UTC 24 |
4335583274 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_rx_oversample.202093406 |
|
|
Sep 24 06:11:53 AM UTC 24 |
Sep 24 06:12:05 AM UTC 24 |
3569161185 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.3999396942 |
|
|
Sep 24 06:10:12 AM UTC 24 |
Sep 24 06:12:07 AM UTC 24 |
66423732934 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.2400608864 |
|
|
Sep 24 06:09:57 AM UTC 24 |
Sep 24 06:12:11 AM UTC 24 |
105021675830 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_fifo_full.228159976 |
|
|
Sep 24 06:09:54 AM UTC 24 |
Sep 24 06:12:14 AM UTC 24 |
368606184083 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_loopback.2198716475 |
|
|
Sep 24 06:12:13 AM UTC 24 |
Sep 24 06:12:16 AM UTC 24 |
1486917375 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_tx_rx.535831125 |
|
|
Sep 24 06:11:48 AM UTC 24 |
Sep 24 06:12:26 AM UTC 24 |
100197042010 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.3682686047 |
|
|
Sep 24 06:12:11 AM UTC 24 |
Sep 24 06:12:28 AM UTC 24 |
6228348567 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_alert_test.3818350005 |
|
|
Sep 24 06:12:32 AM UTC 24 |
Sep 24 06:12:34 AM UTC 24 |
26622025 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.477235050 |
|
|
Sep 24 06:11:35 AM UTC 24 |
Sep 24 06:12:37 AM UTC 24 |
9543305913 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_perf.3209726526 |
|
|
Sep 24 06:05:20 AM UTC 24 |
Sep 24 06:12:38 AM UTC 24 |
32582225879 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_smoke.1086087524 |
|
|
Sep 24 06:12:35 AM UTC 24 |
Sep 24 06:12:39 AM UTC 24 |
670970977 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_fifo_reset.3186132187 |
|
|
Sep 24 06:11:10 AM UTC 24 |
Sep 24 06:12:41 AM UTC 24 |
180599883434 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.4142053873 |
|
|
Sep 24 06:09:31 AM UTC 24 |
Sep 24 06:12:46 AM UTC 24 |
121815655675 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_noise_filter.2708942703 |
|
|
Sep 24 06:12:01 AM UTC 24 |
Sep 24 06:12:58 AM UTC 24 |
13919576405 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_rx_oversample.2910305301 |
|
|
Sep 24 06:12:41 AM UTC 24 |
Sep 24 06:12:59 AM UTC 24 |
4109565795 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_tx_rx.2983712297 |
|
|
Sep 24 06:12:35 AM UTC 24 |
Sep 24 06:12:59 AM UTC 24 |
16947925015 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.3228104950 |
|
|
Sep 24 06:12:08 AM UTC 24 |
Sep 24 06:13:01 AM UTC 24 |
86497263604 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.2398789654 |
|
|
Sep 24 06:13:00 AM UTC 24 |
Sep 24 06:13:02 AM UTC 24 |
722686590 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_fifo_full.2491338333 |
|
|
Sep 24 06:12:38 AM UTC 24 |
Sep 24 06:13:03 AM UTC 24 |
36826765159 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_rx_parity_err.1352253509 |
|
|
Sep 24 06:07:29 AM UTC 24 |
Sep 24 06:13:04 AM UTC 24 |
147101905020 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.1874373457 |
|
|
Sep 24 06:13:02 AM UTC 24 |
Sep 24 06:13:05 AM UTC 24 |
1596860089 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_noise_filter.2249004157 |
|
|
Sep 24 06:10:01 AM UTC 24 |
Sep 24 06:13:05 AM UTC 24 |
126803673934 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_loopback.2413747755 |
|
|
Sep 24 06:13:03 AM UTC 24 |
Sep 24 06:13:06 AM UTC 24 |
667507813 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_alert_test.3588524023 |
|
|
Sep 24 06:13:06 AM UTC 24 |
Sep 24 06:13:08 AM UTC 24 |
37154462 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_stress_all.4192355476 |
|
|
Sep 24 06:11:42 AM UTC 24 |
Sep 24 06:13:09 AM UTC 24 |
141452861738 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_fifo_reset.1203390514 |
|
|
Sep 24 06:12:39 AM UTC 24 |
Sep 24 06:13:10 AM UTC 24 |
56491114202 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_perf.440429198 |
|
|
Sep 24 06:06:57 AM UTC 24 |
Sep 24 06:13:22 AM UTC 24 |
11144806838 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.3234333083 |
|
|
Sep 24 06:13:00 AM UTC 24 |
Sep 24 06:13:27 AM UTC 24 |
7429453200 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_intr.7226288 |
|
|
Sep 24 06:10:00 AM UTC 24 |
Sep 24 06:13:33 AM UTC 24 |
130640787450 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.3951405336 |
|
|
Sep 24 06:13:06 AM UTC 24 |
Sep 24 06:13:39 AM UTC 24 |
6535154626 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_smoke.1040931544 |
|
|
Sep 24 06:13:09 AM UTC 24 |
Sep 24 06:13:40 AM UTC 24 |
5476573323 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_noise_filter.3919848318 |
|
|
Sep 24 06:11:21 AM UTC 24 |
Sep 24 06:13:40 AM UTC 24 |
181053292089 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_fifo_full.3395902699 |
|
|
Sep 24 06:13:11 AM UTC 24 |
Sep 24 06:13:42 AM UTC 24 |
303112923707 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.67801092 |
|
|
Sep 24 06:12:39 AM UTC 24 |
Sep 24 06:13:49 AM UTC 24 |
139742667728 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.2438581887 |
|
|
Sep 24 06:13:43 AM UTC 24 |
Sep 24 06:13:50 AM UTC 24 |
661735476 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.2823569518 |
|
|
Sep 24 06:12:06 AM UTC 24 |
Sep 24 06:13:53 AM UTC 24 |
47560314476 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.539325528 |
|
|
Sep 24 06:12:27 AM UTC 24 |
Sep 24 06:13:54 AM UTC 24 |
19250614560 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_loopback.1146257773 |
|
|
Sep 24 06:13:50 AM UTC 24 |
Sep 24 06:13:55 AM UTC 24 |
7722507930 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.442174799 |
|
|
Sep 24 06:11:07 AM UTC 24 |
Sep 24 06:13:56 AM UTC 24 |
98810653644 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_alert_test.2591261712 |
|
|
Sep 24 06:13:56 AM UTC 24 |
Sep 24 06:13:58 AM UTC 24 |
32241079 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_stress_all.3395912181 |
|
|
Sep 24 06:13:06 AM UTC 24 |
Sep 24 06:13:59 AM UTC 24 |
172768789113 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_tx_rx.3709826898 |
|
|
Sep 24 06:13:10 AM UTC 24 |
Sep 24 06:14:01 AM UTC 24 |
14984305845 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_smoke.1292498636 |
|
|
Sep 24 06:13:59 AM UTC 24 |
Sep 24 06:14:02 AM UTC 24 |
329238095 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.3902892341 |
|
|
Sep 24 06:13:22 AM UTC 24 |
Sep 24 06:14:12 AM UTC 24 |
115181503932 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.579591093 |
|
|
Sep 24 06:06:59 AM UTC 24 |
Sep 24 06:14:19 AM UTC 24 |
72169963973 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_stress_all.3311745874 |
|
|
Sep 24 06:06:17 AM UTC 24 |
Sep 24 06:14:19 AM UTC 24 |
303826684961 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_intr.1272515210 |
|
|
Sep 24 06:12:47 AM UTC 24 |
Sep 24 06:14:25 AM UTC 24 |
29098474812 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_perf.3015788872 |
|
|
Sep 24 06:13:50 AM UTC 24 |
Sep 24 06:14:28 AM UTC 24 |
567497124 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_intr.2142864410 |
|
|
Sep 24 06:14:20 AM UTC 24 |
Sep 24 06:14:28 AM UTC 24 |
7517859038 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_rx_oversample.1549311912 |
|
|
Sep 24 06:13:28 AM UTC 24 |
Sep 24 06:14:28 AM UTC 24 |
5077759462 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_fifo_reset.3906763068 |
|
|
Sep 24 06:13:26 AM UTC 24 |
Sep 24 06:14:30 AM UTC 24 |
28573403936 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.523142636 |
|
|
Sep 24 06:13:54 AM UTC 24 |
Sep 24 06:14:31 AM UTC 24 |
3264622896 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.1153258980 |
|
|
Sep 24 06:14:29 AM UTC 24 |
Sep 24 06:14:32 AM UTC 24 |
6967291055 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.3772242795 |
|
|
Sep 24 06:14:29 AM UTC 24 |
Sep 24 06:14:33 AM UTC 24 |
482273652 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_perf.71621681 |
|
|
Sep 24 06:03:44 AM UTC 24 |
Sep 24 06:14:41 AM UTC 24 |
11988207508 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_alert_test.3920463383 |
|
|
Sep 24 06:14:51 AM UTC 24 |
Sep 24 06:14:52 AM UTC 24 |
24567207 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_loopback.3332420128 |
|
|
Sep 24 06:14:31 AM UTC 24 |
Sep 24 06:14:52 AM UTC 24 |
6436971523 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_fifo_full.3694844925 |
|
|
Sep 24 06:14:01 AM UTC 24 |
Sep 24 06:14:58 AM UTC 24 |
108399460421 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_stress_all.3368782998 |
|
|
Sep 24 06:10:25 AM UTC 24 |
Sep 24 06:14:58 AM UTC 24 |
96888727888 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_smoke.3309130204 |
|
|
Sep 24 06:14:54 AM UTC 24 |
Sep 24 06:14:59 AM UTC 24 |
485700643 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_noise_filter.3431363427 |
|
|
Sep 24 06:12:59 AM UTC 24 |
Sep 24 06:15:00 AM UTC 24 |
30117963690 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_noise_filter.495583277 |
|
|
Sep 24 06:14:26 AM UTC 24 |
Sep 24 06:15:00 AM UTC 24 |
8469332072 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_rx_oversample.2217085255 |
|
|
Sep 24 06:14:20 AM UTC 24 |
Sep 24 06:15:03 AM UTC 24 |
7403914400 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_rx_oversample.620139393 |
|
|
Sep 24 06:15:01 AM UTC 24 |
Sep 24 06:15:06 AM UTC 24 |
1599789839 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_fifo_reset.3962831191 |
|
|
Sep 24 06:14:13 AM UTC 24 |
Sep 24 06:15:07 AM UTC 24 |
34089765402 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_stress_all.2199216390 |
|
|
Sep 24 06:12:29 AM UTC 24 |
Sep 24 06:15:07 AM UTC 24 |
298886124022 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_loopback.921178562 |
|
|
Sep 24 06:15:08 AM UTC 24 |
Sep 24 06:15:11 AM UTC 24 |
1856438319 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_perf.1345458892 |
|
|
Sep 24 06:14:31 AM UTC 24 |
Sep 24 06:15:11 AM UTC 24 |
12577009197 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.4282081037 |
|
|
Sep 24 06:15:07 AM UTC 24 |
Sep 24 06:15:12 AM UTC 24 |
1815837141 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.3343757836 |
|
|
Sep 24 06:10:46 AM UTC 24 |
Sep 24 06:15:12 AM UTC 24 |
126496199844 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_alert_test.3360059666 |
|
|
Sep 24 06:15:13 AM UTC 24 |
Sep 24 06:15:15 AM UTC 24 |
44930165 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_fifo_full.1896740636 |
|
|
Sep 24 06:11:50 AM UTC 24 |
Sep 24 06:15:17 AM UTC 24 |
147410998831 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.71180957 |
|
|
Sep 24 06:15:03 AM UTC 24 |
Sep 24 06:15:18 AM UTC 24 |
3199541321 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.2698753000 |
|
|
Sep 24 06:14:29 AM UTC 24 |
Sep 24 06:15:21 AM UTC 24 |
119978917336 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_smoke.2921979772 |
|
|
Sep 24 06:15:16 AM UTC 24 |
Sep 24 06:15:23 AM UTC 24 |
715089802 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.4193574067 |
|
|
Sep 24 06:13:41 AM UTC 24 |
Sep 24 06:15:25 AM UTC 24 |
42118557197 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_tx_rx.2497126258 |
|
|
Sep 24 06:09:54 AM UTC 24 |
Sep 24 06:15:28 AM UTC 24 |
69045723306 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.1699057902 |
|
|
Sep 24 06:14:59 AM UTC 24 |
Sep 24 06:15:30 AM UTC 24 |
15802390907 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.871058254 |
|
|
Sep 24 06:10:21 AM UTC 24 |
Sep 24 06:15:30 AM UTC 24 |
114037134222 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/20.uart_perf.3856259310 |
|
|
Sep 24 06:13:04 AM UTC 24 |
Sep 24 06:15:33 AM UTC 24 |
11509056371 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.3311884706 |
|
|
Sep 24 06:15:32 AM UTC 24 |
Sep 24 06:15:38 AM UTC 24 |
5888195485 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.1099535016 |
|
|
Sep 24 06:13:41 AM UTC 24 |
Sep 24 06:15:38 AM UTC 24 |
131686377631 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_fifo_reset.122543274 |
|
|
Sep 24 06:15:23 AM UTC 24 |
Sep 24 06:15:39 AM UTC 24 |
25992633793 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_rx_oversample.3079423056 |
|
|
Sep 24 06:15:25 AM UTC 24 |
Sep 24 06:15:40 AM UTC 24 |
2876837574 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_loopback.2898535446 |
|
|
Sep 24 06:15:39 AM UTC 24 |
Sep 24 06:15:47 AM UTC 24 |
6831276279 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.1652481353 |
|
|
Sep 24 06:15:12 AM UTC 24 |
Sep 24 06:15:48 AM UTC 24 |
16758097529 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_noise_filter.498286390 |
|
|
Sep 24 06:15:30 AM UTC 24 |
Sep 24 06:15:50 AM UTC 24 |
19056880684 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_perf.1807540516 |
|
|
Sep 24 06:10:55 AM UTC 24 |
Sep 24 06:15:50 AM UTC 24 |
18876295303 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_alert_test.3198794078 |
|
|
Sep 24 06:15:49 AM UTC 24 |
Sep 24 06:15:51 AM UTC 24 |
21906940 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_smoke.354255905 |
|
|
Sep 24 06:15:50 AM UTC 24 |
Sep 24 06:15:54 AM UTC 24 |
639009412 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_tx_rx.428403118 |
|
|
Sep 24 06:14:54 AM UTC 24 |
Sep 24 06:16:00 AM UTC 24 |
37221907722 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.452152927 |
|
|
Sep 24 06:14:33 AM UTC 24 |
Sep 24 06:16:05 AM UTC 24 |
27566233848 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_fifo_full.1688357927 |
|
|
Sep 24 06:14:59 AM UTC 24 |
Sep 24 06:16:06 AM UTC 24 |
33194311358 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.2232329734 |
|
|
Sep 24 06:13:53 AM UTC 24 |
Sep 24 06:16:07 AM UTC 24 |
48692391713 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.234385380 |
|
|
Sep 24 06:15:06 AM UTC 24 |
Sep 24 06:16:07 AM UTC 24 |
60598582015 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_fifo_reset.2667860164 |
|
|
Sep 24 06:15:00 AM UTC 24 |
Sep 24 06:16:09 AM UTC 24 |
43284649834 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.1539401379 |
|
|
Sep 24 06:15:34 AM UTC 24 |
Sep 24 06:16:10 AM UTC 24 |
24625550562 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.1643306604 |
|
|
Sep 24 06:15:39 AM UTC 24 |
Sep 24 06:16:11 AM UTC 24 |
6296125475 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_fifo_full.3152937606 |
|
|
Sep 24 06:15:18 AM UTC 24 |
Sep 24 06:16:15 AM UTC 24 |
131451318859 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_loopback.763368169 |
|
|
Sep 24 06:16:12 AM UTC 24 |
Sep 24 06:16:16 AM UTC 24 |
315007297 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_rx_oversample.259994861 |
|
|
Sep 24 06:16:06 AM UTC 24 |
Sep 24 06:16:17 AM UTC 24 |
3181518235 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.3993939041 |
|
|
Sep 24 06:17:27 AM UTC 24 |
Sep 24 06:18:05 AM UTC 24 |
1968762245 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_intr.3997365744 |
|
|
Sep 24 06:08:43 AM UTC 24 |
Sep 24 06:16:19 AM UTC 24 |
205489626232 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.2185253793 |
|
|
Sep 24 06:16:11 AM UTC 24 |
Sep 24 06:16:21 AM UTC 24 |
7857513591 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.3806584846 |
|
|
Sep 24 06:15:55 AM UTC 24 |
Sep 24 06:16:21 AM UTC 24 |
33726244654 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_alert_test.1729494532 |
|
|
Sep 24 06:16:21 AM UTC 24 |
Sep 24 06:16:23 AM UTC 24 |
46640788 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.3188366232 |
|
|
Sep 24 06:16:08 AM UTC 24 |
Sep 24 06:16:25 AM UTC 24 |
30402292241 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.1951006793 |
|
|
Sep 24 06:16:10 AM UTC 24 |
Sep 24 06:16:26 AM UTC 24 |
34221438528 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_noise_filter.3597552257 |
|
|
Sep 24 06:13:40 AM UTC 24 |
Sep 24 06:16:30 AM UTC 24 |
161989943004 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_intr.1249105012 |
|
|
Sep 24 06:15:29 AM UTC 24 |
Sep 24 06:16:32 AM UTC 24 |
30930164549 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.3769594691 |
|
|
Sep 24 06:15:41 AM UTC 24 |
Sep 24 06:16:32 AM UTC 24 |
11725243746 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_stress_all.1072422710 |
|
|
Sep 24 06:13:55 AM UTC 24 |
Sep 24 06:16:33 AM UTC 24 |
107995617544 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.3860400793 |
|
|
Sep 24 06:16:27 AM UTC 24 |
Sep 24 06:16:39 AM UTC 24 |
21358372824 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.2179436339 |
|
|
Sep 24 06:09:08 AM UTC 24 |
Sep 24 06:16:44 AM UTC 24 |
165018223506 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_fifo_full.2477277950 |
|
|
Sep 24 06:10:30 AM UTC 24 |
Sep 24 06:16:46 AM UTC 24 |
123822002819 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_noise_filter.570233201 |
|
|
Sep 24 06:15:01 AM UTC 24 |
Sep 24 06:16:46 AM UTC 24 |
312340815292 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.2763605505 |
|
|
Sep 24 06:16:39 AM UTC 24 |
Sep 24 06:16:47 AM UTC 24 |
2512144820 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_tx_rx.2472399998 |
|
|
Sep 24 06:16:25 AM UTC 24 |
Sep 24 06:16:51 AM UTC 24 |
63005694836 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_smoke.3414965634 |
|
|
Sep 24 06:16:22 AM UTC 24 |
Sep 24 06:16:53 AM UTC 24 |
5724360451 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.3994474327 |
|
|
Sep 24 06:16:46 AM UTC 24 |
Sep 24 06:16:54 AM UTC 24 |
8287637374 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_rx_oversample.3922349251 |
|
|
Sep 24 06:16:32 AM UTC 24 |
Sep 24 06:16:56 AM UTC 24 |
4534217309 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_intr.1327514122 |
|
|
Sep 24 06:16:07 AM UTC 24 |
Sep 24 06:16:57 AM UTC 24 |
22262852008 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_alert_test.1966838708 |
|
|
Sep 24 06:16:57 AM UTC 24 |
Sep 24 06:16:59 AM UTC 24 |
18510722 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_tx_rx.3412165077 |
|
|
Sep 24 06:13:59 AM UTC 24 |
Sep 24 06:16:59 AM UTC 24 |
90523991183 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_perf.2454812392 |
|
|
Sep 24 06:11:30 AM UTC 24 |
Sep 24 06:17:04 AM UTC 24 |
19276831173 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_loopback.1526617761 |
|
|
Sep 24 06:16:46 AM UTC 24 |
Sep 24 06:17:07 AM UTC 24 |
3723985243 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_intr.1871212335 |
|
|
Sep 24 06:15:01 AM UTC 24 |
Sep 24 06:17:08 AM UTC 24 |
184206938566 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_tx_rx.213821776 |
|
|
Sep 24 06:15:50 AM UTC 24 |
Sep 24 06:17:11 AM UTC 24 |
30461351216 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_smoke.3896373282 |
|
|
Sep 24 06:16:58 AM UTC 24 |
Sep 24 06:17:12 AM UTC 24 |
6323978137 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_stress_all.831071736 |
|
|
Sep 24 06:15:47 AM UTC 24 |
Sep 24 06:17:13 AM UTC 24 |
29478585493 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_stress_all.4134046467 |
|
|
Sep 24 06:16:19 AM UTC 24 |
Sep 24 06:17:16 AM UTC 24 |
16544938526 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_fifo_reset.2093684203 |
|
|
Sep 24 06:11:50 AM UTC 24 |
Sep 24 06:17:19 AM UTC 24 |
144543386173 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_rx_oversample.3140467193 |
|
|
Sep 24 06:17:08 AM UTC 24 |
Sep 24 06:17:20 AM UTC 24 |
2318534830 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.1410907385 |
|
|
Sep 24 06:17:13 AM UTC 24 |
Sep 24 06:17:22 AM UTC 24 |
2953400196 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_noise_filter.3919631954 |
|
|
Sep 24 06:16:34 AM UTC 24 |
Sep 24 06:17:25 AM UTC 24 |
48280020738 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_loopback.3146326107 |
|
|
Sep 24 06:17:22 AM UTC 24 |
Sep 24 06:17:26 AM UTC 24 |
2007588639 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_tx_rx.4246438428 |
|
|
Sep 24 06:17:00 AM UTC 24 |
Sep 24 06:17:26 AM UTC 24 |
9328965616 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.866945805 |
|
|
Sep 24 06:17:19 AM UTC 24 |
Sep 24 06:17:27 AM UTC 24 |
1060169988 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.4260080176 |
|
|
Sep 24 06:15:21 AM UTC 24 |
Sep 24 06:17:29 AM UTC 24 |
39083714794 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_alert_test.1157106966 |
|
|
Sep 24 06:17:28 AM UTC 24 |
Sep 24 06:17:30 AM UTC 24 |
53256728 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_tx_rx.3908174158 |
|
|
Sep 24 06:15:18 AM UTC 24 |
Sep 24 06:17:30 AM UTC 24 |
61126116330 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_fifo_full.3827995026 |
|
|
Sep 24 06:16:27 AM UTC 24 |
Sep 24 06:17:31 AM UTC 24 |
34105147129 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_intr.1400042934 |
|
|
Sep 24 06:16:33 AM UTC 24 |
Sep 24 06:17:32 AM UTC 24 |
37641875934 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_smoke.1067696725 |
|
|
Sep 24 06:17:30 AM UTC 24 |
Sep 24 06:17:35 AM UTC 24 |
890124699 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_perf.4199337255 |
|
|
Sep 24 06:10:19 AM UTC 24 |
Sep 24 06:17:36 AM UTC 24 |
10619760605 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.1061800590 |
|
|
Sep 24 06:16:54 AM UTC 24 |
Sep 24 06:17:37 AM UTC 24 |
5395155769 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_intr.3739886716 |
|
|
Sep 24 06:17:36 AM UTC 24 |
Sep 24 06:17:40 AM UTC 24 |
448619411 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_rx_oversample.205505034 |
|
|
Sep 24 06:17:35 AM UTC 24 |
Sep 24 06:17:40 AM UTC 24 |
1167212369 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.4045807983 |
|
|
Sep 24 06:16:17 AM UTC 24 |
Sep 24 06:17:42 AM UTC 24 |
36883839001 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_intr.2957423692 |
|
|
Sep 24 06:17:12 AM UTC 24 |
Sep 24 06:17:43 AM UTC 24 |
58148134166 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.3800977512 |
|
|
Sep 24 06:17:39 AM UTC 24 |
Sep 24 06:17:45 AM UTC 24 |
3468354216 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.3683811201 |
|
|
Sep 24 06:17:41 AM UTC 24 |
Sep 24 06:17:46 AM UTC 24 |
1173163164 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.1703685947 |
|
|
Sep 24 06:16:45 AM UTC 24 |
Sep 24 06:17:53 AM UTC 24 |
46894998453 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_loopback.865578004 |
|
|
Sep 24 06:17:43 AM UTC 24 |
Sep 24 06:17:53 AM UTC 24 |
6991127716 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_alert_test.1487528435 |
|
|
Sep 24 06:17:53 AM UTC 24 |
Sep 24 06:17:55 AM UTC 24 |
26016776 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_fifo_reset.2834217631 |
|
|
Sep 24 06:16:02 AM UTC 24 |
Sep 24 06:17:59 AM UTC 24 |
235928072702 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_fifo_full.736557011 |
|
|
Sep 24 06:17:00 AM UTC 24 |
Sep 24 06:18:02 AM UTC 24 |
96062293487 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/21.uart_intr.3256224781 |
|
|
Sep 24 06:13:34 AM UTC 24 |
Sep 24 06:18:02 AM UTC 24 |
165013340820 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_fifo_reset.231834372 |
|
|
Sep 24 06:17:07 AM UTC 24 |
Sep 24 06:18:06 AM UTC 24 |
33952885925 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_stress_all.1359931675 |
|
|
Sep 24 06:14:42 AM UTC 24 |
Sep 24 06:18:10 AM UTC 24 |
234058095288 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.2516711588 |
|
|
Sep 24 06:17:17 AM UTC 24 |
Sep 24 06:18:11 AM UTC 24 |
197265886143 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_noise_filter.2268070534 |
|
|
Sep 24 06:17:12 AM UTC 24 |
Sep 24 06:18:11 AM UTC 24 |
72170090390 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_rx_oversample.2448157610 |
|
|
Sep 24 06:18:07 AM UTC 24 |
Sep 24 06:18:14 AM UTC 24 |
4105415748 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_smoke.3594743607 |
|
|
Sep 24 06:17:55 AM UTC 24 |
Sep 24 06:18:16 AM UTC 24 |
5983738444 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_perf.4275027672 |
|
|
Sep 24 06:12:15 AM UTC 24 |
Sep 24 06:18:16 AM UTC 24 |
5907968673 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.600022138 |
|
|
Sep 24 06:18:12 AM UTC 24 |
Sep 24 06:18:19 AM UTC 24 |
3500743199 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.1310552751 |
|
|
Sep 24 06:18:16 AM UTC 24 |
Sep 24 06:18:21 AM UTC 24 |
1719020050 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.586785743 |
|
|
Sep 24 06:14:03 AM UTC 24 |
Sep 24 06:18:23 AM UTC 24 |
161997725823 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_noise_filter.162563710 |
|
|
Sep 24 06:16:08 AM UTC 24 |
Sep 24 06:18:25 AM UTC 24 |
201762331164 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_loopback.2731270178 |
|
|
Sep 24 06:18:17 AM UTC 24 |
Sep 24 06:18:28 AM UTC 24 |
6579310718 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_alert_test.4016111443 |
|
|
Sep 24 06:18:30 AM UTC 24 |
Sep 24 06:18:31 AM UTC 24 |
33338185 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_fifo_reset.537287836 |
|
|
Sep 24 06:17:33 AM UTC 24 |
Sep 24 06:18:34 AM UTC 24 |
36972452026 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_smoke.493847559 |
|
|
Sep 24 06:18:33 AM UTC 24 |
Sep 24 06:18:38 AM UTC 24 |
716506332 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_tx_rx.2652780094 |
|
|
Sep 24 06:17:31 AM UTC 24 |
Sep 24 06:18:41 AM UTC 24 |
104137720989 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_fifo_reset.1056691976 |
|
|
Sep 24 06:16:31 AM UTC 24 |
Sep 24 06:18:42 AM UTC 24 |
56890914234 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.146431424 |
|
|
Sep 24 06:17:04 AM UTC 24 |
Sep 24 06:18:43 AM UTC 24 |
63475918342 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.1635405797 |
|
|
Sep 24 06:11:01 AM UTC 24 |
Sep 24 06:18:44 AM UTC 24 |
72513972411 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_noise_filter.1122839138 |
|
|
Sep 24 06:17:38 AM UTC 24 |
Sep 24 06:18:45 AM UTC 24 |
104368001190 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_rx_oversample.2799900964 |
|
|
Sep 24 06:18:43 AM UTC 24 |
Sep 24 06:18:48 AM UTC 24 |
4552849941 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_intr.1516055658 |
|
|
Sep 24 06:18:44 AM UTC 24 |
Sep 24 06:18:49 AM UTC 24 |
13633544483 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.4223886145 |
|
|
Sep 24 06:12:17 AM UTC 24 |
Sep 24 06:18:52 AM UTC 24 |
81998452137 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_noise_filter.2502241335 |
|
|
Sep 24 06:18:45 AM UTC 24 |
Sep 24 06:18:56 AM UTC 24 |
16694470021 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_fifo_reset.676050419 |
|
|
Sep 24 06:18:06 AM UTC 24 |
Sep 24 06:18:56 AM UTC 24 |
27161432046 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_loopback.3447845755 |
|
|
Sep 24 06:18:50 AM UTC 24 |
Sep 24 06:19:02 AM UTC 24 |
4779604881 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_perf.2595147875 |
|
|
Sep 24 06:15:39 AM UTC 24 |
Sep 24 06:19:08 AM UTC 24 |
13903538443 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_intr.3200119953 |
|
|
Sep 24 06:18:11 AM UTC 24 |
Sep 24 06:19:09 AM UTC 24 |
36536732291 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.1962536804 |
|
|
Sep 24 06:18:23 AM UTC 24 |
Sep 24 06:19:10 AM UTC 24 |
19193718527 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_alert_test.2678931639 |
|
|
Sep 24 06:19:09 AM UTC 24 |
Sep 24 06:19:11 AM UTC 24 |
14480687 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.3213483873 |
|
|
Sep 24 06:18:49 AM UTC 24 |
Sep 24 06:19:12 AM UTC 24 |
13145514135 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_smoke.1069044390 |
|
|
Sep 24 06:19:10 AM UTC 24 |
Sep 24 06:19:12 AM UTC 24 |
813316086 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_rx_oversample.9296719 |
|
|
Sep 24 06:19:14 AM UTC 24 |
Sep 24 06:19:17 AM UTC 24 |
1509924794 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.1310382605 |
|
|
Sep 24 06:15:12 AM UTC 24 |
Sep 24 06:19:18 AM UTC 24 |
145977591607 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.1596547556 |
|
|
Sep 24 06:18:46 AM UTC 24 |
Sep 24 06:19:18 AM UTC 24 |
51572928520 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_fifo_full.1517604945 |
|
|
Sep 24 06:17:31 AM UTC 24 |
Sep 24 06:19:33 AM UTC 24 |
50413666580 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_stress_all.1832087530 |
|
|
Sep 24 06:15:13 AM UTC 24 |
Sep 24 06:19:34 AM UTC 24 |
145314381699 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_intr.1273992147 |
|
|
Sep 24 06:19:18 AM UTC 24 |
Sep 24 06:19:35 AM UTC 24 |
5359942543 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.4177622064 |
|
|
Sep 24 06:19:35 AM UTC 24 |
Sep 24 06:19:38 AM UTC 24 |
430465960 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_tx_rx.2884477370 |
|
|
Sep 24 06:18:00 AM UTC 24 |
Sep 24 06:19:40 AM UTC 24 |
51172905039 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.443897917 |
|
|
Sep 24 06:18:57 AM UTC 24 |
Sep 24 06:19:43 AM UTC 24 |
41235606431 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.4126558782 |
|
|
Sep 24 06:19:19 AM UTC 24 |
Sep 24 06:19:53 AM UTC 24 |
39863875313 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_loopback.3659122516 |
|
|
Sep 24 06:19:36 AM UTC 24 |
Sep 24 06:19:56 AM UTC 24 |
8752732552 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.1894338291 |
|
|
Sep 24 06:19:44 AM UTC 24 |
Sep 24 06:19:56 AM UTC 24 |
2215331607 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_alert_test.2820482591 |
|
|
Sep 24 06:19:57 AM UTC 24 |
Sep 24 06:19:58 AM UTC 24 |
33705348 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_smoke.3129791379 |
|
|
Sep 24 06:19:57 AM UTC 24 |
Sep 24 06:19:59 AM UTC 24 |
109546173 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_perf.4287819671 |
|
|
Sep 24 06:16:47 AM UTC 24 |
Sep 24 06:20:00 AM UTC 24 |
12246183938 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_tx_rx.3719193564 |
|
|
Sep 24 06:19:11 AM UTC 24 |
Sep 24 06:20:02 AM UTC 24 |
43225359855 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_perf.91922760 |
|
|
Sep 24 06:17:23 AM UTC 24 |
Sep 24 06:20:06 AM UTC 24 |
16796031381 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_fifo_full.623427148 |
|
|
Sep 24 06:18:03 AM UTC 24 |
Sep 24 06:20:07 AM UTC 24 |
69909133606 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_perf.2902530368 |
|
|
Sep 24 06:08:16 AM UTC 24 |
Sep 24 06:20:08 AM UTC 24 |
14537171349 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.660217761 |
|
|
Sep 24 06:19:34 AM UTC 24 |
Sep 24 06:20:19 AM UTC 24 |
131601128024 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_noise_filter.3447894579 |
|
|
Sep 24 06:18:12 AM UTC 24 |
Sep 24 06:20:21 AM UTC 24 |
156225284513 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.2780794269 |
|
|
Sep 24 06:20:01 AM UTC 24 |
Sep 24 06:20:22 AM UTC 24 |
12249792700 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.1202251539 |
|
|
Sep 24 06:14:32 AM UTC 24 |
Sep 24 06:20:25 AM UTC 24 |
44970908530 ps |