Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.11 99.08 97.65 100.00 98.35 100.00 99.57


Total tests in report: 1312
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
78.04 78.04 96.43 96.43 83.53 83.53 96.97 96.97 88.71 88.71 94.40 94.40 8.22 8.22 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.2203303805
81.56 3.52 97.86 1.43 91.18 7.65 97.22 0.25 93.65 4.94 96.17 1.77 13.28 5.06 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.631831918
84.29 2.73 97.86 0.00 91.18 0.00 97.22 0.00 93.65 0.00 96.17 0.00 29.65 16.37 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.1697495907
86.49 2.20 97.96 0.10 92.35 1.18 97.22 0.00 94.82 1.18 96.46 0.29 40.10 10.45 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_stress_all.3062146275
88.15 1.67 97.96 0.00 92.35 0.00 97.22 0.00 94.82 0.00 96.46 0.00 50.10 10.00 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_stress_all.704055608
89.45 1.30 97.96 0.00 92.35 0.00 97.22 0.00 94.82 0.00 96.46 0.00 57.89 7.79 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.3152115176
90.60 1.14 98.27 0.31 93.88 1.53 97.22 0.00 95.76 0.94 96.46 0.00 61.98 4.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_stress_all.2803253098
91.69 1.10 98.27 0.00 93.88 0.00 97.22 0.00 95.76 0.00 96.46 0.00 68.55 6.57 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_stress_all.4149623783
92.50 0.81 98.27 0.00 94.00 0.12 97.22 0.00 95.76 0.00 96.46 0.00 73.31 4.76 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_stress_all.1018211642
93.11 0.61 98.47 0.20 94.35 0.35 97.22 0.00 96.24 0.47 96.46 0.00 75.93 2.62 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_fifo_reset.2287026256
93.72 0.60 98.57 0.10 94.71 0.35 99.75 2.53 96.47 0.24 96.76 0.29 76.04 0.11 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_sec_cm.1569972052
94.26 0.54 98.88 0.31 95.88 1.18 99.75 0.00 98.12 1.65 96.76 0.00 76.16 0.11 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_tx_ovrd.254334469
94.73 0.48 98.88 0.00 95.88 0.00 99.75 0.00 98.12 0.00 96.76 0.00 79.02 2.87 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.3814871844
95.12 0.39 98.88 0.00 95.88 0.00 99.75 0.00 98.12 0.00 97.05 0.29 81.06 2.03 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_stress_all.2199216390
95.46 0.34 98.88 0.00 95.88 0.00 99.75 0.00 98.12 0.00 97.05 0.00 83.11 2.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.54241898
95.80 0.34 98.88 0.00 95.88 0.00 99.75 0.00 98.12 0.00 97.05 0.00 85.14 2.03 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.2868499
96.10 0.29 98.88 0.00 95.88 0.00 99.75 0.00 98.12 0.00 98.82 1.77 85.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_aliasing.3950906729
96.39 0.29 99.08 0.20 96.00 0.12 99.75 0.00 98.35 0.24 99.71 0.88 85.44 0.29 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.3773408315
96.66 0.27 99.08 0.00 96.00 0.00 99.75 0.00 98.35 0.00 99.71 0.00 87.09 1.65 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_noise_filter.643561843
96.89 0.23 99.08 0.00 96.00 0.00 99.75 0.00 98.35 0.00 99.71 0.00 88.46 1.38 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_fifo_full.3127788593
97.10 0.21 99.08 0.00 96.00 0.00 99.75 0.00 98.35 0.00 99.71 0.00 89.73 1.26 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_stress_all.3311745874
97.26 0.15 99.08 0.00 96.00 0.00 99.75 0.00 98.35 0.00 99.71 0.00 90.65 0.93 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_perf.3209726526
97.41 0.15 99.08 0.00 96.71 0.71 99.75 0.00 98.35 0.00 99.71 0.00 90.86 0.20 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/9.uart_tl_intg_err.752612600
97.55 0.14 99.08 0.00 96.82 0.12 99.75 0.00 98.35 0.00 99.71 0.00 91.58 0.72 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_stress_all.2375562277
97.66 0.11 99.08 0.00 97.06 0.24 99.75 0.00 98.35 0.00 99.71 0.00 92.03 0.45 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_rx_parity_err.790976037
97.76 0.10 99.08 0.00 97.06 0.00 99.75 0.00 98.35 0.00 99.71 0.00 92.64 0.61 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_fifo_overflow.3941630751
97.87 0.10 99.08 0.00 97.41 0.35 100.00 0.25 98.35 0.00 99.71 0.00 92.64 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_alert_test.2072806245
97.96 0.09 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 99.71 0.00 93.18 0.54 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.4235143389
98.03 0.08 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 99.71 0.00 93.66 0.47 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_perf.576579564
98.11 0.07 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 99.71 0.00 94.08 0.43 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.3907310820
98.17 0.06 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 99.71 0.00 94.45 0.36 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_fifo_reset.4187445106
98.22 0.06 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 99.71 0.00 94.78 0.34 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_stress_all.1359931675
98.28 0.06 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 99.71 0.00 95.12 0.34 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_fifo_full.2156440819
98.33 0.05 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 100.00 0.29 95.12 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_rw.243326322
98.38 0.05 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.42 0.29 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_fifo_reset.539384338
98.42 0.05 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.69 0.27 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.3216785868
98.46 0.04 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.94 0.25 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_fifo_reset.1004096515
98.50 0.04 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.16 0.23 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_stress_all.2357798785
98.54 0.04 99.08 0.00 97.41 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.39 0.23 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_noise_filter.2722944881
98.57 0.03 99.08 0.00 97.53 0.12 100.00 0.00 98.35 0.00 100.00 0.00 96.46 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.1818182450
98.60 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.64 0.18 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.3470980441
98.63 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.79 0.16 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/50.uart_fifo_reset.1368568367
98.65 0.02 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.93 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.2802508049
98.67 0.02 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.06 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/19.uart_fifo_full.1896740636
98.69 0.02 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.20 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.452152927
98.72 0.02 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.34 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/84.uart_fifo_reset.3261628495
98.74 0.02 99.08 0.00 97.65 0.12 100.00 0.00 98.35 0.00 100.00 0.00 97.34 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_intg_err.3239258036
98.76 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.45 0.11 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.1965429996
98.77 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.56 0.11 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.146431424
98.79 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.67 0.11 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_stress_all.3754893383
98.81 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.76 0.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/103.uart_fifo_reset.393738567
98.82 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.86 0.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_fifo_full.3621595416
98.84 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.95 0.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/144.uart_fifo_reset.2625625803
98.85 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.04 0.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/216.uart_fifo_reset.3635098458
98.87 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.13 0.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_fifo_reset.3142642247
98.88 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.22 0.09 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_stress_all.2618295323
98.89 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.28 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_tx_rx.1756336090
98.91 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.35 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/152.uart_fifo_reset.1669136021
98.92 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.42 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_fifo_reset.231834372
98.93 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.49 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.3824802413
98.94 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.55 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.3616424527
98.95 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.60 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_rx_parity_err.410709991
98.95 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.65 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_fifo_reset.3038909409
98.96 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.69 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/168.uart_fifo_reset.1286201172
98.97 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.74 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/186.uart_fifo_reset.2596055769
98.98 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.78 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/22.uart_noise_filter.495583277
98.98 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.83 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/23.uart_stress_all.1832087530
98.99 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.87 0.05 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_fifo_reset.2382556610
99.00 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.89 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.62926315
99.00 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.92 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.3464348293
99.00 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.94 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_fifo_reset.2788796952
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.96 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/119.uart_fifo_reset.113544388
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.98 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/125.uart_fifo_reset.661561131
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.01 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/132.uart_fifo_reset.3714102907
99.02 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.03 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/135.uart_fifo_reset.616074806
99.02 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.05 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/151.uart_fifo_reset.1873735172
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.07 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/158.uart_fifo_reset.3101790349
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.10 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/165.uart_fifo_reset.3642794030
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.12 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_fifo_full.2477277950
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.14 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/172.uart_fifo_reset.2142624688
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.16 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/175.uart_fifo_reset.2863222081
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.19 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/180.uart_fifo_reset.2838475312
99.05 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.21 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/183.uart_fifo_reset.1745397235
99.05 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.23 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/191.uart_fifo_reset.2662626940
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.25 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/204.uart_fifo_reset.765455389
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.28 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/213.uart_fifo_reset.1523051468
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.30 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/220.uart_fifo_reset.56771200
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.32 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/224.uart_fifo_reset.3533909511
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.35 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/228.uart_fifo_reset.3325537989
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.37 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/233.uart_fifo_reset.2107229341
99.08 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.39 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/236.uart_fifo_reset.3215137530
99.08 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.41 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_intr.1249105012
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.44 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/245.uart_fifo_reset.160963112
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.46 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/261.uart_fifo_reset.934924358
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.48 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/263.uart_fifo_reset.4279384757
99.10 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.50 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_fifo_reset.2443396961
99.10 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.53 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_fifo_reset.2005123974
99.11 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.55 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/58.uart_fifo_reset.2157517354
99.11 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.57 0.02 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/97.uart_fifo_reset.796452211

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_bit_bash.1816376719
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_hw_reset.1420939728
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_mem_rw_with_rand_reset.194954084
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_intr_test.2196849685
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_same_csr_outstanding.568704401
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_errors.2313101123
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_aliasing.376107052
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_bit_bash.57727152
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_hw_reset.580253642
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_mem_rw_with_rand_reset.1132073961
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_rw.3162746167
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_intr_test.318124703
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_same_csr_outstanding.1053117775
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_errors.2556323366
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_intg_err.3949587887
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_mem_rw_with_rand_reset.1210958650
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_rw.3069919827
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/10.uart_intr_test.1786678859
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/10.uart_same_csr_outstanding.1197059451
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_errors.2174071902
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_intg_err.2473311553
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_mem_rw_with_rand_reset.1888218255
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_rw.3558126800
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/11.uart_intr_test.3955657484
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/11.uart_same_csr_outstanding.37325874
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_errors.461131875
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_intg_err.556814732
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_mem_rw_with_rand_reset.785100154
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_rw.1670151336
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/12.uart_intr_test.2620710449
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/12.uart_same_csr_outstanding.2874486454
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_errors.2702855559
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_intg_err.4051058557
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_mem_rw_with_rand_reset.1603862216
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_rw.3035077537
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/13.uart_intr_test.1631020227
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/13.uart_same_csr_outstanding.3745314466
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_errors.1758345727
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_intg_err.1430956697
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_mem_rw_with_rand_reset.1234171223
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_rw.3768113603
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/14.uart_intr_test.3989640021
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/14.uart_same_csr_outstanding.3604106210
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_errors.156512549
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_intg_err.596940158
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_mem_rw_with_rand_reset.4254162349
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_rw.3074909690
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/15.uart_intr_test.726327984
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/15.uart_same_csr_outstanding.1240157409
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_errors.2687550463
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_intg_err.1810553779
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_mem_rw_with_rand_reset.1256693322
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_rw.1476107922
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/16.uart_intr_test.537624337
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/16.uart_same_csr_outstanding.2683725466
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_errors.2249323419
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_intg_err.3115200093
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_mem_rw_with_rand_reset.1720649638
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_rw.3647017936
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/17.uart_intr_test.1963727967
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/17.uart_same_csr_outstanding.1689880239
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_errors.918246998
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_intg_err.2800804707
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_mem_rw_with_rand_reset.457360810
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_rw.2660345477
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/18.uart_intr_test.3288732031
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/18.uart_same_csr_outstanding.2661903032
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_errors.2588809933
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_intg_err.2740303951
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_mem_rw_with_rand_reset.585283804
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_rw.1647169796
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/19.uart_intr_test.1933885011
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/19.uart_same_csr_outstanding.2934844037
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_errors.2887392842
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_intg_err.2647007718
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_aliasing.2721036630
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_bit_bash.2435569374
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_hw_reset.3042174616
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_mem_rw_with_rand_reset.995414485
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_rw.4042302892
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_intr_test.167201830
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_same_csr_outstanding.455736530
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_errors.1266204115
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_intg_err.1003159655
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/20.uart_intr_test.1680831265
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/21.uart_intr_test.1398442675
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/22.uart_intr_test.1919228217
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/23.uart_intr_test.12232738
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/24.uart_intr_test.660549728
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/25.uart_intr_test.2758183937
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/26.uart_intr_test.3597805020
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/27.uart_intr_test.3132465778
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/28.uart_intr_test.13034325
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/29.uart_intr_test.2493779943
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_aliasing.2066685717
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_bit_bash.404126971
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_hw_reset.95642299
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_mem_rw_with_rand_reset.4145063268
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_rw.2330087009
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_intr_test.74957675
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_same_csr_outstanding.252966406
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_errors.2814869251
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_intg_err.44973509
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/30.uart_intr_test.3572087919
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/31.uart_intr_test.1251621921
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/32.uart_intr_test.3229140141
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/33.uart_intr_test.196966467
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/34.uart_intr_test.402857402
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/35.uart_intr_test.3814427461
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/36.uart_intr_test.2314620614
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/37.uart_intr_test.299897096
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/38.uart_intr_test.2498788541
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/39.uart_intr_test.4231418874
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_aliasing.231458257
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_bit_bash.2399751700
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_hw_reset.3612049821
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_mem_rw_with_rand_reset.3012223106
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_rw.388010309
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_intr_test.3738596668
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_same_csr_outstanding.2634109889
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_errors.680301770
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_intg_err.1435470213
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/40.uart_intr_test.1517549736
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/41.uart_intr_test.3659492809
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/42.uart_intr_test.521421594
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/43.uart_intr_test.2004473862
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/44.uart_intr_test.1270885219
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/45.uart_intr_test.1431387181
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/cover_reg_top/46.uart_intr_test.2406138283
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_noise_filter.2012364591
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_perf.3116736967
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_rx_oversample.71052475
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.205661511
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/87.uart_fifo_reset.3988200737
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/88.uart_fifo_reset.3606413761
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/89.uart_fifo_reset.256098792
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/91.uart_fifo_reset.3084146549
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/93.uart_fifo_reset.66400506
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/94.uart_fifo_reset.189080842
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/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/95.uart_fifo_reset.3546349312
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.467659119
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/96.uart_fifo_reset.2818565636
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.856970316
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.973322637
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/98.uart_fifo_reset.2991405749
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.2305774831
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/99.uart_fifo_reset.896571807
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.474442559



Total test records in report: 1312
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_smoke.2441384055 Sep 24 05:58:42 AM UTC 24 Sep 24 05:58:46 AM UTC 24 450335943 ps
T2 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_loopback.1020089463 Sep 24 05:58:46 AM UTC 24 Sep 24 05:58:49 AM UTC 24 716323232 ps
T3 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_tx_ovrd.2614889666 Sep 24 05:58:45 AM UTC 24 Sep 24 05:58:49 AM UTC 24 682939865 ps
T4 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_rx_oversample.2000089100 Sep 24 05:58:44 AM UTC 24 Sep 24 05:58:52 AM UTC 24 2339646614 ps
T5 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.631831918 Sep 24 05:58:42 AM UTC 24 Sep 24 05:58:53 AM UTC 24 22107200925 ps
T6 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_alert_test.2072806245 Sep 24 05:58:55 AM UTC 24 Sep 24 05:58:57 AM UTC 24 14838683 ps
T7 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_tx_rx.438412025 Sep 24 05:58:42 AM UTC 24 Sep 24 05:58:57 AM UTC 24 31418960964 ps
T8 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_sec_cm.1569972052 Sep 24 05:58:55 AM UTC 24 Sep 24 05:58:57 AM UTC 24 254921830 ps
T9 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_smoke.827773676 Sep 24 05:58:58 AM UTC 24 Sep 24 05:59:01 AM UTC 24 691784700 ps
T10 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.2203303805 Sep 24 05:58:49 AM UTC 24 Sep 24 05:59:02 AM UTC 24 369049145 ps
T11 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_rx_parity_err.410709991 Sep 24 05:58:44 AM UTC 24 Sep 24 05:59:14 AM UTC 24 29052855300 ps
T13 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_fifo_full.2471339740 Sep 24 05:58:42 AM UTC 24 Sep 24 05:59:16 AM UTC 24 51369679040 ps
T12 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_fifo_full.3784696313 Sep 24 05:58:58 AM UTC 24 Sep 24 05:59:29 AM UTC 24 37065209429 ps
T34 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_rx_start_bit_filter.1166747622 Sep 24 05:59:31 AM UTC 24 Sep 24 05:59:35 AM UTC 24 6143217704 ps
T27 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_noise_filter.3425846393 Sep 24 05:59:18 AM UTC 24 Sep 24 05:59:38 AM UTC 24 4359171472 ps
T21 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_rx_oversample.3706108310 Sep 24 05:59:15 AM UTC 24 Sep 24 05:59:42 AM UTC 24 3086607919 ps
T22 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_tx_ovrd.254334469 Sep 24 05:59:39 AM UTC 24 Sep 24 05:59:43 AM UTC 24 531873917 ps
T25 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_loopback.1465231706 Sep 24 05:59:43 AM UTC 24 Sep 24 05:59:45 AM UTC 24 151353779 ps
T37 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_alert_test.52409035 Sep 24 05:59:56 AM UTC 24 Sep 24 05:59:58 AM UTC 24 21175159 ps
T36 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_sec_cm.32189555 Sep 24 05:59:56 AM UTC 24 Sep 24 05:59:58 AM UTC 24 209917618 ps
T35 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_rx_start_bit_filter.1576114600 Sep 24 05:58:44 AM UTC 24 Sep 24 06:00:05 AM UTC 24 43066034557 ps
T280 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_smoke.4194888007 Sep 24 06:00:00 AM UTC 24 Sep 24 06:00:05 AM UTC 24 490520982 ps
T31 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.3773408315 Sep 24 05:59:47 AM UTC 24 Sep 24 06:00:07 AM UTC 24 3742565737 ps
T93 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_tx_rx.4080231529 Sep 24 05:58:58 AM UTC 24 Sep 24 06:00:29 AM UTC 24 40719525991 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_fifo_reset.2287026256 Sep 24 05:59:03 AM UTC 24 Sep 24 06:00:31 AM UTC 24 35681211895 ps
T23 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_tx_ovrd.82563797 Sep 24 06:00:29 AM UTC 24 Sep 24 06:00:33 AM UTC 24 613128369 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_rx_start_bit_filter.32577090 Sep 24 06:00:26 AM UTC 24 Sep 24 06:00:35 AM UTC 24 1794513707 ps
T17 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_rx_oversample.3358381718 Sep 24 06:00:15 AM UTC 24 Sep 24 06:00:38 AM UTC 24 7420390908 ps
T33 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_tx_rx.3519415560 Sep 24 06:00:00 AM UTC 24 Sep 24 06:00:38 AM UTC 24 60298182294 ps
T26 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_loopback.621700561 Sep 24 06:00:31 AM UTC 24 Sep 24 06:00:43 AM UTC 24 13215300912 ps
T39 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_sec_cm.191073903 Sep 24 06:00:44 AM UTC 24 Sep 24 06:00:47 AM UTC 24 266621602 ps
T38 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_alert_test.1733522942 Sep 24 06:00:48 AM UTC 24 Sep 24 06:00:50 AM UTC 24 59671899 ps
T114 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_noise_filter.1095720911 Sep 24 05:58:44 AM UTC 24 Sep 24 06:00:50 AM UTC 24 142848976425 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_intr.3674605402 Sep 24 06:00:23 AM UTC 24 Sep 24 06:00:51 AM UTC 24 6985211747 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_smoke.2373794175 Sep 24 06:00:49 AM UTC 24 Sep 24 06:00:52 AM UTC 24 453208970 ps
T32 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_stress_all_with_rand_reset.3817772046 Sep 24 06:00:39 AM UTC 24 Sep 24 06:01:01 AM UTC 24 5911258536 ps
T115 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_fifo_full.4092257902 Sep 24 06:00:08 AM UTC 24 Sep 24 06:01:10 AM UTC 24 24823475407 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_rx_oversample.3710717469 Sep 24 06:00:53 AM UTC 24 Sep 24 06:01:11 AM UTC 24 5235120900 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_intr.1019144701 Sep 24 06:01:01 AM UTC 24 Sep 24 06:01:21 AM UTC 24 23113042661 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_tx_ovrd.2505439545 Sep 24 06:01:20 AM UTC 24 Sep 24 06:01:24 AM UTC 24 1412016426 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_rx_start_bit_filter.2555550050 Sep 24 06:01:13 AM UTC 24 Sep 24 06:01:26 AM UTC 24 3969627177 ps
T29 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_loopback.3629331338 Sep 24 06:01:21 AM UTC 24 Sep 24 06:01:31 AM UTC 24 3330414371 ps
T30 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_rx_parity_err.3835685428 Sep 24 06:00:27 AM UTC 24 Sep 24 06:01:35 AM UTC 24 23126370860 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_fifo_reset.1004096515 Sep 24 06:00:09 AM UTC 24 Sep 24 06:01:35 AM UTC 24 89301207224 ps
T85 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_sec_cm.4086718567 Sep 24 06:01:35 AM UTC 24 Sep 24 06:01:38 AM UTC 24 68669066 ps
T47 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.54241898 Sep 24 05:59:46 AM UTC 24 Sep 24 06:01:38 AM UTC 24 91157355869 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_alert_test.1557275445 Sep 24 06:01:36 AM UTC 24 Sep 24 06:01:39 AM UTC 24 37702479 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_tx_rx.3511960422 Sep 24 06:00:50 AM UTC 24 Sep 24 06:01:46 AM UTC 24 106636880239 ps
T40 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_stress_all_with_rand_reset.281125484 Sep 24 06:01:26 AM UTC 24 Sep 24 06:01:51 AM UTC 24 1662184477 ps
T76 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_rx_oversample.3346064144 Sep 24 06:01:52 AM UTC 24 Sep 24 06:01:58 AM UTC 24 3282734847 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_tx_rx.3019934931 Sep 24 06:01:39 AM UTC 24 Sep 24 06:02:07 AM UTC 24 34569120430 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_intr.3384828297 Sep 24 06:01:55 AM UTC 24 Sep 24 06:02:08 AM UTC 24 13097528664 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_fifo_full.2960461331 Sep 24 06:01:40 AM UTC 24 Sep 24 06:02:10 AM UTC 24 31859669418 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_tx_ovrd.3990450128 Sep 24 06:02:08 AM UTC 24 Sep 24 06:02:12 AM UTC 24 536190111 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_smoke.993417810 Sep 24 06:01:36 AM UTC 24 Sep 24 06:02:14 AM UTC 24 5835145692 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_loopback.1104605009 Sep 24 06:02:11 AM UTC 24 Sep 24 06:02:16 AM UTC 24 3477675216 ps
T86 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_sec_cm.2251163288 Sep 24 06:02:17 AM UTC 24 Sep 24 06:02:19 AM UTC 24 109499104 ps
T14 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.3814871844 Sep 24 06:01:19 AM UTC 24 Sep 24 06:02:21 AM UTC 24 342830178157 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_alert_test.100431091 Sep 24 06:02:20 AM UTC 24 Sep 24 06:02:22 AM UTC 24 16180152 ps
T97 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_noise_filter.1482366853 Sep 24 06:01:10 AM UTC 24 Sep 24 06:02:23 AM UTC 24 37859921550 ps
T41 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.1799709096 Sep 24 06:02:14 AM UTC 24 Sep 24 06:02:33 AM UTC 24 3948226322 ps
T15 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_fifo_overflow.2290528912 Sep 24 06:01:40 AM UTC 24 Sep 24 06:02:34 AM UTC 24 64336700828 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_fifo_reset.1474123431 Sep 24 06:01:47 AM UTC 24 Sep 24 06:02:35 AM UTC 24 53827863776 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_rx_start_bit_filter.499500465 Sep 24 06:01:59 AM UTC 24 Sep 24 06:02:37 AM UTC 24 52794102639 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_smoke.1336001811 Sep 24 06:02:22 AM UTC 24 Sep 24 06:02:37 AM UTC 24 5649360984 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_intr.417351102 Sep 24 05:58:44 AM UTC 24 Sep 24 06:02:38 AM UTC 24 149976925653 ps
T345 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_rx_start_bit_filter.319362758 Sep 24 06:02:38 AM UTC 24 Sep 24 06:02:42 AM UTC 24 2083906972 ps
T49 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.62926315 Sep 24 05:59:02 AM UTC 24 Sep 24 06:02:43 AM UTC 24 77036931172 ps
T28 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_rx_oversample.877145742 Sep 24 06:02:34 AM UTC 24 Sep 24 06:02:44 AM UTC 24 2751929674 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_tx_ovrd.1478796975 Sep 24 06:02:43 AM UTC 24 Sep 24 06:02:49 AM UTC 24 700056926 ps
T16 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_stress_all.3062146275 Sep 24 06:00:40 AM UTC 24 Sep 24 06:03:06 AM UTC 24 277135739151 ps
T277 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_perf.872938944 Sep 24 06:00:33 AM UTC 24 Sep 24 06:03:08 AM UTC 24 5638464942 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_fifo_full.3276725312 Sep 24 06:02:23 AM UTC 24 Sep 24 06:03:09 AM UTC 24 99059484312 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_alert_test.2737677475 Sep 24 06:03:10 AM UTC 24 Sep 24 06:03:12 AM UTC 24 41296035 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.1697495907 Sep 24 06:00:35 AM UTC 24 Sep 24 06:03:15 AM UTC 24 53117402159 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_intr.3929351315 Sep 24 05:59:16 AM UTC 24 Sep 24 06:03:16 AM UTC 24 117879355618 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_loopback.2741383405 Sep 24 06:02:44 AM UTC 24 Sep 24 06:03:16 AM UTC 24 9063457503 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_smoke.2390608726 Sep 24 06:03:13 AM UTC 24 Sep 24 06:03:17 AM UTC 24 290501866 ps
T118 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.2868499 Sep 24 06:00:09 AM UTC 24 Sep 24 06:03:27 AM UTC 24 115985173477 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_fifo_overflow.2333438368 Sep 24 06:02:31 AM UTC 24 Sep 24 06:03:28 AM UTC 24 78834631072 ps
T122 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_fifo_full.1427339091 Sep 24 06:00:51 AM UTC 24 Sep 24 06:03:34 AM UTC 24 90008182733 ps
T42 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_stress_all_with_rand_reset.2673164449 Sep 24 06:03:07 AM UTC 24 Sep 24 06:03:35 AM UTC 24 1861976768 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_rx_start_bit_filter.314105433 Sep 24 06:03:32 AM UTC 24 Sep 24 06:03:37 AM UTC 24 3078095753 ps
T126 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_rx_parity_err.790976037 Sep 24 05:59:35 AM UTC 24 Sep 24 06:03:43 AM UTC 24 183417184487 ps
T116 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_rx_parity_err.3180841654 Sep 24 06:02:07 AM UTC 24 Sep 24 06:03:44 AM UTC 24 31988766805 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_loopback.2900369692 Sep 24 06:03:37 AM UTC 24 Sep 24 06:03:45 AM UTC 24 1530382103 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_noise_filter.2722944881 Sep 24 06:02:38 AM UTC 24 Sep 24 06:03:51 AM UTC 24 232599615625 ps
T98 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_fifo_overflow.3941630751 Sep 24 06:03:17 AM UTC 24 Sep 24 06:03:55 AM UTC 24 62810625099 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_intr.3463169293 Sep 24 06:03:28 AM UTC 24 Sep 24 06:03:57 AM UTC 24 27590572253 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_alert_test.2770945393 Sep 24 06:03:55 AM UTC 24 Sep 24 06:03:57 AM UTC 24 69415732 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_rx_oversample.3137515562 Sep 24 06:03:20 AM UTC 24 Sep 24 06:03:59 AM UTC 24 6298614940 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.4085250089 Sep 24 06:03:35 AM UTC 24 Sep 24 06:04:01 AM UTC 24 79637056357 ps
T326 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_smoke.2385388729 Sep 24 06:03:58 AM UTC 24 Sep 24 06:04:01 AM UTC 24 692809316 ps
T20 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_intr.3710020839 Sep 24 06:02:37 AM UTC 24 Sep 24 06:04:02 AM UTC 24 52255560038 ps
T285 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_noise_filter.107335804 Sep 24 06:01:56 AM UTC 24 Sep 24 06:04:02 AM UTC 24 62196464660 ps
T296 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_tx_rx.1733869360 Sep 24 06:02:23 AM UTC 24 Sep 24 06:04:04 AM UTC 24 271835342323 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_rx_oversample.1312359600 Sep 24 06:04:02 AM UTC 24 Sep 24 06:04:05 AM UTC 24 2392224969 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_tx_ovrd.2027587947 Sep 24 06:03:36 AM UTC 24 Sep 24 06:04:08 AM UTC 24 6171093598 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_tx_rx.669757875 Sep 24 06:03:16 AM UTC 24 Sep 24 06:04:12 AM UTC 24 34740745597 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_tx_ovrd.1282481514 Sep 24 06:04:08 AM UTC 24 Sep 24 06:04:12 AM UTC 24 546692219 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_rx_start_bit_filter.1929690404 Sep 24 06:04:05 AM UTC 24 Sep 24 06:04:15 AM UTC 24 4918770959 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_stress_all.3047543733 Sep 24 06:03:09 AM UTC 24 Sep 24 06:04:16 AM UTC 24 14344523420 ps
T123 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_fifo_overflow.930209146 Sep 24 06:04:00 AM UTC 24 Sep 24 06:04:18 AM UTC 24 16654460604 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_noise_filter.3281999813 Sep 24 06:03:30 AM UTC 24 Sep 24 06:04:19 AM UTC 24 62400198989 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_alert_test.2407649320 Sep 24 06:04:20 AM UTC 24 Sep 24 06:04:22 AM UTC 24 14216344 ps
T43 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.1818182450 Sep 24 06:03:46 AM UTC 24 Sep 24 06:04:23 AM UTC 24 17481130050 ps
T272 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_tx_rx.3217251264 Sep 24 06:03:58 AM UTC 24 Sep 24 06:04:24 AM UTC 24 78802874429 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_smoke.2505764109 Sep 24 06:04:23 AM UTC 24 Sep 24 06:04:27 AM UTC 24 677710524 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_fifo_reset.469627129 Sep 24 06:04:02 AM UTC 24 Sep 24 06:04:27 AM UTC 24 11515265305 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_loopback.3293018413 Sep 24 06:04:12 AM UTC 24 Sep 24 06:04:29 AM UTC 24 10424507836 ps
T265 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_fifo_reset.1871388434 Sep 24 06:00:52 AM UTC 24 Sep 24 06:04:30 AM UTC 24 151438133649 ps
T121 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_fifo_full.3127788593 Sep 24 06:03:16 AM UTC 24 Sep 24 06:04:32 AM UTC 24 62280221723 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_intr.3641326889 Sep 24 06:04:03 AM UTC 24 Sep 24 06:04:32 AM UTC 24 53049889629 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_stress_all.1018211642 Sep 24 05:58:50 AM UTC 24 Sep 24 06:04:38 AM UTC 24 128911565767 ps
T24 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_stress_all.2803253098 Sep 24 06:03:51 AM UTC 24 Sep 24 06:04:41 AM UTC 24 97627138512 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_rx_oversample.71052475 Sep 24 06:04:28 AM UTC 24 Sep 24 06:04:42 AM UTC 24 4717283821 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.3645649922 Sep 24 06:04:38 AM UTC 24 Sep 24 06:04:44 AM UTC 24 2538551663 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_fifo_reset.813273718 Sep 24 06:04:28 AM UTC 24 Sep 24 06:04:57 AM UTC 24 14520102449 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_loopback.1548381366 Sep 24 06:04:42 AM UTC 24 Sep 24 06:04:58 AM UTC 24 12916705086 ps
T99 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_intr.3641548508 Sep 24 06:04:30 AM UTC 24 Sep 24 06:04:59 AM UTC 24 26023552313 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_alert_test.1398160924 Sep 24 06:04:59 AM UTC 24 Sep 24 06:05:01 AM UTC 24 19482120 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_smoke.2173908303 Sep 24 06:04:59 AM UTC 24 Sep 24 06:05:02 AM UTC 24 705760637 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_fifo_reset.4251718719 Sep 24 06:03:18 AM UTC 24 Sep 24 06:05:04 AM UTC 24 34025153120 ps
T267 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_perf.914305810 Sep 24 06:02:11 AM UTC 24 Sep 24 06:05:05 AM UTC 24 11705480431 ps
T119 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.4086272504 Sep 24 06:04:28 AM UTC 24 Sep 24 06:05:06 AM UTC 24 59244931148 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_noise_filter.360545025 Sep 24 06:04:03 AM UTC 24 Sep 24 06:05:06 AM UTC 24 13952524610 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/2.uart_noise_filter.2162454219 Sep 24 06:00:25 AM UTC 24 Sep 24 06:05:08 AM UTC 24 97130484417 ps
T124 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_fifo_full.2058534099 Sep 24 06:03:58 AM UTC 24 Sep 24 06:05:11 AM UTC 24 37535519636 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_stress_all_with_rand_reset.1851598867 Sep 24 06:04:16 AM UTC 24 Sep 24 06:05:15 AM UTC 24 17367968841 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.2933162600 Sep 24 06:04:32 AM UTC 24 Sep 24 06:05:17 AM UTC 24 52155271823 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_tx_rx.1525499661 Sep 24 06:05:01 AM UTC 24 Sep 24 06:05:19 AM UTC 24 8548696419 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_rx_oversample.2961439567 Sep 24 06:05:06 AM UTC 24 Sep 24 06:05:20 AM UTC 24 4906572798 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.1038165810 Sep 24 06:05:16 AM UTC 24 Sep 24 06:05:23 AM UTC 24 1219495097 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.3603153857 Sep 24 06:05:09 AM UTC 24 Sep 24 06:05:26 AM UTC 24 4021586623 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_loopback.3400551485 Sep 24 06:05:18 AM UTC 24 Sep 24 06:05:28 AM UTC 24 8427197436 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_alert_test.3191678885 Sep 24 06:05:27 AM UTC 24 Sep 24 06:05:29 AM UTC 24 46557370 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_intr.3450441666 Sep 24 06:05:06 AM UTC 24 Sep 24 06:05:35 AM UTC 24 12207892977 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_smoke.1279791518 Sep 24 06:05:29 AM UTC 24 Sep 24 06:05:37 AM UTC 24 843106645 ps
T288 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_perf.1862747589 Sep 24 05:59:45 AM UTC 24 Sep 24 06:05:41 AM UTC 24 19804187229 ps
T102 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_fifo_full.2156440819 Sep 24 06:05:02 AM UTC 24 Sep 24 06:05:43 AM UTC 24 127592611442 ps
T273 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.3791232101 Sep 24 06:00:51 AM UTC 24 Sep 24 06:06:00 AM UTC 24 85473760502 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_rx_oversample.3007074242 Sep 24 06:05:42 AM UTC 24 Sep 24 06:06:02 AM UTC 24 6992863732 ps
T117 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_fifo_full.2716494994 Sep 24 06:05:32 AM UTC 24 Sep 24 06:06:05 AM UTC 24 57755436511 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.1504328998 Sep 24 06:05:02 AM UTC 24 Sep 24 06:06:07 AM UTC 24 32676863033 ps
T120 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_fifo_reset.3038909409 Sep 24 06:05:38 AM UTC 24 Sep 24 06:06:10 AM UTC 24 12966960525 ps
T286 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_tx_ovrd.326909258 Sep 24 06:06:06 AM UTC 24 Sep 24 06:06:12 AM UTC 24 1127144124 ps
T291 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.3616424527 Sep 24 06:05:12 AM UTC 24 Sep 24 06:06:14 AM UTC 24 61283633110 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_loopback.2137736448 Sep 24 06:06:08 AM UTC 24 Sep 24 06:06:16 AM UTC 24 6478482474 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_tx_rx.1418774413 Sep 24 06:05:29 AM UTC 24 Sep 24 06:06:17 AM UTC 24 108906999226 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_stress_all_with_rand_reset.3095365475 Sep 24 06:05:24 AM UTC 24 Sep 24 06:06:18 AM UTC 24 11969035038 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_alert_test.69118890 Sep 24 06:06:18 AM UTC 24 Sep 24 06:06:19 AM UTC 24 32685828 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_smoke.1512835883 Sep 24 06:06:19 AM UTC 24 Sep 24 06:06:22 AM UTC 24 905510137 ps
T346 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_rx_start_bit_filter.806888697 Sep 24 06:06:01 AM UTC 24 Sep 24 06:06:28 AM UTC 24 38032311740 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_fifo_full.1803514129 Sep 24 06:04:25 AM UTC 24 Sep 24 06:06:33 AM UTC 24 49043108853 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.2886618750 Sep 24 06:03:44 AM UTC 24 Sep 24 06:06:49 AM UTC 24 121562384448 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_noise_filter.646894719 Sep 24 06:05:08 AM UTC 24 Sep 24 06:06:50 AM UTC 24 113158629751 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.2427315580 Sep 24 06:05:36 AM UTC 24 Sep 24 06:06:50 AM UTC 24 23601220848 ps
T46 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_stress_all_with_rand_reset.2487478608 Sep 24 06:06:15 AM UTC 24 Sep 24 06:06:52 AM UTC 24 5715645368 ps
T143 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.3907310820 Sep 24 06:04:47 AM UTC 24 Sep 24 06:06:55 AM UTC 24 87532636454 ps
T127 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_fifo_full.3197972113 Sep 24 06:06:23 AM UTC 24 Sep 24 06:06:56 AM UTC 24 42824756822 ps
T274 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_stress_all.4149623783 Sep 24 06:04:58 AM UTC 24 Sep 24 06:06:57 AM UTC 24 426658174666 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_tx_ovrd.1994926678 Sep 24 06:06:53 AM UTC 24 Sep 24 06:07:00 AM UTC 24 1162863712 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_loopback.1995838438 Sep 24 06:06:56 AM UTC 24 Sep 24 06:07:04 AM UTC 24 3419182084 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_perf.2222574195 Sep 24 06:04:13 AM UTC 24 Sep 24 06:07:04 AM UTC 24 11589029670 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_fifo_reset.4237630590 Sep 24 06:05:04 AM UTC 24 Sep 24 06:07:06 AM UTC 24 49835598131 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_alert_test.3840078494 Sep 24 06:07:05 AM UTC 24 Sep 24 06:07:07 AM UTC 24 11827396 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_rx_oversample.3630557544 Sep 24 06:06:48 AM UTC 24 Sep 24 06:07:11 AM UTC 24 5169511193 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_rx_start_bit_filter.2358325213 Sep 24 06:06:50 AM UTC 24 Sep 24 06:07:12 AM UTC 24 37013696248 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_tx_rx.2929325960 Sep 24 06:04:24 AM UTC 24 Sep 24 06:07:14 AM UTC 24 78651108818 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_intr.2661132188 Sep 24 06:06:49 AM UTC 24 Sep 24 06:07:23 AM UTC 24 12343297722 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_rx_oversample.414505542 Sep 24 06:07:15 AM UTC 24 Sep 24 06:07:26 AM UTC 24 1683889233 ps
T292 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.712648147 Sep 24 06:06:53 AM UTC 24 Sep 24 06:07:28 AM UTC 24 35506797544 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_rx_parity_err.2352980341 Sep 24 06:06:03 AM UTC 24 Sep 24 06:07:28 AM UTC 24 75151136034 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_tx_rx.2201469012 Sep 24 06:07:07 AM UTC 24 Sep 24 06:07:29 AM UTC 24 6907192604 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.1420428426 Sep 24 06:02:13 AM UTC 24 Sep 24 06:07:29 AM UTC 24 43799823003 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_loopback.3758686938 Sep 24 06:07:30 AM UTC 24 Sep 24 06:07:34 AM UTC 24 1214465331 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_tx_ovrd.3159442689 Sep 24 06:07:30 AM UTC 24 Sep 24 06:07:37 AM UTC 24 935754874 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_fifo_overflow.208882197 Sep 24 06:07:11 AM UTC 24 Sep 24 06:07:38 AM UTC 24 30202340095 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.3794467709 Sep 24 06:04:45 AM UTC 24 Sep 24 06:07:38 AM UTC 24 316035308312 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_smoke.1166870842 Sep 24 06:07:05 AM UTC 24 Sep 24 06:07:40 AM UTC 24 11060205636 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_rx_start_bit_filter.516583364 Sep 24 06:07:29 AM UTC 24 Sep 24 06:07:40 AM UTC 24 6649950041 ps
T75 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_stress_all.3754893383 Sep 24 06:04:20 AM UTC 24 Sep 24 06:07:52 AM UTC 24 123092724380 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_noise_filter.2012364591 Sep 24 06:04:31 AM UTC 24 Sep 24 06:07:41 AM UTC 24 229967678935 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_alert_test.3330835966 Sep 24 06:07:41 AM UTC 24 Sep 24 06:07:43 AM UTC 24 24836099 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_smoke.2103776677 Sep 24 06:07:41 AM UTC 24 Sep 24 06:07:54 AM UTC 24 6282810989 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_stress_all_with_rand_reset.2778048431 Sep 24 06:07:01 AM UTC 24 Sep 24 06:07:56 AM UTC 24 19830347742 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_fifo_full.3621595416 Sep 24 06:07:07 AM UTC 24 Sep 24 06:08:10 AM UTC 24 29815170200 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_rx_oversample.983610829 Sep 24 06:07:55 AM UTC 24 Sep 24 06:08:12 AM UTC 24 5051193066 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_fifo_reset.2788796952 Sep 24 06:06:34 AM UTC 24 Sep 24 06:08:14 AM UTC 24 39872224291 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.3152115176 Sep 24 06:04:16 AM UTC 24 Sep 24 06:08:14 AM UTC 24 202037759318 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_tx_rx.2485070122 Sep 24 06:07:41 AM UTC 24 Sep 24 06:08:16 AM UTC 24 20651669561 ps
T138 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_fifo_full.137043989 Sep 24 06:07:43 AM UTC 24 Sep 24 06:08:19 AM UTC 24 27808382171 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_tx_ovrd.4215669953 Sep 24 06:08:15 AM UTC 24 Sep 24 06:08:19 AM UTC 24 2199629102 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_loopback.1907089950 Sep 24 06:08:15 AM UTC 24 Sep 24 06:08:28 AM UTC 24 2872963218 ps
T172 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_fifo_reset.4187445106 Sep 24 05:58:42 AM UTC 24 Sep 24 06:08:29 AM UTC 24 223250080912 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_fifo_reset.539384338 Sep 24 06:07:13 AM UTC 24 Sep 24 06:08:31 AM UTC 24 97084898023 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_alert_test.748093975 Sep 24 06:08:29 AM UTC 24 Sep 24 06:08:32 AM UTC 24 13312995 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/7.uart_rx_parity_err.2863743794 Sep 24 06:04:06 AM UTC 24 Sep 24 06:08:32 AM UTC 24 106772389595 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_intr.2554390251 Sep 24 06:07:57 AM UTC 24 Sep 24 06:08:39 AM UTC 24 20659618225 ps
T72 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.2756101799 Sep 24 06:07:39 AM UTC 24 Sep 24 06:08:41 AM UTC 24 52123273348 ps
T73 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/1.uart_stress_all.2230851925 Sep 24 05:59:48 AM UTC 24 Sep 24 06:08:41 AM UTC 24 119855068595 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_noise_filter.569987966 Sep 24 06:07:27 AM UTC 24 Sep 24 06:08:42 AM UTC 24 38423037419 ps
T87 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_stress_all_with_rand_reset.1744897936 Sep 24 06:08:20 AM UTC 24 Sep 24 06:08:45 AM UTC 24 11232639584 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_smoke.3757001186 Sep 24 06:08:33 AM UTC 24 Sep 24 06:08:47 AM UTC 24 6038371804 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_rx_oversample.1914855365 Sep 24 06:08:42 AM UTC 24 Sep 24 06:08:56 AM UTC 24 2099375819 ps
T301 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_fifo_reset.403624264 Sep 24 06:07:53 AM UTC 24 Sep 24 06:09:03 AM UTC 24 83306413125 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_tx_rx.3834084524 Sep 24 06:08:33 AM UTC 24 Sep 24 06:09:03 AM UTC 24 28304063887 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_tx_ovrd.124478359 Sep 24 06:09:03 AM UTC 24 Sep 24 06:09:07 AM UTC 24 1702110377 ps
T144 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_fifo_reset.3355998586 Sep 24 06:02:34 AM UTC 24 Sep 24 06:09:08 AM UTC 24 212520048971 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_rx_parity_err.3250164983 Sep 24 06:02:40 AM UTC 24 Sep 24 06:09:08 AM UTC 24 186403403952 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_loopback.105264754 Sep 24 06:09:04 AM UTC 24 Sep 24 06:09:09 AM UTC 24 1365156827 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_tx_rx.3384029003 Sep 24 06:06:20 AM UTC 24 Sep 24 06:09:12 AM UTC 24 150218126317 ps
T161 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_fifo_full.585110510 Sep 24 06:08:33 AM UTC 24 Sep 24 06:09:14 AM UTC 24 66341777007 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_tx_rx.3156156567 Sep 24 06:11:06 AM UTC 24 Sep 24 06:11:20 AM UTC 24 14350673041 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_alert_test.1057059314 Sep 24 06:09:13 AM UTC 24 Sep 24 06:09:14 AM UTC 24 147482148 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_smoke.2681749724 Sep 24 06:09:15 AM UTC 24 Sep 24 06:09:17 AM UTC 24 272755567 ps
T173 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_fifo_reset.729137241 Sep 24 06:08:42 AM UTC 24 Sep 24 06:09:18 AM UTC 24 34487631170 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.3982738357 Sep 24 06:08:56 AM UTC 24 Sep 24 06:09:21 AM UTC 24 15248301069 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_stress_all.704055608 Sep 24 06:01:32 AM UTC 24 Sep 24 06:09:24 AM UTC 24 450788128296 ps
T103 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.2802508049 Sep 24 06:07:47 AM UTC 24 Sep 24 06:09:27 AM UTC 24 57757953352 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_tx_rx.1756336090 Sep 24 06:09:15 AM UTC 24 Sep 24 06:09:29 AM UTC 24 11957599411 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.3464348293 Sep 24 06:06:29 AM UTC 24 Sep 24 06:09:30 AM UTC 24 40401880507 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.3456773209 Sep 24 06:05:21 AM UTC 24 Sep 24 06:09:33 AM UTC 24 100836120823 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_rx_oversample.204572291 Sep 24 06:09:22 AM UTC 24 Sep 24 06:09:34 AM UTC 24 4817535556 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_rx_start_bit_filter.1325001176 Sep 24 06:08:12 AM UTC 24 Sep 24 06:09:35 AM UTC 24 35384458832 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_tx_ovrd.3444521681 Sep 24 06:09:33 AM UTC 24 Sep 24 06:09:38 AM UTC 24 4410916736 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.356171060 Sep 24 06:09:18 AM UTC 24 Sep 24 06:09:42 AM UTC 24 62677606527 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_noise_filter.4040590919 Sep 24 06:05:46 AM UTC 24 Sep 24 06:09:48 AM UTC 24 89032658073 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_intr.3096786718 Sep 24 06:09:25 AM UTC 24 Sep 24 06:09:49 AM UTC 24 6872747477 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_alert_test.1112682807 Sep 24 06:09:50 AM UTC 24 Sep 24 06:09:52 AM UTC 24 28693808 ps
T107 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/4.uart_stress_all.2375562277 Sep 24 06:02:15 AM UTC 24 Sep 24 06:09:53 AM UTC 24 158396873591 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_noise_filter.3253381120 Sep 24 06:08:46 AM UTC 24 Sep 24 06:09:54 AM UTC 24 154561206738 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/10.uart_perf.576579564 Sep 24 06:06:10 AM UTC 24 Sep 24 06:09:56 AM UTC 24 22574119440 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_smoke.3728707067 Sep 24 06:09:53 AM UTC 24 Sep 24 06:09:56 AM UTC 24 309293263 ps
T111 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.4235143389 Sep 24 06:09:10 AM UTC 24 Sep 24 06:09:57 AM UTC 24 2395477205 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_rx_parity_err.444876846 Sep 24 06:08:13 AM UTC 24 Sep 24 06:10:00 AM UTC 24 57689880793 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.1214384950 Sep 24 05:58:49 AM UTC 24 Sep 24 06:10:00 AM UTC 24 245264217860 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_rx_start_bit_filter.2044363217 Sep 24 06:08:48 AM UTC 24 Sep 24 06:10:00 AM UTC 24 43059711228 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_loopback.3975676085 Sep 24 06:09:36 AM UTC 24 Sep 24 06:10:11 AM UTC 24 9845347593 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/12.uart_stress_all.595477499 Sep 24 06:07:39 AM UTC 24 Sep 24 06:10:17 AM UTC 24 70536742503 ps
T139 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.1965429996 Sep 24 06:08:40 AM UTC 24 Sep 24 06:10:18 AM UTC 24 36112752261 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_stress_all.1821000792 Sep 24 06:09:49 AM UTC 24 Sep 24 06:10:18 AM UTC 24 54916725478 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.921624289 Sep 24 06:01:25 AM UTC 24 Sep 24 06:10:21 AM UTC 24 63560174493 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_loopback.3696163984 Sep 24 06:10:19 AM UTC 24 Sep 24 06:10:22 AM UTC 24 1202688686 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_tx_ovrd.88295488 Sep 24 06:10:18 AM UTC 24 Sep 24 06:10:24 AM UTC 24 936703396 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_stress_all.1696511939 Sep 24 06:08:28 AM UTC 24 Sep 24 06:10:26 AM UTC 24 98353246556 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/13.uart_noise_filter.4098286673 Sep 24 06:08:11 AM UTC 24 Sep 24 06:10:28 AM UTC 24 157658392027 ps
T327 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.2030442096 Sep 24 06:02:49 AM UTC 24 Sep 24 06:10:29 AM UTC 24 209665119289 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/16.uart_alert_test.1098543441 Sep 24 06:10:27 AM UTC 24 Sep 24 06:10:29 AM UTC 24 13078228 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.4062540122 Sep 24 06:09:43 AM UTC 24 Sep 24 06:10:30 AM UTC 24 18344077968 ps
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