| T646 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.1299527208 |
|
|
Sep 24 06:20:20 AM UTC 24 |
Sep 24 06:20:26 AM UTC 24 |
3132512919 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_loopback.2780800721 |
|
|
Sep 24 06:20:26 AM UTC 24 |
Sep 24 06:20:29 AM UTC 24 |
1206144259 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_fifo_reset.1265793635 |
|
|
Sep 24 06:20:02 AM UTC 24 |
Sep 24 06:20:30 AM UTC 24 |
51426152618 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.555742299 |
|
|
Sep 24 06:20:23 AM UTC 24 |
Sep 24 06:20:34 AM UTC 24 |
949553992 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_fifo_full.2956664860 |
|
|
Sep 24 06:18:39 AM UTC 24 |
Sep 24 06:20:39 AM UTC 24 |
47653722497 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_alert_test.928743264 |
|
|
Sep 24 06:20:40 AM UTC 24 |
Sep 24 06:20:42 AM UTC 24 |
53344372 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_rx_oversample.3696788821 |
|
|
Sep 24 06:20:07 AM UTC 24 |
Sep 24 06:20:44 AM UTC 24 |
4422850662 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_smoke.3629058594 |
|
|
Sep 24 06:20:43 AM UTC 24 |
Sep 24 06:20:45 AM UTC 24 |
110810126 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_fifo_full.1783550987 |
|
|
Sep 24 06:19:13 AM UTC 24 |
Sep 24 06:20:45 AM UTC 24 |
48578678379 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_fifo_full.3665618104 |
|
|
Sep 24 06:15:52 AM UTC 24 |
Sep 24 06:20:56 AM UTC 24 |
180240831541 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_noise_filter.422648012 |
|
|
Sep 24 06:20:09 AM UTC 24 |
Sep 24 06:21:02 AM UTC 24 |
49821067879 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.4051542518 |
|
|
Sep 24 06:18:04 AM UTC 24 |
Sep 24 06:21:05 AM UTC 24 |
180803514515 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_intr.60470507 |
|
|
Sep 24 06:20:08 AM UTC 24 |
Sep 24 06:21:07 AM UTC 24 |
29146307664 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.2108561050 |
|
|
Sep 24 06:17:45 AM UTC 24 |
Sep 24 06:21:07 AM UTC 24 |
96092307683 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_tx_rx.446829449 |
|
|
Sep 24 06:20:45 AM UTC 24 |
Sep 24 06:21:12 AM UTC 24 |
32687550276 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_perf.1575689694 |
|
|
Sep 24 06:18:20 AM UTC 24 |
Sep 24 06:21:17 AM UTC 24 |
16012858196 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_tx_rx.4095007212 |
|
|
Sep 24 06:20:00 AM UTC 24 |
Sep 24 06:21:22 AM UTC 24 |
28044755315 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/15.uart_perf.2454205972 |
|
|
Sep 24 06:09:37 AM UTC 24 |
Sep 24 06:21:23 AM UTC 24 |
10026947255 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.758982991 |
|
|
Sep 24 06:21:19 AM UTC 24 |
Sep 24 06:21:25 AM UTC 24 |
733632132 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.804874306 |
|
|
Sep 24 06:21:09 AM UTC 24 |
Sep 24 06:21:26 AM UTC 24 |
4489190965 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_rx_oversample.1443763661 |
|
|
Sep 24 06:21:02 AM UTC 24 |
Sep 24 06:21:29 AM UTC 24 |
3155143190 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.2869917086 |
|
|
Sep 24 06:20:31 AM UTC 24 |
Sep 24 06:21:31 AM UTC 24 |
13509583598 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_perf.3851766416 |
|
|
Sep 24 06:17:44 AM UTC 24 |
Sep 24 06:21:32 AM UTC 24 |
21106458079 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_alert_test.1749647284 |
|
|
Sep 24 06:21:32 AM UTC 24 |
Sep 24 06:21:34 AM UTC 24 |
69026606 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_smoke.1773458556 |
|
|
Sep 24 06:21:33 AM UTC 24 |
Sep 24 06:21:35 AM UTC 24 |
142703633 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.1597379918 |
|
|
Sep 24 06:20:46 AM UTC 24 |
Sep 24 06:21:36 AM UTC 24 |
24581090450 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.1803686411 |
|
|
Sep 24 06:11:32 AM UTC 24 |
Sep 24 06:21:36 AM UTC 24 |
112680775725 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_tx_rx.3579591751 |
|
|
Sep 24 06:18:35 AM UTC 24 |
Sep 24 06:21:40 AM UTC 24 |
166493581516 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_loopback.2764276572 |
|
|
Sep 24 06:21:23 AM UTC 24 |
Sep 24 06:21:57 AM UTC 24 |
9050995092 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_intr.223703024 |
|
|
Sep 24 06:21:05 AM UTC 24 |
Sep 24 06:21:58 AM UTC 24 |
49179983477 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.2633116395 |
|
|
Sep 24 06:18:15 AM UTC 24 |
Sep 24 06:22:00 AM UTC 24 |
121478930803 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.1585793896 |
|
|
Sep 24 06:22:01 AM UTC 24 |
Sep 24 06:22:04 AM UTC 24 |
911088394 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.3175773843 |
|
|
Sep 24 06:21:14 AM UTC 24 |
Sep 24 06:22:08 AM UTC 24 |
30251056571 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_fifo_reset.149636543 |
|
|
Sep 24 06:19:13 AM UTC 24 |
Sep 24 06:22:13 AM UTC 24 |
308271221477 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_alert_test.483559087 |
|
|
Sep 24 06:25:18 AM UTC 24 |
Sep 24 06:25:20 AM UTC 24 |
22593368 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.1462244041 |
|
|
Sep 24 06:21:26 AM UTC 24 |
Sep 24 06:22:15 AM UTC 24 |
2474448935 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_stress_all.2357798785 |
|
|
Sep 24 06:20:35 AM UTC 24 |
Sep 24 06:22:16 AM UTC 24 |
136361678026 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_stress_all.473180744 |
|
|
Sep 24 06:17:53 AM UTC 24 |
Sep 24 06:22:16 AM UTC 24 |
184542966917 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.579239523 |
|
|
Sep 24 06:19:13 AM UTC 24 |
Sep 24 06:22:20 AM UTC 24 |
182028895020 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_perf.610753296 |
|
|
Sep 24 06:18:53 AM UTC 24 |
Sep 24 06:22:21 AM UTC 24 |
11761924890 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_rx_oversample.3852866466 |
|
|
Sep 24 06:21:42 AM UTC 24 |
Sep 24 06:22:23 AM UTC 24 |
6286481539 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_alert_test.3632568178 |
|
|
Sep 24 06:22:21 AM UTC 24 |
Sep 24 06:22:23 AM UTC 24 |
94608853 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_noise_filter.2844770189 |
|
|
Sep 24 06:21:59 AM UTC 24 |
Sep 24 06:22:25 AM UTC 24 |
15314095099 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_noise_filter.638084810 |
|
|
Sep 24 06:21:07 AM UTC 24 |
Sep 24 06:22:26 AM UTC 24 |
96057557533 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_fifo_full.2997835306 |
|
|
Sep 24 06:20:00 AM UTC 24 |
Sep 24 06:22:26 AM UTC 24 |
231389626508 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.827407743 |
|
|
Sep 24 06:22:09 AM UTC 24 |
Sep 24 06:22:31 AM UTC 24 |
6238411701 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.4002370298 |
|
|
Sep 24 06:19:40 AM UTC 24 |
Sep 24 06:22:33 AM UTC 24 |
87318292493 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_loopback.3538770459 |
|
|
Sep 24 06:22:14 AM UTC 24 |
Sep 24 06:22:34 AM UTC 24 |
6273500332 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_smoke.1798218812 |
|
|
Sep 24 06:22:25 AM UTC 24 |
Sep 24 06:22:37 AM UTC 24 |
977423914 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_fifo_overflow.2035928055 |
|
|
Sep 24 06:21:36 AM UTC 24 |
Sep 24 06:22:38 AM UTC 24 |
33719354446 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.229570699 |
|
|
Sep 24 06:17:27 AM UTC 24 |
Sep 24 06:22:41 AM UTC 24 |
102791545216 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.1253163945 |
|
|
Sep 24 06:15:40 AM UTC 24 |
Sep 24 06:22:43 AM UTC 24 |
85631750219 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_loopback.3778130291 |
|
|
Sep 24 06:22:43 AM UTC 24 |
Sep 24 06:22:46 AM UTC 24 |
1314682398 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_tx_rx.4272994848 |
|
|
Sep 24 06:21:35 AM UTC 24 |
Sep 24 06:22:48 AM UTC 24 |
70738060956 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.2973319549 |
|
|
Sep 24 06:22:42 AM UTC 24 |
Sep 24 06:22:49 AM UTC 24 |
1068140388 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_rx_oversample.3214002919 |
|
|
Sep 24 06:22:32 AM UTC 24 |
Sep 24 06:22:52 AM UTC 24 |
5160243070 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.1841050215 |
|
|
Sep 24 06:22:05 AM UTC 24 |
Sep 24 06:22:56 AM UTC 24 |
107824322077 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_alert_test.3885172236 |
|
|
Sep 24 06:22:57 AM UTC 24 |
Sep 24 06:22:59 AM UTC 24 |
36341277 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.3290546441 |
|
|
Sep 24 06:18:47 AM UTC 24 |
Sep 24 06:23:01 AM UTC 24 |
115800146388 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/0.uart_perf.1242151331 |
|
|
Sep 24 05:58:47 AM UTC 24 |
Sep 24 06:23:02 AM UTC 24 |
24607784887 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_smoke.3097606545 |
|
|
Sep 24 06:23:00 AM UTC 24 |
Sep 24 06:23:03 AM UTC 24 |
299310761 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/5.uart_perf.1761033145 |
|
|
Sep 24 06:02:45 AM UTC 24 |
Sep 24 06:23:04 AM UTC 24 |
20437724911 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/11.uart_stress_all.2880467333 |
|
|
Sep 24 06:07:05 AM UTC 24 |
Sep 24 06:23:04 AM UTC 24 |
138143392033 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_perf.1510367184 |
|
|
Sep 24 06:22:15 AM UTC 24 |
Sep 24 06:23:06 AM UTC 24 |
5207954430 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_intr.117964294 |
|
|
Sep 24 06:24:57 AM UTC 24 |
Sep 24 06:25:17 AM UTC 24 |
23321607303 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.844116990 |
|
|
Sep 24 06:22:38 AM UTC 24 |
Sep 24 06:23:06 AM UTC 24 |
33891181099 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_fifo_reset.3142642247 |
|
|
Sep 24 06:20:57 AM UTC 24 |
Sep 24 06:23:09 AM UTC 24 |
65821277004 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_intr.805574320 |
|
|
Sep 24 06:21:58 AM UTC 24 |
Sep 24 06:23:12 AM UTC 24 |
55691694166 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_noise_filter.3430977539 |
|
|
Sep 24 06:19:19 AM UTC 24 |
Sep 24 06:23:20 AM UTC 24 |
175427636275 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.496801918 |
|
|
Sep 24 06:23:13 AM UTC 24 |
Sep 24 06:23:21 AM UTC 24 |
9273250889 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.2894377344 |
|
|
Sep 24 06:22:27 AM UTC 24 |
Sep 24 06:23:21 AM UTC 24 |
135142971763 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.1657087109 |
|
|
Sep 24 06:23:10 AM UTC 24 |
Sep 24 06:23:21 AM UTC 24 |
3225244828 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.2721293842 |
|
|
Sep 24 06:22:50 AM UTC 24 |
Sep 24 06:23:24 AM UTC 24 |
3653018968 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_loopback.562370632 |
|
|
Sep 24 06:23:22 AM UTC 24 |
Sep 24 06:23:24 AM UTC 24 |
81797064 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.3939513979 |
|
|
Sep 24 06:23:21 AM UTC 24 |
Sep 24 06:23:32 AM UTC 24 |
10145578713 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.1426740830 |
|
|
Sep 24 06:23:03 AM UTC 24 |
Sep 24 06:23:32 AM UTC 24 |
10046127270 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_alert_test.1800425838 |
|
|
Sep 24 06:23:32 AM UTC 24 |
Sep 24 06:23:34 AM UTC 24 |
36402111 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_intr.326069450 |
|
|
Sep 24 06:23:06 AM UTC 24 |
Sep 24 06:23:39 AM UTC 24 |
16010082209 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_fifo_full.403921482 |
|
|
Sep 24 06:23:02 AM UTC 24 |
Sep 24 06:23:44 AM UTC 24 |
31020747333 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_fifo_reset.3793064317 |
|
|
Sep 24 06:22:27 AM UTC 24 |
Sep 24 06:23:44 AM UTC 24 |
77948095443 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.3964398004 |
|
|
Sep 24 06:22:38 AM UTC 24 |
Sep 24 06:23:44 AM UTC 24 |
21861899625 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.481716804 |
|
|
Sep 24 06:18:21 AM UTC 24 |
Sep 24 06:23:46 AM UTC 24 |
66379024001 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.3430091553 |
|
|
Sep 24 06:17:41 AM UTC 24 |
Sep 24 06:23:54 AM UTC 24 |
151097235699 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_rx_oversample.2985862305 |
|
|
Sep 24 06:23:46 AM UTC 24 |
Sep 24 06:23:55 AM UTC 24 |
1477547723 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_intr.4220849676 |
|
|
Sep 24 06:22:34 AM UTC 24 |
Sep 24 06:23:59 AM UTC 24 |
52638512374 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_rx_oversample.1245406093 |
|
|
Sep 24 06:23:05 AM UTC 24 |
Sep 24 06:24:02 AM UTC 24 |
4776654033 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_smoke.793868419 |
|
|
Sep 24 06:23:33 AM UTC 24 |
Sep 24 06:24:02 AM UTC 24 |
5900140140 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.3106195427 |
|
|
Sep 24 06:22:17 AM UTC 24 |
Sep 24 06:24:05 AM UTC 24 |
3378774664 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.3824802413 |
|
|
Sep 24 06:23:24 AM UTC 24 |
Sep 24 06:24:07 AM UTC 24 |
6732241885 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.1248654451 |
|
|
Sep 24 06:23:56 AM UTC 24 |
Sep 24 06:24:07 AM UTC 24 |
2828249801 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_tx_rx.3182384571 |
|
|
Sep 24 06:23:34 AM UTC 24 |
Sep 24 06:24:07 AM UTC 24 |
47099321636 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_alert_test.817410183 |
|
|
Sep 24 06:24:09 AM UTC 24 |
Sep 24 06:24:10 AM UTC 24 |
25793087 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.2916467620 |
|
|
Sep 24 06:20:22 AM UTC 24 |
Sep 24 06:24:13 AM UTC 24 |
116386764170 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_loopback.3752999404 |
|
|
Sep 24 06:24:03 AM UTC 24 |
Sep 24 06:24:13 AM UTC 24 |
10094933328 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_smoke.2870052132 |
|
|
Sep 24 06:24:11 AM UTC 24 |
Sep 24 06:24:13 AM UTC 24 |
733541620 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_noise_filter.2961142237 |
|
|
Sep 24 06:22:35 AM UTC 24 |
Sep 24 06:24:18 AM UTC 24 |
47238491034 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_stress_all.149183779 |
|
|
Sep 24 06:22:21 AM UTC 24 |
Sep 24 06:24:21 AM UTC 24 |
76568722668 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_tx_rx.4011695999 |
|
|
Sep 24 06:22:25 AM UTC 24 |
Sep 24 06:24:24 AM UTC 24 |
195396550567 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.3260702220 |
|
|
Sep 24 06:18:57 AM UTC 24 |
Sep 24 06:24:27 AM UTC 24 |
145873203759 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_fifo_reset.3161130673 |
|
|
Sep 24 06:23:04 AM UTC 24 |
Sep 24 06:24:28 AM UTC 24 |
66977929865 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_tx_rx.2304557480 |
|
|
Sep 24 06:24:14 AM UTC 24 |
Sep 24 06:24:29 AM UTC 24 |
4688359266 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.706996604 |
|
|
Sep 24 06:24:03 AM UTC 24 |
Sep 24 06:24:30 AM UTC 24 |
6346168014 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.2965582845 |
|
|
Sep 24 06:16:16 AM UTC 24 |
Sep 24 06:24:30 AM UTC 24 |
198157408934 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.1613961712 |
|
|
Sep 24 06:24:28 AM UTC 24 |
Sep 24 06:24:35 AM UTC 24 |
41322464442 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.1568086304 |
|
|
Sep 24 06:24:30 AM UTC 24 |
Sep 24 06:24:35 AM UTC 24 |
2015903926 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_loopback.1702733448 |
|
|
Sep 24 06:24:32 AM UTC 24 |
Sep 24 06:24:39 AM UTC 24 |
6086594976 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_fifo_reset.187210142 |
|
|
Sep 24 06:21:37 AM UTC 24 |
Sep 24 06:24:42 AM UTC 24 |
107850683093 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.2582248362 |
|
|
Sep 24 06:24:08 AM UTC 24 |
Sep 24 06:24:43 AM UTC 24 |
46688946790 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_alert_test.1947396508 |
|
|
Sep 24 06:24:43 AM UTC 24 |
Sep 24 06:24:45 AM UTC 24 |
18052134 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_fifo_full.3237597349 |
|
|
Sep 24 06:22:26 AM UTC 24 |
Sep 24 06:24:48 AM UTC 24 |
158595874725 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.2046212263 |
|
|
Sep 24 06:24:14 AM UTC 24 |
Sep 24 06:24:50 AM UTC 24 |
38460990990 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.343494155 |
|
|
Sep 24 06:23:45 AM UTC 24 |
Sep 24 06:24:53 AM UTC 24 |
67298305532 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_stress_all.515771970 |
|
|
Sep 24 06:21:30 AM UTC 24 |
Sep 24 06:24:56 AM UTC 24 |
649484650289 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_rx_oversample.1163065230 |
|
|
Sep 24 06:24:22 AM UTC 24 |
Sep 24 06:25:00 AM UTC 24 |
4108648558 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_rx_oversample.3099945491 |
|
|
Sep 24 06:24:54 AM UTC 24 |
Sep 24 06:25:02 AM UTC 24 |
2972015267 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_fifo_full.2292512754 |
|
|
Sep 24 06:23:40 AM UTC 24 |
Sep 24 06:25:04 AM UTC 24 |
131505049063 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_fifo_full.3517975101 |
|
|
Sep 24 06:24:14 AM UTC 24 |
Sep 24 06:25:05 AM UTC 24 |
13925000137 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.2265184758 |
|
|
Sep 24 06:25:03 AM UTC 24 |
Sep 24 06:25:06 AM UTC 24 |
4522053051 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/17.uart_stress_all.518275838 |
|
|
Sep 24 06:11:01 AM UTC 24 |
Sep 24 06:25:07 AM UTC 24 |
60516594204 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.1235459931 |
|
|
Sep 24 06:25:06 AM UTC 24 |
Sep 24 06:25:09 AM UTC 24 |
1443015396 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.2737421311 |
|
|
Sep 24 06:24:48 AM UTC 24 |
Sep 24 06:25:15 AM UTC 24 |
113097872568 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_smoke.3139827893 |
|
|
Sep 24 06:24:44 AM UTC 24 |
Sep 24 06:25:17 AM UTC 24 |
6019459257 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_loopback.853922569 |
|
|
Sep 24 06:25:07 AM UTC 24 |
Sep 24 06:25:18 AM UTC 24 |
3963117910 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_perf.1271881627 |
|
|
Sep 24 06:22:47 AM UTC 24 |
Sep 24 06:25:23 AM UTC 24 |
14988755828 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_long_xfer_wo_dly.1489431956 |
|
|
Sep 24 06:22:17 AM UTC 24 |
Sep 24 06:25:23 AM UTC 24 |
43171166847 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.857243586 |
|
|
Sep 24 06:21:26 AM UTC 24 |
Sep 24 06:25:25 AM UTC 24 |
87502228549 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_tx_rx.3827952225 |
|
|
Sep 24 06:23:02 AM UTC 24 |
Sep 24 06:25:31 AM UTC 24 |
48042790966 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.3692546242 |
|
|
Sep 24 06:25:05 AM UTC 24 |
Sep 24 06:25:31 AM UTC 24 |
31733425397 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_noise_filter.2933638810 |
|
|
Sep 24 06:25:01 AM UTC 24 |
Sep 24 06:25:37 AM UTC 24 |
45963585039 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_smoke.1612127689 |
|
|
Sep 24 06:25:19 AM UTC 24 |
Sep 24 06:25:38 AM UTC 24 |
5860138133 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.1686088746 |
|
|
Sep 24 06:25:15 AM UTC 24 |
Sep 24 06:25:38 AM UTC 24 |
2975484011 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/29.uart_stress_all.1649355702 |
|
|
Sep 24 06:18:26 AM UTC 24 |
Sep 24 06:25:43 AM UTC 24 |
102533610126 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_noise_filter.671508827 |
|
|
Sep 24 06:25:38 AM UTC 24 |
Sep 24 06:25:46 AM UTC 24 |
3815049992 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.3933602069 |
|
|
Sep 24 06:25:43 AM UTC 24 |
Sep 24 06:25:47 AM UTC 24 |
496221303 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.2280220827 |
|
|
Sep 24 06:17:31 AM UTC 24 |
Sep 24 06:25:49 AM UTC 24 |
135229061626 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_loopback.1910225395 |
|
|
Sep 24 06:25:46 AM UTC 24 |
Sep 24 06:25:51 AM UTC 24 |
1511103853 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_perf.837231107 |
|
|
Sep 24 06:24:04 AM UTC 24 |
Sep 24 06:25:54 AM UTC 24 |
15621153285 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_noise_filter.3480427506 |
|
|
Sep 24 06:24:28 AM UTC 24 |
Sep 24 06:25:54 AM UTC 24 |
47195179942 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_intr.3612575467 |
|
|
Sep 24 06:25:32 AM UTC 24 |
Sep 24 06:25:56 AM UTC 24 |
17908619040 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_noise_filter.34583765 |
|
|
Sep 24 06:23:06 AM UTC 24 |
Sep 24 06:25:56 AM UTC 24 |
123097950791 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_alert_test.3932459426 |
|
|
Sep 24 06:25:55 AM UTC 24 |
Sep 24 06:25:57 AM UTC 24 |
15186245 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_smoke.2741928256 |
|
|
Sep 24 06:25:57 AM UTC 24 |
Sep 24 06:26:06 AM UTC 24 |
6247168746 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/30.uart_fifo_reset.2382556610 |
|
|
Sep 24 06:18:43 AM UTC 24 |
Sep 24 06:26:06 AM UTC 24 |
145066191780 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.2299954316 |
|
|
Sep 24 06:25:38 AM UTC 24 |
Sep 24 06:26:07 AM UTC 24 |
30747465070 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_fifo_full.2839512100 |
|
|
Sep 24 06:24:45 AM UTC 24 |
Sep 24 06:26:11 AM UTC 24 |
71949493507 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.3161716323 |
|
|
Sep 24 06:25:39 AM UTC 24 |
Sep 24 06:26:12 AM UTC 24 |
46287314532 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_fifo_full.4025098220 |
|
|
Sep 24 06:20:46 AM UTC 24 |
Sep 24 06:26:12 AM UTC 24 |
170073069138 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_rx_oversample.2850226935 |
|
|
Sep 24 06:25:32 AM UTC 24 |
Sep 24 06:26:12 AM UTC 24 |
3795677951 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_fifo_reset.2443396961 |
|
|
Sep 24 06:24:19 AM UTC 24 |
Sep 24 06:26:13 AM UTC 24 |
58044340052 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.4159339626 |
|
|
Sep 24 06:24:36 AM UTC 24 |
Sep 24 06:26:16 AM UTC 24 |
3988957260 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_fifo_full.2675762739 |
|
|
Sep 24 06:25:24 AM UTC 24 |
Sep 24 06:26:16 AM UTC 24 |
14925575537 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.3715110494 |
|
|
Sep 24 06:26:13 AM UTC 24 |
Sep 24 06:26:17 AM UTC 24 |
4116383582 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/27.uart_stress_all.4175406917 |
|
|
Sep 24 06:17:28 AM UTC 24 |
Sep 24 06:26:18 AM UTC 24 |
150866706916 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_rx_oversample.1391720082 |
|
|
Sep 24 06:26:08 AM UTC 24 |
Sep 24 06:26:18 AM UTC 24 |
3157565898 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_loopback.1652794552 |
|
|
Sep 24 06:26:17 AM UTC 24 |
Sep 24 06:26:20 AM UTC 24 |
4133515558 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_fifo_full.2535214334 |
|
|
Sep 24 06:25:57 AM UTC 24 |
Sep 24 06:26:20 AM UTC 24 |
54999678551 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.1744113582 |
|
|
Sep 24 06:23:59 AM UTC 24 |
Sep 24 06:26:21 AM UTC 24 |
344019078559 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_alert_test.2071450746 |
|
|
Sep 24 06:26:21 AM UTC 24 |
Sep 24 06:26:23 AM UTC 24 |
14481760 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_smoke.2839964687 |
|
|
Sep 24 06:26:21 AM UTC 24 |
Sep 24 06:26:25 AM UTC 24 |
668301436 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_noise_filter.1437487061 |
|
|
Sep 24 06:26:12 AM UTC 24 |
Sep 24 06:26:28 AM UTC 24 |
45821035349 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_tx_rx.4123963449 |
|
|
Sep 24 06:24:45 AM UTC 24 |
Sep 24 06:26:29 AM UTC 24 |
45822828884 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_noise_filter.1012244946 |
|
|
Sep 24 06:23:55 AM UTC 24 |
Sep 24 06:26:30 AM UTC 24 |
38730335623 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.2388111498 |
|
|
Sep 24 06:26:14 AM UTC 24 |
Sep 24 06:26:30 AM UTC 24 |
16234506939 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_tx_rx.1977651342 |
|
|
Sep 24 06:25:57 AM UTC 24 |
Sep 24 06:26:32 AM UTC 24 |
58821800712 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_tx_rx.4145452542 |
|
|
Sep 24 06:25:22 AM UTC 24 |
Sep 24 06:26:33 AM UTC 24 |
104758346447 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_intr.1784782128 |
|
|
Sep 24 06:26:31 AM UTC 24 |
Sep 24 06:26:33 AM UTC 24 |
947226456 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.2492360068 |
|
|
Sep 24 06:26:33 AM UTC 24 |
Sep 24 06:26:37 AM UTC 24 |
4590559108 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_intr.3197859488 |
|
|
Sep 24 06:26:11 AM UTC 24 |
Sep 24 06:26:37 AM UTC 24 |
13717687339 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.686114934 |
|
|
Sep 24 06:26:34 AM UTC 24 |
Sep 24 06:26:38 AM UTC 24 |
910290706 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/3.uart_perf.2065521382 |
|
|
Sep 24 06:01:22 AM UTC 24 |
Sep 24 06:26:38 AM UTC 24 |
22943813569 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.3387361044 |
|
|
Sep 24 06:26:18 AM UTC 24 |
Sep 24 06:26:40 AM UTC 24 |
3714810034 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_fifo_reset.1515774567 |
|
|
Sep 24 06:26:07 AM UTC 24 |
Sep 24 06:26:41 AM UTC 24 |
15094109012 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_loopback.4194503536 |
|
|
Sep 24 06:26:38 AM UTC 24 |
Sep 24 06:26:43 AM UTC 24 |
2650553432 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_alert_test.3755182443 |
|
|
Sep 24 06:26:41 AM UTC 24 |
Sep 24 06:26:43 AM UTC 24 |
70191798 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_fifo_reset.3814789904 |
|
|
Sep 24 06:26:28 AM UTC 24 |
Sep 24 06:26:44 AM UTC 24 |
10274122637 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.2811827809 |
|
|
Sep 24 06:26:06 AM UTC 24 |
Sep 24 06:26:46 AM UTC 24 |
40795879287 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.3455202774 |
|
|
Sep 24 06:26:13 AM UTC 24 |
Sep 24 06:26:47 AM UTC 24 |
30082007239 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.1100445123 |
|
|
Sep 24 06:26:25 AM UTC 24 |
Sep 24 06:26:55 AM UTC 24 |
16717582164 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_smoke.830496729 |
|
|
Sep 24 06:26:43 AM UTC 24 |
Sep 24 06:27:07 AM UTC 24 |
5369219413 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/14.uart_stress_all.1450702252 |
|
|
Sep 24 06:09:11 AM UTC 24 |
Sep 24 06:27:08 AM UTC 24 |
52315164973 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.2470601192 |
|
|
Sep 24 06:16:53 AM UTC 24 |
Sep 24 06:27:08 AM UTC 24 |
117369431223 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_rx_oversample.1578133108 |
|
|
Sep 24 06:26:56 AM UTC 24 |
Sep 24 06:27:09 AM UTC 24 |
4989644138 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_fifo_reset.698300759 |
|
|
Sep 24 06:26:48 AM UTC 24 |
Sep 24 06:27:13 AM UTC 24 |
14565712582 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.47842387 |
|
|
Sep 24 06:27:09 AM UTC 24 |
Sep 24 06:27:13 AM UTC 24 |
5583622214 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.3117679503 |
|
|
Sep 24 06:25:24 AM UTC 24 |
Sep 24 06:27:14 AM UTC 24 |
139036649911 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/36.uart_perf.1443586553 |
|
|
Sep 24 06:23:22 AM UTC 24 |
Sep 24 06:27:17 AM UTC 24 |
17203764972 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_noise_filter.795476392 |
|
|
Sep 24 06:27:09 AM UTC 24 |
Sep 24 06:27:18 AM UTC 24 |
15866064538 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_noise_filter.519993528 |
|
|
Sep 24 06:26:31 AM UTC 24 |
Sep 24 06:27:20 AM UTC 24 |
56007722990 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.4287497311 |
|
|
Sep 24 06:27:14 AM UTC 24 |
Sep 24 06:27:22 AM UTC 24 |
1192672895 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.207057219 |
|
|
Sep 24 06:26:39 AM UTC 24 |
Sep 24 06:27:22 AM UTC 24 |
9957957784 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_fifo_full.968698779 |
|
|
Sep 24 06:26:23 AM UTC 24 |
Sep 24 06:27:23 AM UTC 24 |
120488752633 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_rx_oversample.2076988309 |
|
|
Sep 24 06:26:30 AM UTC 24 |
Sep 24 06:27:24 AM UTC 24 |
4806905595 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_alert_test.1701872591 |
|
|
Sep 24 06:27:23 AM UTC 24 |
Sep 24 06:27:25 AM UTC 24 |
61381899 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_intr.3633089956 |
|
|
Sep 24 06:27:08 AM UTC 24 |
Sep 24 06:27:26 AM UTC 24 |
26328830141 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_smoke.1089341338 |
|
|
Sep 24 06:27:23 AM UTC 24 |
Sep 24 06:27:26 AM UTC 24 |
723558584 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_loopback.271222432 |
|
|
Sep 24 06:27:14 AM UTC 24 |
Sep 24 06:27:32 AM UTC 24 |
7236145987 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/31.uart_perf.416512541 |
|
|
Sep 24 06:19:38 AM UTC 24 |
Sep 24 06:27:32 AM UTC 24 |
8328490621 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_rx_oversample.250678309 |
|
|
Sep 24 06:27:26 AM UTC 24 |
Sep 24 06:27:33 AM UTC 24 |
4789166931 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_fifo_reset.292902931 |
|
|
Sep 24 06:25:26 AM UTC 24 |
Sep 24 06:27:35 AM UTC 24 |
54805031304 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_tx_rx.1586530086 |
|
|
Sep 24 06:26:43 AM UTC 24 |
Sep 24 06:27:35 AM UTC 24 |
105437497853 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.3920034663 |
|
|
Sep 24 06:27:34 AM UTC 24 |
Sep 24 06:27:38 AM UTC 24 |
2784652509 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.215902368 |
|
|
Sep 24 06:25:52 AM UTC 24 |
Sep 24 06:27:42 AM UTC 24 |
11777830742 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/81.uart_fifo_reset.1189446828 |
|
|
Sep 24 06:32:51 AM UTC 24 |
Sep 24 06:33:39 AM UTC 24 |
78289694708 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_loopback.37421911 |
|
|
Sep 24 06:27:36 AM UTC 24 |
Sep 24 06:27:45 AM UTC 24 |
4349439483 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.1362465497 |
|
|
Sep 24 06:26:47 AM UTC 24 |
Sep 24 06:27:47 AM UTC 24 |
15787953267 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_fifo_reset.2655452429 |
|
|
Sep 24 06:23:46 AM UTC 24 |
Sep 24 06:27:49 AM UTC 24 |
381495553252 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.2607372898 |
|
|
Sep 24 06:27:36 AM UTC 24 |
Sep 24 06:27:50 AM UTC 24 |
8095016003 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_rx_parity_err.1495189481 |
|
|
Sep 24 06:26:34 AM UTC 24 |
Sep 24 06:27:51 AM UTC 24 |
28120699253 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_alert_test.3988101233 |
|
|
Sep 24 06:27:50 AM UTC 24 |
Sep 24 06:27:52 AM UTC 24 |
19759910 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.3660350577 |
|
|
Sep 24 06:24:05 AM UTC 24 |
Sep 24 06:27:52 AM UTC 24 |
157562173992 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/87.uart_fifo_reset.3988200737 |
|
|
Sep 24 06:33:18 AM UTC 24 |
Sep 24 06:33:40 AM UTC 24 |
12027851161 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.2302787297 |
|
|
Sep 24 06:27:19 AM UTC 24 |
Sep 24 06:27:55 AM UTC 24 |
4083332560 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.2362728461 |
|
|
Sep 24 06:27:10 AM UTC 24 |
Sep 24 06:27:56 AM UTC 24 |
14540114415 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_intr.3427070139 |
|
|
Sep 24 06:27:26 AM UTC 24 |
Sep 24 06:27:57 AM UTC 24 |
16772195504 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/39.uart_fifo_reset.2851210986 |
|
|
Sep 24 06:24:51 AM UTC 24 |
Sep 24 06:28:05 AM UTC 24 |
107094938666 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_smoke.3168655435 |
|
|
Sep 24 06:27:50 AM UTC 24 |
Sep 24 06:28:06 AM UTC 24 |
5272611106 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.3188090340 |
|
|
Sep 24 06:27:34 AM UTC 24 |
Sep 24 06:28:06 AM UTC 24 |
73406738297 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_fifo_reset.2199039229 |
|
|
Sep 24 06:27:25 AM UTC 24 |
Sep 24 06:28:07 AM UTC 24 |
63845229751 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.3543016195 |
|
|
Sep 24 06:28:07 AM UTC 24 |
Sep 24 06:28:10 AM UTC 24 |
844213800 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_rx_oversample.3278224030 |
|
|
Sep 24 06:27:57 AM UTC 24 |
Sep 24 06:28:10 AM UTC 24 |
4020571861 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_perf.3146391999 |
|
|
Sep 24 06:24:32 AM UTC 24 |
Sep 24 06:28:13 AM UTC 24 |
16000459867 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_intr.918522485 |
|
|
Sep 24 06:27:59 AM UTC 24 |
Sep 24 06:28:16 AM UTC 24 |
8245042890 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_tx_rx.2325475195 |
|
|
Sep 24 06:27:52 AM UTC 24 |
Sep 24 06:28:18 AM UTC 24 |
10086895177 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/33.uart_perf.1541767647 |
|
|
Sep 24 06:21:24 AM UTC 24 |
Sep 24 06:28:18 AM UTC 24 |
8268614800 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_intr.3937487411 |
|
|
Sep 24 06:24:25 AM UTC 24 |
Sep 24 06:28:20 AM UTC 24 |
169182030594 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_alert_test.2511279412 |
|
|
Sep 24 06:28:19 AM UTC 24 |
Sep 24 06:28:20 AM UTC 24 |
18341202 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_smoke.2100912139 |
|
|
Sep 24 06:28:19 AM UTC 24 |
Sep 24 06:28:21 AM UTC 24 |
434365959 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_loopback.3593994260 |
|
|
Sep 24 06:28:07 AM UTC 24 |
Sep 24 06:28:23 AM UTC 24 |
9446717297 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.1401411720 |
|
|
Sep 24 06:27:25 AM UTC 24 |
Sep 24 06:28:25 AM UTC 24 |
35622292169 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/34.uart_fifo_full.3756610207 |
|
|
Sep 24 06:21:36 AM UTC 24 |
Sep 24 06:28:29 AM UTC 24 |
164780989844 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_noise_filter.473833657 |
|
|
Sep 24 06:27:32 AM UTC 24 |
Sep 24 06:28:31 AM UTC 24 |
21168007933 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_rx_oversample.3882580180 |
|
|
Sep 24 06:28:26 AM UTC 24 |
Sep 24 06:28:35 AM UTC 24 |
1594250305 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_noise_filter.1305812505 |
|
|
Sep 24 06:28:04 AM UTC 24 |
Sep 24 06:28:39 AM UTC 24 |
17937049923 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_rx_start_bit_filter.746339819 |
|
|
Sep 24 06:28:36 AM UTC 24 |
Sep 24 06:28:40 AM UTC 24 |
2604392216 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_fifo_full.305640748 |
|
|
Sep 24 06:27:25 AM UTC 24 |
Sep 24 06:28:41 AM UTC 24 |
43360828285 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_tx_rx.2872800053 |
|
|
Sep 24 06:27:24 AM UTC 24 |
Sep 24 06:28:43 AM UTC 24 |
256223820239 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/42.uart_tx_rx.1813970403 |
|
|
Sep 24 06:26:22 AM UTC 24 |
Sep 24 06:28:43 AM UTC 24 |
52541603917 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_tx_ovrd.3435223124 |
|
|
Sep 24 06:28:40 AM UTC 24 |
Sep 24 06:28:45 AM UTC 24 |
569761795 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_fifo_full.1681131828 |
|
|
Sep 24 06:27:52 AM UTC 24 |
Sep 24 06:28:47 AM UTC 24 |
216849537346 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_loopback.3694800338 |
|
|
Sep 24 06:28:41 AM UTC 24 |
Sep 24 06:28:47 AM UTC 24 |
7003332971 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.3578473510 |
|
|
Sep 24 06:24:29 AM UTC 24 |
Sep 24 06:28:47 AM UTC 24 |
96191170215 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_rx_parity_err.4250144617 |
|
|
Sep 24 06:28:07 AM UTC 24 |
Sep 24 06:28:47 AM UTC 24 |
78232198312 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_alert_test.3153744140 |
|
|
Sep 24 06:28:48 AM UTC 24 |
Sep 24 06:28:50 AM UTC 24 |
36644763 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/8.uart_perf.3116736967 |
|
|
Sep 24 06:04:43 AM UTC 24 |
Sep 24 06:28:51 AM UTC 24 |
21728899512 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.3955675440 |
|
|
Sep 24 06:28:23 AM UTC 24 |
Sep 24 06:28:53 AM UTC 24 |
12447851224 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_fifo_reset.2005123974 |
|
|
Sep 24 06:27:55 AM UTC 24 |
Sep 24 06:28:53 AM UTC 24 |
492279961944 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/47.uart_smoke.1820268178 |
|
|
Sep 24 06:28:48 AM UTC 24 |
Sep 24 06:28:54 AM UTC 24 |
932703146 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/35.uart_stress_all.2754387378 |
|
|
Sep 24 06:22:53 AM UTC 24 |
Sep 24 06:28:55 AM UTC 24 |
142432023538 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/44.uart_stress_all_with_rand_reset.1735453740 |
|
|
Sep 24 06:27:45 AM UTC 24 |
Sep 24 06:28:59 AM UTC 24 |
3347569307 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_09_23/uart-sim-vcs/coverage/default/45.uart_stress_all_with_rand_reset.641401555 |
|
|
Sep 24 06:28:14 AM UTC 24 |
Sep 24 06:29:02 AM UTC 24 |
2851332086 ps |