Module Definition
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Module : usb_fs_nb_pe
SCORELINECONDTOGGLEFSMBRANCHASSERT
77.78 100.00 33.33 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.usbdev_impl.u_usb_fs_nb_pe 77.78 100.00 33.33 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
77.78 100.00 33.33 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
72.76 83.87 71.93 29.73 78.28 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.27 96.83 73.68 78.57 100.00 usbdev_impl


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_usb_fs_nb_in_pe 46.43 55.66 34.29 0.00 42.22 100.00
u_usb_fs_nb_out_pe 76.58 84.68 71.77 50.00 76.47 100.00
u_usb_fs_rx 93.07 98.92 87.05 93.26
u_usb_fs_tx 75.65 83.90 70.69 41.18 82.50 100.00
u_usb_fs_tx_mux 93.33 100.00 80.00 100.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : usb_fs_nb_pe
Line No.TotalCoveredPercent
TOTAL44100.00
CONT_ASSIGN14511100.00
CONT_ASSIGN14611100.00
CONT_ASSIGN14711100.00
CONT_ASSIGN15111100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv' or '../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
145 1 1
146 1 1
147 1 1
151 1 1


Cond Coverage for Module : usb_fs_nb_pe
TotalCoveredPercent
Conditions6233.33
Logical6233.33
Non-Logical00
Event00

 LINE       145
 EXPRESSION (rx_pkt_end & rx_pkt_valid & (usb_pid_e'(rx_pid) == UsbPidSof))
             -----1----   ------2-----   ----------------3----------------
-1--2--3-StatusTests
011Not Covered
101Not Covered
110CoveredT1,T2,T3
111Not Covered

 LINE       145
 SUB-EXPRESSION (usb_pid_e'(rx_pid) == UsbPidSof)
                ----------------1----------------
-1-StatusTests
0CoveredT1,T2,T3
1Not Covered

Assert Coverage for Module : usb_fs_nb_pe
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 5 5 100.00 5 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 5 5 100.00 5 100.00




Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
NumOutEpsEqualsNumInEps_A 88 88 0 0
ParamMaxPktSizeByteValid 88 88 0 0
ParamNumEpsOutAndInEqual 88 88 0 0
ParamNumInEpsValid 88 88 0 0
ParamNumOutEpsValid 88 88 0 0


NumOutEpsEqualsNumInEps_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 88 88 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamMaxPktSizeByteValid
NameAttemptsReal SuccessesFailuresIncomplete
Total 88 88 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamNumEpsOutAndInEqual
NameAttemptsReal SuccessesFailuresIncomplete
Total 88 88 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamNumInEpsValid
NameAttemptsReal SuccessesFailuresIncomplete
Total 88 88 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamNumOutEpsValid
NameAttemptsReal SuccessesFailuresIncomplete
Total 88 88 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%