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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.41 98.23 96.03 97.44 94.92 98.42 98.21 98.64


Total test records in report: 3837
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T3201 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.1162326748 Oct 02 11:14:08 PM UTC 24 Oct 02 11:14:28 PM UTC 24 14785955811 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.2790723069 Oct 02 11:14:26 PM UTC 24 Oct 02 11:14:28 PM UTC 24 260598595 ps
T3202 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.4108479622 Oct 02 11:14:10 PM UTC 24 Oct 02 11:14:28 PM UTC 24 879455383 ps
T3203 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.89511647 Oct 02 11:14:26 PM UTC 24 Oct 02 11:14:28 PM UTC 24 530389578 ps
T461 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2085418536 Oct 02 11:14:26 PM UTC 24 Oct 02 11:14:29 PM UTC 24 393230687 ps
T3204 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3969065301 Oct 02 11:14:26 PM UTC 24 Oct 02 11:14:29 PM UTC 24 616810483 ps
T3205 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.3000108037 Oct 02 11:14:26 PM UTC 24 Oct 02 11:14:29 PM UTC 24 657659512 ps
T380 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.2343072208 Oct 02 11:14:27 PM UTC 24 Oct 02 11:14:29 PM UTC 24 242998164 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.1527785444 Oct 02 11:14:27 PM UTC 24 Oct 02 11:14:30 PM UTC 24 285414466 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.2632264679 Oct 02 11:14:28 PM UTC 24 Oct 02 11:14:30 PM UTC 24 304083583 ps
T3206 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.1699601245 Oct 02 11:13:32 PM UTC 24 Oct 02 11:14:30 PM UTC 24 22013485132 ps
T491 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.71899857 Oct 02 11:14:28 PM UTC 24 Oct 02 11:14:30 PM UTC 24 337738168 ps
T3207 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.2118122226 Oct 02 11:14:27 PM UTC 24 Oct 02 11:14:30 PM UTC 24 501885726 ps
T3208 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3532136954 Oct 02 11:13:48 PM UTC 24 Oct 02 11:14:30 PM UTC 24 30168727956 ps
T3209 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.2677051231 Oct 02 11:14:28 PM UTC 24 Oct 02 11:14:30 PM UTC 24 596722706 ps
T3210 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2461742426 Oct 02 11:14:27 PM UTC 24 Oct 02 11:14:30 PM UTC 24 704567754 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.3120548457 Oct 02 11:14:27 PM UTC 24 Oct 02 11:14:30 PM UTC 24 659663551 ps
T3211 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.2581105416 Oct 02 11:13:12 PM UTC 24 Oct 02 11:14:31 PM UTC 24 12208733111 ps
T3212 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.964700897 Oct 02 11:13:36 PM UTC 24 Oct 02 11:14:31 PM UTC 24 31198463808 ps
T474 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.2596229769 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 262596547 ps
T488 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.4179422406 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 332536625 ps
T3213 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.2702132455 Oct 02 11:14:34 PM UTC 24 Oct 02 11:14:37 PM UTC 24 201876707 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.2028074633 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 308869936 ps
T3214 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.438270491 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 151990590 ps
T3215 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.2039193891 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 474007015 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3113371915 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 296390137 ps
T3216 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.1317694258 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 154359263 ps
T3217 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.1721019666 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:32 PM UTC 24 565051626 ps
T394 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1534123773 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 522254840 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.2284495566 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 279629359 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.2547305868 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 291336971 ps
T3218 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.28191287 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 425113395 ps
T3219 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.179688663 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 520990416 ps
T3220 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1188696901 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 510310116 ps
T429 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.2549362835 Oct 02 11:14:30 PM UTC 24 Oct 02 11:14:33 PM UTC 24 584476189 ps
T3221 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.312965777 Oct 02 11:12:49 PM UTC 24 Oct 02 11:14:34 PM UTC 24 3911452565 ps
T3222 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.145563275 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:36 PM UTC 24 621901582 ps
T3223 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.810600156 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:37 PM UTC 24 172678728 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3900827623 Oct 02 11:14:32 PM UTC 24 Oct 02 11:14:35 PM UTC 24 181309203 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.567475918 Oct 02 11:14:32 PM UTC 24 Oct 02 11:14:35 PM UTC 24 400322235 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2746506135 Oct 02 11:14:32 PM UTC 24 Oct 02 11:14:35 PM UTC 24 266730118 ps
T3224 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.3383991508 Oct 02 11:14:32 PM UTC 24 Oct 02 11:14:35 PM UTC 24 442278277 ps
T3225 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.3236482422 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 190323148 ps
T462 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1784391903 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 392094899 ps
T3226 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.3820310664 Oct 02 11:13:27 PM UTC 24 Oct 02 11:14:35 PM UTC 24 6562198043 ps
T527 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.608790567 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 266224178 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.550946511 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 421526096 ps
T436 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3447133399 Oct 02 11:14:32 PM UTC 24 Oct 02 11:14:35 PM UTC 24 507246952 ps
T3227 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.130947076 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 247718454 ps
T405 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2508786557 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 667662093 ps
T3228 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2632559251 Oct 02 11:14:32 PM UTC 24 Oct 02 11:14:35 PM UTC 24 465260684 ps
T3229 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2092271011 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:35 PM UTC 24 553903289 ps
T3230 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.2017440854 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:36 PM UTC 24 289129016 ps
T3231 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.3603190775 Oct 02 11:14:33 PM UTC 24 Oct 02 11:14:36 PM UTC 24 561753288 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3515251116 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:37 PM UTC 24 208634313 ps
T3232 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.2095652085 Oct 02 11:14:15 PM UTC 24 Oct 02 11:14:38 PM UTC 24 2622437692 ps
T3233 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.4031814040 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:38 PM UTC 24 480364068 ps
T443 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.1843212213 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:38 PM UTC 24 624947364 ps
T3234 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.855072542 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:38 PM UTC 24 629951519 ps
T3235 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.2029355137 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:38 PM UTC 24 682528671 ps
T410 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.957743946 Oct 02 11:14:35 PM UTC 24 Oct 02 11:14:38 PM UTC 24 672922167 ps
T3236 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.696654788 Oct 02 11:13:39 PM UTC 24 Oct 02 11:14:38 PM UTC 24 30698507905 ps
T3237 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.948958340 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:39 PM UTC 24 243361437 ps
T3238 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.993417900 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:39 PM UTC 24 184136689 ps
T3239 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.361379840 Oct 02 11:13:37 PM UTC 24 Oct 02 11:14:39 PM UTC 24 7045398536 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.566523024 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 270000219 ps
T349 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.804523711 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 257408659 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.1076349464 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 282438714 ps
T3240 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.530311632 Oct 02 11:14:20 PM UTC 24 Oct 02 11:14:40 PM UTC 24 2566518828 ps
T425 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.3531305865 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 393519200 ps
T335 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.2322893060 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 261843087 ps
T3241 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2804902240 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 549991481 ps
T3242 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.3292051244 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 249335688 ps
T3243 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.1918849433 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 290428009 ps
T3244 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1340925759 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 539717126 ps
T3245 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.46248927 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 396485793 ps
T3246 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.166476258 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 312774254 ps
T3247 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.1785714791 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 496921600 ps
T3248 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.4244610231 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 528186754 ps
T3249 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.444893957 Oct 02 11:13:34 PM UTC 24 Oct 02 11:14:40 PM UTC 24 2431778197 ps
T3250 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2472700188 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 717798532 ps
T3251 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.3571242818 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:40 PM UTC 24 586223047 ps
T3252 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.630320875 Oct 02 11:14:37 PM UTC 24 Oct 02 11:14:41 PM UTC 24 544823323 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.699361277 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:41 PM UTC 24 180871512 ps
T3253 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.2411633612 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:41 PM UTC 24 187172650 ps
T3254 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.466814412 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:41 PM UTC 24 159629982 ps
T3255 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.4161890271 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:41 PM UTC 24 146487622 ps
T3256 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.1796422604 Oct 02 11:13:28 PM UTC 24 Oct 02 11:14:42 PM UTC 24 2764290312 ps
T3257 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.419654742 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 525591515 ps
T336 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2703270466 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 256024557 ps
T411 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.2841001562 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 725537277 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.727736864 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 515615057 ps
T398 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.877365793 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 655026153 ps
T3258 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3116494782 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 469842003 ps
T3259 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.977057180 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:42 PM UTC 24 554127226 ps
T389 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.222396559 Oct 02 11:14:39 PM UTC 24 Oct 02 11:14:43 PM UTC 24 963247638 ps
T3260 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.1297312510 Oct 02 11:12:57 PM UTC 24 Oct 02 11:14:45 PM UTC 24 3943816194 ps
T3261 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.618562577 Oct 02 11:14:43 PM UTC 24 Oct 02 11:14:46 PM UTC 24 173317916 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.1930064631 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:46 PM UTC 24 262675128 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3299287003 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:46 PM UTC 24 395540302 ps
T3262 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.3083389095 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:46 PM UTC 24 262885558 ps
T448 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.1708774742 Oct 02 11:14:43 PM UTC 24 Oct 02 11:14:46 PM UTC 24 534862841 ps
T3263 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.3025890200 Oct 02 11:14:43 PM UTC 24 Oct 02 11:14:46 PM UTC 24 583007277 ps
T3264 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1984076014 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:46 PM UTC 24 491819058 ps
T3265 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.2064330961 Oct 02 11:14:21 PM UTC 24 Oct 02 11:14:46 PM UTC 24 2601142533 ps
T3266 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.902891048 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:46 PM UTC 24 492307027 ps
T3267 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3870235163 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:46 PM UTC 24 589720283 ps
T437 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.396912739 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:47 PM UTC 24 746777443 ps
T3268 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.4005150900 Oct 02 11:14:08 PM UTC 24 Oct 02 11:14:47 PM UTC 24 24941040336 ps
T3269 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.1064661846 Oct 02 11:14:15 PM UTC 24 Oct 02 11:14:49 PM UTC 24 3520770561 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.2574562505 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:50 PM UTC 24 205987293 ps
T3270 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.80652087 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:50 PM UTC 24 151778181 ps
T3271 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.2766886783 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:50 PM UTC 24 207070689 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.220758747 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:50 PM UTC 24 176986932 ps
T346 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.3346218957 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 290779742 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.2854028755 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 292662787 ps
T367 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1721931180 Oct 02 11:14:42 PM UTC 24 Oct 02 11:14:51 PM UTC 24 263244713 ps
T3272 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.2694974571 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 486154913 ps
T3273 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.3618567817 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 471024662 ps
T463 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.1144125860 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 717125120 ps
T3274 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.815696972 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 464225498 ps
T3275 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3056551361 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:51 PM UTC 24 581215273 ps
T3276 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.4281917890 Oct 02 11:14:46 PM UTC 24 Oct 02 11:14:55 PM UTC 24 215920241 ps
T479 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.1887393954 Oct 02 11:14:46 PM UTC 24 Oct 02 11:14:55 PM UTC 24 379001665 ps
T3277 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.708487635 Oct 02 11:14:53 PM UTC 24 Oct 02 11:14:56 PM UTC 24 171731809 ps
T3278 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.2244801341 Oct 02 11:14:46 PM UTC 24 Oct 02 11:14:56 PM UTC 24 512370131 ps
T339 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1843197787 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:56 PM UTC 24 246069596 ps
T3279 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3060445467 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:56 PM UTC 24 169084016 ps
T3280 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1207367293 Oct 02 11:14:53 PM UTC 24 Oct 02 11:14:56 PM UTC 24 555844823 ps
T428 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3073581566 Oct 02 11:14:53 PM UTC 24 Oct 02 11:14:56 PM UTC 24 369145411 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.14942267 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:56 PM UTC 24 293270677 ps
T486 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2162346481 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:56 PM UTC 24 349524284 ps
T3281 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3777826386 Oct 02 11:14:41 PM UTC 24 Oct 02 11:14:56 PM UTC 24 143124898 ps
T3282 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1626933043 Oct 02 11:14:44 PM UTC 24 Oct 02 11:14:56 PM UTC 24 675217076 ps
T3283 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.3001846657 Oct 02 11:14:51 PM UTC 24 Oct 02 11:14:57 PM UTC 24 246435471 ps
T341 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.548229962 Oct 02 11:14:51 PM UTC 24 Oct 02 11:14:57 PM UTC 24 263786339 ps
T399 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.868811953 Oct 02 11:14:51 PM UTC 24 Oct 02 11:14:57 PM UTC 24 358920102 ps
T400 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.3602807485 Oct 02 11:14:52 PM UTC 24 Oct 02 11:14:57 PM UTC 24 448298133 ps
T3284 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.662415997 Oct 02 11:14:51 PM UTC 24 Oct 02 11:14:57 PM UTC 24 521914626 ps
T451 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3276449880 Oct 02 11:14:52 PM UTC 24 Oct 02 11:14:57 PM UTC 24 537387657 ps
T3285 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.3168752221 Oct 02 11:14:52 PM UTC 24 Oct 02 11:14:57 PM UTC 24 636777926 ps
T3286 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1363676528 Oct 02 11:13:41 PM UTC 24 Oct 02 11:15:00 PM UTC 24 3049528336 ps
T374 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.1518577790 Oct 02 11:14:52 PM UTC 24 Oct 02 11:15:00 PM UTC 24 316160617 ps
T3287 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3982081541 Oct 02 11:13:25 PM UTC 24 Oct 02 11:15:00 PM UTC 24 3545441383 ps
T3288 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3496742166 Oct 02 11:14:52 PM UTC 24 Oct 02 11:15:00 PM UTC 24 529088105 ps
T3289 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.2849682961 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 246968394 ps
T372 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2159754069 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 174681332 ps
T377 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.890015031 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 269593400 ps
T469 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3564598771 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:15 PM UTC 24 371505674 ps
T3290 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.1101781446 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 151367569 ps
T3291 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3682970863 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 163677971 ps
T387 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.1290850874 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 424393748 ps
T3292 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.2207635456 Oct 02 11:14:42 PM UTC 24 Oct 02 11:15:01 PM UTC 24 299993701 ps
T3293 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3570688441 Oct 02 11:13:12 PM UTC 24 Oct 02 11:15:01 PM UTC 24 4187128868 ps
T3294 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1829903685 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 468781339 ps
T523 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3385064229 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 259942508 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.1026748153 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 415279803 ps
T3295 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.4011572294 Oct 02 11:14:56 PM UTC 24 Oct 02 11:15:01 PM UTC 24 160861289 ps
T3296 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3098734898 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 247606273 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.2448052008 Oct 02 11:14:42 PM UTC 24 Oct 02 11:15:01 PM UTC 24 328581764 ps
T362 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.517268804 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 266183147 ps
T3297 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.150796304 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 195669272 ps
T3298 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.2118084975 Oct 02 11:14:42 PM UTC 24 Oct 02 11:15:01 PM UTC 24 500681097 ps
T466 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2691258755 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 376901491 ps
T3299 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.422132280 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 474574342 ps
T3300 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.277085643 Oct 02 11:14:48 PM UTC 24 Oct 02 11:15:01 PM UTC 24 435167377 ps
T412 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.391261822 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:01 PM UTC 24 708989259 ps
T467 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3025978725 Oct 02 11:14:41 PM UTC 24 Oct 02 11:15:01 PM UTC 24 784652552 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1814050211 Oct 02 11:14:56 PM UTC 24 Oct 02 11:15:02 PM UTC 24 417572952 ps
T3301 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.688915164 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 432746261 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3593338322 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 543754331 ps
T350 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2385453364 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 299332811 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.1136960676 Oct 02 11:14:42 PM UTC 24 Oct 02 11:15:02 PM UTC 24 498920287 ps
T3302 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.944350597 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 623011286 ps
T3303 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.208076018 Oct 02 11:14:49 PM UTC 24 Oct 02 11:15:02 PM UTC 24 486391614 ps
T3304 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3529709153 Oct 02 11:14:42 PM UTC 24 Oct 02 11:15:02 PM UTC 24 633771062 ps
T3305 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.1625007042 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 621078473 ps
T3306 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.269784513 Oct 02 11:14:56 PM UTC 24 Oct 02 11:15:02 PM UTC 24 573846394 ps
T3307 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.3840812755 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 589033426 ps
T3308 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.1821137659 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 616626183 ps
T441 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2773599344 Oct 02 11:14:42 PM UTC 24 Oct 02 11:15:02 PM UTC 24 659824368 ps
T3309 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2859554729 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 547986164 ps
T409 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.1107839288 Oct 02 11:14:58 PM UTC 24 Oct 02 11:15:02 PM UTC 24 678624680 ps
T3310 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.1769221859 Oct 02 11:14:15 PM UTC 24 Oct 02 11:15:03 PM UTC 24 1940857078 ps
T3311 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.2252857027 Oct 02 11:13:20 PM UTC 24 Oct 02 11:15:04 PM UTC 24 3974336574 ps
T3312 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3375424914 Oct 02 11:14:03 PM UTC 24 Oct 02 11:15:05 PM UTC 24 23069987821 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.3694902189 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:05 PM UTC 24 171152863 ps
T124 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.3741264332 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:06 PM UTC 24 432336677 ps
T3313 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1532563885 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:06 PM UTC 24 504515675 ps
T337 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.4128429472 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:06 PM UTC 24 296127842 ps
T3314 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.426453904 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:06 PM UTC 24 615469748 ps
T3315 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.2405277948 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:06 PM UTC 24 478516431 ps
T3316 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1296144459 Oct 02 11:13:41 PM UTC 24 Oct 02 11:15:07 PM UTC 24 3174763109 ps
T3317 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.3008139481 Oct 02 11:14:17 PM UTC 24 Oct 02 11:15:08 PM UTC 24 19010138154 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.4096728332 Oct 02 11:15:05 PM UTC 24 Oct 02 11:15:10 PM UTC 24 156378826 ps
T3318 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.99376500 Oct 02 11:15:08 PM UTC 24 Oct 02 11:15:10 PM UTC 24 154613539 ps
T330 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.2583320646 Oct 02 11:15:05 PM UTC 24 Oct 02 11:15:10 PM UTC 24 328413536 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2696070649 Oct 02 11:15:05 PM UTC 24 Oct 02 11:15:10 PM UTC 24 258307756 ps
T481 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2723100721 Oct 02 11:15:05 PM UTC 24 Oct 02 11:15:11 PM UTC 24 457587811 ps
T218 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.3096379358 Oct 02 11:15:08 PM UTC 24 Oct 02 11:15:11 PM UTC 24 440263607 ps
T3319 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.3275919483 Oct 02 11:15:05 PM UTC 24 Oct 02 11:15:11 PM UTC 24 574228105 ps
T3320 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2309605256 Oct 02 11:15:05 PM UTC 24 Oct 02 11:15:11 PM UTC 24 623819475 ps
T3321 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.2391676836 Oct 02 11:13:57 PM UTC 24 Oct 02 11:15:13 PM UTC 24 2896036493 ps
T3322 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.1157373067 Oct 02 11:13:57 PM UTC 24 Oct 02 11:15:14 PM UTC 24 2914038748 ps
T3323 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3456965419 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:15 PM UTC 24 157219706 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1735002451 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:15 PM UTC 24 243683446 ps
T449 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.3979191462 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:15 PM UTC 24 376766469 ps
T3324 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3310646606 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:15 PM UTC 24 332214273 ps
T3325 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.3465735485 Oct 02 11:14:12 PM UTC 24 Oct 02 11:15:15 PM UTC 24 2422708639 ps
T320 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.1259872983 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:15 PM UTC 24 190690929 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3006954521 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:15 PM UTC 24 228642912 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.117289501 Oct 02 11:14:50 PM UTC 24 Oct 02 11:15:15 PM UTC 24 236256193 ps
T327 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.1926892107 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:15 PM UTC 24 282336413 ps
T3326 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.4222647951 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:16 PM UTC 24 438500307 ps
T358 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3961342589 Oct 02 11:15:04 PM UTC 24 Oct 02 11:15:16 PM UTC 24 160957455 ps
T3327 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.264355154 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:16 PM UTC 24 458119607 ps
T472 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1247001258 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:16 PM UTC 24 310581358 ps
T3328 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.2264377973 Oct 02 11:15:07 PM UTC 24 Oct 02 11:15:16 PM UTC 24 465639121 ps
T530 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.3573511827 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:16 PM UTC 24 333246948 ps
T359 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3254672529 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:16 PM UTC 24 277393125 ps
T3329 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.2183443458 Oct 02 11:15:04 PM UTC 24 Oct 02 11:15:16 PM UTC 24 210550373 ps
T3330 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.3833410503 Oct 02 11:15:04 PM UTC 24 Oct 02 11:15:16 PM UTC 24 286862881 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2849728138 Oct 02 11:15:00 PM UTC 24 Oct 02 11:15:16 PM UTC 24 334154767 ps
T3331 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2706891748 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:16 PM UTC 24 502933532 ps
T3332 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.3804882194 Oct 02 11:15:04 PM UTC 24 Oct 02 11:15:16 PM UTC 24 413929243 ps
T3333 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.3322230640 Oct 02 11:15:04 PM UTC 24 Oct 02 11:15:16 PM UTC 24 458608231 ps
T3334 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1460120418 Oct 02 11:15:00 PM UTC 24 Oct 02 11:15:16 PM UTC 24 494668343 ps
T3335 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.3921861 Oct 02 11:14:13 PM UTC 24 Oct 02 11:15:17 PM UTC 24 9411655626 ps
T3336 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3549038302 Oct 02 11:13:40 PM UTC 24 Oct 02 11:15:17 PM UTC 24 3505184866 ps
T3337 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.2395680546 Oct 02 11:15:17 PM UTC 24 Oct 02 11:15:20 PM UTC 24 154374054 ps
T3338 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.1481411781 Oct 02 11:15:17 PM UTC 24 Oct 02 11:15:20 PM UTC 24 176324681 ps
T3339 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.3428975638 Oct 02 11:15:17 PM UTC 24 Oct 02 11:15:21 PM UTC 24 439679521 ps
T3340 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.598245750 Oct 02 11:15:17 PM UTC 24 Oct 02 11:15:21 PM UTC 24 518692174 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.1598265811 Oct 02 11:15:17 PM UTC 24 Oct 02 11:15:21 PM UTC 24 784144672 ps
T3341 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1510013622 Oct 02 11:14:08 PM UTC 24 Oct 02 11:15:23 PM UTC 24 2911934359 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.2656774122 Oct 02 11:15:22 PM UTC 24 Oct 02 11:15:26 PM UTC 24 268579980 ps
T3342 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2156694763 Oct 02 11:15:11 PM UTC 24 Oct 02 11:15:26 PM UTC 24 145269774 ps
T406 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3915566607 Oct 02 11:15:11 PM UTC 24 Oct 02 11:15:26 PM UTC 24 485677126 ps
T3343 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.470869161 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:26 PM UTC 24 203935010 ps
T3344 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3933220103 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:26 PM UTC 24 275312930 ps
T3345 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.1300151977 Oct 02 11:15:11 PM UTC 24 Oct 02 11:15:26 PM UTC 24 468617391 ps
T3346 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3059533369 Oct 02 11:15:24 PM UTC 24 Oct 02 11:15:26 PM UTC 24 592658554 ps
T3347 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.3813967384 Oct 02 11:14:10 PM UTC 24 Oct 02 11:15:26 PM UTC 24 39078208715 ps
T450 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.3034695357 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:27 PM UTC 24 572195911 ps
T3348 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.4108950259 Oct 02 11:15:14 PM UTC 24 Oct 02 11:15:27 PM UTC 24 498862127 ps
T3349 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.360508684 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:27 PM UTC 24 633015388 ps
T3350 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.894869567 Oct 02 11:15:03 PM UTC 24 Oct 02 11:15:27 PM UTC 24 523835819 ps
T340 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.3058480034 Oct 02 11:15:28 PM UTC 24 Oct 02 11:15:30 PM UTC 24 255332134 ps
T465 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2895851121 Oct 02 11:15:33 PM UTC 24 Oct 02 11:15:36 PM UTC 24 372340509 ps
T431 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.1352988213 Oct 02 11:15:28 PM UTC 24 Oct 02 11:15:31 PM UTC 24 337206998 ps
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