| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.41 | 98.23 | 96.03 | 97.44 | 94.92 | 98.42 | 98.21 | 98.64 |
| T251 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3011351158 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:39 PM UTC 24 | 127266496 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.3275332455 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 55986516 ps | ||
| T3763 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2808791125 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 47071676 ps | ||
| T3764 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.3540275031 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 122288885 ps | ||
| T297 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.435735744 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 45636682 ps | ||
| T295 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.2410033956 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 33423496 ps | ||
| T3765 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.4279352018 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 127744382 ps | ||
| T538 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.211984058 | Oct 02 11:17:36 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 544518379 ps | ||
| T3766 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2963997114 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 101309770 ps | ||
| T3767 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2837642865 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 123177228 ps | ||
| T3768 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.3999250805 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 48551301 ps | ||
| T3769 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.644412855 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 118626314 ps | ||
| T3770 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.1557857608 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 157469090 ps | ||
| T3771 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.2345623409 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 112713102 ps | ||
| T3772 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.1730567100 | Oct 02 11:17:13 PM UTC 24 | Oct 02 11:17:40 PM UTC 24 | 1819671310 ps | ||
| T3773 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.1548693675 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 86485724 ps | ||
| T3774 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3636510155 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 79723906 ps | ||
| T3775 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.900621085 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 123857982 ps | ||
| T3776 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3612387871 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 127109629 ps | ||
| T3777 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.287849129 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 149890527 ps | ||
| T540 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.525961112 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 343774106 ps | ||
| T3778 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2104451166 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:41 PM UTC 24 | 331375793 ps | ||
| T3779 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2845838507 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:42 PM UTC 24 | 288925651 ps | ||
| T536 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.4075262227 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:42 PM UTC 24 | 1130933725 ps | ||
| T3780 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.976035802 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:42 PM UTC 24 | 218333435 ps | ||
| T3781 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.991781852 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:42 PM UTC 24 | 350335547 ps | ||
| T539 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2079098164 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:43 PM UTC 24 | 1106698696 ps | ||
| T534 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.997795229 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:43 PM UTC 24 | 560181056 ps | ||
| T3782 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1897035167 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:44 PM UTC 24 | 795145041 ps | ||
| T299 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1937261914 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:45 PM UTC 24 | 40706189 ps | ||
| T3783 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.1445031271 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:45 PM UTC 24 | 55245765 ps | ||
| T296 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3554470677 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:45 PM UTC 24 | 44905306 ps | ||
| T3784 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3434980552 | Oct 02 11:17:43 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 67515911 ps | ||
| T3785 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.286737951 | Oct 02 11:17:43 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 127458882 ps | ||
| T3786 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.2798581083 | Oct 02 11:17:43 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 108786472 ps | ||
| T3787 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1383302213 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 103056377 ps | ||
| T3788 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.3690004907 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 63055148 ps | ||
| T537 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.73306004 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 2388253699 ps | ||
| T3789 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2912285225 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 93148883 ps | ||
| T3790 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1302597572 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:46 PM UTC 24 | 174756812 ps | ||
| T3791 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.2011083353 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:47 PM UTC 24 | 131979672 ps | ||
| T3792 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.1463597747 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:47 PM UTC 24 | 668085821 ps | ||
| T3793 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1409986817 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:47 PM UTC 24 | 103584393 ps | ||
| T3794 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2786918789 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:48 PM UTC 24 | 480965894 ps | ||
| T3795 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1220226013 | Oct 02 11:17:37 PM UTC 24 | Oct 02 11:17:52 PM UTC 24 | 121040621 ps | ||
| T3796 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.3041716752 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:17:54 PM UTC 24 | 42842389 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.494631906 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:17:54 PM UTC 24 | 51694402 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.952175644 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:17:55 PM UTC 24 | 40618023 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.2303812523 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:17:55 PM UTC 24 | 45381086 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.3384095411 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:17:55 PM UTC 24 | 86685396 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.368600118 | Oct 02 11:17:52 PM UTC 24 | Oct 02 11:17:56 PM UTC 24 | 39632911 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.1915438609 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:17:56 PM UTC 24 | 41257758 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2861985861 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:17:56 PM UTC 24 | 183754156 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3282011634 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 41677570 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.506866897 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 34576494 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.4243436004 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 65766565 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.2557067587 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 72852418 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.2803473101 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 94031778 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.4133530940 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 70658345 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3354462570 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 109446742 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3872692686 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 106660121 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.151936164 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:01 PM UTC 24 | 112688000 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3487995306 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:02 PM UTC 24 | 168937555 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2683737499 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:02 PM UTC 24 | 165701547 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3806275700 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:02 PM UTC 24 | 107123950 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2099690782 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:02 PM UTC 24 | 716530259 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2575919860 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:02 PM UTC 24 | 226055711 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.3002778308 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:03 PM UTC 24 | 231963167 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.1716009281 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 55394040 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1231443996 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 73874214 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.3503272367 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 33166999 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.99544351 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 66219857 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.3486724697 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 1854520672 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.3589130069 | Oct 02 11:17:42 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 1358323095 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.58419699 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 63646292 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.499992524 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 51283282 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.2876292537 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 75430943 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2721676334 | Oct 02 11:17:52 PM UTC 24 | Oct 02 11:18:05 PM UTC 24 | 54848331 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.3035532021 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 34954922 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1281380648 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 40147952 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2344854577 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 113402086 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.43117542 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 31091298 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2137728240 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 48317955 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1683219474 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 46269935 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1182891217 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 64095216 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3482663917 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 42696797 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.1489154506 | Oct 02 11:17:53 PM UTC 24 | Oct 02 11:18:06 PM UTC 24 | 60432698 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.2552505539 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 1015555448 ps |
| CPU time | 3.6 seconds |
| Started | Oct 02 10:58:02 PM UTC 24 |
| Finished | Oct 02 10:58:07 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552505539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.2552505539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.2906997548 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 208183487 ps |
| CPU time | 3.32 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 10:58:08 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906997548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.2906997548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.4291916491 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 733457303 ps |
| CPU time | 2.68 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 10:58:07 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291916491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.4291916491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.3367900587 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 10594068608 ps |
| CPU time | 16.81 seconds |
| Started | Oct 02 10:57:56 PM UTC 24 |
| Finished | Oct 02 10:58:14 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367900587 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.3367900587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.110890249 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 40087146 ps |
| CPU time | 0.7 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=110890249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.110890249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.361241366 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 4018836458 ps |
| CPU time | 30.55 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 10:58:41 PM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=361241366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.361241366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.2003470719 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 19878358472 ps |
| CPU time | 29.44 seconds |
| Started | Oct 02 10:58:26 PM UTC 24 |
| Finished | Oct 02 10:58:57 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003470719 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.2003470719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2627243314 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 120314493 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:17:09 PM UTC 24 |
| Finished | Oct 02 11:17:21 PM UTC 24 |
| Peak memory | 229028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627243314 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.2627243314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.4222757516 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 10298748634 ps |
| CPU time | 19.42 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:23 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222757516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.4222757516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.3847419191 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 33001802808 ps |
| CPU time | 65.04 seconds |
| Started | Oct 02 10:58:01 PM UTC 24 |
| Finished | Oct 02 10:59:07 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847419191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.3847419191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.2624253728 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 537597716 ps |
| CPU time | 2.89 seconds |
| Started | Oct 02 10:58:57 PM UTC 24 |
| Finished | Oct 02 10:59:01 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624253728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.2624253728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.2580460594 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 678431799 ps |
| CPU time | 2.13 seconds |
| Started | Oct 02 10:58:25 PM UTC 24 |
| Finished | Oct 02 10:58:29 PM UTC 24 |
| Peak memory | 252084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580460594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.2580460594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.654709199 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 302923077 ps |
| CPU time | 1.97 seconds |
| Started | Oct 02 10:58:15 PM UTC 24 |
| Finished | Oct 02 10:58:18 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=654709199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test_ mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.654709199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.3670197845 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 705416518 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:16:31 PM UTC 24 |
| Finished | Oct 02 11:16:38 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3670197845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.3670197845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.4177780673 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 49528027 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 10:58:45 PM UTC 24 |
| Finished | Oct 02 10:58:47 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177780673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.4177780673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.3565464495 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 48257497 ps |
| CPU time | 0.65 seconds |
| Started | Oct 02 11:17:09 PM UTC 24 |
| Finished | Oct 02 11:17:20 PM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565464495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.3565464495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.4016943049 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 6715026824 ps |
| CPU time | 85.04 seconds |
| Started | Oct 02 10:58:24 PM UTC 24 |
| Finished | Oct 02 10:59:51 PM UTC 24 |
| Peak memory | 234896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016943049 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.4016943049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.3575196342 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 237628894 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 10:58:15 PM UTC 24 |
| Finished | Oct 02 10:58:18 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575196342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.3575196342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.1998469771 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 504646611 ps |
| CPU time | 2.57 seconds |
| Started | Oct 02 11:00:11 PM UTC 24 |
| Finished | Oct 02 11:00:14 PM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1998469771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.1998469771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2510183664 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 28654534531 ps |
| CPU time | 51.84 seconds |
| Started | Oct 02 10:57:58 PM UTC 24 |
| Finished | Oct 02 10:58:52 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510183664 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.2510183664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3693381592 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 607676180 ps |
| CPU time | 2.48 seconds |
| Started | Oct 02 11:17:09 PM UTC 24 |
| Finished | Oct 02 11:17:22 PM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3693381592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.3693381592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.3096379358 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 440263607 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:15:08 PM UTC 24 |
| Finished | Oct 02 11:15:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3096379358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.3096379358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.4120775692 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 24647489729 ps |
| CPU time | 29.92 seconds |
| Started | Oct 02 11:05:31 PM UTC 24 |
| Finished | Oct 02 11:06:02 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120775692 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.4120775692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.4111098806 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 485102167 ps |
| CPU time | 2.64 seconds |
| Started | Oct 02 10:58:05 PM UTC 24 |
| Finished | Oct 02 10:58:08 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111098806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.4111098806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2752563729 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 44062783129 ps |
| CPU time | 81.42 seconds |
| Started | Oct 02 10:58:30 PM UTC 24 |
| Finished | Oct 02 10:59:53 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752563729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.2752563729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.2047196122 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 63234542 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 226984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047196122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.2047196122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.601679073 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 111344833 ps |
| CPU time | 2.64 seconds |
| Started | Oct 02 11:17:09 PM UTC 24 |
| Finished | Oct 02 11:17:12 PM UTC 24 |
| Peak memory | 227768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601679073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.601679073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.3587239494 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 252882832 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 10:59:21 PM UTC 24 |
| Finished | Oct 02 10:59:24 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587239494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.3587239494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.1659735163 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 554647304 ps |
| CPU time | 2.06 seconds |
| Started | Oct 02 10:58:31 PM UTC 24 |
| Finished | Oct 02 10:58:35 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659735163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.1659735163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.1087769676 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 160384429 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 10:57:58 PM UTC 24 |
| Finished | Oct 02 10:58:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087769676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.1087769676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3593338322 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 543754331 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593338322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.3593338322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.3107770205 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 22548027030 ps |
| CPU time | 63.25 seconds |
| Started | Oct 02 10:58:17 PM UTC 24 |
| Finished | Oct 02 10:59:21 PM UTC 24 |
| Peak memory | 232568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107770205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.3107770205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.272005918 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 496388254 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=272005918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.272005918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.3175186050 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 533359922 ps |
| CPU time | 2.53 seconds |
| Started | Oct 02 11:01:17 PM UTC 24 |
| Finished | Oct 02 11:01:20 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175186050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.3175186050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1487876111 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 158358312 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 10:58:02 PM UTC 24 |
| Finished | Oct 02 10:58:04 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487876111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.1487876111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3906937987 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 131137500 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:21 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906937987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3906937987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.4216678745 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 52717948137 ps |
| CPU time | 93.99 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4216678745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.4216678745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.3275332455 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 55986516 ps |
| CPU time | 0.72 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275332455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.3275332455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.2732490663 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 1207358227 ps |
| CPU time | 5.5 seconds |
| Started | Oct 02 11:02:42 PM UTC 24 |
| Finished | Oct 02 11:02:49 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732490663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2732490663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.1297905697 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 876795951 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297905697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.1297905697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.334469945 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 526783899 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=334469945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.334469945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.415059828 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 529150125 ps |
| CPU time | 2.12 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:13 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=415059828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.415059828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2773599344 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 659824368 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773599344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2773599344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.1447838366 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 2618789163 ps |
| CPU time | 25.99 seconds |
| Started | Oct 02 10:58:10 PM UTC 24 |
| Finished | Oct 02 10:58:38 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447838366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.1447838366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.3685601407 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 439756413 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:15:36 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685601407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.3685601407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.2012056257 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 550913732 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012056257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.2012056257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.2822235403 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 43290298139 ps |
| CPU time | 81.32 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:03:06 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822235403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.2822235403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1534123773 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 522254840 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534123773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.1534123773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.957743946 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 672922167 ps |
| CPU time | 2.02 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=957743946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.957743946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.340444768 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 412067444 ps |
| CPU time | 2.8 seconds |
| Started | Oct 02 10:58:20 PM UTC 24 |
| Finished | Oct 02 10:58:24 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340444768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_setup_priority.340444768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.3034695357 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 572195911 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:27 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034695357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.3034695357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.781563017 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 283938969 ps |
| CPU time | 1.93 seconds |
| Started | Oct 02 10:59:34 PM UTC 24 |
| Finished | Oct 02 10:59:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781563017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_fifo_levels.781563017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.222396559 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 963247638 ps |
| CPU time | 2.23 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:43 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222396559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.222396559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3056086602 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 39728006 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 10:58:25 PM UTC 24 |
| Finished | Oct 02 10:58:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3056086602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.3056086602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.997795229 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 560181056 ps |
| CPU time | 3.52 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:43 PM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=997795229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.997795229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.211984058 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 544518379 ps |
| CPU time | 2.43 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211984058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.211984058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1497541201 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 252923885 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 10:58:17 PM UTC 24 |
| Finished | Oct 02 10:58:20 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497541201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.1497541201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.3903442999 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 2777081474 ps |
| CPU time | 78.88 seconds |
| Started | Oct 02 11:03:41 PM UTC 24 |
| Finished | Oct 02 11:05:02 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903442999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.3903442999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1735002451 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 243683446 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735002451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.1735002451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.3476420182 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 23097398511 ps |
| CPU time | 56.63 seconds |
| Started | Oct 02 11:04:36 PM UTC 24 |
| Finished | Oct 02 11:05:34 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476420182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.3476420182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.4126325202 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 541105813 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126325202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.4126325202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.1715192435 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 721071268 ps |
| CPU time | 2.26 seconds |
| Started | Oct 02 10:59:34 PM UTC 24 |
| Finished | Oct 02 10:59:37 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715192435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.1715192435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.362312609 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 276593338 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:13:10 PM UTC 24 |
| Finished | Oct 02 11:13:13 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=362312609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.362312609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1784391903 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 392094899 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784391903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.1784391903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.1887393954 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 379001665 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:14:46 PM UTC 24 |
| Finished | Oct 02 11:14:55 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887393954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.1887393954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.845163122 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 202578970 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 10:58:13 PM UTC 24 |
| Finished | Oct 02 10:58:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845163122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_nak_trans.845163122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.1722801328 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 256384878 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:04:18 PM UTC 24 |
| Finished | Oct 02 11:04:20 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722801328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.1722801328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2042707210 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 132221070 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 10:57:58 PM UTC 24 |
| Finished | Oct 02 10:58:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042707210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.2042707210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.848971242 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 47596118 ps |
| CPU time | 0.69 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=848971242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.848971242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2713400125 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 5115876705 ps |
| CPU time | 49.88 seconds |
| Started | Oct 02 10:58:02 PM UTC 24 |
| Finished | Oct 02 10:58:53 PM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713400125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2713400125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.1004935201 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 881001437 ps |
| CPU time | 2.57 seconds |
| Started | Oct 02 10:58:29 PM UTC 24 |
| Finished | Oct 02 10:58:33 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004935201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.1004935201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3564598771 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 371505674 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564598771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3564598771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.1973465611 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 534953004 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973465611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.1973465611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.1833202775 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 419985541 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:15:55 PM UTC 24 |
| Finished | Oct 02 11:16:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1833202775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.1833202775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2085418536 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 393230687 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:29 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085418536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.2085418536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.4179422406 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 332536625 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179422406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.4179422406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2508786557 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 667662093 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508786557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.2508786557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3025978725 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 784652552 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025978725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.3025978725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.1685841800 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 7539879009 ps |
| CPU time | 98.7 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:05:06 PM UTC 24 |
| Peak memory | 230440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685841800 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.1685841800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.1587449010 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 302958488 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:04:38 PM UTC 24 |
| Finished | Oct 02 11:04:40 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587449010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.1587449010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.976035802 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 218333435 ps |
| CPU time | 2.41 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:42 PM UTC 24 |
| Peak memory | 234976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=976035802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.976035802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3038540197 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 4166532471 ps |
| CPU time | 14.63 seconds |
| Started | Oct 02 10:58:04 PM UTC 24 |
| Finished | Oct 02 10:58:20 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038540197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.3038540197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.2326827804 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 12530467636 ps |
| CPU time | 232.99 seconds |
| Started | Oct 02 11:02:08 PM UTC 24 |
| Finished | Oct 02 11:06:05 PM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326827804 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.2326827804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.525961112 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 343774106 ps |
| CPU time | 2.18 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525961112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.525961112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.1687851502 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 157537418 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 10:58:06 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687851502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_fifo_levels.1687851502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.2843512372 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 187849542 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 10:58:13 PM UTC 24 |
| Finished | Oct 02 10:58:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843512372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.2843512372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.3776028496 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 192579187 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 10:58:20 PM UTC 24 |
| Finished | Oct 02 10:58:23 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776028496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.3776028496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.4074508665 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 157259512 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 10:58:22 PM UTC 24 |
| Finished | Oct 02 10:58:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074508665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.4074508665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2180306099 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 4924278169 ps |
| CPU time | 124.39 seconds |
| Started | Oct 02 10:58:39 PM UTC 24 |
| Finished | Oct 02 11:00:46 PM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180306099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2180306099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.1688184647 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 146437027 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:03:35 PM UTC 24 |
| Finished | Oct 02 11:03:37 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688184647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.1688184647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.1518577790 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 316160617 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:14:52 PM UTC 24 |
| Finished | Oct 02 11:15:00 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518577790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.1518577790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1814050211 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 417572952 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:14:56 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814050211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.1814050211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2159754069 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 174681332 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159754069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.2159754069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.517268804 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 266183147 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=517268804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 108.usbdev_fifo_levels.517268804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.1107839288 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 678624680 ps |
| CPU time | 1.94 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107839288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.1107839288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2385453364 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 299332811 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385453364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.2385453364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.1926892107 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 282336413 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926892107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.1926892107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.470869161 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 203935010 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470869161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 114.usbdev_fifo_levels.470869161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.4128429472 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 296127842 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128429472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.4128429472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3254672529 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 277393125 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254672529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.3254672529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.3833410503 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 286862881 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:15:04 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833410503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.3833410503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.3095195306 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 564081241 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:04:18 PM UTC 24 |
| Finished | Oct 02 11:04:20 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095195306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.3095195306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.2583320646 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 328413536 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:15:05 PM UTC 24 |
| Finished | Oct 02 11:15:10 PM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583320646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.2583320646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2723100721 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 457587811 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:15:05 PM UTC 24 |
| Finished | Oct 02 11:15:11 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723100721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.2723100721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2696070649 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 258307756 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:15:05 PM UTC 24 |
| Finished | Oct 02 11:15:10 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696070649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.2696070649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.3979191462 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 376766469 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979191462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.3979191462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.1259872983 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 190690929 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259872983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.1259872983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3020068871 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 287083056 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:15:15 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3020068871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.3020068871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.1598265811 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 784144672 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:21 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598265811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.1598265811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.744681587 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 174105610 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744681587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 135.usbdev_fifo_levels.744681587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.418260371 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 163882706 ps |
| CPU time | 0.86 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418260371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 137.usbdev_fifo_levels.418260371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.2770633813 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 240318537 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:04:56 PM UTC 24 |
| Finished | Oct 02 11:04:59 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770633813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.2770633813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.2324935992 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 191112391 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:05:07 PM UTC 24 |
| Finished | Oct 02 11:05:09 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324935992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.2324935992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.2656774122 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 268579980 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:15:22 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656774122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.2656774122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.2387424788 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 254180200 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2387424788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.2387424788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.1909051370 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 230860014 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909051370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.1909051370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.3986814838 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 269086601 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986814838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.3986814838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.2139030628 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 325626646 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139030628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.2139030628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.3058480034 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 255332134 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058480034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.3058480034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.4109327543 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 373093338 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109327543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.4109327543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.1589364729 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 252273153 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:35 PM UTC 24 |
| Peak memory | 215316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589364729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.1589364729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.134391915 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 355913795 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=134391915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_fifo_levels.134391915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.3176026587 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 2937327971 ps |
| CPU time | 20.77 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:28 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176026587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.3176026587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.2899122784 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 351763269 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:01 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899122784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.2899122784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.3210714829 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 307790056 ps |
| CPU time | 1.95 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:06:44 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210714829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_fifo_levels.3210714829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.18921754 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 258862286 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:07:13 PM UTC 24 |
| Finished | Oct 02 11:07:16 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18921754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_fifo_levels.18921754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.3932415069 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 281314862 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:03 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932415069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.3932415069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1415036640 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 259633257 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:11:54 PM UTC 24 |
| Finished | Oct 02 11:11:56 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415036640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1415036640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.2817165983 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 243147429 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:12:21 PM UTC 24 |
| Finished | Oct 02 11:12:24 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817165983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.2817165983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.2136749984 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 285815245 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:13:28 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136749984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.2136749984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.3266979465 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 281399260 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:13:42 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266979465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.3266979465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.460962687 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 465777802 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=460962687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.460962687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3211010437 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 214513988 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211010437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3211010437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3113371915 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 296390137 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113371915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.3113371915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.2284495566 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 279629359 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284495566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.2284495566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2746506135 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 266730118 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:14:32 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746506135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.2746506135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.396912739 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 746777443 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:47 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396912739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.396912739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.890015031 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 269593400 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890015031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 96.usbdev_fifo_levels.890015031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.548229962 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 263786339 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:14:51 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548229962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 99.usbdev_fifo_levels.548229962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.2253937180 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 140805272 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 10:58:16 PM UTC 24 |
| Finished | Oct 02 10:58:18 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253937180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.2253937180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.1706586573 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 150810479 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 10:58:28 PM UTC 24 |
| Finished | Oct 02 10:58:30 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706586573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.1706586573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.3922167086 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 42668078 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:00:50 PM UTC 24 |
| Finished | Oct 02 11:00:52 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922167086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3922167086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.2156130806 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 151958543 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 10:57:58 PM UTC 24 |
| Finished | Oct 02 10:58:01 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156130806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.2156130806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.3239183383 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 235135624 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 10:58:08 PM UTC 24 |
| Finished | Oct 02 10:58:11 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239183383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.3239183383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.93150461 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 165514031 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:22 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=93150461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_rx_pid_err.93150461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.3760903834 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 185718245 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 10:59:29 PM UTC 24 |
| Finished | Oct 02 10:59:32 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760903834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.3760903834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.2603298368 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 162950191 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603298368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.2603298368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.4132957387 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 3513504480 ps |
| CPU time | 32.96 seconds |
| Started | Oct 02 10:58:05 PM UTC 24 |
| Finished | Oct 02 10:58:39 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132957387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.4132957387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.1612618150 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 7816720891 ps |
| CPU time | 90.36 seconds |
| Started | Oct 02 10:58:36 PM UTC 24 |
| Finished | Oct 02 11:00:09 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612618150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.1612618150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2858460769 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 176234922 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 10:58:42 PM UTC 24 |
| Finished | Oct 02 10:58:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858460769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.2858460769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.2415651260 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 284585974 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:03:42 PM UTC 24 |
| Finished | Oct 02 11:03:45 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415651260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.2415651260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.164941196 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 251514609 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:04:06 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=164941196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_nak_trans.164941196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.3741264332 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 432336677 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:06 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741264332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.3741264332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.445793245 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 227547739 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:04:23 PM UTC 24 |
| Finished | Oct 02 11:04:26 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445793245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_nak_trans.445793245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.2069198934 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 234715394 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:05:04 PM UTC 24 |
| Finished | Oct 02 11:05:07 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069198934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.2069198934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.2970240684 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 184859659 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:05:42 PM UTC 24 |
| Finished | Oct 02 11:05:44 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970240684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.2970240684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.776032292 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 217175861 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 10:59:54 PM UTC 24 |
| Finished | Oct 02 10:59:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=776032292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_nak_trans.776032292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.1459094079 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 9818446060 ps |
| CPU time | 259.66 seconds |
| Started | Oct 02 11:00:11 PM UTC 24 |
| Finished | Oct 02 11:04:34 PM UTC 24 |
| Peak memory | 233004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459094079 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.1459094079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.4200289886 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 181444954 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:13 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200289886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.4200289886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.107624728 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 185531602 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:10:28 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=107624728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_nak_trans.107624728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.4269871627 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 16525369488 ps |
| CPU time | 360.66 seconds |
| Started | Oct 02 11:01:05 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 237512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269871627 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.4269871627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.33468298 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 206862828 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:12:59 PM UTC 24 |
| Finished | Oct 02 11:13:01 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33468298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_nak_trans.33468298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.2947671621 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 134148273 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 214524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947671621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.2947671621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3506358238 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 325095649 ps |
| CPU time | 3.9 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 216512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506358238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.3506358238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.2340593836 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 83266352 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340593836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.2340593836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.53885197 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 173053485 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 226868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53885197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.53885197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.515537649 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 79508790 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=515537649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.515537649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1876665003 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 197137750 ps |
| CPU time | 3.62 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876665003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.1876665003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.1944164648 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 176510927 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944164648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.1944164648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.2512082972 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 447996743 ps |
| CPU time | 2.68 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512082972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.2512082972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.1282410571 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 289912834 ps |
| CPU time | 3.1 seconds |
| Started | Oct 02 11:17:08 PM UTC 24 |
| Finished | Oct 02 11:17:13 PM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282410571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.1282410571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2669553925 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 1286103140 ps |
| CPU time | 6.98 seconds |
| Started | Oct 02 11:17:08 PM UTC 24 |
| Finished | Oct 02 11:17:16 PM UTC 24 |
| Peak memory | 217844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669553925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.2669553925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.2209585316 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 112795762 ps |
| CPU time | 0.83 seconds |
| Started | Oct 02 11:17:08 PM UTC 24 |
| Finished | Oct 02 11:17:10 PM UTC 24 |
| Peak memory | 216668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209585316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.2209585316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.2327610107 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 57527905 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:17:08 PM UTC 24 |
| Finished | Oct 02 11:17:10 PM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327610107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.2327610107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.3163289897 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 175164931 ps |
| CPU time | 2.17 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 227996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163289897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.3163289897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3097197011 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 162641620 ps |
| CPU time | 3.6 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097197011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.3097197011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.2273424943 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 295421359 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:17:09 PM UTC 24 |
| Finished | Oct 02 11:17:21 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273424943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.2273424943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.3668513005 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 305009264 ps |
| CPU time | 3.19 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668513005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.3668513005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.391486210 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 277344243 ps |
| CPU time | 2.14 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=391486210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.391486210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3636510155 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 79723906 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 226996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636510155 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.3636510155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.3540275031 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 122288885 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540275031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.3540275031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.4279352018 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 127744382 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279352018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.4279352018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2845838507 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 288925651 ps |
| CPU time | 2.85 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:42 PM UTC 24 |
| Peak memory | 234772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845838507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2845838507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2079098164 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 1106698696 ps |
| CPU time | 4.29 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:43 PM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079098164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.2079098164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.287849129 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 149890527 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=287849129 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.287849129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2963997114 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 101309770 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963997114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2963997114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2808791125 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 47071676 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808791125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.2808791125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.1557857608 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 157469090 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557857608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.1557857608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.644412855 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 118626314 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644412855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.644412855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.900621085 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 123857982 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 226976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=900621085 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.900621085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.2345623409 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 112713102 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345623409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.2345623409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.435735744 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 45636682 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435735744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.435735744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.1548693675 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 86485724 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548693675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.1548693675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.991781852 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 350335547 ps |
| CPU time | 3.19 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:42 PM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=991781852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.991781852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.73306004 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 2388253699 ps |
| CPU time | 6.3 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=73306004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.73306004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1220226013 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 121040621 ps |
| CPU time | 2.04 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:52 PM UTC 24 |
| Peak memory | 229488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220226013 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.1220226013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.3999250805 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 48551301 ps |
| CPU time | 0.69 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999250805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.3999250805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.2410033956 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 33423496 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410033956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.2410033956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2104451166 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 331375793 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104451166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.2104451166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1897035167 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 795145041 ps |
| CPU time | 4.08 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:44 PM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897035167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.1897035167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3612387871 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 127109629 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:41 PM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3612387871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.3612387871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3806275700 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 107123950 ps |
| CPU time | 2.38 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:02 PM UTC 24 |
| Peak memory | 228024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806275700 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.3806275700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.4243436004 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 65766565 ps |
| CPU time | 0.81 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243436004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.4243436004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3282011634 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 41677570 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282011634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.3282011634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.2803473101 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 94031778 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803473101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.2803473101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2099690782 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 716530259 ps |
| CPU time | 2.67 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:02 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099690782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.2099690782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2683737499 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 165701547 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:02 PM UTC 24 |
| Peak memory | 226848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683737499 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.2683737499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.4133530940 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 70658345 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133530940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.4133530940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.2557067587 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 72852418 ps |
| CPU time | 0.74 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557067587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.2557067587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3872692686 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 106660121 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872692686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.3872692686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.151936164 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 112688000 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151936164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.151936164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.3589130069 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 1358323095 ps |
| CPU time | 5.06 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589130069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.3589130069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2861985861 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 183754156 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:56 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861985861 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.2861985861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3354462570 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 109446742 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354462570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.3354462570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.506866897 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 34576494 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:01 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=506866897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.506866897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3487995306 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 168937555 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:02 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487995306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.3487995306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2575919860 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 226055711 ps |
| CPU time | 2.35 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:02 PM UTC 24 |
| Peak memory | 217660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575919860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.2575919860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.3486724697 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 1854520672 ps |
| CPU time | 4.94 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486724697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.3486724697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.2011083353 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 131979672 ps |
| CPU time | 2 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:47 PM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011083353 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.2011083353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.1445031271 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 55245765 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:45 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445031271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.1445031271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1937261914 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 40706189 ps |
| CPU time | 0.71 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:45 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937261914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.1937261914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1383302213 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 103056377 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383302213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.1383302213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.3002778308 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 231963167 ps |
| CPU time | 2.31 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:18:03 PM UTC 24 |
| Peak memory | 231988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002778308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.3002778308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2786918789 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 480965894 ps |
| CPU time | 3.4 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:48 PM UTC 24 |
| Peak memory | 217572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786918789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.2786918789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2912285225 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 93148883 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 226940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912285225 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.2912285225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.3690004907 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 63055148 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690004907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.3690004907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3554470677 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 44905306 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:45 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554470677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.3554470677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1302597572 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 174756812 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302597572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.1302597572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1409986817 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 103584393 ps |
| CPU time | 2.5 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:47 PM UTC 24 |
| Peak memory | 227872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409986817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.1409986817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.1463597747 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 668085821 ps |
| CPU time | 2.41 seconds |
| Started | Oct 02 11:17:42 PM UTC 24 |
| Finished | Oct 02 11:17:47 PM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463597747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.1463597747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.4267562042 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 401563175 ps |
| CPU time | 3.32 seconds |
| Started | Oct 02 11:17:16 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267562042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.4267562042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.1730567100 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 1819671310 ps |
| CPU time | 8.72 seconds |
| Started | Oct 02 11:17:13 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730567100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.1730567100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2852841019 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 119348115 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:17:11 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852841019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2852841019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.855361621 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 60585313 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:17:16 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=855361621 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.855361621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3648225872 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 65325932 ps |
| CPU time | 0.79 seconds |
| Started | Oct 02 11:17:13 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648225872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3648225872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.2604420381 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 99222454 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:17:11 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 227044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604420381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.2604420381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2315021762 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 281283252 ps |
| CPU time | 2.23 seconds |
| Started | Oct 02 11:17:09 PM UTC 24 |
| Finished | Oct 02 11:17:22 PM UTC 24 |
| Peak memory | 217512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315021762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.2315021762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.3777258499 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 226182586 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:17:16 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 216576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777258499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.3777258499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.286737951 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 127458882 ps |
| CPU time | 0.73 seconds |
| Started | Oct 02 11:17:43 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=286737951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.286737951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3434980552 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 67515911 ps |
| CPU time | 0.7 seconds |
| Started | Oct 02 11:17:43 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434980552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.3434980552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.2798581083 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 108786472 ps |
| CPU time | 0.75 seconds |
| Started | Oct 02 11:17:43 PM UTC 24 |
| Finished | Oct 02 11:17:46 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798581083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.2798581083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.368600118 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 39632911 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:52 PM UTC 24 |
| Finished | Oct 02 11:17:56 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368600118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.368600118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2721676334 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 54848331 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:52 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721676334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.2721676334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.1915438609 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 41257758 ps |
| CPU time | 0.64 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:17:56 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915438609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.1915438609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.2876292537 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 75430943 ps |
| CPU time | 0.73 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876292537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.2876292537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2449486760 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 78477557 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:17:22 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449486760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.2449486760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1990910653 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 824957835 ps |
| CPU time | 4.4 seconds |
| Started | Oct 02 11:17:18 PM UTC 24 |
| Finished | Oct 02 11:17:25 PM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1990910653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.1990910653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1310789869 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 58969904 ps |
| CPU time | 0.73 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310789869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.1310789869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.4085619182 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 166838054 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:17:22 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 226928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085619182 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.4085619182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1332273118 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 59577771 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332273118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.1332273118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.2073077768 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 89096462 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073077768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.2073077768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2575045151 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 66770457 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575045151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2575045151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.2485909565 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 176784027 ps |
| CPU time | 3.64 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485909565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.2485909565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1827529706 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 143376413 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:17:22 PM UTC 24 |
| Finished | Oct 02 11:17:31 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827529706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.1827529706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.976627683 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 260777966 ps |
| CPU time | 2.49 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 227876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=976627683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.976627683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.2806402632 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 785011262 ps |
| CPU time | 2.82 seconds |
| Started | Oct 02 11:17:17 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806402632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.2806402632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.494631906 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 51694402 ps |
| CPU time | 0.73 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:17:54 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494631906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.494631906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.3035532021 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 34954922 ps |
| CPU time | 0.63 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035532021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.3035532021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2344854577 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 113402086 ps |
| CPU time | 0.76 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344854577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.2344854577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1281380648 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 40147952 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281380648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1281380648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.3041716752 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 42842389 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:17:54 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041716752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.3041716752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.58419699 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 63646292 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=58419699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.58419699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2137728240 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 48317955 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137728240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.2137728240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.499992524 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 51283282 ps |
| CPU time | 0.65 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499992524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.499992524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1683219474 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 46269935 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683219474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.1683219474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.952175644 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 40618023 ps |
| CPU time | 0.74 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:17:55 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=952175644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.952175644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.2931662939 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 371287438 ps |
| CPU time | 3.27 seconds |
| Started | Oct 02 11:17:32 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 217540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931662939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.2931662939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2494524323 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 1759680240 ps |
| CPU time | 8.64 seconds |
| Started | Oct 02 11:17:25 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 217540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494524323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.2494524323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3007514320 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 159897597 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:17:23 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007514320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.3007514320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.3035678150 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 61248984 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 226780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035678150 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.3035678150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.42292106 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 98577715 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:17:23 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=42292106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_ reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.42292106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.161431398 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 41120301 ps |
| CPU time | 0.69 seconds |
| Started | Oct 02 11:17:23 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=161431398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.161431398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3269779112 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 114015950 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:17:23 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 226988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269779112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3269779112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3216595327 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 168520491 ps |
| CPU time | 3.51 seconds |
| Started | Oct 02 11:17:23 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216595327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.3216595327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.704211803 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 182507148 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=704211803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.704211803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.3018842149 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 133990758 ps |
| CPU time | 3.44 seconds |
| Started | Oct 02 11:17:22 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 227832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018842149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.3018842149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3787101030 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 361031584 ps |
| CPU time | 2.41 seconds |
| Started | Oct 02 11:17:23 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787101030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3787101030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.43117542 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 31091298 ps |
| CPU time | 0.65 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=43117542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.43117542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.1489154506 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 60432698 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489154506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.1489154506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3482663917 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 42696797 ps |
| CPU time | 0.66 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482663917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.3482663917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1231443996 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 73874214 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1231443996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.1231443996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.3384095411 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 86685396 ps |
| CPU time | 0.7 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:17:55 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384095411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.3384095411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.1716009281 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 55394040 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716009281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.1716009281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.2303812523 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 45381086 ps |
| CPU time | 0.62 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:17:55 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303812523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.2303812523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.3503272367 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 33166999 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503272367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.3503272367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1182891217 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 64095216 ps |
| CPU time | 0.71 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:06 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182891217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.1182891217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.99544351 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 66219857 ps |
| CPU time | 0.67 seconds |
| Started | Oct 02 11:17:53 PM UTC 24 |
| Finished | Oct 02 11:18:05 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=99544351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.99544351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3896626937 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 166693147 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 227056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896626937 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.3896626937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.2183223602 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 55252982 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183223602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.2183223602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.1457344819 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 37511994 ps |
| CPU time | 0.72 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457344819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.1457344819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.850820900 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 100236382 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=850820900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.850820900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2625672944 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 139314314 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 233128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625672944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.2625672944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.2625587408 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 379419448 ps |
| CPU time | 2.29 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:37 PM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625587408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.2625587408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.2528856125 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 102290199 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:17:34 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 226932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528856125 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.2528856125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.3757306208 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 138279084 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757306208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.3757306208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3706238074 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 53588878 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:35 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706238074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3706238074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2899518089 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 114825536 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:17:34 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899518089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2899518089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3146097121 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 67449323 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 233852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146097121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.3146097121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.36705334 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 741736070 ps |
| CPU time | 2.98 seconds |
| Started | Oct 02 11:17:33 PM UTC 24 |
| Finished | Oct 02 11:17:37 PM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=36705334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.36705334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2010277527 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 158776055 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 226908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010277527 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.2010277527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.1393273645 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 61565408 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:38 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393273645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.1393273645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.2193339704 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 49372019 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:38 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193339704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.2193339704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.3029359483 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 377535923 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029359483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.3029359483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.2318798410 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 135584461 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:17:34 PM UTC 24 |
| Finished | Oct 02 11:17:36 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318798410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.2318798410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2031113823 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 391297537 ps |
| CPU time | 2.07 seconds |
| Started | Oct 02 11:17:34 PM UTC 24 |
| Finished | Oct 02 11:17:37 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031113823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2031113823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2950265373 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 59896656 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 226976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950265373 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.2950265373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3961097785 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 55842663 ps |
| CPU time | 0.79 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:38 PM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961097785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3961097785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.2776806414 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 60781390 ps |
| CPU time | 0.73 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:38 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776806414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.2776806414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1064943672 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 328893942 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064943672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.1064943672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2256560903 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 70665463 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:17:36 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 226920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256560903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.2256560903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2837642865 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 123177228 ps |
| CPU time | 2.33 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:40 PM UTC 24 |
| Peak memory | 228088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837642865 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2837642865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2144049513 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 50992753 ps |
| CPU time | 0.76 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144049513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.2144049513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.525816588 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 45648583 ps |
| CPU time | 0.69 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:38 PM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525816588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.525816588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2780763418 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 140327626 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780763418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.2780763418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3011351158 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 127266496 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:39 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011351158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.3011351158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.4075262227 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 1130933725 ps |
| CPU time | 4.18 seconds |
| Started | Oct 02 11:17:37 PM UTC 24 |
| Finished | Oct 02 11:17:42 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075262227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.4075262227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.705744145 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 14712450904 ps |
| CPU time | 19.52 seconds |
| Started | Oct 02 10:57:57 PM UTC 24 |
| Finished | Oct 02 10:58:18 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705744145 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.705744145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2763617427 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 176492482 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 10:57:58 PM UTC 24 |
| Finished | Oct 02 10:58:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2763617427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.2763617427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.2855445545 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 452261895 ps |
| CPU time | 2.02 seconds |
| Started | Oct 02 10:57:59 PM UTC 24 |
| Finished | Oct 02 10:58:03 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855445545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.2855445545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.1989650798 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 810952880 ps |
| CPU time | 2.74 seconds |
| Started | Oct 02 10:58:01 PM UTC 24 |
| Finished | Oct 02 10:58:04 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989650798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.1989650798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.1556695637 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 609539389 ps |
| CPU time | 10.43 seconds |
| Started | Oct 02 10:58:01 PM UTC 24 |
| Finished | Oct 02 10:58:12 PM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556695637 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.1556695637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2457997599 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 975268658 ps |
| CPU time | 3.96 seconds |
| Started | Oct 02 10:58:02 PM UTC 24 |
| Finished | Oct 02 10:58:07 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457997599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.2457997599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2506232791 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 32954959 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 10:58:02 PM UTC 24 |
| Finished | Oct 02 10:58:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506232791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2506232791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.2280748026 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 93175737987 ps |
| CPU time | 186.7 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 11:01:13 PM UTC 24 |
| Peak memory | 220744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280748026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.2280748026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.577991903 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 99163785025 ps |
| CPU time | 190.7 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 11:01:17 PM UTC 24 |
| Peak memory | 221036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=577991903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_hiclk_max.577991903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.869009488 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 116119450445 ps |
| CPU time | 213.55 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 11:01:40 PM UTC 24 |
| Peak memory | 220704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=869009488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.869009488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.1649936562 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 99934444081 ps |
| CPU time | 189.31 seconds |
| Started | Oct 02 10:58:03 PM UTC 24 |
| Finished | Oct 02 11:01:16 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1649936562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.1649936562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.1743752597 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 100116907888 ps |
| CPU time | 214.2 seconds |
| Started | Oct 02 10:58:04 PM UTC 24 |
| Finished | Oct 02 11:01:42 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743752597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.1743752597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.4284256414 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 239380475 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 10:58:06 PM UTC 24 |
| Finished | Oct 02 10:58:08 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284256414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.4284256414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.3972413322 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 144603353 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 10:58:06 PM UTC 24 |
| Finished | Oct 02 10:58:08 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972413322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.3972413322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.4069709054 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 212289552 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 10:58:07 PM UTC 24 |
| Finished | Oct 02 10:58:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069709054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.4069709054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.470259116 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 5513128619 ps |
| CPU time | 41.4 seconds |
| Started | Oct 02 10:58:08 PM UTC 24 |
| Finished | Oct 02 10:58:51 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470259116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.470259116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.2751103603 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 162419114 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 10:58:08 PM UTC 24 |
| Finished | Oct 02 10:58:10 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751103603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.2751103603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.2709116466 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 500393064 ps |
| CPU time | 2.37 seconds |
| Started | Oct 02 10:58:08 PM UTC 24 |
| Finished | Oct 02 10:58:11 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709116466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.2709116466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.2377834103 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 29983876942 ps |
| CPU time | 50.15 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 10:59:01 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2377834103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.2377834103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.584332080 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 9135505107 ps |
| CPU time | 14.66 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 10:58:25 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=584332080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_suspend.584332080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.979894653 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 2595653228 ps |
| CPU time | 25.42 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 10:58:36 PM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979894653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.979894653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.3564441557 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 245095239 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 10:58:12 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564441557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.3564441557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.887196617 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 190762275 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 10:58:12 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887196617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.887196617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1763299971 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 3931708579 ps |
| CPU time | 109.65 seconds |
| Started | Oct 02 10:58:09 PM UTC 24 |
| Finished | Oct 02 11:00:01 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763299971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1763299971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.3097921533 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2612063161 ps |
| CPU time | 19.33 seconds |
| Started | Oct 02 10:58:11 PM UTC 24 |
| Finished | Oct 02 10:58:31 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097921533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.3097921533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.1470636456 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 185025215 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 10:58:12 PM UTC 24 |
| Finished | Oct 02 10:58:14 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470636456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.1470636456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.366349098 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 153542353 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 10:58:12 PM UTC 24 |
| Finished | Oct 02 10:58:14 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366349098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.366349098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1461232507 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 515486616 ps |
| CPU time | 2.18 seconds |
| Started | Oct 02 10:58:13 PM UTC 24 |
| Finished | Oct 02 10:58:16 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461232507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1461232507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.1301699579 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 219068906 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 10:58:13 PM UTC 24 |
| Finished | Oct 02 10:58:15 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301699579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.1301699579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.1873249926 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 182414729 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 10:58:13 PM UTC 24 |
| Finished | Oct 02 10:58:15 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873249926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.1873249926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.1251806073 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 149335540 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 10:58:13 PM UTC 24 |
| Finished | Oct 02 10:58:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251806073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.1251806073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.1941221755 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 196648296 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 10:58:14 PM UTC 24 |
| Finished | Oct 02 10:58:17 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941221755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.1941221755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.3440336698 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 268322758 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 10:58:15 PM UTC 24 |
| Finished | Oct 02 10:58:18 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440336698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.3440336698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.494641771 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 314027354 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 10:58:15 PM UTC 24 |
| Finished | Oct 02 10:58:18 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494641771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.494641771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.1914879807 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 217778655 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 10:58:16 PM UTC 24 |
| Finished | Oct 02 10:58:19 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914879807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.1914879807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2786464051 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 33756363 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 10:58:17 PM UTC 24 |
| Finished | Oct 02 10:58:19 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786464051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2786464051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.173346318 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 179111316 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 10:58:17 PM UTC 24 |
| Finished | Oct 02 10:58:19 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173346318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_pkt_sent.173346318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3843243184 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 10256678072 ps |
| CPU time | 168.16 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 11:01:10 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3843243184 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3843243184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.3996783065 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 3227179145 ps |
| CPU time | 24.06 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:44 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996783065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.3996783065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.1520947814 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 5557323755 ps |
| CPU time | 23.29 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:44 PM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520947814 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.1520947814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.227285060 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 206650516 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 10:58:18 PM UTC 24 |
| Finished | Oct 02 10:58:20 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227285060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_random_length_in_transaction.227285060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.4099023580 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 179456588 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:21 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099023580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.4099023580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.596726859 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 20176744139 ps |
| CPU time | 27.12 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:47 PM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596726859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_resume_link_active.596726859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.4013374912 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 333160724 ps |
| CPU time | 2.11 seconds |
| Started | Oct 02 10:58:19 PM UTC 24 |
| Finished | Oct 02 10:58:22 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013374912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.4013374912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.2635290045 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 209663023 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 10:58:20 PM UTC 24 |
| Finished | Oct 02 10:58:23 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635290045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.2635290045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.3728744032 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 167739549 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 10:58:20 PM UTC 24 |
| Finished | Oct 02 10:58:23 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728744032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.3728744032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.2759633163 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 204031022 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 10:58:22 PM UTC 24 |
| Finished | Oct 02 10:58:25 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759633163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.2759633163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.2165611314 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 2331025239 ps |
| CPU time | 18.13 seconds |
| Started | Oct 02 10:58:22 PM UTC 24 |
| Finished | Oct 02 10:58:41 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165611314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.2165611314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.2703721773 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 173068837 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 10:58:23 PM UTC 24 |
| Finished | Oct 02 10:58:25 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703721773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.2703721773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.1547742607 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 1009500824 ps |
| CPU time | 4.56 seconds |
| Started | Oct 02 10:58:23 PM UTC 24 |
| Finished | Oct 02 10:58:29 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547742607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.1547742607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.145357031 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 1666702775 ps |
| CPU time | 12.01 seconds |
| Started | Oct 02 10:58:23 PM UTC 24 |
| Finished | Oct 02 10:58:36 PM UTC 24 |
| Peak memory | 234696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=145357031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_streaming_out.145357031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.2448871785 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 1093403234 ps |
| CPU time | 9.88 seconds |
| Started | Oct 02 10:58:02 PM UTC 24 |
| Finished | Oct 02 10:58:13 PM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448871785 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.2448871785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.1185218438 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 483874694 ps |
| CPU time | 2.57 seconds |
| Started | Oct 02 10:58:24 PM UTC 24 |
| Finished | Oct 02 10:58:28 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1185218438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.1185218438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.2172190492 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 53397985 ps |
| CPU time | 0.72 seconds |
| Started | Oct 02 10:58:54 PM UTC 24 |
| Finished | Oct 02 10:58:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172190492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.2172190492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.4223724299 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 4108302031 ps |
| CPU time | 11.3 seconds |
| Started | Oct 02 10:58:25 PM UTC 24 |
| Finished | Oct 02 10:58:38 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223724299 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.4223724299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.2727905154 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 28343820389 ps |
| CPU time | 46.69 seconds |
| Started | Oct 02 10:58:27 PM UTC 24 |
| Finished | Oct 02 10:59:15 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727905154 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.2727905154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.383656448 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 217327562 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 10:58:27 PM UTC 24 |
| Finished | Oct 02 10:58:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383656448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_buffer.383656448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.2439477825 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 155321136 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 10:58:27 PM UTC 24 |
| Finished | Oct 02 10:58:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439477825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.2439477825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3546226640 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 144786146 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 10:58:29 PM UTC 24 |
| Finished | Oct 02 10:58:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546226640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.3546226640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.296944230 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 478813642 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 10:58:29 PM UTC 24 |
| Finished | Oct 02 10:58:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=296944230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_data_toggle_clear.296944230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.641381797 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 3811165946 ps |
| CPU time | 25.23 seconds |
| Started | Oct 02 10:58:30 PM UTC 24 |
| Finished | Oct 02 10:58:57 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=641381797 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.641381797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.1618140638 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 572833086 ps |
| CPU time | 2.71 seconds |
| Started | Oct 02 10:58:30 PM UTC 24 |
| Finished | Oct 02 10:58:34 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618140638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.1618140638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3102464693 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 165671011 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 10:58:30 PM UTC 24 |
| Finished | Oct 02 10:58:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102464693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.3102464693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3126692554 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 33705962 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 10:58:31 PM UTC 24 |
| Finished | Oct 02 10:58:33 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126692554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3126692554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.970866516 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 751151663 ps |
| CPU time | 3.83 seconds |
| Started | Oct 02 10:58:31 PM UTC 24 |
| Finished | Oct 02 10:58:36 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970866516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.970866516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.2710580291 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 186376493 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 10:58:32 PM UTC 24 |
| Finished | Oct 02 10:58:34 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710580291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.2710580291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.934919038 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 290214677 ps |
| CPU time | 2.47 seconds |
| Started | Oct 02 10:58:33 PM UTC 24 |
| Finished | Oct 02 10:58:36 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=934919038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_fifo_rst.934919038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2622555335 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 85166930969 ps |
| CPU time | 166.44 seconds |
| Started | Oct 02 10:58:33 PM UTC 24 |
| Finished | Oct 02 11:01:22 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622555335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.2622555335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.2416722787 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 92296228503 ps |
| CPU time | 155.47 seconds |
| Started | Oct 02 10:58:34 PM UTC 24 |
| Finished | Oct 02 11:01:12 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2416722787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.2416722787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.2264389262 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 109097804293 ps |
| CPU time | 211.72 seconds |
| Started | Oct 02 10:58:34 PM UTC 24 |
| Finished | Oct 02 11:02:09 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264389262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.2264389262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.216598645 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 84973508548 ps |
| CPU time | 167.44 seconds |
| Started | Oct 02 10:58:34 PM UTC 24 |
| Finished | Oct 02 11:01:24 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=216598645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_loclk_max.216598645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.2259142396 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 101156057438 ps |
| CPU time | 183.06 seconds |
| Started | Oct 02 10:58:34 PM UTC 24 |
| Finished | Oct 02 11:01:40 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259142396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.2259142396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.355174966 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 239141661 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 10:58:35 PM UTC 24 |
| Finished | Oct 02 10:58:38 PM UTC 24 |
| Peak memory | 226096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=355174966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.355174966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.2559060101 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 176203374 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 10:58:35 PM UTC 24 |
| Finished | Oct 02 10:58:38 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559060101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.2559060101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.2029041802 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 198853786 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 10:58:35 PM UTC 24 |
| Finished | Oct 02 10:58:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029041802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.2029041802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.293946997 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 3706840159 ps |
| CPU time | 106.47 seconds |
| Started | Oct 02 10:58:35 PM UTC 24 |
| Finished | Oct 02 11:00:24 PM UTC 24 |
| Peak memory | 230704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293946997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.293946997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.1623416395 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 211096918 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 10:58:37 PM UTC 24 |
| Finished | Oct 02 10:58:39 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623416395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.1623416395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2531039562 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 7370264837 ps |
| CPU time | 14.79 seconds |
| Started | Oct 02 10:58:38 PM UTC 24 |
| Finished | Oct 02 10:58:54 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531039562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.2531039562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.1191565497 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 9213134693 ps |
| CPU time | 13.65 seconds |
| Started | Oct 02 10:58:38 PM UTC 24 |
| Finished | Oct 02 10:58:52 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191565497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.1191565497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1983167408 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 4156856462 ps |
| CPU time | 30.35 seconds |
| Started | Oct 02 10:58:39 PM UTC 24 |
| Finished | Oct 02 10:59:11 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983167408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1983167408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3932214364 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 243148894 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 10:58:39 PM UTC 24 |
| Finished | Oct 02 10:58:41 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932214364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.3932214364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.701008590 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 188524843 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 10:58:39 PM UTC 24 |
| Finished | Oct 02 10:58:42 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701008590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.701008590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3394689069 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 2411996222 ps |
| CPU time | 24.69 seconds |
| Started | Oct 02 10:58:39 PM UTC 24 |
| Finished | Oct 02 10:59:05 PM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394689069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.3394689069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.1039439102 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 1963376540 ps |
| CPU time | 56.01 seconds |
| Started | Oct 02 10:58:40 PM UTC 24 |
| Finished | Oct 02 10:59:38 PM UTC 24 |
| Peak memory | 230276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039439102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.1039439102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.3460870435 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 2078851361 ps |
| CPU time | 19.24 seconds |
| Started | Oct 02 10:58:40 PM UTC 24 |
| Finished | Oct 02 10:59:01 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460870435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3460870435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.1294157358 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 157012574 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 10:58:40 PM UTC 24 |
| Finished | Oct 02 10:58:43 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294157358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.1294157358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.1578770618 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 161365664 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 10:58:42 PM UTC 24 |
| Finished | Oct 02 10:58:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578770618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.1578770618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2431806521 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 140177457 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 10:58:43 PM UTC 24 |
| Finished | Oct 02 10:58:45 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431806521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.2431806521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.4030571519 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 155516308 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 10:58:43 PM UTC 24 |
| Finished | Oct 02 10:58:45 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030571519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.4030571519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.2824327662 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 153160120 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 10:58:44 PM UTC 24 |
| Finished | Oct 02 10:58:46 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824327662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.2824327662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.408543139 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 160389778 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 10:58:44 PM UTC 24 |
| Finished | Oct 02 10:58:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=408543139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.408543139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2966909686 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 211851423 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 10:58:45 PM UTC 24 |
| Finished | Oct 02 10:58:47 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966909686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2966909686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.4288722230 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 229176311 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 10:58:45 PM UTC 24 |
| Finished | Oct 02 10:58:48 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288722230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.4288722230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.291176275 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 156943952 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 10:58:45 PM UTC 24 |
| Finished | Oct 02 10:58:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291176275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.291176275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.2593185742 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 19930895774 ps |
| CPU time | 59.56 seconds |
| Started | Oct 02 10:58:46 PM UTC 24 |
| Finished | Oct 02 10:59:47 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593185742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.2593185742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.562218590 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 169922520 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 10:58:46 PM UTC 24 |
| Finished | Oct 02 10:58:48 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=562218590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_pkt_received.562218590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.1520098477 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 238569493 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 10:58:46 PM UTC 24 |
| Finished | Oct 02 10:58:49 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520098477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.1520098477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.854258435 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 10929608119 ps |
| CPU time | 80.3 seconds |
| Started | Oct 02 10:58:47 PM UTC 24 |
| Finished | Oct 02 11:00:09 PM UTC 24 |
| Peak memory | 234980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854258435 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.854258435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3776765969 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 11203542234 ps |
| CPU time | 68.53 seconds |
| Started | Oct 02 10:58:48 PM UTC 24 |
| Finished | Oct 02 10:59:58 PM UTC 24 |
| Peak memory | 234828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776765969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3776765969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.456481886 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 6024312137 ps |
| CPU time | 31.57 seconds |
| Started | Oct 02 10:58:48 PM UTC 24 |
| Finished | Oct 02 10:59:21 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456481886 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.456481886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.3320709976 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 235769538 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 10:58:46 PM UTC 24 |
| Finished | Oct 02 10:58:49 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3320709976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.3320709976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.581898987 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 189695566 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 10:58:47 PM UTC 24 |
| Finished | Oct 02 10:58:49 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581898987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.581898987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.2495965094 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 20165009364 ps |
| CPU time | 28.54 seconds |
| Started | Oct 02 10:58:48 PM UTC 24 |
| Finished | Oct 02 10:59:17 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495965094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.2495965094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.774223608 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 150166798 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 10:58:48 PM UTC 24 |
| Finished | Oct 02 10:58:50 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774223608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_crc_err.774223608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1763221134 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 279542473 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 10:58:49 PM UTC 24 |
| Finished | Oct 02 10:58:52 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763221134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.1763221134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2536773271 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 251155147 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 10:58:49 PM UTC 24 |
| Finished | Oct 02 10:58:52 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536773271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.2536773271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.758036596 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 363697394 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 10:58:54 PM UTC 24 |
| Finished | Oct 02 10:58:57 PM UTC 24 |
| Peak memory | 250628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758036596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.758036596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2574663572 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 459035733 ps |
| CPU time | 2.3 seconds |
| Started | Oct 02 10:58:49 PM UTC 24 |
| Finished | Oct 02 10:58:52 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574663572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2574663572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.3379512306 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 362186581 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 10:58:50 PM UTC 24 |
| Finished | Oct 02 10:58:53 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379512306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.3379512306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.210731243 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 151186541 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 10:58:50 PM UTC 24 |
| Finished | Oct 02 10:58:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210731243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_setup_stage.210731243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.552515850 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 184280176 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 10:58:50 PM UTC 24 |
| Finished | Oct 02 10:58:53 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552515850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_setup_trans_ignored.552515850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.2104143040 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 225039028 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 10:58:51 PM UTC 24 |
| Finished | Oct 02 10:58:54 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104143040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.2104143040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.4170279171 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 3237139851 ps |
| CPU time | 32.14 seconds |
| Started | Oct 02 10:58:51 PM UTC 24 |
| Finished | Oct 02 10:59:25 PM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170279171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.4170279171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.3439434020 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 180956677 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 10:58:52 PM UTC 24 |
| Finished | Oct 02 10:58:54 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439434020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.3439434020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.501918739 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 187186165 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 10:58:53 PM UTC 24 |
| Finished | Oct 02 10:58:55 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501918739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_stall_trans.501918739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.3823384556 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 802874397 ps |
| CPU time | 3 seconds |
| Started | Oct 02 10:58:53 PM UTC 24 |
| Finished | Oct 02 10:58:57 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823384556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.3823384556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.2068756330 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 2105873945 ps |
| CPU time | 63.99 seconds |
| Started | Oct 02 10:58:53 PM UTC 24 |
| Finished | Oct 02 10:59:58 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068756330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.2068756330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3702986206 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 7779048970 ps |
| CPU time | 42.37 seconds |
| Started | Oct 02 10:58:53 PM UTC 24 |
| Finished | Oct 02 10:59:37 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702986206 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.3702986206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.2038200596 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 4727405601 ps |
| CPU time | 42.64 seconds |
| Started | Oct 02 10:58:30 PM UTC 24 |
| Finished | Oct 02 10:59:14 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038200596 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.2038200596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.2982731357 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 572169369 ps |
| CPU time | 2.83 seconds |
| Started | Oct 02 10:58:53 PM UTC 24 |
| Finished | Oct 02 10:58:57 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2982731357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.2982731357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.2218245063 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 52589141 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:03:53 PM UTC 24 |
| Finished | Oct 02 11:03:55 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218245063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.2218245063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.3121872519 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 6512849026 ps |
| CPU time | 10.62 seconds |
| Started | Oct 02 11:03:31 PM UTC 24 |
| Finished | Oct 02 11:03:43 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121872519 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.3121872519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.419382929 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 18879777235 ps |
| CPU time | 27.62 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:04:02 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=419382929 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.419382929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.3933032719 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 25338991003 ps |
| CPU time | 33.86 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:04:08 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933032719 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.3933032719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.2031867844 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 185047773 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:36 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031867844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.2031867844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2893894404 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 149112375 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893894404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2893894404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.3605539727 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 439656101 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:36 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605539727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.3605539727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.274862027 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 840965545 ps |
| CPU time | 2.83 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:37 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=274862027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.274862027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.4092229995 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 34032452032 ps |
| CPU time | 64.19 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:04:39 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092229995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.4092229995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.1351268822 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 3754900399 ps |
| CPU time | 22.8 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:57 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351268822 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.1351268822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.2086377698 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 877185193 ps |
| CPU time | 2.63 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:37 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086377698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.2086377698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.2066852903 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 133915348 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:35 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066852903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.2066852903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_enable.3042232350 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 58780521 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:03:35 PM UTC 24 |
| Finished | Oct 02 11:03:37 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042232350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.3042232350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.3307666001 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 781387392 ps |
| CPU time | 3.63 seconds |
| Started | Oct 02 11:03:35 PM UTC 24 |
| Finished | Oct 02 11:03:40 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307666001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.3307666001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.798590082 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 195987507 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:03:35 PM UTC 24 |
| Finished | Oct 02 11:03:38 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=798590082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.798590082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.3778407238 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 557023342 ps |
| CPU time | 3.21 seconds |
| Started | Oct 02 11:03:35 PM UTC 24 |
| Finished | Oct 02 11:03:39 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778407238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.3778407238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.2108036229 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 209087127 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:03:37 PM UTC 24 |
| Finished | Oct 02 11:03:39 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108036229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2108036229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.3583475339 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 156976066 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:03:37 PM UTC 24 |
| Finished | Oct 02 11:03:39 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583475339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.3583475339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.2419221681 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 248932323 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:03:37 PM UTC 24 |
| Finished | Oct 02 11:03:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419221681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.2419221681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.1632372815 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 3915232319 ps |
| CPU time | 33.61 seconds |
| Started | Oct 02 11:03:36 PM UTC 24 |
| Finished | Oct 02 11:04:11 PM UTC 24 |
| Peak memory | 234784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632372815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.1632372815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.974653404 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 4326009677 ps |
| CPU time | 27.49 seconds |
| Started | Oct 02 11:03:37 PM UTC 24 |
| Finished | Oct 02 11:04:06 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=974653404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.974653404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.3956402054 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 179425412 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:03:37 PM UTC 24 |
| Finished | Oct 02 11:03:39 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956402054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.3956402054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.1330082282 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 25656383114 ps |
| CPU time | 35.98 seconds |
| Started | Oct 02 11:03:38 PM UTC 24 |
| Finished | Oct 02 11:04:16 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330082282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.1330082282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.2874682604 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 5574509319 ps |
| CPU time | 10.88 seconds |
| Started | Oct 02 11:03:38 PM UTC 24 |
| Finished | Oct 02 11:03:51 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874682604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.2874682604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.2370716313 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 4047452397 ps |
| CPU time | 37.33 seconds |
| Started | Oct 02 11:03:38 PM UTC 24 |
| Finished | Oct 02 11:04:18 PM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370716313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.2370716313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.2549502902 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 2469931783 ps |
| CPU time | 19.3 seconds |
| Started | Oct 02 11:03:38 PM UTC 24 |
| Finished | Oct 02 11:03:59 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549502902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.2549502902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.1296923825 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 241013161 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:03:38 PM UTC 24 |
| Finished | Oct 02 11:03:41 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296923825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.1296923825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.1943970912 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 219720356 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:03:41 PM UTC 24 |
| Finished | Oct 02 11:03:43 PM UTC 24 |
| Peak memory | 215368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943970912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.1943970912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.1546075372 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 2452911872 ps |
| CPU time | 68.46 seconds |
| Started | Oct 02 11:03:41 PM UTC 24 |
| Finished | Oct 02 11:04:51 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546075372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.1546075372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.768431888 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 2160240210 ps |
| CPU time | 55.2 seconds |
| Started | Oct 02 11:03:41 PM UTC 24 |
| Finished | Oct 02 11:04:38 PM UTC 24 |
| Peak memory | 230332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768431888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.768431888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.2622776999 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 165702597 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:03:41 PM UTC 24 |
| Finished | Oct 02 11:03:43 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622776999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.2622776999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.1670090920 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 157035558 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:03:42 PM UTC 24 |
| Finished | Oct 02 11:03:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670090920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.1670090920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.4164064494 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 177158281 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:03:42 PM UTC 24 |
| Finished | Oct 02 11:03:45 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164064494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.4164064494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.2865033987 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 154331505 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:03:43 PM UTC 24 |
| Finished | Oct 02 11:03:46 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865033987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.2865033987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.676260842 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 227237939 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:03:45 PM UTC 24 |
| Finished | Oct 02 11:03:47 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=676260842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_out_trans_nak.676260842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.2620392302 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 159880787 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:03:45 PM UTC 24 |
| Finished | Oct 02 11:03:47 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620392302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.2620392302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.3729638761 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 252629612 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:03:45 PM UTC 24 |
| Finished | Oct 02 11:03:48 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729638761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.3729638761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.1860008711 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 159102532 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:03:46 PM UTC 24 |
| Finished | Oct 02 11:03:49 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860008711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.1860008711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.1288147376 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 58231593 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:03:46 PM UTC 24 |
| Finished | Oct 02 11:03:48 PM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288147376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.1288147376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.1209986372 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 21517399650 ps |
| CPU time | 61.44 seconds |
| Started | Oct 02 11:03:46 PM UTC 24 |
| Finished | Oct 02 11:04:50 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209986372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.1209986372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.2920705694 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 184941524 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:03:46 PM UTC 24 |
| Finished | Oct 02 11:03:49 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920705694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.2920705694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.1583507367 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 222190990 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:03:47 PM UTC 24 |
| Finished | Oct 02 11:03:49 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583507367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.1583507367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.2559704975 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 152360382 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:03:48 PM UTC 24 |
| Finished | Oct 02 11:03:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559704975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.2559704975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.1989175956 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 159675102 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:03:48 PM UTC 24 |
| Finished | Oct 02 11:03:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989175956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.1989175956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.2664267192 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 20160265299 ps |
| CPU time | 28.83 seconds |
| Started | Oct 02 11:03:48 PM UTC 24 |
| Finished | Oct 02 11:04:18 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664267192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.2664267192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.1301036737 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 141199843 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:03:48 PM UTC 24 |
| Finished | Oct 02 11:03:50 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301036737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.1301036737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.3306699877 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 310304673 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:03:48 PM UTC 24 |
| Finished | Oct 02 11:03:51 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306699877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.3306699877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.428956403 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 154976109 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:03:50 PM UTC 24 |
| Finished | Oct 02 11:03:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428956403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_setup_stage.428956403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.1285705138 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 189202755 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:03:50 PM UTC 24 |
| Finished | Oct 02 11:03:52 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285705138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.1285705138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.3544716402 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 219246761 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:03:50 PM UTC 24 |
| Finished | Oct 02 11:03:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544716402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.3544716402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.3233760942 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 2547249651 ps |
| CPU time | 70.39 seconds |
| Started | Oct 02 11:03:50 PM UTC 24 |
| Finished | Oct 02 11:05:02 PM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233760942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.3233760942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.1067451167 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 213074058 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:03:50 PM UTC 24 |
| Finished | Oct 02 11:03:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067451167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.1067451167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.3608683118 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 178299824 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:03:51 PM UTC 24 |
| Finished | Oct 02 11:03:53 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608683118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.3608683118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.2608760139 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 673412098 ps |
| CPU time | 2.12 seconds |
| Started | Oct 02 11:03:51 PM UTC 24 |
| Finished | Oct 02 11:03:54 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608760139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.2608760139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.160222959 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 1966281431 ps |
| CPU time | 17.49 seconds |
| Started | Oct 02 11:03:51 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 234692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160222959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_streaming_out.160222959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.3975643923 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 3195340185 ps |
| CPU time | 21.93 seconds |
| Started | Oct 02 11:03:33 PM UTC 24 |
| Finished | Oct 02 11:03:56 PM UTC 24 |
| Peak memory | 218408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975643923 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.3975643923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.3661347890 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 557869806 ps |
| CPU time | 2.41 seconds |
| Started | Oct 02 11:03:51 PM UTC 24 |
| Finished | Oct 02 11:03:55 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3661347890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.3661347890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.868811953 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 358920102 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:14:51 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=868811953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.868811953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.3001846657 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 246435471 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:14:51 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001846657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.3001846657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.3168752221 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 636777926 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:14:52 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3168752221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.3168752221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.3602807485 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 448298133 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:14:52 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602807485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.3602807485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3496742166 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 529088105 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:14:52 PM UTC 24 |
| Finished | Oct 02 11:15:00 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3496742166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.3496742166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3276449880 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 537387657 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:14:52 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276449880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.3276449880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.708487635 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 171731809 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:14:53 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708487635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 102.usbdev_fifo_levels.708487635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1207367293 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 555844823 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:14:53 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1207367293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.1207367293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3073581566 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 369145411 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:14:53 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073581566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.3073581566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.4011572294 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 160861289 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:14:56 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011572294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.4011572294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.269784513 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 573846394 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:14:56 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=269784513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_t x_rx_disruption.269784513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.3840812755 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 589033426 ps |
| CPU time | 2.14 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3840812755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.3840812755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.1101781446 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 151367569 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101781446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.1101781446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.944350597 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 623011286 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=944350597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_t x_rx_disruption.944350597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.391261822 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 708989259 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=391261822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.391261822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3682970863 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 163677971 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682970863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.3682970863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.688915164 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 432746261 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=688915164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_t x_rx_disruption.688915164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2691258755 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 376901491 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2691258755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.2691258755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3098734898 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 247606273 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098734898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.3098734898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.1821137659 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 616626183 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1821137659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.1821137659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.1625007042 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 621078473 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625007042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.1625007042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2859554729 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 547986164 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:14:58 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2859554729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.2859554729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1460120418 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 494668343 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:15:00 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1460120418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.1460120418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.3189405844 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 46079516 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:04:13 PM UTC 24 |
| Finished | Oct 02 11:04:15 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189405844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.3189405844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3633925456 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 6915065680 ps |
| CPU time | 11.09 seconds |
| Started | Oct 02 11:03:53 PM UTC 24 |
| Finished | Oct 02 11:04:05 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633925456 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3633925456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.1808721238 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 14502216879 ps |
| CPU time | 23 seconds |
| Started | Oct 02 11:03:53 PM UTC 24 |
| Finished | Oct 02 11:04:17 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808721238 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.1808721238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.3029266395 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 25502784531 ps |
| CPU time | 35.82 seconds |
| Started | Oct 02 11:03:53 PM UTC 24 |
| Finished | Oct 02 11:04:30 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029266395 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.3029266395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.77341007 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 173750096 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:03:53 PM UTC 24 |
| Finished | Oct 02 11:03:56 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=77341007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_av_buffer.77341007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.3509759293 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 145218737 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:03:53 PM UTC 24 |
| Finished | Oct 02 11:03:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509759293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.3509759293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.2682861855 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 534085121 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:03:54 PM UTC 24 |
| Finished | Oct 02 11:03:58 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682861855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.2682861855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.2011482091 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 1026501688 ps |
| CPU time | 4.23 seconds |
| Started | Oct 02 11:03:55 PM UTC 24 |
| Finished | Oct 02 11:04:00 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011482091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.2011482091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.1802352191 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 41703698448 ps |
| CPU time | 76.41 seconds |
| Started | Oct 02 11:03:55 PM UTC 24 |
| Finished | Oct 02 11:05:13 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802352191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.1802352191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.3397092938 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 452329539 ps |
| CPU time | 8.54 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:04:06 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397092938 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.3397092938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.3993782727 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 723631217 ps |
| CPU time | 2.22 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:04:00 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993782727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.3993782727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.3956485516 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 144674206 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:03:59 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956485516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.3956485516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_enable.1183542877 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 30149768 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:03:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183542877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.1183542877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.3450579471 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 854822476 ps |
| CPU time | 3.48 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:04:01 PM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450579471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.3450579471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.388203443 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 188029615 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:03:59 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=388203443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.388203443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.2207765722 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 240228081 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:03:57 PM UTC 24 |
| Finished | Oct 02 11:04:01 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207765722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.2207765722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.1167072170 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 435735842 ps |
| CPU time | 2.75 seconds |
| Started | Oct 02 11:03:58 PM UTC 24 |
| Finished | Oct 02 11:04:02 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167072170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.1167072170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.3322628591 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 213563605 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:03:59 PM UTC 24 |
| Finished | Oct 02 11:04:02 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322628591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.3322628591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.2058732697 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 145496182 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:03:59 PM UTC 24 |
| Finished | Oct 02 11:04:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058732697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.2058732697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.3424177982 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 183778356 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:04:00 PM UTC 24 |
| Finished | Oct 02 11:04:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424177982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.3424177982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.1119987728 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 3573506801 ps |
| CPU time | 35.58 seconds |
| Started | Oct 02 11:03:59 PM UTC 24 |
| Finished | Oct 02 11:04:36 PM UTC 24 |
| Peak memory | 235136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119987728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.1119987728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.1518658734 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 12402324939 ps |
| CPU time | 78.29 seconds |
| Started | Oct 02 11:04:01 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518658734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.1518658734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.1475676242 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 237822196 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:04:01 PM UTC 24 |
| Finished | Oct 02 11:04:03 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475676242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.1475676242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.394539769 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 13477531097 ps |
| CPU time | 20.41 seconds |
| Started | Oct 02 11:04:01 PM UTC 24 |
| Finished | Oct 02 11:04:22 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=394539769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_resume.394539769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.3735478255 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 8332749508 ps |
| CPU time | 17.58 seconds |
| Started | Oct 02 11:04:01 PM UTC 24 |
| Finished | Oct 02 11:04:20 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735478255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.3735478255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3732304008 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 5362352742 ps |
| CPU time | 147.76 seconds |
| Started | Oct 02 11:04:01 PM UTC 24 |
| Finished | Oct 02 11:06:31 PM UTC 24 |
| Peak memory | 230832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732304008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3732304008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.4033963991 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 1860475235 ps |
| CPU time | 18.18 seconds |
| Started | Oct 02 11:04:01 PM UTC 24 |
| Finished | Oct 02 11:04:20 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033963991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.4033963991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.357651536 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 314738531 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:04:06 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357651536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.357651536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.1681555335 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 205994160 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:04:06 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681555335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.1681555335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.1514452289 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 2864915631 ps |
| CPU time | 75.38 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:05:20 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514452289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.1514452289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.700311908 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 2173181826 ps |
| CPU time | 22.23 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:04:27 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=700311908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.700311908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.4055050205 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 3080713412 ps |
| CPU time | 87.73 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:05:33 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055050205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.4055050205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.1602959180 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 153398930 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:04:05 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602959180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.1602959180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.191869403 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 159292072 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:04:03 PM UTC 24 |
| Finished | Oct 02 11:04:06 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191869403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.191869403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.4265589057 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 161861333 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:04:05 PM UTC 24 |
| Finished | Oct 02 11:04:07 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265589057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.4265589057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2942365857 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 188166901 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:04:05 PM UTC 24 |
| Finished | Oct 02 11:04:07 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942365857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2942365857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.2845126079 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 160773186 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:04:05 PM UTC 24 |
| Finished | Oct 02 11:04:07 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845126079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.2845126079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2305791225 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 144846852 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:04:06 PM UTC 24 |
| Finished | Oct 02 11:04:09 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305791225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.2305791225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.3579607745 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 233278893 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:04:06 PM UTC 24 |
| Finished | Oct 02 11:04:09 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579607745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.3579607745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.1974678558 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 142839197 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:04:06 PM UTC 24 |
| Finished | Oct 02 11:04:09 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974678558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.1974678558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.1888397752 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 57447193 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:04:06 PM UTC 24 |
| Finished | Oct 02 11:04:08 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888397752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1888397752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.2586773206 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 9831839497 ps |
| CPU time | 27.28 seconds |
| Started | Oct 02 11:04:06 PM UTC 24 |
| Finished | Oct 02 11:04:35 PM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586773206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.2586773206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.3623090990 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 144503973 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:04:08 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3623090990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.3623090990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.1485003542 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 211499401 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:04:08 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485003542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.1485003542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.788289581 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 187185123 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:04:08 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788289581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_random_length_in_transaction.788289581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.724424891 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 158065591 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:04:08 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724424891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.724424891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.963428094 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 20185676437 ps |
| CPU time | 30.9 seconds |
| Started | Oct 02 11:04:08 PM UTC 24 |
| Finished | Oct 02 11:04:40 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=963428094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_resume_link_active.963428094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.314039973 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 175165897 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:04:08 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=314039973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_rx_crc_err.314039973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.4194411106 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 258722963 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:04:09 PM UTC 24 |
| Finished | Oct 02 11:04:12 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194411106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.4194411106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.1535720378 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 146404763 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:04:09 PM UTC 24 |
| Finished | Oct 02 11:04:12 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535720378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.1535720378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.2637925565 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 143034445 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:04:09 PM UTC 24 |
| Finished | Oct 02 11:04:12 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637925565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.2637925565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.2364540279 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 205242131 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:04:09 PM UTC 24 |
| Finished | Oct 02 11:04:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364540279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.2364540279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.1328183013 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 3013666913 ps |
| CPU time | 27.69 seconds |
| Started | Oct 02 11:04:10 PM UTC 24 |
| Finished | Oct 02 11:04:39 PM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328183013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.1328183013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.2199813581 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 202947725 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:04:11 PM UTC 24 |
| Finished | Oct 02 11:04:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199813581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.2199813581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.3249982814 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 175640494 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:04:11 PM UTC 24 |
| Finished | Oct 02 11:04:14 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249982814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.3249982814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.2599611940 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 1320317013 ps |
| CPU time | 4.24 seconds |
| Started | Oct 02 11:04:11 PM UTC 24 |
| Finished | Oct 02 11:04:16 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599611940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.2599611940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.1032614242 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 3264590643 ps |
| CPU time | 30.89 seconds |
| Started | Oct 02 11:04:11 PM UTC 24 |
| Finished | Oct 02 11:04:43 PM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032614242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.1032614242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.2366184364 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 3755612625 ps |
| CPU time | 28.23 seconds |
| Started | Oct 02 11:03:56 PM UTC 24 |
| Finished | Oct 02 11:04:26 PM UTC 24 |
| Peak memory | 218428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366184364 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.2366184364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.2350597661 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 536805480 ps |
| CPU time | 2.48 seconds |
| Started | Oct 02 11:04:11 PM UTC 24 |
| Finished | Oct 02 11:04:15 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2350597661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.2350597661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2849728138 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 334154767 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:15:00 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849728138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2849728138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.264355154 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 458119607 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=264355154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_t x_rx_disruption.264355154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2706891748 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 502933532 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2706891748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2706891748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3933220103 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 275312930 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933220103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3933220103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3006954521 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 228642912 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006954521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.3006954521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.360508684 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 633015388 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:27 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=360508684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.360508684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.894869567 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 523835819 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:27 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=894869567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_t x_rx_disruption.894869567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1247001258 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 310581358 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247001258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.1247001258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.3694902189 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 171152863 ps |
| CPU time | 0.79 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694902189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.3694902189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1532563885 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 504515675 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1532563885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.1532563885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.426453904 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 615469748 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=426453904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_t x_rx_disruption.426453904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.3573511827 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 333246948 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573511827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.3573511827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.2405277948 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 478516431 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:15:03 PM UTC 24 |
| Finished | Oct 02 11:15:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2405277948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.2405277948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.3322230640 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 458608231 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:04 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322230640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.3322230640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.3804882194 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 413929243 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:15:04 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3804882194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.3804882194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.2183443458 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 210550373 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:15:04 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183443458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.2183443458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3961342589 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 160957455 ps |
| CPU time | 0.81 seconds |
| Started | Oct 02 11:15:04 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961342589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.3961342589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.215740867 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 33416159 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:04:33 PM UTC 24 |
| Finished | Oct 02 11:04:35 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=215740867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.215740867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.4059794740 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 9057741112 ps |
| CPU time | 18.56 seconds |
| Started | Oct 02 11:04:13 PM UTC 24 |
| Finished | Oct 02 11:04:33 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059794740 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.4059794740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.1118351423 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 19446729968 ps |
| CPU time | 30.16 seconds |
| Started | Oct 02 11:04:13 PM UTC 24 |
| Finished | Oct 02 11:04:44 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118351423 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.1118351423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.822496459 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 31118314149 ps |
| CPU time | 57.62 seconds |
| Started | Oct 02 11:04:13 PM UTC 24 |
| Finished | Oct 02 11:05:12 PM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=822496459 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.822496459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.144108925 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 199322931 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:04:13 PM UTC 24 |
| Finished | Oct 02 11:04:15 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144108925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_av_buffer.144108925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.3219729286 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 159174574 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:04:14 PM UTC 24 |
| Finished | Oct 02 11:04:17 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219729286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.3219729286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.70241397 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 341886125 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:04:14 PM UTC 24 |
| Finished | Oct 02 11:04:17 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=70241397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_clear.70241397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.1690744393 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 707777855 ps |
| CPU time | 2.59 seconds |
| Started | Oct 02 11:04:15 PM UTC 24 |
| Finished | Oct 02 11:04:18 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690744393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.1690744393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.2818474296 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 37990389839 ps |
| CPU time | 64.45 seconds |
| Started | Oct 02 11:04:15 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818474296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.2818474296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.2559938411 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 6709042616 ps |
| CPU time | 45.18 seconds |
| Started | Oct 02 11:04:15 PM UTC 24 |
| Finished | Oct 02 11:05:01 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559938411 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.2559938411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.2224541544 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 673789743 ps |
| CPU time | 3.01 seconds |
| Started | Oct 02 11:04:16 PM UTC 24 |
| Finished | Oct 02 11:04:20 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224541544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.2224541544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.1406663706 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 146417374 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:04:16 PM UTC 24 |
| Finished | Oct 02 11:04:18 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406663706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.1406663706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_enable.149163152 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 41090031 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:04:16 PM UTC 24 |
| Finished | Oct 02 11:04:18 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=149163152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.149163152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.707512035 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 839696418 ps |
| CPU time | 3.54 seconds |
| Started | Oct 02 11:04:16 PM UTC 24 |
| Finished | Oct 02 11:04:21 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707512035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.707512035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.4260894949 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 278497799 ps |
| CPU time | 2.32 seconds |
| Started | Oct 02 11:04:18 PM UTC 24 |
| Finished | Oct 02 11:04:21 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4260894949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.4260894949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.531600064 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 188673142 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:04:18 PM UTC 24 |
| Finished | Oct 02 11:04:20 PM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=531600064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.531600064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.60125116 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 136076181 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:04:19 PM UTC 24 |
| Finished | Oct 02 11:04:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=60125116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_in_stall.60125116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.1120887381 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 230326396 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:04:19 PM UTC 24 |
| Finished | Oct 02 11:04:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120887381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.1120887381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.2443906275 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 3740868135 ps |
| CPU time | 34.56 seconds |
| Started | Oct 02 11:04:18 PM UTC 24 |
| Finished | Oct 02 11:04:54 PM UTC 24 |
| Peak memory | 234132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443906275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2443906275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.2158999300 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 11526104484 ps |
| CPU time | 84.03 seconds |
| Started | Oct 02 11:04:20 PM UTC 24 |
| Finished | Oct 02 11:05:46 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158999300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.2158999300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.4004903129 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 249514129 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:04:20 PM UTC 24 |
| Finished | Oct 02 11:04:22 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004903129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.4004903129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.1249331883 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 33620161687 ps |
| CPU time | 60.38 seconds |
| Started | Oct 02 11:04:20 PM UTC 24 |
| Finished | Oct 02 11:05:22 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249331883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.1249331883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.4233258281 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 11276538850 ps |
| CPU time | 18.54 seconds |
| Started | Oct 02 11:04:20 PM UTC 24 |
| Finished | Oct 02 11:04:39 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233258281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.4233258281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.1657371965 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 3789758166 ps |
| CPU time | 106.77 seconds |
| Started | Oct 02 11:04:20 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657371965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.1657371965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.1287407669 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 2615360292 ps |
| CPU time | 68.29 seconds |
| Started | Oct 02 11:04:21 PM UTC 24 |
| Finished | Oct 02 11:05:31 PM UTC 24 |
| Peak memory | 234896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287407669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.1287407669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.946333055 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 254804897 ps |
| CPU time | 1.93 seconds |
| Started | Oct 02 11:04:21 PM UTC 24 |
| Finished | Oct 02 11:04:24 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=946333055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.946333055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.3276429336 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 203946405 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:04:21 PM UTC 24 |
| Finished | Oct 02 11:04:24 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276429336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3276429336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.2250971608 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 1922846696 ps |
| CPU time | 18.98 seconds |
| Started | Oct 02 11:04:21 PM UTC 24 |
| Finished | Oct 02 11:04:41 PM UTC 24 |
| Peak memory | 234688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250971608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.2250971608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.1943696076 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 1882145068 ps |
| CPU time | 17.71 seconds |
| Started | Oct 02 11:04:21 PM UTC 24 |
| Finished | Oct 02 11:04:40 PM UTC 24 |
| Peak memory | 234824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943696076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.1943696076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.3075713822 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 2478751940 ps |
| CPU time | 25.23 seconds |
| Started | Oct 02 11:04:22 PM UTC 24 |
| Finished | Oct 02 11:04:48 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075713822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.3075713822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.387334565 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 148609253 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:04:22 PM UTC 24 |
| Finished | Oct 02 11:04:24 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=387334565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.387334565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.3699174191 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 145094626 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:04:22 PM UTC 24 |
| Finished | Oct 02 11:04:24 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3699174191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.3699174191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.1340444951 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 184519665 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:04:23 PM UTC 24 |
| Finished | Oct 02 11:04:26 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340444951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.1340444951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.3001007680 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 171050204 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:04:23 PM UTC 24 |
| Finished | Oct 02 11:04:26 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001007680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.3001007680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.2942255960 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 167524749 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:04:23 PM UTC 24 |
| Finished | Oct 02 11:04:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942255960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.2942255960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.2722298443 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 160147724 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:04:23 PM UTC 24 |
| Finished | Oct 02 11:04:26 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722298443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.2722298443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.2938904492 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 264324203 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:04:26 PM UTC 24 |
| Finished | Oct 02 11:04:28 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938904492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.2938904492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.3655149699 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 141351923 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:04:26 PM UTC 24 |
| Finished | Oct 02 11:04:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655149699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.3655149699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2221595119 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 39543536 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:04:26 PM UTC 24 |
| Finished | Oct 02 11:04:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221595119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2221595119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.209245725 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 22693146880 ps |
| CPU time | 71.59 seconds |
| Started | Oct 02 11:04:26 PM UTC 24 |
| Finished | Oct 02 11:05:39 PM UTC 24 |
| Peak memory | 235172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209245725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_pkt_buffer.209245725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.2382776936 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 167256423 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:04:27 PM UTC 24 |
| Finished | Oct 02 11:04:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382776936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.2382776936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.3981733298 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 201101149 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:04:27 PM UTC 24 |
| Finished | Oct 02 11:04:30 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981733298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.3981733298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1554617830 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 179583102 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:04:27 PM UTC 24 |
| Finished | Oct 02 11:04:29 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554617830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.1554617830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.2117941282 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 186809060 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:04:27 PM UTC 24 |
| Finished | Oct 02 11:04:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117941282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.2117941282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.3179404049 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 20171282297 ps |
| CPU time | 30.75 seconds |
| Started | Oct 02 11:04:27 PM UTC 24 |
| Finished | Oct 02 11:04:59 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3179404049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.3179404049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.3217480630 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 164788891 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:04:27 PM UTC 24 |
| Finished | Oct 02 11:04:30 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217480630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.3217480630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.1944789382 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 381253668 ps |
| CPU time | 2.31 seconds |
| Started | Oct 02 11:04:29 PM UTC 24 |
| Finished | Oct 02 11:04:32 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944789382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.1944789382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.2950815177 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 156888790 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:04:29 PM UTC 24 |
| Finished | Oct 02 11:04:31 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950815177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.2950815177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.1031075381 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 183964361 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:04:29 PM UTC 24 |
| Finished | Oct 02 11:04:31 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1031075381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.1031075381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.1856070156 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 236338546 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:04:29 PM UTC 24 |
| Finished | Oct 02 11:04:31 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856070156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.1856070156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.467036795 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 1869838802 ps |
| CPU time | 48.39 seconds |
| Started | Oct 02 11:04:30 PM UTC 24 |
| Finished | Oct 02 11:05:20 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=467036795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.467036795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.713226517 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 158653958 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:04:31 PM UTC 24 |
| Finished | Oct 02 11:04:33 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=713226517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.713226517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.4223102788 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 172775207 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:04:31 PM UTC 24 |
| Finished | Oct 02 11:04:34 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223102788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.4223102788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.3369384261 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 813722542 ps |
| CPU time | 2.68 seconds |
| Started | Oct 02 11:04:31 PM UTC 24 |
| Finished | Oct 02 11:04:35 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369384261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.3369384261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.392038112 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 2367228961 ps |
| CPU time | 22 seconds |
| Started | Oct 02 11:04:31 PM UTC 24 |
| Finished | Oct 02 11:04:54 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=392038112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.392038112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.2092306636 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 740040436 ps |
| CPU time | 4.96 seconds |
| Started | Oct 02 11:04:16 PM UTC 24 |
| Finished | Oct 02 11:04:22 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092306636 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.2092306636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.2028758895 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 516084074 ps |
| CPU time | 2.18 seconds |
| Started | Oct 02 11:04:31 PM UTC 24 |
| Finished | Oct 02 11:04:35 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2028758895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.2028758895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.4096728332 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 156378826 ps |
| CPU time | 0.77 seconds |
| Started | Oct 02 11:15:05 PM UTC 24 |
| Finished | Oct 02 11:15:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096728332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.4096728332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.3275919483 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 574228105 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:15:05 PM UTC 24 |
| Finished | Oct 02 11:15:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3275919483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.3275919483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2309605256 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 623819475 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:15:05 PM UTC 24 |
| Finished | Oct 02 11:15:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2309605256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.2309605256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3456965419 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 157219706 ps |
| CPU time | 0.83 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456965419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.3456965419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.4222647951 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 438500307 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4222647951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.4222647951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.2264377973 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 465639121 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:16 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2264377973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.2264377973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3310646606 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 332214273 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:15:07 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310646606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3310646606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.99376500 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 154613539 ps |
| CPU time | 0.78 seconds |
| Started | Oct 02 11:15:08 PM UTC 24 |
| Finished | Oct 02 11:15:10 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99376500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 126.usbdev_fifo_levels.99376500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3915566607 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 485677126 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:15:11 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915566607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.3915566607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2156694763 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 145269774 ps |
| CPU time | 0.82 seconds |
| Started | Oct 02 11:15:11 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156694763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.2156694763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.1300151977 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 468617391 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:15:11 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1300151977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.1300151977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.3681791716 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 273531456 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:15:12 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681791716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.3681791716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.2959486232 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 261381034 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:15:12 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959486232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.2959486232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.819611953 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 618350180 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:15:12 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=819611953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_t x_rx_disruption.819611953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.2370145378 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 511099834 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:15:12 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370145378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.2370145378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.4054015137 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 237217002 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:15:12 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054015137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.4054015137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.4108950259 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 498862127 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:15:14 PM UTC 24 |
| Finished | Oct 02 11:15:27 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4108950259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.4108950259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.2291655955 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 35481101 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:04:52 PM UTC 24 |
| Finished | Oct 02 11:04:54 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291655955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.2291655955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.3643429643 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 5008941270 ps |
| CPU time | 9.05 seconds |
| Started | Oct 02 11:04:33 PM UTC 24 |
| Finished | Oct 02 11:04:43 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643429643 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.3643429643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.3708910695 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 19223632195 ps |
| CPU time | 24.76 seconds |
| Started | Oct 02 11:04:33 PM UTC 24 |
| Finished | Oct 02 11:04:59 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708910695 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3708910695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1425568962 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 24479776182 ps |
| CPU time | 37.75 seconds |
| Started | Oct 02 11:04:33 PM UTC 24 |
| Finished | Oct 02 11:05:12 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425568962 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.1425568962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.217141455 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 206730398 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:04:34 PM UTC 24 |
| Finished | Oct 02 11:04:36 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=217141455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_av_buffer.217141455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.4194457951 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 154603550 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:04:34 PM UTC 24 |
| Finished | Oct 02 11:04:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194457951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.4194457951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.2401464396 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 147798539 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:04:34 PM UTC 24 |
| Finished | Oct 02 11:04:37 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401464396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.2401464396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.2982941216 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 1189018296 ps |
| CPU time | 3.83 seconds |
| Started | Oct 02 11:04:36 PM UTC 24 |
| Finished | Oct 02 11:04:41 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982941216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.2982941216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.2753775865 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 3870262496 ps |
| CPU time | 34.5 seconds |
| Started | Oct 02 11:04:36 PM UTC 24 |
| Finished | Oct 02 11:05:12 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753775865 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.2753775865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.3949825008 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 1095501960 ps |
| CPU time | 3.04 seconds |
| Started | Oct 02 11:04:36 PM UTC 24 |
| Finished | Oct 02 11:04:40 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949825008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.3949825008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.1214682881 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 202193411 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:04:36 PM UTC 24 |
| Finished | Oct 02 11:04:38 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214682881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.1214682881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_enable.3398704595 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 39456336 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:04:37 PM UTC 24 |
| Finished | Oct 02 11:04:39 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398704595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.3398704595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.4280610203 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 962365076 ps |
| CPU time | 3.37 seconds |
| Started | Oct 02 11:04:37 PM UTC 24 |
| Finished | Oct 02 11:04:42 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280610203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.4280610203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.344362216 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 377788836 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:04:38 PM UTC 24 |
| Finished | Oct 02 11:04:40 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=344362216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.344362216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.2272017366 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 459802804 ps |
| CPU time | 3.17 seconds |
| Started | Oct 02 11:04:39 PM UTC 24 |
| Finished | Oct 02 11:04:43 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272017366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.2272017366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.1120498069 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 150494478 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:04:39 PM UTC 24 |
| Finished | Oct 02 11:04:41 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120498069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1120498069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.3939213810 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 160271355 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:04:39 PM UTC 24 |
| Finished | Oct 02 11:04:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939213810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.3939213810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.1191152530 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 215175457 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:04:43 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191152530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.1191152530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.766400982 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 4399621848 ps |
| CPU time | 41.24 seconds |
| Started | Oct 02 11:04:39 PM UTC 24 |
| Finished | Oct 02 11:05:22 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766400982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.766400982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.145344948 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 4506797551 ps |
| CPU time | 52.01 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:05:34 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145344948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.145344948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.2612124357 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 179383699 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:04:43 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612124357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.2612124357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.2956264792 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 10381489433 ps |
| CPU time | 21.01 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:05:03 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956264792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.2956264792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.1243533555 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 4155752534 ps |
| CPU time | 7.18 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:04:49 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243533555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.1243533555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.2934699138 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 3711401497 ps |
| CPU time | 34.57 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:05:17 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934699138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.2934699138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.1261937097 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 2514211791 ps |
| CPU time | 18.75 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:05:01 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261937097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.1261937097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.4005294945 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 299983089 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:04:41 PM UTC 24 |
| Finished | Oct 02 11:04:44 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005294945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.4005294945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.4056010232 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 204052772 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:04:43 PM UTC 24 |
| Finished | Oct 02 11:04:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056010232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.4056010232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.4103060439 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 1903754646 ps |
| CPU time | 20.8 seconds |
| Started | Oct 02 11:04:43 PM UTC 24 |
| Finished | Oct 02 11:05:05 PM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103060439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.4103060439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.2435315790 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 2087006387 ps |
| CPU time | 16.03 seconds |
| Started | Oct 02 11:04:43 PM UTC 24 |
| Finished | Oct 02 11:05:00 PM UTC 24 |
| Peak memory | 234760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435315790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.2435315790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.1643017909 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 2748355322 ps |
| CPU time | 26.6 seconds |
| Started | Oct 02 11:04:43 PM UTC 24 |
| Finished | Oct 02 11:05:11 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643017909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.1643017909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.1427767497 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 184232719 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:04:43 PM UTC 24 |
| Finished | Oct 02 11:04:45 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427767497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.1427767497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.3596540727 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 164983588 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:04:43 PM UTC 24 |
| Finished | Oct 02 11:04:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596540727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.3596540727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.2200669983 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 252191258 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:04:44 PM UTC 24 |
| Finished | Oct 02 11:04:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2200669983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.2200669983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.291952568 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 162685924 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:04:44 PM UTC 24 |
| Finished | Oct 02 11:04:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291952568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_out_iso.291952568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.67845029 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 176178094 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:04:44 PM UTC 24 |
| Finished | Oct 02 11:04:47 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67845029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_stall.67845029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.3732409635 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 143533861 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:04:44 PM UTC 24 |
| Finished | Oct 02 11:04:47 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732409635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.3732409635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.2737422326 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 148686775 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:04:44 PM UTC 24 |
| Finished | Oct 02 11:04:47 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737422326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.2737422326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.1089683619 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 233854051 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:04:46 PM UTC 24 |
| Finished | Oct 02 11:04:48 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089683619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.1089683619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2943318053 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 156657761 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:04:46 PM UTC 24 |
| Finished | Oct 02 11:04:48 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943318053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2943318053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.1430309210 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 68261214 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:04:46 PM UTC 24 |
| Finished | Oct 02 11:04:48 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430309210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.1430309210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.6289738 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 16731879889 ps |
| CPU time | 49.27 seconds |
| Started | Oct 02 11:04:46 PM UTC 24 |
| Finished | Oct 02 11:05:37 PM UTC 24 |
| Peak memory | 228312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6289738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_pkt_buffer.6289738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.3145372648 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 252577941 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:04:46 PM UTC 24 |
| Finished | Oct 02 11:04:49 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145372648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.3145372648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.141816932 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 226873376 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:04:46 PM UTC 24 |
| Finished | Oct 02 11:04:49 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141816932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_pkt_sent.141816932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.403970779 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 261323759 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:04:48 PM UTC 24 |
| Finished | Oct 02 11:04:50 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403970779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_random_length_in_transaction.403970779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.2577300421 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 190074949 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:04:48 PM UTC 24 |
| Finished | Oct 02 11:04:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577300421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.2577300421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.1831095972 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 20166629826 ps |
| CPU time | 29.02 seconds |
| Started | Oct 02 11:04:48 PM UTC 24 |
| Finished | Oct 02 11:05:18 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831095972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.1831095972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.1932087806 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 203652586 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:04:48 PM UTC 24 |
| Finished | Oct 02 11:04:50 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932087806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.1932087806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.2898761835 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 301992237 ps |
| CPU time | 2.03 seconds |
| Started | Oct 02 11:04:48 PM UTC 24 |
| Finished | Oct 02 11:04:51 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898761835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.2898761835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.1375262017 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 217243691 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:04:48 PM UTC 24 |
| Finished | Oct 02 11:04:50 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375262017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.1375262017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.2436795684 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 158133881 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:04:49 PM UTC 24 |
| Finished | Oct 02 11:04:52 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436795684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.2436795684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.3459137960 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 237999766 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:04:49 PM UTC 24 |
| Finished | Oct 02 11:04:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459137960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.3459137960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.4076401288 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 2100087551 ps |
| CPU time | 22.32 seconds |
| Started | Oct 02 11:04:49 PM UTC 24 |
| Finished | Oct 02 11:05:13 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076401288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.4076401288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.1214897464 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 198984767 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:04:49 PM UTC 24 |
| Finished | Oct 02 11:04:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214897464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.1214897464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.1167518543 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 165478792 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:04:50 PM UTC 24 |
| Finished | Oct 02 11:04:52 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167518543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.1167518543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.3791163820 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 1018772041 ps |
| CPU time | 4.5 seconds |
| Started | Oct 02 11:04:52 PM UTC 24 |
| Finished | Oct 02 11:04:57 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791163820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.3791163820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.2323828715 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 2957951013 ps |
| CPU time | 22.87 seconds |
| Started | Oct 02 11:04:50 PM UTC 24 |
| Finished | Oct 02 11:05:14 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2323828715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.2323828715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.526352307 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 4777179963 ps |
| CPU time | 42.3 seconds |
| Started | Oct 02 11:04:36 PM UTC 24 |
| Finished | Oct 02 11:05:20 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526352307 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.526352307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.2279437434 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 589103500 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:04:52 PM UTC 24 |
| Finished | Oct 02 11:04:54 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2279437434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.2279437434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1181964313 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 412272887 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:15:15 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181964313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1181964313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.2116382945 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 606516342 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:15:15 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2116382945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.2116382945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.1505481865 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 218387674 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:15:15 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505481865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.1505481865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.2395680546 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 154374054 ps |
| CPU time | 0.81 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:20 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395680546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.2395680546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.598245750 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 518692174 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=598245750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_t x_rx_disruption.598245750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.1481411781 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 176324681 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:20 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481411781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.1481411781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.3428975638 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 439679521 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3428975638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.3428975638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.2960418599 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 293980056 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 216148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960418599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.2960418599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.2964378673 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 272939367 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964378673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.2964378673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.601509053 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 500352995 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=601509053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_t x_rx_disruption.601509053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1066947885 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 779340528 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:15:17 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066947885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1066947885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.666182558 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 284656124 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666182558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 134.usbdev_fifo_levels.666182558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.4275033821 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 442774344 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4275033821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.4275033821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.4268636199 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 148597697 ps |
| CPU time | 0.78 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268636199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.4268636199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.2982343253 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 454563880 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2982343253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.2982343253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.4155438447 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 173916969 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155438447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.4155438447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.1085373285 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 177988908 ps |
| CPU time | 0.86 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085373285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.1085373285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.4036840646 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 602736225 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4036840646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.4036840646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.638485676 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 506783662 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=638485676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.638485676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.2520698391 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 574350586 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2520698391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.2520698391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.2216454245 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 449681141 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:15:18 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216454245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.2216454245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.1731054751 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 339744806 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:15:19 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731054751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 138.usbdev_fifo_levels.1731054751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.1432577906 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 494335364 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:15:19 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1432577906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.1432577906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.526730993 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 58488215 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:05:13 PM UTC 24 |
| Finished | Oct 02 11:05:16 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526730993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.526730993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.1334813622 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 8638606692 ps |
| CPU time | 13.16 seconds |
| Started | Oct 02 11:04:52 PM UTC 24 |
| Finished | Oct 02 11:05:06 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334813622 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.1334813622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3449737385 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 19383476264 ps |
| CPU time | 30.84 seconds |
| Started | Oct 02 11:04:52 PM UTC 24 |
| Finished | Oct 02 11:05:24 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449737385 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.3449737385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.3840861594 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 29065039652 ps |
| CPU time | 42.57 seconds |
| Started | Oct 02 11:04:52 PM UTC 24 |
| Finished | Oct 02 11:05:36 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840861594 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.3840861594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.366213284 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 144940279 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:04:53 PM UTC 24 |
| Finished | Oct 02 11:04:56 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366213284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_av_buffer.366213284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.316995360 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 141196638 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:04:53 PM UTC 24 |
| Finished | Oct 02 11:04:56 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=316995360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_bitstuff_err.316995360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.846974321 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 256257053 ps |
| CPU time | 1.9 seconds |
| Started | Oct 02 11:04:53 PM UTC 24 |
| Finished | Oct 02 11:04:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846974321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_data_toggle_clear.846974321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.3437055411 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 624422401 ps |
| CPU time | 2.38 seconds |
| Started | Oct 02 11:04:53 PM UTC 24 |
| Finished | Oct 02 11:04:57 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437055411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.3437055411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.1810587264 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 28836518334 ps |
| CPU time | 60.02 seconds |
| Started | Oct 02 11:04:53 PM UTC 24 |
| Finished | Oct 02 11:05:55 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810587264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1810587264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.3356152584 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 1276656271 ps |
| CPU time | 25.23 seconds |
| Started | Oct 02 11:04:55 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356152584 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.3356152584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.624870846 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 876751550 ps |
| CPU time | 3.77 seconds |
| Started | Oct 02 11:04:55 PM UTC 24 |
| Finished | Oct 02 11:05:00 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=624870846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.624870846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.2575538572 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 195489339 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:04:55 PM UTC 24 |
| Finished | Oct 02 11:04:58 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575538572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.2575538572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_enable.1791847484 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 36734642 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:04:55 PM UTC 24 |
| Finished | Oct 02 11:04:57 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791847484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.1791847484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3324475474 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 803595017 ps |
| CPU time | 2.57 seconds |
| Started | Oct 02 11:04:56 PM UTC 24 |
| Finished | Oct 02 11:05:00 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324475474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3324475474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.898229371 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 265090548 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:04:58 PM UTC 24 |
| Finished | Oct 02 11:05:01 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898229371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_fifo_levels.898229371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2327532727 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 293599601 ps |
| CPU time | 2.91 seconds |
| Started | Oct 02 11:04:58 PM UTC 24 |
| Finished | Oct 02 11:05:02 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327532727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.2327532727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.924077458 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 181293404 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:04:58 PM UTC 24 |
| Finished | Oct 02 11:05:00 PM UTC 24 |
| Peak memory | 226032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=924077458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.924077458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.2648895497 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 168165855 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:04:59 PM UTC 24 |
| Finished | Oct 02 11:05:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648895497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.2648895497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.3182146606 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 234580132 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:05:00 PM UTC 24 |
| Finished | Oct 02 11:05:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182146606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.3182146606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1317368836 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 3612860958 ps |
| CPU time | 97.07 seconds |
| Started | Oct 02 11:04:58 PM UTC 24 |
| Finished | Oct 02 11:06:37 PM UTC 24 |
| Peak memory | 230672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317368836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1317368836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.508499447 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 5633496208 ps |
| CPU time | 39.97 seconds |
| Started | Oct 02 11:05:01 PM UTC 24 |
| Finished | Oct 02 11:05:42 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=508499447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.508499447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.2841985426 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 166679862 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:05:01 PM UTC 24 |
| Finished | Oct 02 11:05:03 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841985426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.2841985426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.1579013030 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 6924031709 ps |
| CPU time | 14.96 seconds |
| Started | Oct 02 11:05:01 PM UTC 24 |
| Finished | Oct 02 11:05:17 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579013030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.1579013030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.3976021788 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 10787215828 ps |
| CPU time | 21.58 seconds |
| Started | Oct 02 11:05:01 PM UTC 24 |
| Finished | Oct 02 11:05:24 PM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976021788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.3976021788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.1319412557 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 4001207116 ps |
| CPU time | 106.64 seconds |
| Started | Oct 02 11:05:01 PM UTC 24 |
| Finished | Oct 02 11:06:50 PM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319412557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.1319412557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.2008662866 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 1755406807 ps |
| CPU time | 16.68 seconds |
| Started | Oct 02 11:05:02 PM UTC 24 |
| Finished | Oct 02 11:05:20 PM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008662866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.2008662866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.2735182055 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 246439865 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:05:02 PM UTC 24 |
| Finished | Oct 02 11:05:05 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735182055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.2735182055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.3391736210 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 203738821 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:05:02 PM UTC 24 |
| Finished | Oct 02 11:05:05 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391736210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.3391736210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.2159829638 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 2007666777 ps |
| CPU time | 50.52 seconds |
| Started | Oct 02 11:05:02 PM UTC 24 |
| Finished | Oct 02 11:05:54 PM UTC 24 |
| Peak memory | 228152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159829638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.2159829638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.595571504 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 3460141931 ps |
| CPU time | 89.31 seconds |
| Started | Oct 02 11:05:02 PM UTC 24 |
| Finished | Oct 02 11:06:34 PM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=595571504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.595571504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.4186058110 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 4479761481 ps |
| CPU time | 120.66 seconds |
| Started | Oct 02 11:05:02 PM UTC 24 |
| Finished | Oct 02 11:07:05 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186058110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.4186058110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.1979438228 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 159420760 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:05:04 PM UTC 24 |
| Finished | Oct 02 11:05:06 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979438228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1979438228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.1424371675 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 137267360 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:05:04 PM UTC 24 |
| Finished | Oct 02 11:05:06 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424371675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.1424371675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2595610248 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 234992029 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:05:04 PM UTC 24 |
| Finished | Oct 02 11:05:07 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595610248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2595610248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.486899134 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 192566243 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:05:04 PM UTC 24 |
| Finished | Oct 02 11:05:07 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=486899134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_out_stall.486899134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.1078634434 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 176422105 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:05:05 PM UTC 24 |
| Finished | Oct 02 11:05:09 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078634434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.1078634434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.2423371414 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 177605223 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:05:05 PM UTC 24 |
| Finished | Oct 02 11:05:09 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423371414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.2423371414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.936308504 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 243674664 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:05:06 PM UTC 24 |
| Finished | Oct 02 11:05:09 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936308504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.936308504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.2089413568 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 30360621 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:05:07 PM UTC 24 |
| Finished | Oct 02 11:05:09 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089413568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2089413568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.3846192279 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 20105328674 ps |
| CPU time | 53.13 seconds |
| Started | Oct 02 11:05:08 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 232480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846192279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.3846192279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2355126661 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 195101634 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:05:08 PM UTC 24 |
| Finished | Oct 02 11:05:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355126661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2355126661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.818266574 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 244560765 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:05:08 PM UTC 24 |
| Finished | Oct 02 11:05:11 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818266574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_pkt_sent.818266574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.395640289 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 203812455 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:05:08 PM UTC 24 |
| Finished | Oct 02 11:05:11 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395640289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_random_length_in_transaction.395640289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.1513301452 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 167377336 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:05:08 PM UTC 24 |
| Finished | Oct 02 11:05:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513301452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.1513301452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.87452565 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 20162867378 ps |
| CPU time | 29.13 seconds |
| Started | Oct 02 11:05:10 PM UTC 24 |
| Finished | Oct 02 11:05:40 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=87452565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_resume_link_active.87452565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.415487082 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 150731930 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:05:10 PM UTC 24 |
| Finished | Oct 02 11:05:12 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415487082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_rx_crc_err.415487082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.1202460966 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 277568993 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:05:10 PM UTC 24 |
| Finished | Oct 02 11:05:13 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202460966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.1202460966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.1011878521 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 146525970 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:05:10 PM UTC 24 |
| Finished | Oct 02 11:05:12 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011878521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.1011878521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.3864721950 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 164502661 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:05:10 PM UTC 24 |
| Finished | Oct 02 11:05:13 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864721950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.3864721950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.2004738339 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 250601276 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:05:11 PM UTC 24 |
| Finished | Oct 02 11:05:15 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004738339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.2004738339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.3171951548 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 2035373904 ps |
| CPU time | 50.17 seconds |
| Started | Oct 02 11:05:11 PM UTC 24 |
| Finished | Oct 02 11:06:04 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171951548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.3171951548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.1354318373 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 173045234 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:05:13 PM UTC 24 |
| Finished | Oct 02 11:05:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1354318373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.1354318373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.400222053 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 177109630 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:05:13 PM UTC 24 |
| Finished | Oct 02 11:05:16 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400222053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_stall_trans.400222053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.1225859552 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 439746182 ps |
| CPU time | 2.32 seconds |
| Started | Oct 02 11:05:13 PM UTC 24 |
| Finished | Oct 02 11:05:17 PM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225859552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.1225859552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.2131055462 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 2675177346 ps |
| CPU time | 66.79 seconds |
| Started | Oct 02 11:05:13 PM UTC 24 |
| Finished | Oct 02 11:06:22 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131055462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.2131055462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.2008585789 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 7758930305 ps |
| CPU time | 50.92 seconds |
| Started | Oct 02 11:04:55 PM UTC 24 |
| Finished | Oct 02 11:05:47 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008585789 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.2008585789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.1492562312 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 608739849 ps |
| CPU time | 2.61 seconds |
| Started | Oct 02 11:05:13 PM UTC 24 |
| Finished | Oct 02 11:05:17 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1492562312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.1492562312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3059533369 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 592658554 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:15:24 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3059533369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.3059533369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.907073509 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 507382557 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=907073509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.907073509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.127176947 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 275242527 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=127176947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 141.usbdev_fifo_levels.127176947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.2715763626 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 455580098 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2715763626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.2715763626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.759902507 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 308220750 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=759902507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.759902507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.3602641897 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 640110875 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3602641897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.3602641897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.3391705012 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 440701775 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:15:26 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391705012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.3391705012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.2093852570 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 613157131 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2093852570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.2093852570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.2116654457 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 149714323 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116654457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.2116654457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3838721842 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 191969754 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3838721842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3838721842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.2500726108 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 567286296 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2500726108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.2500726108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.1352988213 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 337206998 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:15:28 PM UTC 24 |
| Finished | Oct 02 11:15:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352988213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.1352988213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.3496050220 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 469503080 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3496050220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.3496050220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.363157417 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 174807303 ps |
| CPU time | 0.85 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=363157417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 149.usbdev_fifo_levels.363157417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3602619803 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 508199270 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:42 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3602619803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3602619803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.2705650557 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 36718633 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:05:31 PM UTC 24 |
| Finished | Oct 02 11:05:33 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705650557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.2705650557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.3743640693 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 11696520877 ps |
| CPU time | 15.63 seconds |
| Started | Oct 02 11:05:15 PM UTC 24 |
| Finished | Oct 02 11:05:32 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743640693 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.3743640693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.1897247630 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 15758978761 ps |
| CPU time | 20.06 seconds |
| Started | Oct 02 11:05:15 PM UTC 24 |
| Finished | Oct 02 11:05:37 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897247630 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.1897247630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.3500013849 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 25257040532 ps |
| CPU time | 37.88 seconds |
| Started | Oct 02 11:05:15 PM UTC 24 |
| Finished | Oct 02 11:05:55 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500013849 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.3500013849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.2848478443 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 157976985 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:05:16 PM UTC 24 |
| Finished | Oct 02 11:05:18 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848478443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.2848478443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.1622231308 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 142427468 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:05:16 PM UTC 24 |
| Finished | Oct 02 11:05:18 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622231308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.1622231308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.1987296590 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 256580818 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:05:16 PM UTC 24 |
| Finished | Oct 02 11:05:18 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987296590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.1987296590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3653938297 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 1108647552 ps |
| CPU time | 4.09 seconds |
| Started | Oct 02 11:05:16 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653938297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3653938297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.3787413388 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 25802088377 ps |
| CPU time | 56.05 seconds |
| Started | Oct 02 11:05:17 PM UTC 24 |
| Finished | Oct 02 11:06:15 PM UTC 24 |
| Peak memory | 218500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787413388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.3787413388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1785843510 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 2930402455 ps |
| CPU time | 24.21 seconds |
| Started | Oct 02 11:05:17 PM UTC 24 |
| Finished | Oct 02 11:05:43 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785843510 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1785843510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.3515022214 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 698097445 ps |
| CPU time | 2.03 seconds |
| Started | Oct 02 11:05:17 PM UTC 24 |
| Finished | Oct 02 11:05:20 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515022214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.3515022214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.2195158622 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 138240145 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2195158622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.2195158622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_enable.3687436339 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 39876124 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687436339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.3687436339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.1839573946 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 840169900 ps |
| CPU time | 2.63 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:23 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839573946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.1839573946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.1975810950 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 307668484 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975810950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1975810950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.3440560952 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 197445258 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:22 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440560952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.3440560952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.1721791265 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 438319575 ps |
| CPU time | 3.46 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:24 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721791265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.1721791265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.526521885 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 154030194 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:05:21 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526521885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.526521885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.2185648906 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 178115460 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:05:20 PM UTC 24 |
| Finished | Oct 02 11:05:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185648906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.2185648906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.3231328527 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 194944668 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:05:21 PM UTC 24 |
| Finished | Oct 02 11:05:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231328527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.3231328527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2047858385 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 4420344303 ps |
| CPU time | 114.17 seconds |
| Started | Oct 02 11:05:19 PM UTC 24 |
| Finished | Oct 02 11:07:15 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047858385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2047858385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.1969087889 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 8051583383 ps |
| CPU time | 49.05 seconds |
| Started | Oct 02 11:05:21 PM UTC 24 |
| Finished | Oct 02 11:06:11 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969087889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.1969087889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.317086708 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 206223695 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:25 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=317086708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_in_err.317086708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.303245155 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 34385657297 ps |
| CPU time | 53.36 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:06:18 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=303245155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_resume.303245155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.2605350393 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 9263276706 ps |
| CPU time | 12.56 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:37 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605350393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.2605350393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.1100727512 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 2209460562 ps |
| CPU time | 22.64 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:47 PM UTC 24 |
| Peak memory | 235072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100727512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.1100727512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1548678104 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 2785163848 ps |
| CPU time | 69.66 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:06:35 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548678104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1548678104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.2006576815 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 264343439 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:26 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006576815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.2006576815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.2406765251 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 193323753 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:25 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406765251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.2406765251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.4178221445 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 2881722084 ps |
| CPU time | 28.75 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:53 PM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178221445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.4178221445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.2971773698 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 2623462054 ps |
| CPU time | 69.87 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:06:35 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971773698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2971773698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.393402370 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 143046682 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:26 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393402370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.393402370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1878940519 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 142206151 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:26 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878940519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.1878940519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.790269454 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 212331813 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:26 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790269454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_nak_trans.790269454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.2037168396 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 213901483 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:05:23 PM UTC 24 |
| Finished | Oct 02 11:05:25 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037168396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.2037168396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.575646826 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 160157391 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:27 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575646826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_out_stall.575646826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.2061812004 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 162808559 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:27 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061812004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.2061812004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.400285281 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 155102590 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:27 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400285281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pending_in_trans.400285281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.1512409953 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 234052408 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:27 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512409953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.1512409953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.2391125646 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 148256688 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:27 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391125646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.2391125646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.2353456536 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 42382955 ps |
| CPU time | 0.76 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:27 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353456536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.2353456536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.2353819564 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 9961183161 ps |
| CPU time | 27.52 seconds |
| Started | Oct 02 11:05:25 PM UTC 24 |
| Finished | Oct 02 11:05:54 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353819564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.2353819564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.1215707468 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 182441673 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:05:26 PM UTC 24 |
| Finished | Oct 02 11:05:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215707468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.1215707468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.1966379511 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 235768245 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:05:26 PM UTC 24 |
| Finished | Oct 02 11:05:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966379511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.1966379511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3512145823 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 176721656 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:05:26 PM UTC 24 |
| Finished | Oct 02 11:05:28 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512145823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3512145823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.1228645543 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 199698739 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:05:27 PM UTC 24 |
| Finished | Oct 02 11:05:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228645543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.1228645543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.3944423482 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 20157093247 ps |
| CPU time | 27.62 seconds |
| Started | Oct 02 11:05:27 PM UTC 24 |
| Finished | Oct 02 11:05:56 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944423482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.3944423482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.3246583063 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 187465644 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:05:27 PM UTC 24 |
| Finished | Oct 02 11:05:30 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246583063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.3246583063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.1371694421 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 370659244 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:05:28 PM UTC 24 |
| Finished | Oct 02 11:05:30 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371694421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.1371694421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.3850830344 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 168110384 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:05:28 PM UTC 24 |
| Finished | Oct 02 11:05:30 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850830344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.3850830344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.43069462 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 157734300 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:05:28 PM UTC 24 |
| Finished | Oct 02 11:05:30 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=43069462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_setup_trans_ignored.43069462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.3407238847 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 200719812 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:05:28 PM UTC 24 |
| Finished | Oct 02 11:05:30 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407238847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.3407238847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.513548632 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 2741973914 ps |
| CPU time | 21.46 seconds |
| Started | Oct 02 11:05:29 PM UTC 24 |
| Finished | Oct 02 11:05:52 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=513548632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.513548632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.1929422683 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 141764685 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:05:29 PM UTC 24 |
| Finished | Oct 02 11:05:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929422683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.1929422683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.1727692683 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 175392691 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:05:29 PM UTC 24 |
| Finished | Oct 02 11:05:32 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727692683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.1727692683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.2362297435 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 758760872 ps |
| CPU time | 2.42 seconds |
| Started | Oct 02 11:05:29 PM UTC 24 |
| Finished | Oct 02 11:05:33 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362297435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.2362297435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.214893166 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 2604659542 ps |
| CPU time | 20.9 seconds |
| Started | Oct 02 11:05:29 PM UTC 24 |
| Finished | Oct 02 11:05:51 PM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214893166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_streaming_out.214893166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.561672723 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 1599779916 ps |
| CPU time | 35.4 seconds |
| Started | Oct 02 11:05:17 PM UTC 24 |
| Finished | Oct 02 11:05:54 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=561672723 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.561672723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.2402332716 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 501526046 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:05:29 PM UTC 24 |
| Finished | Oct 02 11:05:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2402332716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.2402332716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.2642560071 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 285769679 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:35 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642560071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.2642560071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.2432896349 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 463230386 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2432896349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.2432896349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.1736066148 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 177735475 ps |
| CPU time | 0.86 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:35 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736066148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.1736066148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.1001543773 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 526732995 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1001543773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.1001543773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.3475610984 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 324327046 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:35 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475610984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.3475610984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.3200980947 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 464661001 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3200980947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.3200980947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.806468974 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 176911462 ps |
| CPU time | 0.85 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:35 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806468974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 153.usbdev_fifo_levels.806468974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.3151837647 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 511448350 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:15:32 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3151837647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.3151837647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2895851121 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 372340509 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:15:33 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895851121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2895851121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.3653351127 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 163165585 ps |
| CPU time | 0.82 seconds |
| Started | Oct 02 11:15:33 PM UTC 24 |
| Finished | Oct 02 11:15:35 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653351127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.3653351127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.3550919144 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 647327324 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:15:33 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3550919144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.3550919144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.40382754 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 468483090 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:15:33 PM UTC 24 |
| Finished | Oct 02 11:15:36 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=40382754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.40382754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.1046062020 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 79883009 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:05:49 PM UTC 24 |
| Finished | Oct 02 11:05:51 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046062020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1046062020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.192430622 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 11443910592 ps |
| CPU time | 16.82 seconds |
| Started | Oct 02 11:05:31 PM UTC 24 |
| Finished | Oct 02 11:05:49 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192430622 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.192430622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.3955121400 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 15041051891 ps |
| CPU time | 19.22 seconds |
| Started | Oct 02 11:05:31 PM UTC 24 |
| Finished | Oct 02 11:05:51 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955121400 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.3955121400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.341411945 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 163974393 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:05:31 PM UTC 24 |
| Finished | Oct 02 11:05:33 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341411945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_av_buffer.341411945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.3879952279 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 136998926 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:05:31 PM UTC 24 |
| Finished | Oct 02 11:05:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879952279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.3879952279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.1084365071 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 458384916 ps |
| CPU time | 2.01 seconds |
| Started | Oct 02 11:05:32 PM UTC 24 |
| Finished | Oct 02 11:05:35 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084365071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.1084365071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.189921307 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 1305762633 ps |
| CPU time | 5.17 seconds |
| Started | Oct 02 11:05:32 PM UTC 24 |
| Finished | Oct 02 11:05:39 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=189921307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.189921307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.211484467 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 27913166760 ps |
| CPU time | 48.71 seconds |
| Started | Oct 02 11:05:32 PM UTC 24 |
| Finished | Oct 02 11:06:23 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211484467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_device_address.211484467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.583037583 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 3856730569 ps |
| CPU time | 30.15 seconds |
| Started | Oct 02 11:05:33 PM UTC 24 |
| Finished | Oct 02 11:06:04 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583037583 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.583037583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.986130074 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 722881115 ps |
| CPU time | 2.92 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:38 PM UTC 24 |
| Peak memory | 217728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986130074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disable_endpoint.986130074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.3291061475 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 160582989 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:37 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291061475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.3291061475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_enable.719816772 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 73147530 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:36 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=719816772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_enable.719816772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.1034728697 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 916406035 ps |
| CPU time | 3.19 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:38 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034728697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.1034728697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.3098563872 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 166821088 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:37 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098563872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.3098563872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.1700652010 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 607960260 ps |
| CPU time | 3.23 seconds |
| Started | Oct 02 11:05:36 PM UTC 24 |
| Finished | Oct 02 11:05:40 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700652010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.1700652010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.3269132600 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 186493409 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:05:36 PM UTC 24 |
| Finished | Oct 02 11:05:39 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269132600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.3269132600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.2964789120 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 169395789 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:05:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964789120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.2964789120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.2545418129 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 239428453 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:05:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545418129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.2545418129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.462589200 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 2597669104 ps |
| CPU time | 19.23 seconds |
| Started | Oct 02 11:05:36 PM UTC 24 |
| Finished | Oct 02 11:05:57 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462589200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.462589200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.1635305156 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 4256854770 ps |
| CPU time | 29.4 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:06:10 PM UTC 24 |
| Peak memory | 218320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1635305156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.1635305156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1934031983 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 165949153 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:05:41 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934031983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1934031983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.813812405 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 27520740354 ps |
| CPU time | 47.77 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:06:28 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813812405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_resume.813812405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.482169611 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 5998003178 ps |
| CPU time | 9.08 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:05:49 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=482169611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_suspend.482169611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.1855061832 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 5703138828 ps |
| CPU time | 40.94 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:06:21 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855061832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.1855061832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.231753677 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 2520677363 ps |
| CPU time | 18.2 seconds |
| Started | Oct 02 11:05:38 PM UTC 24 |
| Finished | Oct 02 11:05:58 PM UTC 24 |
| Peak memory | 235024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=231753677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.231753677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.3560326274 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 255898506 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:05:39 PM UTC 24 |
| Finished | Oct 02 11:05:42 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560326274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.3560326274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.3168028210 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 192025230 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:05:40 PM UTC 24 |
| Finished | Oct 02 11:05:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168028210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.3168028210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.332061867 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 2368394772 ps |
| CPU time | 22.86 seconds |
| Started | Oct 02 11:05:40 PM UTC 24 |
| Finished | Oct 02 11:06:04 PM UTC 24 |
| Peak memory | 234992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332061867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.332061867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.2984061509 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 2104977384 ps |
| CPU time | 16.83 seconds |
| Started | Oct 02 11:05:40 PM UTC 24 |
| Finished | Oct 02 11:05:58 PM UTC 24 |
| Peak memory | 228220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984061509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.2984061509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.2717149555 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 189830785 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:05:42 PM UTC 24 |
| Finished | Oct 02 11:05:44 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717149555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.2717149555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.1174418039 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 140723442 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:05:42 PM UTC 24 |
| Finished | Oct 02 11:05:44 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174418039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.1174418039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.2174831280 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 190393706 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:05:42 PM UTC 24 |
| Finished | Oct 02 11:05:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2174831280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.2174831280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.4177872471 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 146788858 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:05:42 PM UTC 24 |
| Finished | Oct 02 11:05:44 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177872471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.4177872471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.164196361 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 162124688 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:05:43 PM UTC 24 |
| Finished | Oct 02 11:05:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=164196361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.164196361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.3558463236 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 195415418 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:05:43 PM UTC 24 |
| Finished | Oct 02 11:05:46 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558463236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.3558463236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.453651689 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 256109083 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:05:43 PM UTC 24 |
| Finished | Oct 02 11:05:46 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=453651689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.453651689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.1581739862 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 145098433 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:05:43 PM UTC 24 |
| Finished | Oct 02 11:05:46 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581739862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.1581739862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.138574051 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 42649743 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:05:47 PM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=138574051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_phy_pins_sense.138574051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.2948382739 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 18693487875 ps |
| CPU time | 48.77 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:06:35 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948382739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.2948382739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.1539934186 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 167981914 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:05:47 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539934186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.1539934186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.292211868 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 199789079 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:05:47 PM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=292211868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_pkt_sent.292211868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.3551707423 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 166815439 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:05:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551707423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.3551707423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.3960928853 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 199437364 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:05:48 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960928853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.3960928853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.3534783326 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 20191339213 ps |
| CPU time | 28.99 seconds |
| Started | Oct 02 11:05:45 PM UTC 24 |
| Finished | Oct 02 11:06:15 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534783326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.3534783326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.2657053884 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 160064245 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:05:46 PM UTC 24 |
| Finished | Oct 02 11:05:49 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657053884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.2657053884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.1010908526 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 251532132 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:05:46 PM UTC 24 |
| Finished | Oct 02 11:05:49 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010908526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.1010908526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.3722459586 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 156386289 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:05:48 PM UTC 24 |
| Finished | Oct 02 11:05:50 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3722459586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.3722459586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.624353862 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 154028341 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:05:48 PM UTC 24 |
| Finished | Oct 02 11:05:50 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=624353862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_setup_trans_ignored.624353862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.227965974 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 227173649 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:05:48 PM UTC 24 |
| Finished | Oct 02 11:05:50 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227965974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.227965974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.3600136912 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 2015558144 ps |
| CPU time | 14.23 seconds |
| Started | Oct 02 11:05:48 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 228096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600136912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.3600136912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.2334836698 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 167490840 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:05:48 PM UTC 24 |
| Finished | Oct 02 11:05:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334836698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.2334836698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.1950313255 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 184511019 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:05:48 PM UTC 24 |
| Finished | Oct 02 11:05:50 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950313255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.1950313255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.2776691607 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 1075331715 ps |
| CPU time | 2.7 seconds |
| Started | Oct 02 11:05:49 PM UTC 24 |
| Finished | Oct 02 11:05:53 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776691607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.2776691607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.1459181996 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 3591697781 ps |
| CPU time | 96.8 seconds |
| Started | Oct 02 11:05:49 PM UTC 24 |
| Finished | Oct 02 11:07:28 PM UTC 24 |
| Peak memory | 228580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459181996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.1459181996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.3940804076 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 1512396287 ps |
| CPU time | 12.37 seconds |
| Started | Oct 02 11:05:34 PM UTC 24 |
| Finished | Oct 02 11:05:48 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940804076 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.3940804076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.2614409431 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 565335494 ps |
| CPU time | 2.34 seconds |
| Started | Oct 02 11:05:49 PM UTC 24 |
| Finished | Oct 02 11:05:52 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2614409431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.2614409431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.497680749 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 536454835 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:15:35 PM UTC 24 |
| Finished | Oct 02 11:16:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=497680749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.497680749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.2582192935 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 620576197 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:15:35 PM UTC 24 |
| Finished | Oct 02 11:16:05 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2582192935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.2582192935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.3967517628 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 487413197 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:15:36 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967517628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.3967517628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.1408321443 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 452124341 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:15:36 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1408321443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.1408321443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.1400233192 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 502543099 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:15:36 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1400233192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.1400233192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.1658106807 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 286849665 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:15:36 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658106807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.1658106807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.187863884 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 546533141 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=187863884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_t x_rx_disruption.187863884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.4012759160 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 354481705 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:40 PM UTC 24 |
| Peak memory | 215356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012759160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.4012759160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.1555686103 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 488831201 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1555686103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.1555686103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3164392377 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 486206435 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164392377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3164392377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.539484915 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 510167240 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=539484915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_t x_rx_disruption.539484915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1575456950 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 448462574 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575456950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1575456950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2403600392 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 470768316 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:15:37 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2403600392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2403600392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.2373981096 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 140128451 ps |
| CPU time | 0.81 seconds |
| Started | Oct 02 11:15:38 PM UTC 24 |
| Finished | Oct 02 11:15:40 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373981096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2373981096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.2502370456 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 651871940 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:15:38 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2502370456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.2502370456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.394134863 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 172941385 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:15:38 PM UTC 24 |
| Finished | Oct 02 11:15:40 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394134863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.394134863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.3097772023 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 537537375 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:52 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3097772023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.3097772023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.1146928373 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 458673262 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:52 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146928373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.1146928373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.2580819252 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 472513008 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:52 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2580819252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.2580819252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.2573660852 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 78801765 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573660852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.2573660852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.1407137560 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 11474551479 ps |
| CPU time | 15.97 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:06:08 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407137560 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.1407137560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.3904127716 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 21162231225 ps |
| CPU time | 29.9 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:06:22 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904127716 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.3904127716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.1329614434 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 25334651610 ps |
| CPU time | 36.23 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:06:28 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329614434 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.1329614434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.3776983688 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 174402026 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:05:53 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776983688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.3776983688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.2427949629 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 146198914 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:05:53 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427949629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.2427949629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.4118401988 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 478335924 ps |
| CPU time | 2.03 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:05:54 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118401988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.4118401988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.3926237430 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 1220064431 ps |
| CPU time | 4.29 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:05:56 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926237430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.3926237430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.2701866342 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 19340591867 ps |
| CPU time | 32.5 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701866342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.2701866342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.1493304976 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 5661825791 ps |
| CPU time | 32.81 seconds |
| Started | Oct 02 11:05:51 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493304976 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.1493304976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.690318276 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 724136439 ps |
| CPU time | 2.13 seconds |
| Started | Oct 02 11:05:52 PM UTC 24 |
| Finished | Oct 02 11:05:56 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690318276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disable_endpoint.690318276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.649480286 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 172616968 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:05:52 PM UTC 24 |
| Finished | Oct 02 11:05:55 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=649480286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_disconnected.649480286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_enable.2662934191 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 47771985 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:05:53 PM UTC 24 |
| Finished | Oct 02 11:05:55 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662934191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.2662934191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.2861956905 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 870190031 ps |
| CPU time | 2.88 seconds |
| Started | Oct 02 11:05:54 PM UTC 24 |
| Finished | Oct 02 11:05:58 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861956905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.2861956905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.1248868035 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 268981577 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:05:55 PM UTC 24 |
| Finished | Oct 02 11:05:57 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248868035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.1248868035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.1494005934 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 276783042 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:05:55 PM UTC 24 |
| Finished | Oct 02 11:05:58 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494005934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.1494005934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2881089411 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 237022887 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:05:55 PM UTC 24 |
| Finished | Oct 02 11:05:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881089411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2881089411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.4066620494 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 230296637 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:06:00 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066620494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.4066620494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.1128420157 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 193917879 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:05:59 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128420157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.1128420157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.3170754172 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 233413887 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:06:00 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170754172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.3170754172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.603246571 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 3230337509 ps |
| CPU time | 86.23 seconds |
| Started | Oct 02 11:05:55 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 230440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=603246571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.603246571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.1983694174 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 13371053226 ps |
| CPU time | 90.56 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:07:30 PM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983694174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.1983694174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.1865664357 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 225576478 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:05:59 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865664357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.1865664357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.2383257928 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 29239048034 ps |
| CPU time | 48.89 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:06:48 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383257928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.2383257928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.625655057 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 3513171281 ps |
| CPU time | 8.58 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:06:07 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=625655057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_suspend.625655057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.1591374199 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 5252920961 ps |
| CPU time | 145.87 seconds |
| Started | Oct 02 11:05:57 PM UTC 24 |
| Finished | Oct 02 11:08:26 PM UTC 24 |
| Peak memory | 233388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591374199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.1591374199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.4212805883 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 1724042613 ps |
| CPU time | 11.82 seconds |
| Started | Oct 02 11:05:58 PM UTC 24 |
| Finished | Oct 02 11:06:10 PM UTC 24 |
| Peak memory | 228216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212805883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.4212805883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.336925016 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 257814549 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:05:58 PM UTC 24 |
| Finished | Oct 02 11:06:00 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=336925016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.336925016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.1649950371 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 218851683 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:05:58 PM UTC 24 |
| Finished | Oct 02 11:06:00 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649950371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.1649950371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.2783300999 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 2278328461 ps |
| CPU time | 16.44 seconds |
| Started | Oct 02 11:05:58 PM UTC 24 |
| Finished | Oct 02 11:06:15 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783300999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.2783300999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.3508616321 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 3437935285 ps |
| CPU time | 25.57 seconds |
| Started | Oct 02 11:05:58 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508616321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.3508616321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.1600263560 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 150618690 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600263560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.1600263560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.1474334507 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 145062387 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474334507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.1474334507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.2470679866 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 208757077 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470679866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.2470679866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.2368908297 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 152627478 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368908297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_out_iso.2368908297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.816790828 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 187520877 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816790828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.816790828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.3685560317 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 168575974 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685560317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.3685560317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3813609203 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 168594937 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813609203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3813609203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.1552573886 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 195067262 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:06:00 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552573886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.1552573886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.2465584751 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 154908359 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:06:01 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465584751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.2465584751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.3509353458 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 99014772 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:06:01 PM UTC 24 |
| Finished | Oct 02 11:06:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509353458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.3509353458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.3109118887 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 9252578672 ps |
| CPU time | 23.55 seconds |
| Started | Oct 02 11:06:01 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109118887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.3109118887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.3156903943 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 180159183 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:06:03 PM UTC 24 |
| Finished | Oct 02 11:06:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156903943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.3156903943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.2773425614 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 235711364 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:06:03 PM UTC 24 |
| Finished | Oct 02 11:06:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773425614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.2773425614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.1467831441 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 190833879 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:06:03 PM UTC 24 |
| Finished | Oct 02 11:06:05 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467831441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.1467831441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.2664919411 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 210423816 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:06:03 PM UTC 24 |
| Finished | Oct 02 11:06:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664919411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.2664919411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.2517478375 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 20157942546 ps |
| CPU time | 25.93 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:34 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517478375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.2517478375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.3752438422 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 171059964 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:08 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752438422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.3752438422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.1223366988 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 315569721 ps |
| CPU time | 2.02 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223366988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.1223366988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.3162352202 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 149585770 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162352202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.3162352202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.3365543590 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 160051962 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365543590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.3365543590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.3181456235 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 230118679 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:06:06 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181456235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.3181456235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.3556916275 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 182581884 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556916275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.3556916275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.1811417043 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 186453234 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811417043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.1811417043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.3541099543 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 232831531 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541099543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.3541099543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.1201347485 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 2550252182 ps |
| CPU time | 17.86 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:26 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201347485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.1201347485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.926645357 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 727480856 ps |
| CPU time | 13.51 seconds |
| Started | Oct 02 11:05:52 PM UTC 24 |
| Finished | Oct 02 11:06:07 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=926645357 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.926645357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.1627692582 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 465487888 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1627692582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.1627692582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.943528515 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 227620519 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:45 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943528515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.943528515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.177569299 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 489967200 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=177569299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_t x_rx_disruption.177569299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.1644590151 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 433995464 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644590151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.1644590151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.760852365 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 656265525 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=760852365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_t x_rx_disruption.760852365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.3477093398 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 151337975 ps |
| CPU time | 0.83 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477093398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.3477093398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.1877129736 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 518174193 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1877129736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.1877129736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.1243943404 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 233998042 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243943404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.1243943404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.3154290201 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 574741954 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3154290201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.3154290201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.3152562920 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 186655588 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152562920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.3152562920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.3939413367 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 534390241 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3939413367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.3939413367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.851810290 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 412837649 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:15:42 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851810290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.851810290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.3979137530 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 523728391 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3979137530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.3979137530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.519537393 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 280911306 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=519537393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.519537393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.3493811445 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 504347440 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3493811445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.3493811445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.1609300131 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 180631974 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609300131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.1609300131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.3873970160 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 511984174 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3873970160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.3873970160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.3408098952 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 546724189 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:15:44 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3408098952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.3408098952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.3152885265 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 59201057 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:06:23 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152885265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.3152885265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.3973666821 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 11156611904 ps |
| CPU time | 14.89 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:23 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973666821 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.3973666821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.3242632845 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 19755572440 ps |
| CPU time | 25.47 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:34 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242632845 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3242632845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.2581502834 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 28527937754 ps |
| CPU time | 45.81 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:54 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581502834 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.2581502834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.1283267619 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 159677568 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:06:07 PM UTC 24 |
| Finished | Oct 02 11:06:09 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283267619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.1283267619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2368462284 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 142835383 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:12 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368462284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2368462284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2650096817 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 436728394 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:12 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650096817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2650096817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.637594872 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 934962808 ps |
| CPU time | 2.53 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:13 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=637594872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.637594872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.3318654427 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 1047978271 ps |
| CPU time | 20.98 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:32 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318654427 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.3318654427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.4204155347 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 904317641 ps |
| CPU time | 3.48 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:14 PM UTC 24 |
| Peak memory | 217624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204155347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.4204155347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.1701125689 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 139144053 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:12 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701125689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.1701125689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3261102537 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 51268922 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261102537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3261102537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.1532190738 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 826859668 ps |
| CPU time | 3.54 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:14 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532190738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.1532190738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.4025565466 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 291148950 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:12 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025565466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.4025565466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.3716685465 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 364191911 ps |
| CPU time | 2.37 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716685465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.3716685465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.2614616894 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 187831512 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:16 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614616894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.2614616894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.487879958 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 154715389 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:15 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487879958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_stall.487879958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.109843534 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 311600904 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:16 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=109843534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_trans.109843534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.3630660612 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 5363491450 ps |
| CPU time | 50.73 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:07:05 PM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630660612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.3630660612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.2669575430 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 8279407597 ps |
| CPU time | 93.01 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:07:48 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669575430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.2669575430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.3020509524 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 209426210 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:15 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3020509524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.3020509524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.796975391 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 12215699018 ps |
| CPU time | 17.48 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:32 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796975391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_resume.796975391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.1308616124 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 11183777615 ps |
| CPU time | 17.53 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:32 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308616124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.1308616124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.4150660629 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 5021420044 ps |
| CPU time | 38.11 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:53 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150660629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.4150660629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.2579482351 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 2573146284 ps |
| CPU time | 23.79 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:39 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579482351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.2579482351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.1492187396 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 275675948 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:06:13 PM UTC 24 |
| Finished | Oct 02 11:06:16 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492187396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.1492187396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.183730257 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 194522360 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:06:16 PM UTC 24 |
| Finished | Oct 02 11:06:18 PM UTC 24 |
| Peak memory | 214744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=183730257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.183730257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.4242597829 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 2519289050 ps |
| CPU time | 23.89 seconds |
| Started | Oct 02 11:06:16 PM UTC 24 |
| Finished | Oct 02 11:06:41 PM UTC 24 |
| Peak memory | 234796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242597829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.4242597829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.3276846487 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 1593046553 ps |
| CPU time | 42.93 seconds |
| Started | Oct 02 11:06:16 PM UTC 24 |
| Finished | Oct 02 11:07:00 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276846487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.3276846487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.4198241795 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 148941656 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:06:16 PM UTC 24 |
| Finished | Oct 02 11:06:18 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198241795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.4198241795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.332809264 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 219797111 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332809264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.332809264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.1825351099 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 192723256 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825351099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.1825351099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.2784089008 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 189154390 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784089008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.2784089008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.712112911 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 182367437 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=712112911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_out_stall.712112911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.1972978609 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 241760893 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972978609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.1972978609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.4197737806 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 180512745 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197737806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.4197737806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.2003206202 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 235761826 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003206202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.2003206202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.2969834338 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 142179963 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969834338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.2969834338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.3826963381 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 87748121 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:06:18 PM UTC 24 |
| Finished | Oct 02 11:06:20 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826963381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.3826963381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.2964987448 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 6485231998 ps |
| CPU time | 20.1 seconds |
| Started | Oct 02 11:06:19 PM UTC 24 |
| Finished | Oct 02 11:06:40 PM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964987448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.2964987448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.115763316 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 259746591 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:06:19 PM UTC 24 |
| Finished | Oct 02 11:06:22 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115763316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_pkt_received.115763316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.3909731738 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 211435637 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:06:19 PM UTC 24 |
| Finished | Oct 02 11:06:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909731738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.3909731738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.1542203310 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 243907603 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:06:19 PM UTC 24 |
| Finished | Oct 02 11:06:22 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542203310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.1542203310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2784507555 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 162285291 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784507555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2784507555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.1983699394 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 20159418178 ps |
| CPU time | 31.44 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:54 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983699394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.1983699394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.2641260562 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 145023740 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:23 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641260562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.2641260562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.1080965203 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 269556784 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:24 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080965203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.1080965203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.2377812345 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 158678344 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:23 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2377812345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.2377812345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.1162972244 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 155020877 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:24 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162972244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.1162972244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.3028729541 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 213254576 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:06:24 PM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028729541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.3028729541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.3684183385 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 1863382960 ps |
| CPU time | 49.3 seconds |
| Started | Oct 02 11:06:21 PM UTC 24 |
| Finished | Oct 02 11:07:12 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684183385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.3684183385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.4146213279 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 215951453 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:06:23 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146213279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.4146213279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.1769951190 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 150884118 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:06:23 PM UTC 24 |
| Finished | Oct 02 11:06:25 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769951190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.1769951190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.116913391 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 1403656106 ps |
| CPU time | 3.85 seconds |
| Started | Oct 02 11:06:23 PM UTC 24 |
| Finished | Oct 02 11:06:28 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116913391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_stream_len_max.116913391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.3390581593 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 2672845543 ps |
| CPU time | 70.76 seconds |
| Started | Oct 02 11:06:23 PM UTC 24 |
| Finished | Oct 02 11:07:35 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390581593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.3390581593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.4272323005 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 1092791025 ps |
| CPU time | 8.19 seconds |
| Started | Oct 02 11:06:10 PM UTC 24 |
| Finished | Oct 02 11:06:19 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272323005 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.4272323005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.1590734334 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 576734810 ps |
| CPU time | 1.9 seconds |
| Started | Oct 02 11:06:23 PM UTC 24 |
| Finished | Oct 02 11:06:26 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1590734334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.1590734334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.2583447352 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 402746358 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:15:46 PM UTC 24 |
| Finished | Oct 02 11:15:51 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583447352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.2583447352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.1096821398 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 482707825 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:15:46 PM UTC 24 |
| Finished | Oct 02 11:15:51 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1096821398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.1096821398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2742999069 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 322852519 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:55 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742999069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2742999069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.3009898192 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 481999281 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3009898192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.3009898192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.34215073 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 334709208 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:55 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34215073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.34215073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.834227508 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 623329817 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=834227508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_t x_rx_disruption.834227508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.1002420737 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 518559332 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002420737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.1002420737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.3279390244 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 440054075 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:56 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3279390244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.3279390244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.1219970227 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 427999757 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:50 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219970227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.1219970227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.2546374068 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 549794650 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:51 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2546374068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.2546374068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.3318624876 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 418144033 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:51 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318624876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.3318624876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.1911398248 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 609282861 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:15:47 PM UTC 24 |
| Finished | Oct 02 11:15:51 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1911398248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.1911398248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.1590992381 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 480878106 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1590992381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.1590992381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.3112623388 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 42537006 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:06:40 PM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112623388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.3112623388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.615611811 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 4070061836 ps |
| CPU time | 7.65 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:33 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=615611811 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.615611811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.877150591 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 15412491542 ps |
| CPU time | 18.69 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:45 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877150591 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.877150591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.4001538247 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 29011492153 ps |
| CPU time | 39.75 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001538247 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.4001538247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.966176849 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 156507009 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:27 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=966176849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_av_buffer.966176849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.2662565008 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 143942498 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:27 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662565008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.2662565008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.180863307 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 457038203 ps |
| CPU time | 2.29 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:28 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180863307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_data_toggle_clear.180863307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.3319355716 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 600632548 ps |
| CPU time | 2.31 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:28 PM UTC 24 |
| Peak memory | 217784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319355716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.3319355716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.4261905021 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 23019862110 ps |
| CPU time | 39.3 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261905021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.4261905021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.1169105520 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 734871946 ps |
| CPU time | 13.69 seconds |
| Started | Oct 02 11:06:25 PM UTC 24 |
| Finished | Oct 02 11:06:40 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169105520 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.1169105520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.2687247069 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 1060271400 ps |
| CPU time | 3.42 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:31 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687247069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.2687247069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.3814140967 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 141130485 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:29 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814140967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.3814140967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_enable.1967775348 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 48329077 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:29 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967775348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.1967775348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.485214125 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 913161749 ps |
| CPU time | 2.82 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:31 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=485214125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.485214125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.1987129249 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 188732629 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:30 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987129249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.1987129249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.3828750761 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 252794584 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:30 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828750761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.3828750761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.1243620867 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 271176612 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:30 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243620867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.1243620867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.100403516 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 213419998 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:30 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=100403516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.100403516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.4292302024 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 159839519 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:06:29 PM UTC 24 |
| Finished | Oct 02 11:06:31 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292302024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.4292302024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.3576814408 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 236933309 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:06:29 PM UTC 24 |
| Finished | Oct 02 11:06:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576814408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.3576814408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.151666452 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 4346600802 ps |
| CPU time | 32.16 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151666452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.151666452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.525132412 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 11908672561 ps |
| CPU time | 84.98 seconds |
| Started | Oct 02 11:06:29 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525132412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.525132412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.677383447 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 181673027 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:06:29 PM UTC 24 |
| Finished | Oct 02 11:06:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=677383447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.677383447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.2553353735 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 29538177295 ps |
| CPU time | 48.11 seconds |
| Started | Oct 02 11:06:29 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553353735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.2553353735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.423379632 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 10258789761 ps |
| CPU time | 13.98 seconds |
| Started | Oct 02 11:06:29 PM UTC 24 |
| Finished | Oct 02 11:06:44 PM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423379632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_suspend.423379632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.934418028 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 4393480009 ps |
| CPU time | 42.65 seconds |
| Started | Oct 02 11:06:30 PM UTC 24 |
| Finished | Oct 02 11:07:15 PM UTC 24 |
| Peak memory | 234796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=934418028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.934418028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.883122242 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 2843328299 ps |
| CPU time | 21.28 seconds |
| Started | Oct 02 11:06:30 PM UTC 24 |
| Finished | Oct 02 11:06:53 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883122242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.883122242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.2245736214 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 248085223 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:06:31 PM UTC 24 |
| Finished | Oct 02 11:06:33 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245736214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.2245736214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.1329052039 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 227451760 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:06:31 PM UTC 24 |
| Finished | Oct 02 11:06:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329052039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.1329052039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1057127892 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 3390107493 ps |
| CPU time | 25.16 seconds |
| Started | Oct 02 11:06:31 PM UTC 24 |
| Finished | Oct 02 11:06:57 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057127892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1057127892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.1421824652 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 4362419217 ps |
| CPU time | 125.47 seconds |
| Started | Oct 02 11:06:31 PM UTC 24 |
| Finished | Oct 02 11:08:39 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421824652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.1421824652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.211885469 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 172397913 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:06:31 PM UTC 24 |
| Finished | Oct 02 11:06:33 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211885469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.211885469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.1889930102 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 136073000 ps |
| CPU time | 0.85 seconds |
| Started | Oct 02 11:06:31 PM UTC 24 |
| Finished | Oct 02 11:06:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889930102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.1889930102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.2585458579 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 185130871 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:06:32 PM UTC 24 |
| Finished | Oct 02 11:06:34 PM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585458579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.2585458579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.3293301255 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 191856338 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:06:32 PM UTC 24 |
| Finished | Oct 02 11:06:35 PM UTC 24 |
| Peak memory | 215316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293301255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.3293301255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.1757583695 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 176396573 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:06:32 PM UTC 24 |
| Finished | Oct 02 11:06:35 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757583695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.1757583695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.400586128 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 177841547 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:06:32 PM UTC 24 |
| Finished | Oct 02 11:06:34 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400586128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_out_trans_nak.400586128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.995227633 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 150350740 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:06:32 PM UTC 24 |
| Finished | Oct 02 11:06:34 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=995227633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pending_in_trans.995227633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.641890722 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 243738812 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:06:32 PM UTC 24 |
| Finished | Oct 02 11:06:35 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=641890722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.641890722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.3177689765 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 144497746 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:36 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177689765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.3177689765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.1206049831 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 110358928 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206049831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.1206049831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.3036654791 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 5904198962 ps |
| CPU time | 17.26 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036654791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.3036654791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.3115111726 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 210335798 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115111726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.3115111726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.2087104497 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 240617887 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2087104497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.2087104497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.2916106873 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 158665826 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:36 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916106873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.2916106873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.3115961435 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 191919511 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:06:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115961435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.3115961435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.1833426633 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 20163317183 ps |
| CPU time | 25.86 seconds |
| Started | Oct 02 11:06:34 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1833426633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.1833426633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.2580757091 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 139623843 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:06:35 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580757091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.2580757091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.1964365963 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 278110844 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964365963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.1964365963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.899126958 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 194144890 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899126958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_setup_stage.899126958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.1558778300 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 192886558 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558778300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.1558778300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.31234184 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 218734954 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31234184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 19.usbdev_smoke.31234184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.501228032 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 2989673784 ps |
| CPU time | 79.24 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:07:57 PM UTC 24 |
| Peak memory | 230412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=501228032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.501228032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.1730901004 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 191131915 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730901004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.1730901004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.4072107152 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 198051463 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:38 PM UTC 24 |
| Peak memory | 215524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072107152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.4072107152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.1134375547 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 1324366241 ps |
| CPU time | 3.3 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:40 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134375547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.1134375547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.2172210937 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 3745321111 ps |
| CPU time | 32.08 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:07:09 PM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172210937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.2172210937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.2907588175 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 1117225928 ps |
| CPU time | 24.04 seconds |
| Started | Oct 02 11:06:27 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907588175 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.2907588175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.3669127634 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 606476332 ps |
| CPU time | 2.13 seconds |
| Started | Oct 02 11:06:36 PM UTC 24 |
| Finished | Oct 02 11:06:39 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3669127634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.3669127634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.1259331934 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 205351241 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:01 PM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259331934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.1259331934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.1025415674 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 477007689 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1025415674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.1025415674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.3941385770 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 409392350 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941385770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.3941385770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.3077863341 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 595913218 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3077863341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.3077863341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.2149107666 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 216839119 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149107666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.2149107666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.67470054 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 594058923 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:15:52 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=67470054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_tx _rx_disruption.67470054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.13351040 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 197623274 ps |
| CPU time | 0.86 seconds |
| Started | Oct 02 11:15:53 PM UTC 24 |
| Finished | Oct 02 11:15:56 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=13351040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.13351040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.1675352431 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 618887608 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:15:53 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1675352431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.1675352431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.2132378027 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 288924646 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:15:53 PM UTC 24 |
| Finished | Oct 02 11:15:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132378027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.2132378027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.751591768 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 457515466 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:15:54 PM UTC 24 |
| Finished | Oct 02 11:16:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=751591768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_t x_rx_disruption.751591768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.2894428542 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 296481283 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:15:55 PM UTC 24 |
| Finished | Oct 02 11:16:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894428542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.2894428542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.3864530731 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 554654862 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:15:55 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3864530731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.3864530731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.2918925062 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 652366978 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:03 PM UTC 24 |
| Peak memory | 215328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2918925062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.2918925062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.1523651217 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 383031948 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523651217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.1523651217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.783282372 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 601695162 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=783282372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_t x_rx_disruption.783282372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.4049060103 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 417546563 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049060103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.4049060103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.3850550319 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 459174049 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3850550319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.3850550319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.3102271538 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 470282665 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102271538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.3102271538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.1895034594 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 526589679 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1895034594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.1895034594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.2567770564 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 49407389 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 10:59:27 PM UTC 24 |
| Finished | Oct 02 10:59:29 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567770564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.2567770564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.2718207713 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 4173339695 ps |
| CPU time | 6.4 seconds |
| Started | Oct 02 10:58:54 PM UTC 24 |
| Finished | Oct 02 10:59:02 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718207713 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.2718207713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.4259136844 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 20660032299 ps |
| CPU time | 30 seconds |
| Started | Oct 02 10:58:54 PM UTC 24 |
| Finished | Oct 02 10:59:25 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259136844 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.4259136844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.3130300398 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 25362008758 ps |
| CPU time | 32.91 seconds |
| Started | Oct 02 10:58:55 PM UTC 24 |
| Finished | Oct 02 10:59:30 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130300398 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.3130300398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1431546571 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 141083833 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 10:58:55 PM UTC 24 |
| Finished | Oct 02 10:58:58 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431546571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1431546571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.1467641239 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 159626921 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 10:58:55 PM UTC 24 |
| Finished | Oct 02 10:58:58 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467641239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.1467641239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.1764201615 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 142952994 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 10:58:56 PM UTC 24 |
| Finished | Oct 02 10:58:58 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764201615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.1764201615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1059261942 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 151511247 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 10:58:57 PM UTC 24 |
| Finished | Oct 02 10:58:59 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059261942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.1059261942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.879286957 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 257734700 ps |
| CPU time | 1.97 seconds |
| Started | Oct 02 10:58:57 PM UTC 24 |
| Finished | Oct 02 10:59:00 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879286957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_data_toggle_clear.879286957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3891102637 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 44399249608 ps |
| CPU time | 98.38 seconds |
| Started | Oct 02 10:58:57 PM UTC 24 |
| Finished | Oct 02 11:00:37 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891102637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3891102637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1928223174 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 205050408 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 10:58:57 PM UTC 24 |
| Finished | Oct 02 10:58:59 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928223174 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1928223174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.358752113 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 567937324 ps |
| CPU time | 2.26 seconds |
| Started | Oct 02 10:58:58 PM UTC 24 |
| Finished | Oct 02 10:59:02 PM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358752113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.358752113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.3561572650 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 185178391 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 10:58:58 PM UTC 24 |
| Finished | Oct 02 10:59:01 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561572650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.3561572650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_enable.1322980977 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 54966085 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 10:58:58 PM UTC 24 |
| Finished | Oct 02 10:59:00 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322980977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.1322980977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1810970179 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 939938201 ps |
| CPU time | 4.16 seconds |
| Started | Oct 02 10:58:58 PM UTC 24 |
| Finished | Oct 02 10:59:04 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810970179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.1810970179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.3616816081 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 423490084 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 10:58:59 PM UTC 24 |
| Finished | Oct 02 10:59:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616816081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.3616816081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.2373874222 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 201391948 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 10:58:59 PM UTC 24 |
| Finished | Oct 02 10:59:01 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373874222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.2373874222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.4220929075 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 290983855 ps |
| CPU time | 2.76 seconds |
| Started | Oct 02 10:58:59 PM UTC 24 |
| Finished | Oct 02 10:59:02 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220929075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.4220929075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.2563771842 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 101218445776 ps |
| CPU time | 191.89 seconds |
| Started | Oct 02 10:59:00 PM UTC 24 |
| Finished | Oct 02 11:02:15 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563771842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.2563771842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.1492374914 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 82259384200 ps |
| CPU time | 141.06 seconds |
| Started | Oct 02 10:59:00 PM UTC 24 |
| Finished | Oct 02 11:01:23 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1492374914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.1492374914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.2826776169 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 115108188250 ps |
| CPU time | 202.81 seconds |
| Started | Oct 02 10:59:01 PM UTC 24 |
| Finished | Oct 02 11:02:27 PM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826776169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.2826776169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.1376230466 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 97896912684 ps |
| CPU time | 193.68 seconds |
| Started | Oct 02 10:59:01 PM UTC 24 |
| Finished | Oct 02 11:02:18 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1376230466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.1376230466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.4182931574 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 115136409718 ps |
| CPU time | 181.9 seconds |
| Started | Oct 02 10:59:01 PM UTC 24 |
| Finished | Oct 02 11:02:06 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182931574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.4182931574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3312057695 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 227919303 ps |
| CPU time | 1.94 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:05 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312057695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.3312057695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.1239467909 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 171486107 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239467909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.1239467909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3889820865 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 199728919 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889820865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.3889820865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.1160067352 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 4590671303 ps |
| CPU time | 129.46 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 11:01:14 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1160067352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1160067352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.3869311669 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 5225898498 ps |
| CPU time | 53.13 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:57 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869311669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.3869311669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.4135801657 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 244648911 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:05 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135801657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.4135801657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.2361016557 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 9327576303 ps |
| CPU time | 13.55 seconds |
| Started | Oct 02 10:59:02 PM UTC 24 |
| Finished | Oct 02 10:59:17 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361016557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.2361016557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.2692281573 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 3039140884 ps |
| CPU time | 27.41 seconds |
| Started | Oct 02 10:59:04 PM UTC 24 |
| Finished | Oct 02 10:59:33 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2692281573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.2692281573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1286552101 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 1648560505 ps |
| CPU time | 16.12 seconds |
| Started | Oct 02 10:59:05 PM UTC 24 |
| Finished | Oct 02 10:59:22 PM UTC 24 |
| Peak memory | 234816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286552101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1286552101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.2091854719 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 242396763 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 10:59:06 PM UTC 24 |
| Finished | Oct 02 10:59:09 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091854719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.2091854719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.33336586 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 197922169 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 10:59:06 PM UTC 24 |
| Finished | Oct 02 10:59:09 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33336586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.33336586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.2004720025 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 2967915470 ps |
| CPU time | 30.08 seconds |
| Started | Oct 02 10:59:06 PM UTC 24 |
| Finished | Oct 02 10:59:37 PM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004720025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.2004720025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.2071408702 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 2695288636 ps |
| CPU time | 71.27 seconds |
| Started | Oct 02 10:59:06 PM UTC 24 |
| Finished | Oct 02 11:00:19 PM UTC 24 |
| Peak memory | 230704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071408702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.2071408702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.1736192687 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 1751109876 ps |
| CPU time | 12.34 seconds |
| Started | Oct 02 10:59:06 PM UTC 24 |
| Finished | Oct 02 10:59:20 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736192687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.1736192687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.308003220 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 174679209 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 10:59:06 PM UTC 24 |
| Finished | Oct 02 10:59:09 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=308003220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.308003220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.2357657759 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 141626541 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 10:59:09 PM UTC 24 |
| Finished | Oct 02 10:59:12 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357657759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.2357657759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.3488152518 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 179693885 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 10:59:09 PM UTC 24 |
| Finished | Oct 02 10:59:12 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488152518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.3488152518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.4201033039 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 181158492 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 10:59:11 PM UTC 24 |
| Finished | Oct 02 10:59:14 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201033039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.4201033039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.2680141861 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 155278067 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 10:59:11 PM UTC 24 |
| Finished | Oct 02 10:59:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680141861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.2680141861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.709704186 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 149055964 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 10:59:11 PM UTC 24 |
| Finished | Oct 02 10:59:14 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709704186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_out_trans_nak.709704186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.3027798624 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 177109112 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 10:59:12 PM UTC 24 |
| Finished | Oct 02 10:59:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3027798624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.3027798624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1667058439 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 198910569 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 10:59:12 PM UTC 24 |
| Finished | Oct 02 10:59:15 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667058439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.1667058439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.591126028 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 170809397 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 10:59:13 PM UTC 24 |
| Finished | Oct 02 10:59:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=591126028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.591126028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1776871644 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 159827480 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 10:59:15 PM UTC 24 |
| Finished | Oct 02 10:59:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776871644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.1776871644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.1311708128 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 37765399 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 10:59:15 PM UTC 24 |
| Finished | Oct 02 10:59:17 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311708128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.1311708128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2722386443 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 14624345312 ps |
| CPU time | 42.37 seconds |
| Started | Oct 02 10:59:15 PM UTC 24 |
| Finished | Oct 02 10:59:59 PM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722386443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.2722386443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.1431882283 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 184010499 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 10:59:17 PM UTC 24 |
| Finished | Oct 02 10:59:20 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431882283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.1431882283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.2750095736 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 183404037 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 10:59:17 PM UTC 24 |
| Finished | Oct 02 10:59:19 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750095736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.2750095736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.1527578638 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 9319803022 ps |
| CPU time | 61.22 seconds |
| Started | Oct 02 10:59:17 PM UTC 24 |
| Finished | Oct 02 11:00:20 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527578638 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.1527578638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.3619995973 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 6673601926 ps |
| CPU time | 91.02 seconds |
| Started | Oct 02 10:59:19 PM UTC 24 |
| Finished | Oct 02 11:00:52 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619995973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.3619995973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.3780805974 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 5586651419 ps |
| CPU time | 51.79 seconds |
| Started | Oct 02 10:59:19 PM UTC 24 |
| Finished | Oct 02 11:00:13 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780805974 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.3780805974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.3925021242 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 212194107 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 10:59:17 PM UTC 24 |
| Finished | Oct 02 10:59:20 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3925021242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.3925021242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.539195192 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 222256150 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 10:59:17 PM UTC 24 |
| Finished | Oct 02 10:59:20 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539195192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.539195192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.3412657459 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 20188073838 ps |
| CPU time | 28.07 seconds |
| Started | Oct 02 10:59:19 PM UTC 24 |
| Finished | Oct 02 10:59:49 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412657459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.3412657459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.4084399514 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 135055156 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 10:59:19 PM UTC 24 |
| Finished | Oct 02 10:59:22 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084399514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.4084399514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.3114482113 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 209259459 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 10:59:22 PM UTC 24 |
| Finished | Oct 02 10:59:24 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114482113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.3114482113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.1395017353 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 556082758 ps |
| CPU time | 2.47 seconds |
| Started | Oct 02 10:59:27 PM UTC 24 |
| Finished | Oct 02 10:59:31 PM UTC 24 |
| Peak memory | 252156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395017353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.1395017353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.4265858140 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 467255981 ps |
| CPU time | 2.81 seconds |
| Started | Oct 02 10:59:22 PM UTC 24 |
| Finished | Oct 02 10:59:26 PM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265858140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.4265858140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.611301027 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 207360600 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 10:59:22 PM UTC 24 |
| Finished | Oct 02 10:59:25 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=611301027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.611301027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.4166302310 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 150577548 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 10:59:22 PM UTC 24 |
| Finished | Oct 02 10:59:24 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166302310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.4166302310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.2303948858 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 189595692 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 10:59:24 PM UTC 24 |
| Finished | Oct 02 10:59:26 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303948858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.2303948858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.639418545 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 217837260 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 10:59:24 PM UTC 24 |
| Finished | Oct 02 10:59:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=639418545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.639418545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.3739381501 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 3149799128 ps |
| CPU time | 85.11 seconds |
| Started | Oct 02 10:59:24 PM UTC 24 |
| Finished | Oct 02 11:00:51 PM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739381501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.3739381501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.327276801 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 161860319 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 10:59:24 PM UTC 24 |
| Finished | Oct 02 10:59:26 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327276801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.327276801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.4150486636 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 164488967 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 10:59:24 PM UTC 24 |
| Finished | Oct 02 10:59:26 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150486636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.4150486636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.9593553 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 852566136 ps |
| CPU time | 2.48 seconds |
| Started | Oct 02 10:59:26 PM UTC 24 |
| Finished | Oct 02 10:59:30 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=9593553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stream_len_max.9593553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.1265179426 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 2479603324 ps |
| CPU time | 24.44 seconds |
| Started | Oct 02 10:59:26 PM UTC 24 |
| Finished | Oct 02 10:59:52 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265179426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.1265179426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.99430481 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 6824132743 ps |
| CPU time | 43.41 seconds |
| Started | Oct 02 10:59:26 PM UTC 24 |
| Finished | Oct 02 11:00:11 PM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=99430481 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02 /usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.99430481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.4023059531 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 4999273735 ps |
| CPU time | 32.86 seconds |
| Started | Oct 02 10:58:58 PM UTC 24 |
| Finished | Oct 02 10:59:32 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4023059531 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.4023059531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.2034322705 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 472341826 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 10:59:26 PM UTC 24 |
| Finished | Oct 02 10:59:29 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2034322705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.2034322705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.3449908256 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 52979841 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:06:53 PM UTC 24 |
| Finished | Oct 02 11:06:55 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449908256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.3449908256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.3997379342 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 5703066920 ps |
| CPU time | 8.99 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:06:48 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997379342 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.3997379342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.13506193 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 18539031044 ps |
| CPU time | 24.91 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:07:04 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=13506193 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.13506193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.728704802 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 24967411226 ps |
| CPU time | 37.55 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:07:17 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=728704802 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.728704802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.57421161 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 163186375 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:06:40 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57421161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_av_buffer.57421161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.3094782924 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 155227650 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:06:40 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094782924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.3094782924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.740133140 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 384696098 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:06:41 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=740133140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_data_toggle_clear.740133140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.3322826612 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 498450902 ps |
| CPU time | 1.94 seconds |
| Started | Oct 02 11:06:38 PM UTC 24 |
| Finished | Oct 02 11:06:41 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322826612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.3322826612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.508090271 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 43470205200 ps |
| CPU time | 81.02 seconds |
| Started | Oct 02 11:06:39 PM UTC 24 |
| Finished | Oct 02 11:08:02 PM UTC 24 |
| Peak memory | 218412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=508090271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_device_address.508090271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.4098963210 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 5710973238 ps |
| CPU time | 34.74 seconds |
| Started | Oct 02 11:06:39 PM UTC 24 |
| Finished | Oct 02 11:07:15 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098963210 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.4098963210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.4071059428 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 634582667 ps |
| CPU time | 2.17 seconds |
| Started | Oct 02 11:06:39 PM UTC 24 |
| Finished | Oct 02 11:06:43 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071059428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.4071059428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.2208813917 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 144013362 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:06:40 PM UTC 24 |
| Finished | Oct 02 11:06:42 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208813917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.2208813917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_enable.1049511564 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 34776884 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:06:40 PM UTC 24 |
| Finished | Oct 02 11:06:42 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049511564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.1049511564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.2026873432 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 791256639 ps |
| CPU time | 2.08 seconds |
| Started | Oct 02 11:06:40 PM UTC 24 |
| Finished | Oct 02 11:06:43 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026873432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.2026873432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.1514047978 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 511191647 ps |
| CPU time | 2.23 seconds |
| Started | Oct 02 11:06:40 PM UTC 24 |
| Finished | Oct 02 11:06:43 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514047978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.1514047978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.54938940 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 438473079 ps |
| CPU time | 2.42 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:06:45 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54938940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_fifo_rst.54938940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.3790538243 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 218454592 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:06:44 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790538243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.3790538243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.3116566334 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 192274769 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:06:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116566334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.3116566334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.1560659604 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 227529883 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:06:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560659604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.1560659604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.1333596637 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 3915484773 ps |
| CPU time | 31.06 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:07:13 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333596637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.1333596637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.4221427910 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 6430417017 ps |
| CPU time | 70.07 seconds |
| Started | Oct 02 11:06:41 PM UTC 24 |
| Finished | Oct 02 11:07:53 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221427910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.4221427910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.3797661527 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 177340166 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:06:43 PM UTC 24 |
| Finished | Oct 02 11:06:45 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797661527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.3797661527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.1428859711 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 14574841316 ps |
| CPU time | 22.95 seconds |
| Started | Oct 02 11:06:43 PM UTC 24 |
| Finished | Oct 02 11:07:07 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428859711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.1428859711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.1408784002 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 8291226138 ps |
| CPU time | 12.72 seconds |
| Started | Oct 02 11:06:43 PM UTC 24 |
| Finished | Oct 02 11:06:57 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408784002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.1408784002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.1729232201 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 4559345635 ps |
| CPU time | 116.89 seconds |
| Started | Oct 02 11:06:43 PM UTC 24 |
| Finished | Oct 02 11:08:42 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729232201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.1729232201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.1192510000 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 2251687489 ps |
| CPU time | 17.71 seconds |
| Started | Oct 02 11:06:43 PM UTC 24 |
| Finished | Oct 02 11:07:02 PM UTC 24 |
| Peak memory | 235172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192510000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.1192510000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.43918827 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 261076077 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:06:43 PM UTC 24 |
| Finished | Oct 02 11:06:46 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=43918827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.43918827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.4077296608 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 195962864 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:06:47 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077296608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.4077296608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.180853080 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 3181978705 ps |
| CPU time | 23.72 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 234920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180853080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.180853080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.2864593128 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 3372473823 ps |
| CPU time | 102.25 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:08:29 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864593128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.2864593128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.523247576 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 165330900 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:06:47 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=523247576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.523247576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.2100112016 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 158511065 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:06:47 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100112016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.2100112016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.1484720576 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 238522090 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:06:47 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484720576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.1484720576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.703004676 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 187904928 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:06:45 PM UTC 24 |
| Finished | Oct 02 11:06:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703004676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_out_iso.703004676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.3519881300 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 228130126 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:06:46 PM UTC 24 |
| Finished | Oct 02 11:06:49 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519881300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.3519881300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.319382580 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 166187844 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:06:46 PM UTC 24 |
| Finished | Oct 02 11:06:49 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=319382580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_out_trans_nak.319382580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.1067047129 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 151767887 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:06:46 PM UTC 24 |
| Finished | Oct 02 11:06:49 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067047129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.1067047129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.3659101064 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 225406892 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:06:47 PM UTC 24 |
| Finished | Oct 02 11:06:49 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3659101064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.3659101064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2750671645 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 155842310 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:06:47 PM UTC 24 |
| Finished | Oct 02 11:06:49 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750671645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2750671645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.511575595 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 39012808 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:06:48 PM UTC 24 |
| Finished | Oct 02 11:06:50 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=511575595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_phy_pins_sense.511575595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.4154527280 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 8644583192 ps |
| CPU time | 21.19 seconds |
| Started | Oct 02 11:06:48 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 234908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154527280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.4154527280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.3939131414 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 234598562 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:06:48 PM UTC 24 |
| Finished | Oct 02 11:06:50 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939131414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.3939131414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.2918662224 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 204103809 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:06:48 PM UTC 24 |
| Finished | Oct 02 11:06:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918662224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.2918662224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.1067837422 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 182868514 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:06:48 PM UTC 24 |
| Finished | Oct 02 11:06:51 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067837422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.1067837422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.3783160760 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 176529327 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:06:49 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783160760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.3783160760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.211118841 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 165814295 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:06:49 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211118841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_rx_crc_err.211118841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.3967936536 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 261636722 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:06:50 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967936536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.3967936536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.1955040571 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 148163843 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:06:50 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955040571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.1955040571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.2483847862 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 145141364 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:06:50 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483847862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2483847862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.3053401073 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 216681186 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:06:50 PM UTC 24 |
| Finished | Oct 02 11:06:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053401073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3053401073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.999000817 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 2506007030 ps |
| CPU time | 23.71 seconds |
| Started | Oct 02 11:06:51 PM UTC 24 |
| Finished | Oct 02 11:07:16 PM UTC 24 |
| Peak memory | 234828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=999000817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.999000817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.2427081065 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 154644166 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:06:51 PM UTC 24 |
| Finished | Oct 02 11:06:53 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427081065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.2427081065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.2204968578 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 162561829 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:06:51 PM UTC 24 |
| Finished | Oct 02 11:06:54 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204968578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.2204968578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.2145917796 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 596250598 ps |
| CPU time | 2.4 seconds |
| Started | Oct 02 11:06:51 PM UTC 24 |
| Finished | Oct 02 11:06:55 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145917796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.2145917796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.2356451192 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 2619072085 ps |
| CPU time | 18.28 seconds |
| Started | Oct 02 11:06:51 PM UTC 24 |
| Finished | Oct 02 11:07:11 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356451192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.2356451192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.853020869 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 3589747142 ps |
| CPU time | 21.98 seconds |
| Started | Oct 02 11:06:39 PM UTC 24 |
| Finished | Oct 02 11:07:03 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=853020869 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.853020869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.4094288577 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 550621558 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:06:51 PM UTC 24 |
| Finished | Oct 02 11:06:54 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4094288577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.4094288577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.2903150035 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 653267549 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:15:57 PM UTC 24 |
| Finished | Oct 02 11:16:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2903150035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.2903150035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.2106539790 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 514380484 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:16:00 PM UTC 24 |
| Finished | Oct 02 11:16:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2106539790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.2106539790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.3881039543 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 665982243 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 217552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3881039543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.3881039543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.3922218479 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 499561394 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3922218479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.3922218479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.969511754 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 634106466 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=969511754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_t x_rx_disruption.969511754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.3207101522 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 510222885 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3207101522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.3207101522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3387505490 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 524950858 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3387505490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3387505490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.4211058669 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 594679602 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4211058669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.4211058669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.4280468369 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 639177430 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4280468369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.4280468369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.1228067209 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 479350333 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:16:02 PM UTC 24 |
| Finished | Oct 02 11:16:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1228067209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.1228067209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.1390522127 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 49885734 ps |
| CPU time | 0.76 seconds |
| Started | Oct 02 11:07:11 PM UTC 24 |
| Finished | Oct 02 11:07:13 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390522127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.1390522127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.3472377887 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 8929400464 ps |
| CPU time | 12.54 seconds |
| Started | Oct 02 11:06:53 PM UTC 24 |
| Finished | Oct 02 11:07:07 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472377887 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.3472377887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.4244936882 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 15085251404 ps |
| CPU time | 18.85 seconds |
| Started | Oct 02 11:06:53 PM UTC 24 |
| Finished | Oct 02 11:07:13 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244936882 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.4244936882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.4248208697 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 24513102008 ps |
| CPU time | 32.66 seconds |
| Started | Oct 02 11:06:53 PM UTC 24 |
| Finished | Oct 02 11:07:27 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248208697 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.4248208697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.663051984 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 157266299 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:06:53 PM UTC 24 |
| Finished | Oct 02 11:06:55 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663051984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_av_buffer.663051984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.2865240751 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 163362959 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:06:53 PM UTC 24 |
| Finished | Oct 02 11:06:55 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865240751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.2865240751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.3011004205 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 448237924 ps |
| CPU time | 2.69 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:06:58 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011004205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.3011004205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.219465112 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 1088253247 ps |
| CPU time | 4.68 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:07:00 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=219465112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.219465112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3666101213 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 51416921904 ps |
| CPU time | 102.7 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666101213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3666101213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.3485488042 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 319966207 ps |
| CPU time | 4.84 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485488042 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.3485488042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.3342462509 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 775074649 ps |
| CPU time | 2.34 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:06:58 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342462509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.3342462509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.2891748524 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 135408509 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:06:57 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891748524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.2891748524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_enable.2993123759 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 37641792 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:06:56 PM UTC 24 |
| Finished | Oct 02 11:06:59 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993123759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.2993123759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.3276483582 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 777366180 ps |
| CPU time | 3.57 seconds |
| Started | Oct 02 11:06:56 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276483582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.3276483582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.2407795814 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 396409592 ps |
| CPU time | 2.43 seconds |
| Started | Oct 02 11:06:56 PM UTC 24 |
| Finished | Oct 02 11:07:00 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407795814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.2407795814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.54555552 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 283453705 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:06:57 PM UTC 24 |
| Finished | Oct 02 11:06:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54555552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_fifo_levels.54555552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.1557482460 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 436872454 ps |
| CPU time | 3.06 seconds |
| Started | Oct 02 11:06:57 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557482460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.1557482460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.445769506 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 236903886 ps |
| CPU time | 2.24 seconds |
| Started | Oct 02 11:06:58 PM UTC 24 |
| Finished | Oct 02 11:07:02 PM UTC 24 |
| Peak memory | 228224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445769506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.445769506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.2438397308 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 142630998 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:06:58 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438397308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.2438397308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.2530974162 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 180112469 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:06:58 PM UTC 24 |
| Finished | Oct 02 11:07:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530974162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.2530974162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.4099950124 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 4657964787 ps |
| CPU time | 34.81 seconds |
| Started | Oct 02 11:06:57 PM UTC 24 |
| Finished | Oct 02 11:07:33 PM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099950124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.4099950124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.2710759384 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 10298667499 ps |
| CPU time | 126.02 seconds |
| Started | Oct 02 11:06:59 PM UTC 24 |
| Finished | Oct 02 11:09:08 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710759384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.2710759384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.370400575 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 230119267 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:06:59 PM UTC 24 |
| Finished | Oct 02 11:07:02 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370400575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_in_err.370400575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.2111057653 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 27515116385 ps |
| CPU time | 45.28 seconds |
| Started | Oct 02 11:06:59 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111057653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.2111057653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.3304943615 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 3922252459 ps |
| CPU time | 7.42 seconds |
| Started | Oct 02 11:07:01 PM UTC 24 |
| Finished | Oct 02 11:07:09 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304943615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.3304943615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.2894132343 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 4491622857 ps |
| CPU time | 43.31 seconds |
| Started | Oct 02 11:07:01 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894132343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.2894132343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.1309061918 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 3193820190 ps |
| CPU time | 31.87 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:36 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309061918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.1309061918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.2059516833 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 283221633 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:05 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059516833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.2059516833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.3413121567 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 186737535 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413121567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.3413121567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.4105277859 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 3628163877 ps |
| CPU time | 94.38 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105277859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.4105277859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.3330825418 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 2266527027 ps |
| CPU time | 17.13 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330825418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.3330825418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.2279744834 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 172976425 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:05 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279744834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.2279744834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.541591009 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 138310971 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=541591009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.541591009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.372669515 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 210102953 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372669515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_nak_trans.372669515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.286465048 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 167634471 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286465048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_out_iso.286465048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.294488056 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 207407979 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294488056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_out_stall.294488056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.176882959 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 141012837 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:07:03 PM UTC 24 |
| Finished | Oct 02 11:07:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=176882959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_out_trans_nak.176882959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.1596024015 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 217775296 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:07:04 PM UTC 24 |
| Finished | Oct 02 11:07:07 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596024015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.1596024015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.1720608055 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 322038573 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:07:04 PM UTC 24 |
| Finished | Oct 02 11:07:07 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720608055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.1720608055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.2857098685 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 200039865 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:07:05 PM UTC 24 |
| Finished | Oct 02 11:07:08 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857098685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.2857098685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.2210005038 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 47632150 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:07:07 PM UTC 24 |
| Finished | Oct 02 11:07:09 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210005038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.2210005038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.2485588470 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 18818313737 ps |
| CPU time | 51.07 seconds |
| Started | Oct 02 11:07:07 PM UTC 24 |
| Finished | Oct 02 11:08:00 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485588470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.2485588470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.1662825920 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 215941256 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:07:07 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662825920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.1662825920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.1269436282 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 205342703 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269436282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.1269436282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.2750660099 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 230963070 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750660099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.2750660099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.1521181975 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 145235637 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521181975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.1521181975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.1394529434 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 140312557 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1394529434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.1394529434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.163828927 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 259998792 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=163828927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_rx_full.163828927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1809514749 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 152902093 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809514749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.1809514749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3272135038 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 164922494 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272135038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3272135038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.3373684819 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 235542421 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:10 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373684819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.3373684819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.761776471 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 1887203801 ps |
| CPU time | 16.79 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:26 PM UTC 24 |
| Peak memory | 234772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=761776471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.761776471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.1424145505 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 175779197 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424145505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.1424145505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.3862371206 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 190698942 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:07:08 PM UTC 24 |
| Finished | Oct 02 11:07:11 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862371206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.3862371206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.3764815515 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 847649839 ps |
| CPU time | 2.29 seconds |
| Started | Oct 02 11:07:09 PM UTC 24 |
| Finished | Oct 02 11:07:13 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764815515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.3764815515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.3774365279 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 2690437183 ps |
| CPU time | 69.64 seconds |
| Started | Oct 02 11:07:09 PM UTC 24 |
| Finished | Oct 02 11:08:21 PM UTC 24 |
| Peak memory | 234712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774365279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.3774365279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.3069896734 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 1832632243 ps |
| CPU time | 40.22 seconds |
| Started | Oct 02 11:06:55 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069896734 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.3069896734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.2233004464 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 590920550 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:07:09 PM UTC 24 |
| Finished | Oct 02 11:07:12 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2233004464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.2233004464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.2880792403 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 566232962 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2880792403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.2880792403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.37685546 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 571307703 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=37685546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_tx _rx_disruption.37685546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.2865966657 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 600108822 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2865966657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.2865966657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.1782132058 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 595418480 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1782132058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.1782132058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3624446539 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 569668415 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3624446539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3624446539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.983835260 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 521025238 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=983835260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_t x_rx_disruption.983835260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.4154807383 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 592103854 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4154807383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.4154807383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.2806305130 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 623488468 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2806305130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.2806305130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.2261427932 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 443728749 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2261427932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.2261427932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.3693325241 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 734250426 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3693325241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.3693325241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.4072361658 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 73873989 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:07:23 PM UTC 24 |
| Finished | Oct 02 11:07:26 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072361658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.4072361658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.49465070 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 5006664825 ps |
| CPU time | 7.81 seconds |
| Started | Oct 02 11:07:11 PM UTC 24 |
| Finished | Oct 02 11:07:20 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49465070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.49465070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1852300747 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 20730079977 ps |
| CPU time | 28.27 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:41 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852300747 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.1852300747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.1944819951 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 26210563854 ps |
| CPU time | 36.05 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:49 PM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944819951 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.1944819951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.3532445187 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 157533271 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:14 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532445187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.3532445187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.220071222 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 147973484 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:14 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220071222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_bitstuff_err.220071222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.3861717950 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 562466255 ps |
| CPU time | 1.98 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:15 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861717950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.3861717950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.609764596 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 857586845 ps |
| CPU time | 3.04 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:16 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609764596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.609764596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.781693813 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 25075569653 ps |
| CPU time | 45.71 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:59 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781693813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.781693813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.4129740159 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 4298302026 ps |
| CPU time | 27.45 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:41 PM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129740159 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.4129740159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.1819160519 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 586383843 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:15 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819160519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.1819160519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.2790274011 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 144822722 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:14 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790274011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.2790274011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_enable.1443736714 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 43779461 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:14 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443736714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.1443736714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3075098661 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 844528711 ps |
| CPU time | 3.28 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:16 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075098661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3075098661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.239607551 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 551687024 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:15 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=239607551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.239607551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.2746400943 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 396500133 ps |
| CPU time | 3.07 seconds |
| Started | Oct 02 11:07:13 PM UTC 24 |
| Finished | Oct 02 11:07:17 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746400943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.2746400943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.2328591820 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 192107764 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:07:13 PM UTC 24 |
| Finished | Oct 02 11:07:16 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328591820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.2328591820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.2239288746 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 152538137 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:07:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239288746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.2239288746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.3853193802 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 178045636 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:07:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853193802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.3853193802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.2481897602 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 2892767149 ps |
| CPU time | 22.45 seconds |
| Started | Oct 02 11:07:13 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481897602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.2481897602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.3717351910 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 10635355000 ps |
| CPU time | 119.73 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717351910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.3717351910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.3002111294 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 254523649 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:07:17 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002111294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.3002111294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.781578026 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 8172691253 ps |
| CPU time | 10.72 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:07:27 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781578026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_resume.781578026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.3945809018 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 4830989148 ps |
| CPU time | 8.48 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:07:25 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945809018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.3945809018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.3632642895 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 3034971724 ps |
| CPU time | 22.99 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632642895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.3632642895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.959782138 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 2083598094 ps |
| CPU time | 56.86 seconds |
| Started | Oct 02 11:07:15 PM UTC 24 |
| Finished | Oct 02 11:08:14 PM UTC 24 |
| Peak memory | 228296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=959782138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.959782138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.2219605860 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 250391206 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219605860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.2219605860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2737172828 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 213214866 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737172828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2737172828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.2394968165 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 2791106301 ps |
| CPU time | 73.73 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:08:32 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394968165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.2394968165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2725812790 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 2202553576 ps |
| CPU time | 17.15 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:35 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725812790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2725812790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.1079478512 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 164447990 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1079478512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.1079478512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1143921369 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 165472053 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143921369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1143921369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.2759361874 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 179425689 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759361874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.2759361874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.752135100 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 148615957 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752135100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.752135100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.4269298327 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 215558115 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:07:17 PM UTC 24 |
| Finished | Oct 02 11:07:19 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269298327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.4269298327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.1704888291 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 171922163 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:07:18 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704888291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.1704888291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.1567839933 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 146526978 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:07:18 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567839933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.1567839933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.274755504 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 198995492 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:07:18 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=274755504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.274755504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.3072704044 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 152092391 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:07:18 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072704044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.3072704044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.4214418420 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 35607935 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:07:19 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214418420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.4214418420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.1761642025 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 14405107947 ps |
| CPU time | 36.29 seconds |
| Started | Oct 02 11:07:19 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761642025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.1761642025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.2400659900 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 154232953 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:07:19 PM UTC 24 |
| Finished | Oct 02 11:07:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400659900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.2400659900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.3675896156 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 273185428 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675896156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.3675896156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.326756383 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 224103282 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326756383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_random_length_in_transaction.326756383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.2848715817 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 166890399 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848715817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.2848715817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.991214279 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 158469661 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=991214279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_rx_crc_err.991214279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.3705564935 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 370448384 ps |
| CPU time | 2 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:24 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705564935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.3705564935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.3457670479 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 148665820 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457670479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.3457670479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.621869855 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 173305663 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=621869855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 22.usbdev_setup_trans_ignored.621869855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.2720253853 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 240434845 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:07:20 PM UTC 24 |
| Finished | Oct 02 11:07:23 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720253853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.2720253853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.1862731635 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 2326867612 ps |
| CPU time | 59.1 seconds |
| Started | Oct 02 11:07:22 PM UTC 24 |
| Finished | Oct 02 11:08:23 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862731635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.1862731635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.3723956022 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 228983176 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:07:22 PM UTC 24 |
| Finished | Oct 02 11:07:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723956022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.3723956022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.3259974812 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 211127585 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:07:22 PM UTC 24 |
| Finished | Oct 02 11:07:24 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259974812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.3259974812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2680344757 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 989178884 ps |
| CPU time | 2.59 seconds |
| Started | Oct 02 11:07:22 PM UTC 24 |
| Finished | Oct 02 11:07:26 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680344757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2680344757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.1579740396 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 2398970835 ps |
| CPU time | 19.17 seconds |
| Started | Oct 02 11:07:22 PM UTC 24 |
| Finished | Oct 02 11:07:43 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579740396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.1579740396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.116153214 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 957213049 ps |
| CPU time | 16.39 seconds |
| Started | Oct 02 11:07:12 PM UTC 24 |
| Finished | Oct 02 11:07:30 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=116153214 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.116153214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.390731795 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 501644899 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:07:22 PM UTC 24 |
| Finished | Oct 02 11:07:25 PM UTC 24 |
| Peak memory | 217332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=390731795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_tx _rx_disruption.390731795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.2256325675 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 665427088 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2256325675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.2256325675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.4101321520 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 557963004 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:04 PM UTC 24 |
| Finished | Oct 02 11:16:17 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4101321520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.4101321520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.2324062459 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 630969399 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:06 PM UTC 24 |
| Finished | Oct 02 11:16:29 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2324062459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.2324062459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.4058508744 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 33613181 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:07:39 PM UTC 24 |
| Finished | Oct 02 11:07:41 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4058508744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.4058508744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.3857853719 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 8693647941 ps |
| CPU time | 12.06 seconds |
| Started | Oct 02 11:07:23 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857853719 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.3857853719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.4153665477 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 19209970393 ps |
| CPU time | 27.99 seconds |
| Started | Oct 02 11:07:24 PM UTC 24 |
| Finished | Oct 02 11:07:53 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153665477 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.4153665477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.819024224 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 29201660017 ps |
| CPU time | 47.82 seconds |
| Started | Oct 02 11:07:24 PM UTC 24 |
| Finished | Oct 02 11:08:13 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819024224 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.819024224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.781628463 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 187073877 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:07:24 PM UTC 24 |
| Finished | Oct 02 11:07:27 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781628463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_av_buffer.781628463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.2622043000 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 173195541 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:07:24 PM UTC 24 |
| Finished | Oct 02 11:07:26 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622043000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.2622043000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.2774704841 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 346472696 ps |
| CPU time | 2.11 seconds |
| Started | Oct 02 11:07:24 PM UTC 24 |
| Finished | Oct 02 11:07:27 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774704841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.2774704841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.1247599689 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 382189211 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:07:25 PM UTC 24 |
| Finished | Oct 02 11:07:28 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247599689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.1247599689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.3743348875 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 32695125151 ps |
| CPU time | 62.22 seconds |
| Started | Oct 02 11:07:25 PM UTC 24 |
| Finished | Oct 02 11:08:29 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743348875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.3743348875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.2452790000 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 1462679449 ps |
| CPU time | 32.12 seconds |
| Started | Oct 02 11:07:25 PM UTC 24 |
| Finished | Oct 02 11:07:59 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452790000 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.2452790000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.1084901814 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 730171286 ps |
| CPU time | 2.96 seconds |
| Started | Oct 02 11:07:25 PM UTC 24 |
| Finished | Oct 02 11:07:29 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084901814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.1084901814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.3233101103 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 146404797 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:07:25 PM UTC 24 |
| Finished | Oct 02 11:07:27 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233101103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.3233101103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_enable.855372974 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 28808574 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:07:27 PM UTC 24 |
| Finished | Oct 02 11:07:29 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855372974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_enable.855372974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.2249368885 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 1034688636 ps |
| CPU time | 3.51 seconds |
| Started | Oct 02 11:07:27 PM UTC 24 |
| Finished | Oct 02 11:07:31 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249368885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.2249368885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.2294014278 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 281470293 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:07:27 PM UTC 24 |
| Finished | Oct 02 11:07:29 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294014278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.2294014278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.3606547017 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 144569224 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:07:27 PM UTC 24 |
| Finished | Oct 02 11:07:29 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606547017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.3606547017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.1429255990 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 280268187 ps |
| CPU time | 2.68 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:07:32 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429255990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.1429255990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.2674010732 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 188942370 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:07:31 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674010732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.2674010732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.3533261481 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 144012057 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:07:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533261481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.3533261481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.3390744020 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 202062722 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:07:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390744020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.3390744020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.1401190901 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 5684526386 ps |
| CPU time | 154.45 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:10:06 PM UTC 24 |
| Peak memory | 230492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401190901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.1401190901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.2147374658 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 11058164829 ps |
| CPU time | 67.42 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:08:38 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147374658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.2147374658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.4148285409 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 223398752 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:07:31 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148285409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.4148285409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.1523668134 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 26235827713 ps |
| CPU time | 41.36 seconds |
| Started | Oct 02 11:07:28 PM UTC 24 |
| Finished | Oct 02 11:08:11 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523668134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.1523668134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.134860043 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 5430314858 ps |
| CPU time | 8.66 seconds |
| Started | Oct 02 11:07:30 PM UTC 24 |
| Finished | Oct 02 11:07:40 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=134860043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_suspend.134860043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.591693654 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 6173896975 ps |
| CPU time | 64.44 seconds |
| Started | Oct 02 11:07:30 PM UTC 24 |
| Finished | Oct 02 11:08:36 PM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=591693654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.591693654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.906468340 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 2720859214 ps |
| CPU time | 71.57 seconds |
| Started | Oct 02 11:07:30 PM UTC 24 |
| Finished | Oct 02 11:08:43 PM UTC 24 |
| Peak memory | 228432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=906468340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.906468340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.667517243 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 278791272 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:07:30 PM UTC 24 |
| Finished | Oct 02 11:07:32 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667517243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.667517243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.553576796 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 239207601 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:07:30 PM UTC 24 |
| Finished | Oct 02 11:07:32 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553576796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.553576796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.2875916963 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 3234421447 ps |
| CPU time | 83.72 seconds |
| Started | Oct 02 11:07:32 PM UTC 24 |
| Finished | Oct 02 11:08:57 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875916963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.2875916963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3058191431 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 1945091581 ps |
| CPU time | 20.09 seconds |
| Started | Oct 02 11:07:32 PM UTC 24 |
| Finished | Oct 02 11:07:53 PM UTC 24 |
| Peak memory | 235012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058191431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3058191431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.2529571754 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 153948037 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:07:32 PM UTC 24 |
| Finished | Oct 02 11:07:34 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529571754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.2529571754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.3798589020 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 151319997 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:07:32 PM UTC 24 |
| Finished | Oct 02 11:07:34 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798589020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.3798589020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.1767221765 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 217489854 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:07:32 PM UTC 24 |
| Finished | Oct 02 11:07:34 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767221765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.1767221765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.314353891 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 153683349 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:07:32 PM UTC 24 |
| Finished | Oct 02 11:07:34 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=314353891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_out_iso.314353891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.2780787117 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 174514901 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:07:33 PM UTC 24 |
| Finished | Oct 02 11:07:35 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780787117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.2780787117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.944175583 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 153380964 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:07:33 PM UTC 24 |
| Finished | Oct 02 11:07:35 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944175583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_out_trans_nak.944175583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.4255639832 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 255719441 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:07:33 PM UTC 24 |
| Finished | Oct 02 11:07:35 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255639832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.4255639832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.1017259277 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 221187742 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:07:33 PM UTC 24 |
| Finished | Oct 02 11:07:36 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017259277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.1017259277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.487963761 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 197870837 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:07:33 PM UTC 24 |
| Finished | Oct 02 11:07:36 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487963761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.487963761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.125194248 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 37740142 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:07:35 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=125194248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_phy_pins_sense.125194248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.2785730622 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 6898387328 ps |
| CPU time | 22.34 seconds |
| Started | Oct 02 11:07:35 PM UTC 24 |
| Finished | Oct 02 11:07:58 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785730622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.2785730622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.3385426397 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 144822340 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:07:35 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385426397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.3385426397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.3213306550 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 195707654 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:07:35 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213306550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.3213306550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.247198058 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 214916219 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:07:35 PM UTC 24 |
| Finished | Oct 02 11:07:37 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=247198058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_random_length_in_transaction.247198058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.1101811744 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 152310288 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:07:36 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101811744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.1101811744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.3255828179 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 153584535 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:07:37 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255828179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.3255828179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.93689943 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 415393646 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:07:37 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 215368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=93689943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_full.93689943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.561638587 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 170229112 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:07:37 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 217624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561638587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_setup_stage.561638587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.3246425174 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 147511388 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:07:37 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246425174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.3246425174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.3680692509 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 221678238 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:07:37 PM UTC 24 |
| Finished | Oct 02 11:07:39 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680692509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.3680692509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2923738699 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 2400460397 ps |
| CPU time | 23.97 seconds |
| Started | Oct 02 11:07:37 PM UTC 24 |
| Finished | Oct 02 11:08:02 PM UTC 24 |
| Peak memory | 234824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923738699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2923738699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.3123230231 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 216526749 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:07:38 PM UTC 24 |
| Finished | Oct 02 11:07:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123230231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.3123230231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.2209928981 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 167399004 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:07:38 PM UTC 24 |
| Finished | Oct 02 11:07:41 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209928981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.2209928981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.2084627329 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 717427657 ps |
| CPU time | 2.73 seconds |
| Started | Oct 02 11:07:38 PM UTC 24 |
| Finished | Oct 02 11:07:42 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084627329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.2084627329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.561988462 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 2633791740 ps |
| CPU time | 19.13 seconds |
| Started | Oct 02 11:07:38 PM UTC 24 |
| Finished | Oct 02 11:07:59 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561988462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_streaming_out.561988462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.2539884686 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 595548784 ps |
| CPU time | 5.09 seconds |
| Started | Oct 02 11:07:25 PM UTC 24 |
| Finished | Oct 02 11:07:31 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539884686 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.2539884686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.2184931899 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 534082843 ps |
| CPU time | 2.33 seconds |
| Started | Oct 02 11:07:39 PM UTC 24 |
| Finished | Oct 02 11:07:42 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2184931899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.2184931899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.3171324615 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 580814861 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:16:07 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3171324615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.3171324615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.2191657009 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 552732994 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:16:07 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2191657009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.2191657009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.82753492 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 511133937 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:16:07 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=82753492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_tx _rx_disruption.82753492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.1457535818 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 583082639 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:16:07 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1457535818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.1457535818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.3952191299 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 584600530 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:07 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3952191299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.3952191299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.3769583401 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 501701098 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:16:08 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3769583401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.3769583401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.1491122077 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 668122694 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:16:08 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1491122077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.1491122077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.3480538754 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 64683692 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:07:57 PM UTC 24 |
| Finished | Oct 02 11:07:59 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480538754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.3480538754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.2487815214 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 9170337437 ps |
| CPU time | 18.1 seconds |
| Started | Oct 02 11:07:39 PM UTC 24 |
| Finished | Oct 02 11:07:58 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487815214 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.2487815214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.3475853386 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 13653864188 ps |
| CPU time | 16.54 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:07:58 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475853386 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.3475853386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.2864132405 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 23402826838 ps |
| CPU time | 34.07 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:08:15 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864132405 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.2864132405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.148284567 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 170376280 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:07:42 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148284567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_av_buffer.148284567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.2521194956 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 171635400 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:07:42 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521194956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.2521194956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.33390767 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 434299565 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:07:43 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33390767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_clear.33390767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.4028446186 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 446778592 ps |
| CPU time | 2.46 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:07:44 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028446186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.4028446186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.3857768166 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 29350867105 ps |
| CPU time | 57.96 seconds |
| Started | Oct 02 11:07:40 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857768166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.3857768166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.4002078762 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 1080478441 ps |
| CPU time | 10.95 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:07:54 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002078762 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.4002078762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.1525563849 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 1049397339 ps |
| CPU time | 4.49 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:07:47 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525563849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.1525563849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1801203026 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 147126067 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:07:44 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801203026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.1801203026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_enable.2767897470 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 27949491 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:07:44 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2767897470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.2767897470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.864557337 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 907247895 ps |
| CPU time | 2.83 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864557337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.864557337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.409175557 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 382551459 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:07:45 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409175557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.409175557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.3682902962 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 259906457 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:07:44 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682902962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.3682902962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.707694006 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 353342598 ps |
| CPU time | 2.87 seconds |
| Started | Oct 02 11:07:44 PM UTC 24 |
| Finished | Oct 02 11:07:48 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707694006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_fifo_rst.707694006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.2313046426 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 230409077 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:07:44 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313046426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.2313046426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.987627309 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 142662179 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:07:44 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987627309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_stall.987627309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.2829419295 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 162225930 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:07:44 PM UTC 24 |
| Finished | Oct 02 11:07:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829419295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.2829419295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.2440924891 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 5476690917 ps |
| CPU time | 53.13 seconds |
| Started | Oct 02 11:07:44 PM UTC 24 |
| Finished | Oct 02 11:08:39 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440924891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.2440924891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.2134392165 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 8222017377 ps |
| CPU time | 56.96 seconds |
| Started | Oct 02 11:07:45 PM UTC 24 |
| Finished | Oct 02 11:08:44 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134392165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.2134392165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.572557362 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 226669774 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:07:45 PM UTC 24 |
| Finished | Oct 02 11:07:48 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=572557362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_in_err.572557362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.3470582218 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 27834794467 ps |
| CPU time | 44.48 seconds |
| Started | Oct 02 11:07:45 PM UTC 24 |
| Finished | Oct 02 11:08:31 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470582218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.3470582218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.1142823565 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 9644953754 ps |
| CPU time | 16.97 seconds |
| Started | Oct 02 11:07:45 PM UTC 24 |
| Finished | Oct 02 11:08:03 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142823565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.1142823565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.3988908742 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 4602330133 ps |
| CPU time | 125.16 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:09:55 PM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988908742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3988908742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.740651368 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 3076282776 ps |
| CPU time | 83.93 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 228680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=740651368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.740651368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.4059043152 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 292344500 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:07:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059043152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.4059043152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.2449896839 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 189669969 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:07:50 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449896839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.2449896839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.2315431159 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 2762769727 ps |
| CPU time | 75.38 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:09:05 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315431159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.2315431159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.1472559454 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 1690216773 ps |
| CPU time | 16.64 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:08:06 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472559454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.1472559454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.234996162 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 214760711 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:07:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234996162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.234996162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.2750895701 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 199171007 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:07:48 PM UTC 24 |
| Finished | Oct 02 11:07:50 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750895701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.2750895701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2137249898 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 171160993 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:07:49 PM UTC 24 |
| Finished | Oct 02 11:07:52 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137249898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.2137249898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.4278135541 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 173269001 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:07:49 PM UTC 24 |
| Finished | Oct 02 11:07:52 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278135541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.4278135541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.3487912860 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 155230727 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:07:49 PM UTC 24 |
| Finished | Oct 02 11:07:52 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487912860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.3487912860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.1505672905 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 187976960 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:07:50 PM UTC 24 |
| Finished | Oct 02 11:07:52 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505672905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.1505672905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.2351092658 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 165420519 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:07:51 PM UTC 24 |
| Finished | Oct 02 11:07:53 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351092658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.2351092658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.2700039907 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 270792540 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:07:51 PM UTC 24 |
| Finished | Oct 02 11:07:53 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700039907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.2700039907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.550437879 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 140623520 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:07:51 PM UTC 24 |
| Finished | Oct 02 11:07:53 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550437879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.550437879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.501310671 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 76553562 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:07:52 PM UTC 24 |
| Finished | Oct 02 11:07:54 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501310671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_phy_pins_sense.501310671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.3777345831 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 9700030155 ps |
| CPU time | 26.29 seconds |
| Started | Oct 02 11:07:52 PM UTC 24 |
| Finished | Oct 02 11:08:20 PM UTC 24 |
| Peak memory | 232440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777345831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.3777345831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.2770187816 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 173677368 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:07:52 PM UTC 24 |
| Finished | Oct 02 11:07:54 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770187816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.2770187816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.2658375477 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 187657269 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:07:53 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658375477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.2658375477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2815752894 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 167404468 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:07:54 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815752894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2815752894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.557061437 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 183251438 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:07:54 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557061437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.557061437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.1961544689 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 147353403 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:07:54 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961544689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.1961544689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.146544750 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 348345875 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:07:54 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146544750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_rx_full.146544750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.3293419384 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 141801313 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:07:54 PM UTC 24 |
| Finished | Oct 02 11:07:56 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293419384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.3293419384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.2022138384 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 188523370 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:07:55 PM UTC 24 |
| Finished | Oct 02 11:07:57 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022138384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.2022138384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2135244885 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 245521187 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:07:55 PM UTC 24 |
| Finished | Oct 02 11:07:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135244885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2135244885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.1557145134 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 2310135369 ps |
| CPU time | 17.04 seconds |
| Started | Oct 02 11:07:55 PM UTC 24 |
| Finished | Oct 02 11:08:13 PM UTC 24 |
| Peak memory | 235212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557145134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.1557145134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.3720937310 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 159641851 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:07:55 PM UTC 24 |
| Finished | Oct 02 11:07:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720937310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3720937310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.2020172960 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 183125108 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:07:55 PM UTC 24 |
| Finished | Oct 02 11:07:58 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020172960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.2020172960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.4201512115 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 1388288549 ps |
| CPU time | 3.89 seconds |
| Started | Oct 02 11:07:57 PM UTC 24 |
| Finished | Oct 02 11:08:02 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201512115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.4201512115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.2707601455 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 1843489628 ps |
| CPU time | 14.24 seconds |
| Started | Oct 02 11:07:55 PM UTC 24 |
| Finished | Oct 02 11:08:11 PM UTC 24 |
| Peak memory | 234832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707601455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.2707601455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.127019629 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 2934030011 ps |
| CPU time | 24.04 seconds |
| Started | Oct 02 11:07:42 PM UTC 24 |
| Finished | Oct 02 11:08:07 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127019629 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.127019629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1027932196 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 519767734 ps |
| CPU time | 2.41 seconds |
| Started | Oct 02 11:07:57 PM UTC 24 |
| Finished | Oct 02 11:08:00 PM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1027932196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1027932196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.536669817 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 644272505 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:08 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=536669817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_t x_rx_disruption.536669817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.3088796179 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 636308040 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:08 PM UTC 24 |
| Finished | Oct 02 11:16:11 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3088796179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.3088796179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.160229204 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 523434045 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:16:08 PM UTC 24 |
| Finished | Oct 02 11:16:29 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160229204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_t x_rx_disruption.160229204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.2756184887 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 547710156 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:08 PM UTC 24 |
| Finished | Oct 02 11:16:29 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2756184887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.2756184887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.753914659 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 599163424 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=753914659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_t x_rx_disruption.753914659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.3848606106 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 658688047 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3848606106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.3848606106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.2948948434 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 450065737 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2948948434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.2948948434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.536469238 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 600350143 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=536469238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_t x_rx_disruption.536469238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.3034753863 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 577090574 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3034753863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.3034753863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.3068914592 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 43899422 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:08:13 PM UTC 24 |
| Finished | Oct 02 11:08:15 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068914592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.3068914592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.836462553 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 6472889016 ps |
| CPU time | 11.44 seconds |
| Started | Oct 02 11:07:57 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=836462553 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.836462553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.3143031770 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 18481677964 ps |
| CPU time | 31.61 seconds |
| Started | Oct 02 11:07:57 PM UTC 24 |
| Finished | Oct 02 11:08:30 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143031770 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.3143031770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.2350930445 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 23467560753 ps |
| CPU time | 35.77 seconds |
| Started | Oct 02 11:07:57 PM UTC 24 |
| Finished | Oct 02 11:08:34 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350930445 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.2350930445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.3038880052 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 199837537 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:01 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038880052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.3038880052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.1629433986 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 144749414 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629433986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.1629433986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.2397910942 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 346298903 ps |
| CPU time | 2.26 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:02 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397910942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.2397910942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.730784759 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 982694719 ps |
| CPU time | 2.84 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:03 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730784759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.730784759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.3276209406 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 19560872402 ps |
| CPU time | 40.5 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:41 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276209406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.3276209406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.3607215484 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 3429033040 ps |
| CPU time | 27.71 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:28 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607215484 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.3607215484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.3890230995 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 576351133 ps |
| CPU time | 2.36 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:02 PM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890230995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.3890230995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.842891529 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 150488501 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:03 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=842891529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_disconnected.842891529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_enable.2459496484 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 39978393 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:02 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459496484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.2459496484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.1686256170 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 896588198 ps |
| CPU time | 2.77 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:04 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686256170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.1686256170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.758681361 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 274199581 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:04 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758681361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.758681361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.665894358 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 577959517 ps |
| CPU time | 3.04 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:05 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=665894358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_fifo_rst.665894358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.5061651 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 194417756 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:08:02 PM UTC 24 |
| Finished | Oct 02 11:08:05 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=5061651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.5061651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.3552200405 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 149832319 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:08:02 PM UTC 24 |
| Finished | Oct 02 11:08:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552200405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.3552200405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.1984537253 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 233106315 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:08:03 PM UTC 24 |
| Finished | Oct 02 11:08:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984537253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.1984537253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.1365866541 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 4083000645 ps |
| CPU time | 37.68 seconds |
| Started | Oct 02 11:08:01 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 235092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365866541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.1365866541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.599367306 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 5870559950 ps |
| CPU time | 36.64 seconds |
| Started | Oct 02 11:08:03 PM UTC 24 |
| Finished | Oct 02 11:08:41 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=599367306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.599367306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.1803575067 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 198445184 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:08:03 PM UTC 24 |
| Finished | Oct 02 11:08:05 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803575067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.1803575067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3266649334 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 29052206715 ps |
| CPU time | 46.7 seconds |
| Started | Oct 02 11:08:04 PM UTC 24 |
| Finished | Oct 02 11:08:53 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266649334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3266649334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.160854591 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 10722480412 ps |
| CPU time | 14.76 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:08:20 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160854591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_suspend.160854591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.1523347084 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 3729994487 ps |
| CPU time | 108 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:09:55 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523347084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.1523347084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1615610521 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 2401672700 ps |
| CPU time | 24.32 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:08:30 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615610521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1615610521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.3423647144 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 244223697 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:08:07 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423647144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.3423647144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.1677581896 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 190926684 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:08:07 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677581896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.1677581896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.3225091681 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 2758266519 ps |
| CPU time | 69.78 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:09:16 PM UTC 24 |
| Peak memory | 228668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3225091681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3225091681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.2543233054 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 156831664 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:08:07 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543233054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.2543233054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.188826553 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 146257884 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:08:05 PM UTC 24 |
| Finished | Oct 02 11:08:07 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188826553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.188826553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2937964463 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 194483186 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:08:06 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937964463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2937964463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.687567898 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 175945526 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:08:06 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687567898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_out_iso.687567898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.820337336 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 184283976 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:08:06 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=820337336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_out_stall.820337336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.4010349401 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 167697988 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:08:06 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010349401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.4010349401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.2481882704 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 162973624 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:08:06 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481882704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.2481882704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.3683627704 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 243291503 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:08:06 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683627704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.3683627704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3143419534 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 152127530 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:08:07 PM UTC 24 |
| Finished | Oct 02 11:08:09 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143419534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.3143419534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.3687738117 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 96329223 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:08:08 PM UTC 24 |
| Finished | Oct 02 11:08:10 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687738117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.3687738117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.114855343 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 6832328636 ps |
| CPU time | 18.49 seconds |
| Started | Oct 02 11:08:08 PM UTC 24 |
| Finished | Oct 02 11:08:28 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=114855343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.114855343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.4106395756 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 187547247 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:08:08 PM UTC 24 |
| Finished | Oct 02 11:08:10 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106395756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.4106395756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.2473572900 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 252591552 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:08:08 PM UTC 24 |
| Finished | Oct 02 11:08:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473572900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.2473572900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.414240395 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 236553091 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:08:08 PM UTC 24 |
| Finished | Oct 02 11:08:11 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=414240395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_random_length_in_transaction.414240395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.3195548994 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 254798369 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:08:12 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195548994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.3195548994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.369475437 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 191962899 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:08:12 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369475437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_rx_crc_err.369475437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.2730008889 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 251537191 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:08:12 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730008889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.2730008889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.1491442057 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 158461392 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:08:12 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491442057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.1491442057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.3218601389 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 183647183 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:08:12 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218601389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.3218601389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.288200913 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 260174470 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:08:13 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288200913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.288200913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.1708065772 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 3239431598 ps |
| CPU time | 87.36 seconds |
| Started | Oct 02 11:08:10 PM UTC 24 |
| Finished | Oct 02 11:09:39 PM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708065772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.1708065772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.2868963334 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 193325195 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:08:11 PM UTC 24 |
| Finished | Oct 02 11:08:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868963334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2868963334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.2380328324 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 190018683 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:08:11 PM UTC 24 |
| Finished | Oct 02 11:08:14 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380328324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.2380328324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.182912693 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 1111627956 ps |
| CPU time | 4.51 seconds |
| Started | Oct 02 11:08:11 PM UTC 24 |
| Finished | Oct 02 11:08:17 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182912693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_stream_len_max.182912693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.1934461913 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 3522002113 ps |
| CPU time | 94.75 seconds |
| Started | Oct 02 11:08:11 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934461913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.1934461913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.1068631272 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 1185229096 ps |
| CPU time | 25.18 seconds |
| Started | Oct 02 11:07:59 PM UTC 24 |
| Finished | Oct 02 11:08:25 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1068631272 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.1068631272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.2907746994 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 553383110 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:08:11 PM UTC 24 |
| Finished | Oct 02 11:08:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2907746994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.2907746994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.720880558 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 466228777 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=720880558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_t x_rx_disruption.720880558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.3198814414 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 479121921 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3198814414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.3198814414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.3908609852 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 561864662 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3908609852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.3908609852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.1038943699 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 565074481 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:16:12 PM UTC 24 |
| Finished | Oct 02 11:16:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1038943699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.1038943699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.2711940591 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 656253938 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2711940591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.2711940591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.2898152745 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 604194525 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2898152745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.2898152745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.1182884141 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 472889752 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1182884141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.1182884141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.1764147631 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 614568380 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1764147631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.1764147631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.983458166 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 436952468 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=983458166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_t x_rx_disruption.983458166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.1815913840 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 513272098 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1815913840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.1815913840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2106378657 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 41772421 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:08:32 PM UTC 24 |
| Finished | Oct 02 11:08:34 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106378657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2106378657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.1366629647 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 6063479128 ps |
| CPU time | 9.33 seconds |
| Started | Oct 02 11:08:13 PM UTC 24 |
| Finished | Oct 02 11:08:23 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366629647 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.1366629647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.3763276073 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 14289785797 ps |
| CPU time | 20.27 seconds |
| Started | Oct 02 11:08:13 PM UTC 24 |
| Finished | Oct 02 11:08:34 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763276073 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.3763276073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.2981689454 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 25251366001 ps |
| CPU time | 31.51 seconds |
| Started | Oct 02 11:08:13 PM UTC 24 |
| Finished | Oct 02 11:08:46 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981689454 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.2981689454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.3161836868 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 160455887 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:08:13 PM UTC 24 |
| Finished | Oct 02 11:08:15 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161836868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.3161836868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.1143261409 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 148483043 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:08:13 PM UTC 24 |
| Finished | Oct 02 11:08:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143261409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.1143261409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.3266878458 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 434815496 ps |
| CPU time | 2.53 seconds |
| Started | Oct 02 11:08:14 PM UTC 24 |
| Finished | Oct 02 11:08:18 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266878458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.3266878458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.2958394847 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 1160139766 ps |
| CPU time | 5.33 seconds |
| Started | Oct 02 11:08:14 PM UTC 24 |
| Finished | Oct 02 11:08:21 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958394847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.2958394847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.1709605130 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 28702611171 ps |
| CPU time | 50.21 seconds |
| Started | Oct 02 11:08:14 PM UTC 24 |
| Finished | Oct 02 11:09:06 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709605130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.1709605130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.3825792429 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 5718800945 ps |
| CPU time | 51.4 seconds |
| Started | Oct 02 11:08:14 PM UTC 24 |
| Finished | Oct 02 11:09:07 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825792429 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.3825792429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.3960338605 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 944985450 ps |
| CPU time | 2.4 seconds |
| Started | Oct 02 11:08:15 PM UTC 24 |
| Finished | Oct 02 11:08:18 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960338605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.3960338605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.1208402936 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 159506997 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:08:15 PM UTC 24 |
| Finished | Oct 02 11:08:17 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208402936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.1208402936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_enable.4231913429 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 64252543 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:08:16 PM UTC 24 |
| Finished | Oct 02 11:08:18 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231913429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.4231913429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.4067808751 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 767536580 ps |
| CPU time | 3.32 seconds |
| Started | Oct 02 11:08:16 PM UTC 24 |
| Finished | Oct 02 11:08:20 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067808751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.4067808751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1033793323 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 159253419 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:08:16 PM UTC 24 |
| Finished | Oct 02 11:08:18 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033793323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1033793323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.3492364361 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 165643545 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:08:16 PM UTC 24 |
| Finished | Oct 02 11:08:19 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492364361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.3492364361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3958964447 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 434367979 ps |
| CPU time | 3.73 seconds |
| Started | Oct 02 11:08:17 PM UTC 24 |
| Finished | Oct 02 11:08:22 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958964447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3958964447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.3467938365 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 257153153 ps |
| CPU time | 1.94 seconds |
| Started | Oct 02 11:08:18 PM UTC 24 |
| Finished | Oct 02 11:08:20 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467938365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.3467938365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3700302255 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 167502249 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:08:19 PM UTC 24 |
| Finished | Oct 02 11:08:21 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700302255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3700302255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.1021203639 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 249330148 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:08:19 PM UTC 24 |
| Finished | Oct 02 11:08:21 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021203639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.1021203639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.1252463741 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 4326059807 ps |
| CPU time | 34.95 seconds |
| Started | Oct 02 11:08:17 PM UTC 24 |
| Finished | Oct 02 11:08:54 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252463741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.1252463741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.4042770579 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 7644639281 ps |
| CPU time | 87.56 seconds |
| Started | Oct 02 11:08:19 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042770579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.4042770579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.1427581739 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 248680827 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:08:20 PM UTC 24 |
| Finished | Oct 02 11:08:23 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427581739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.1427581739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.1878771226 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 8944825473 ps |
| CPU time | 15.62 seconds |
| Started | Oct 02 11:08:20 PM UTC 24 |
| Finished | Oct 02 11:08:37 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878771226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.1878771226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.49142096 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 6173718088 ps |
| CPU time | 11.96 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:08:36 PM UTC 24 |
| Peak memory | 227968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=49142096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_link_suspend.49142096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.1580778597 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 4113212871 ps |
| CPU time | 39.48 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:09:03 PM UTC 24 |
| Peak memory | 234616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580778597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.1580778597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.268371783 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 1915216771 ps |
| CPU time | 15.88 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 228232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=268371783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.268371783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.2778094744 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 250371239 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:08:25 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778094744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.2778094744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.1428535685 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 273998589 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:08:25 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428535685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.1428535685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.665096807 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 4002586089 ps |
| CPU time | 38.75 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:09:03 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=665096807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.665096807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.1001547170 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 164034724 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:08:25 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001547170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.1001547170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.983222479 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 172487448 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:08:22 PM UTC 24 |
| Finished | Oct 02 11:08:25 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983222479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.983222479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.1971267694 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 236481295 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:08:24 PM UTC 24 |
| Finished | Oct 02 11:08:26 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971267694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.1971267694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.357437034 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 197080967 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:08:24 PM UTC 24 |
| Finished | Oct 02 11:08:26 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357437034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_out_iso.357437034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.2740883843 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 246433848 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:08:24 PM UTC 24 |
| Finished | Oct 02 11:08:27 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740883843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.2740883843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.1687580267 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 210572262 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:08:24 PM UTC 24 |
| Finished | Oct 02 11:08:27 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687580267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.1687580267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.3509713068 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 155323480 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:08:26 PM UTC 24 |
| Finished | Oct 02 11:08:29 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509713068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.3509713068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3467454929 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 239840995 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:08:26 PM UTC 24 |
| Finished | Oct 02 11:08:29 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467454929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3467454929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.116443496 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 145678892 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:08:26 PM UTC 24 |
| Finished | Oct 02 11:08:29 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116443496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.116443496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.1797598728 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 41310626 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:08:26 PM UTC 24 |
| Finished | Oct 02 11:08:29 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797598728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.1797598728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.578128956 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 6348883777 ps |
| CPU time | 17.03 seconds |
| Started | Oct 02 11:08:26 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 234760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578128956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_pkt_buffer.578128956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.3739580473 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 205698674 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:08:28 PM UTC 24 |
| Finished | Oct 02 11:08:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739580473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.3739580473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.1573493625 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 224614780 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:08:28 PM UTC 24 |
| Finished | Oct 02 11:08:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573493625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.1573493625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.3762049160 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 215974045 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:08:28 PM UTC 24 |
| Finished | Oct 02 11:08:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762049160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.3762049160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.421278982 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 188663680 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:08:28 PM UTC 24 |
| Finished | Oct 02 11:08:31 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421278982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.421278982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2547120398 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 204071666 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:08:28 PM UTC 24 |
| Finished | Oct 02 11:08:30 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547120398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2547120398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.2442944208 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 332687128 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:08:29 PM UTC 24 |
| Finished | Oct 02 11:08:32 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442944208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.2442944208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.3469668619 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 155065756 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:08:29 PM UTC 24 |
| Finished | Oct 02 11:08:32 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469668619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.3469668619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.4212581137 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 150185518 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:08:29 PM UTC 24 |
| Finished | Oct 02 11:08:32 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212581137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.4212581137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.3860273769 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 190614233 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:08:34 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860273769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.3860273769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.532014372 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 1675904621 ps |
| CPU time | 44.13 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=532014372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.532014372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.1579895096 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 163996409 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:08:34 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579895096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.1579895096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.747675713 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 178713908 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:08:34 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747675713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_stall_trans.747675713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.1240489537 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 946055410 ps |
| CPU time | 3.36 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:08:36 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240489537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.1240489537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.691806421 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 3724420573 ps |
| CPU time | 97.65 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:10:11 PM UTC 24 |
| Peak memory | 228516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=691806421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_streaming_out.691806421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.1239585571 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 1026673184 ps |
| CPU time | 21.21 seconds |
| Started | Oct 02 11:08:15 PM UTC 24 |
| Finished | Oct 02 11:08:37 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239585571 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.1239585571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2488720203 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 642480851 ps |
| CPU time | 2.39 seconds |
| Started | Oct 02 11:08:31 PM UTC 24 |
| Finished | Oct 02 11:08:35 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2488720203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.2488720203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.4013871740 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 568247170 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4013871740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.4013871740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.1706321657 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 596705538 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1706321657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.1706321657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.698520752 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 617232772 ps |
| CPU time | 1.83 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=698520752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_t x_rx_disruption.698520752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.2643245330 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 672993743 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2643245330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.2643245330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.331801987 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 466771608 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=331801987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_t x_rx_disruption.331801987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3199578172 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 516843251 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:16:16 PM UTC 24 |
| Finished | Oct 02 11:16:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3199578172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3199578172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.3911776303 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 505180527 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3911776303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.3911776303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.4097183298 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 581505697 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4097183298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.4097183298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.2880926582 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 497283829 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2880926582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.2880926582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.4198592490 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 511146230 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4198592490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.4198592490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.2378368238 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 57853198 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:08:49 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378368238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.2378368238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.2892335669 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 11463687569 ps |
| CPU time | 17.12 seconds |
| Started | Oct 02 11:08:32 PM UTC 24 |
| Finished | Oct 02 11:08:50 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892335669 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.2892335669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.4041716129 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 18386745487 ps |
| CPU time | 32.19 seconds |
| Started | Oct 02 11:08:32 PM UTC 24 |
| Finished | Oct 02 11:09:05 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041716129 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.4041716129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.1835393080 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 30487487437 ps |
| CPU time | 43.48 seconds |
| Started | Oct 02 11:08:32 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835393080 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.1835393080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.2781323045 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 204978967 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:08:33 PM UTC 24 |
| Finished | Oct 02 11:08:35 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781323045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.2781323045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.750684214 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 147284979 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:08:33 PM UTC 24 |
| Finished | Oct 02 11:08:36 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=750684214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_bitstuff_err.750684214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.1910195718 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 353903858 ps |
| CPU time | 2.32 seconds |
| Started | Oct 02 11:08:33 PM UTC 24 |
| Finished | Oct 02 11:08:36 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910195718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.1910195718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.3097964140 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 1145966995 ps |
| CPU time | 3.24 seconds |
| Started | Oct 02 11:08:33 PM UTC 24 |
| Finished | Oct 02 11:08:37 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097964140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.3097964140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.942034822 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 18192503591 ps |
| CPU time | 34.52 seconds |
| Started | Oct 02 11:08:35 PM UTC 24 |
| Finished | Oct 02 11:09:10 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942034822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_device_address.942034822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.1506547597 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 5678898637 ps |
| CPU time | 35.67 seconds |
| Started | Oct 02 11:08:35 PM UTC 24 |
| Finished | Oct 02 11:09:12 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506547597 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.1506547597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.3078557935 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 826410397 ps |
| CPU time | 2.56 seconds |
| Started | Oct 02 11:08:35 PM UTC 24 |
| Finished | Oct 02 11:08:38 PM UTC 24 |
| Peak memory | 217648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078557935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.3078557935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.1102113993 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 145998444 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:08:35 PM UTC 24 |
| Finished | Oct 02 11:08:37 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102113993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.1102113993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_enable.855638462 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 37857179 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:08:35 PM UTC 24 |
| Finished | Oct 02 11:08:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855638462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.855638462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.3949852841 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 883933187 ps |
| CPU time | 3.02 seconds |
| Started | Oct 02 11:08:36 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949852841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.3949852841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.332171711 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 321112554 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:08:36 PM UTC 24 |
| Finished | Oct 02 11:08:39 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332171711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.332171711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.184770688 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 253774352 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:08:36 PM UTC 24 |
| Finished | Oct 02 11:08:39 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=184770688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_fifo_levels.184770688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.33029345 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 434160205 ps |
| CPU time | 3.61 seconds |
| Started | Oct 02 11:08:36 PM UTC 24 |
| Finished | Oct 02 11:08:41 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33029345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_fifo_rst.33029345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.708251462 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 168170925 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:08:36 PM UTC 24 |
| Finished | Oct 02 11:08:39 PM UTC 24 |
| Peak memory | 226032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=708251462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.708251462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.2150228436 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 138445744 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150228436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.2150228436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.1545651287 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 273812362 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:08:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545651287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.1545651287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.3752052442 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 4733268396 ps |
| CPU time | 43.6 seconds |
| Started | Oct 02 11:08:36 PM UTC 24 |
| Finished | Oct 02 11:09:21 PM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752052442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.3752052442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.1108148611 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 10767546996 ps |
| CPU time | 67.22 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:09:47 PM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108148611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1108148611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.1378288997 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 188010257 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:08:41 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378288997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.1378288997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.2342687939 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 33220089892 ps |
| CPU time | 56.15 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:09:36 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342687939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.2342687939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.279286853 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 11353834232 ps |
| CPU time | 16.49 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:08:56 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=279286853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_suspend.279286853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.1378701519 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 2631599290 ps |
| CPU time | 24.25 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:09:04 PM UTC 24 |
| Peak memory | 234896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378701519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.1378701519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.3332091252 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 1896860198 ps |
| CPU time | 47.66 seconds |
| Started | Oct 02 11:08:38 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332091252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.3332091252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.1866613020 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 293322791 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:08:42 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866613020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1866613020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.436308205 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 184470903 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:08:42 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436308205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.436308205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.1323135428 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 2522644222 ps |
| CPU time | 24.29 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:09:06 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323135428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.1323135428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.972779046 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 192218652 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:08:43 PM UTC 24 |
| Peak memory | 215416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=972779046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.972779046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.879617988 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 143330966 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:08:43 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879617988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.879617988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.1519709926 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 222993779 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:08:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519709926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.1519709926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.2726711982 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 206539567 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:08:40 PM UTC 24 |
| Finished | Oct 02 11:08:42 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726711982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.2726711982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.1861297196 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 179607008 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 216628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861297196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.1861297196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.732072086 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 192085668 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 216528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732072086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_out_trans_nak.732072086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.379761386 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 147780174 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379761386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pending_in_trans.379761386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.1902516924 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 276038608 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1902516924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.1902516924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.2203596951 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 190652760 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203596951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.2203596951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.1816610429 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 31391546 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816610429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.1816610429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.104992745 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 7346752348 ps |
| CPU time | 21.38 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:09:06 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104992745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_pkt_buffer.104992745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.1373420768 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 156040576 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1373420768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.1373420768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.3507149796 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 232413698 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507149796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.3507149796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.324607321 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 208860810 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324607321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_random_length_in_transaction.324607321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.318642143 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 173734263 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318642143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.318642143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.1733341793 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 150700532 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:08:43 PM UTC 24 |
| Finished | Oct 02 11:08:45 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733341793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.1733341793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.4128253218 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 246183343 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:47 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128253218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.4128253218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.408863600 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 164102945 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:47 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=408863600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_setup_stage.408863600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.1386034840 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 150961653 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386034840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.1386034840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.2411082173 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 190133746 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:47 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411082173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.2411082173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.933060973 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 2449262419 ps |
| CPU time | 64.34 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:09:51 PM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=933060973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.933060973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.1432705182 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 175066627 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432705182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.1432705182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.2295304389 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 185388001 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:47 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295304389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.2295304389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.1911652709 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 878349745 ps |
| CPU time | 2.41 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:08:48 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911652709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.1911652709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.4219039509 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 3868766468 ps |
| CPU time | 35.86 seconds |
| Started | Oct 02 11:08:45 PM UTC 24 |
| Finished | Oct 02 11:09:22 PM UTC 24 |
| Peak memory | 228724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219039509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.4219039509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.4266282557 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 3386746346 ps |
| CPU time | 29.25 seconds |
| Started | Oct 02 11:08:35 PM UTC 24 |
| Finished | Oct 02 11:09:05 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266282557 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.4266282557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.2641763632 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 541537920 ps |
| CPU time | 1.97 seconds |
| Started | Oct 02 11:08:46 PM UTC 24 |
| Finished | Oct 02 11:08:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2641763632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.2641763632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.2928701353 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 708305178 ps |
| CPU time | 2.09 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2928701353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.2928701353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.3386136899 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 457702758 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3386136899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.3386136899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.1943089949 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 481365224 ps |
| CPU time | 1.83 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943089949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.1943089949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.2329640167 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 525425704 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2329640167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.2329640167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.1504847313 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 581113479 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1504847313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.1504847313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.424076767 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 531063817 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=424076767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_t x_rx_disruption.424076767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.2078193324 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 588250101 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2078193324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.2078193324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.2815432825 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 613839927 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2815432825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.2815432825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.876775950 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 478001019 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=876775950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_t x_rx_disruption.876775950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.3357632792 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 492411749 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3357632792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.3357632792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.3012863447 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 43234423 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:09:02 PM UTC 24 |
| Finished | Oct 02 11:09:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012863447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.3012863447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.1925501005 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 11942736008 ps |
| CPU time | 18.77 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:09:07 PM UTC 24 |
| Peak memory | 217800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925501005 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.1925501005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.132568203 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 15009054009 ps |
| CPU time | 18.83 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:09:07 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=132568203 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.132568203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.350393786 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 28618858380 ps |
| CPU time | 45.44 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:09:34 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=350393786 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.350393786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.745928581 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 170626162 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:08:50 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745928581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_av_buffer.745928581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.2938978052 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 155728772 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:08:49 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938978052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.2938978052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.3479569642 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 214362753 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:08:49 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479569642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.3479569642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1212258547 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 1042246439 ps |
| CPU time | 4.64 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:08:53 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212258547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1212258547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.1303279745 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 17996086705 ps |
| CPU time | 35.07 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:09:24 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303279745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1303279745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.434749020 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 1020724438 ps |
| CPU time | 21.25 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:09:10 PM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434749020 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.434749020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.1612329748 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 877682913 ps |
| CPU time | 2.36 seconds |
| Started | Oct 02 11:08:48 PM UTC 24 |
| Finished | Oct 02 11:08:52 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612329748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.1612329748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.663674085 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 138918201 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:08:48 PM UTC 24 |
| Finished | Oct 02 11:08:51 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663674085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_disconnected.663674085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_enable.3609073222 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 54283215 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:08:48 PM UTC 24 |
| Finished | Oct 02 11:08:51 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609073222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.3609073222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.1375439822 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 893500061 ps |
| CPU time | 2.75 seconds |
| Started | Oct 02 11:08:48 PM UTC 24 |
| Finished | Oct 02 11:08:52 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375439822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.1375439822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.2163526517 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 319638836 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:08:49 PM UTC 24 |
| Finished | Oct 02 11:08:51 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163526517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.2163526517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.2028033627 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 165629324 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:08:49 PM UTC 24 |
| Finished | Oct 02 11:08:51 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028033627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.2028033627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.3428683327 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 190867584 ps |
| CPU time | 2.11 seconds |
| Started | Oct 02 11:08:50 PM UTC 24 |
| Finished | Oct 02 11:08:53 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428683327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.3428683327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.3282963859 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 182089805 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:08:50 PM UTC 24 |
| Finished | Oct 02 11:08:52 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282963859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.3282963859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.188450228 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 157977443 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:08:50 PM UTC 24 |
| Finished | Oct 02 11:08:53 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188450228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_in_stall.188450228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.1366596460 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 193815638 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:08:50 PM UTC 24 |
| Finished | Oct 02 11:08:53 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366596460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.1366596460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1946112848 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 5623848472 ps |
| CPU time | 153.34 seconds |
| Started | Oct 02 11:08:50 PM UTC 24 |
| Finished | Oct 02 11:11:26 PM UTC 24 |
| Peak memory | 233396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946112848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1946112848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.663783371 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 7554883689 ps |
| CPU time | 54.14 seconds |
| Started | Oct 02 11:08:50 PM UTC 24 |
| Finished | Oct 02 11:09:46 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=663783371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.663783371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.1613206067 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 235637739 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:08:52 PM UTC 24 |
| Finished | Oct 02 11:08:54 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613206067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.1613206067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.2084690376 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 33665618296 ps |
| CPU time | 57.15 seconds |
| Started | Oct 02 11:08:52 PM UTC 24 |
| Finished | Oct 02 11:09:50 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084690376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.2084690376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.3163317814 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 9187462712 ps |
| CPU time | 15.71 seconds |
| Started | Oct 02 11:08:52 PM UTC 24 |
| Finished | Oct 02 11:09:09 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163317814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.3163317814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.525532706 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 2814051972 ps |
| CPU time | 21.41 seconds |
| Started | Oct 02 11:08:52 PM UTC 24 |
| Finished | Oct 02 11:09:14 PM UTC 24 |
| Peak memory | 234836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525532706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.525532706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.1247475345 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 1702807269 ps |
| CPU time | 13.53 seconds |
| Started | Oct 02 11:08:52 PM UTC 24 |
| Finished | Oct 02 11:09:06 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247475345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.1247475345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.3353009234 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 268684335 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:08:53 PM UTC 24 |
| Finished | Oct 02 11:08:56 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353009234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3353009234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.1866341467 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 197358933 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:08:53 PM UTC 24 |
| Finished | Oct 02 11:08:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866341467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.1866341467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.1283922560 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 2842451824 ps |
| CPU time | 74.1 seconds |
| Started | Oct 02 11:08:53 PM UTC 24 |
| Finished | Oct 02 11:10:09 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283922560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.1283922560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.3585932167 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 169016502 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:08:53 PM UTC 24 |
| Finished | Oct 02 11:08:56 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585932167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.3585932167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.144621274 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 176124527 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:08:54 PM UTC 24 |
| Finished | Oct 02 11:08:56 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144621274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.144621274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1533852125 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 182703789 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:08:54 PM UTC 24 |
| Finished | Oct 02 11:08:56 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533852125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.1533852125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.386441445 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 176415018 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:08:55 PM UTC 24 |
| Finished | Oct 02 11:08:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386441445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_out_iso.386441445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.1513782334 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 159685277 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:08:55 PM UTC 24 |
| Finished | Oct 02 11:08:57 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513782334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.1513782334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.2173764080 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 208419411 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:08:55 PM UTC 24 |
| Finished | Oct 02 11:08:57 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173764080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.2173764080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.2242885176 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 181335826 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:08:55 PM UTC 24 |
| Finished | Oct 02 11:08:58 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242885176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.2242885176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.3152784108 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 237448448 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:08:55 PM UTC 24 |
| Finished | Oct 02 11:08:58 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152784108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.3152784108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.1432270907 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 156260085 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:08:57 PM UTC 24 |
| Finished | Oct 02 11:08:59 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432270907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.1432270907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.1801742114 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 72416515 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:08:57 PM UTC 24 |
| Finished | Oct 02 11:08:59 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801742114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.1801742114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.1266213631 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 6505821545 ps |
| CPU time | 19.25 seconds |
| Started | Oct 02 11:08:57 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266213631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.1266213631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.4294621456 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 190002254 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:08:57 PM UTC 24 |
| Finished | Oct 02 11:08:59 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294621456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.4294621456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.2182930906 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 196284830 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:08:57 PM UTC 24 |
| Finished | Oct 02 11:08:59 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182930906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.2182930906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.2312806257 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 170777763 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:08:58 PM UTC 24 |
| Finished | Oct 02 11:09:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312806257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.2312806257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.1979897572 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 173221919 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:08:58 PM UTC 24 |
| Finished | Oct 02 11:09:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979897572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.1979897572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.3970450836 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 191193880 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:08:58 PM UTC 24 |
| Finished | Oct 02 11:09:01 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970450836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.3970450836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.724154750 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 341526476 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:08:59 PM UTC 24 |
| Finished | Oct 02 11:09:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724154750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_rx_full.724154750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.1150873066 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 157551194 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:08:59 PM UTC 24 |
| Finished | Oct 02 11:09:01 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150873066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.1150873066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.4248981484 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 189698982 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:08:59 PM UTC 24 |
| Finished | Oct 02 11:09:01 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248981484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.4248981484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.1269459734 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 267644613 ps |
| CPU time | 1.93 seconds |
| Started | Oct 02 11:08:59 PM UTC 24 |
| Finished | Oct 02 11:09:02 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269459734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.1269459734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.450147505 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 2660055400 ps |
| CPU time | 20.55 seconds |
| Started | Oct 02 11:09:00 PM UTC 24 |
| Finished | Oct 02 11:09:22 PM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450147505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.450147505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.2087586321 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 202090056 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:09:00 PM UTC 24 |
| Finished | Oct 02 11:09:03 PM UTC 24 |
| Peak memory | 215528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2087586321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.2087586321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.735143550 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 181514200 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:09:00 PM UTC 24 |
| Finished | Oct 02 11:09:03 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=735143550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_stall_trans.735143550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3691005447 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 344155838 ps |
| CPU time | 2.1 seconds |
| Started | Oct 02 11:09:02 PM UTC 24 |
| Finished | Oct 02 11:09:05 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691005447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3691005447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.2494761800 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 1721390506 ps |
| CPU time | 46.12 seconds |
| Started | Oct 02 11:09:00 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494761800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.2494761800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.2608045976 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 1998014832 ps |
| CPU time | 43.68 seconds |
| Started | Oct 02 11:08:47 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608045976 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.2608045976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.3843331977 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 509302179 ps |
| CPU time | 2.08 seconds |
| Started | Oct 02 11:09:02 PM UTC 24 |
| Finished | Oct 02 11:09:05 PM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3843331977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.3843331977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.1221108907 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 628877504 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:29 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1221108907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.1221108907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.362187205 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 527512803 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=362187205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_t x_rx_disruption.362187205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.908035762 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 586403554 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=908035762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_t x_rx_disruption.908035762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.945336802 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 647009064 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:18 PM UTC 24 |
| Finished | Oct 02 11:16:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=945336802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_t x_rx_disruption.945336802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.1513210099 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 498037521 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1513210099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.1513210099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.1497379459 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 508557591 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1497379459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.1497379459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.3572783450 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 485138864 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3572783450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.3572783450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.4003666522 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 595878419 ps |
| CPU time | 2.03 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4003666522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.4003666522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.1287420644 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 488032428 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1287420644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.1287420644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.398837951 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 493656609 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=398837951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_t x_rx_disruption.398837951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.3268452626 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 65124871 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:18 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268452626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.3268452626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.2804368190 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 4572279091 ps |
| CPU time | 8.01 seconds |
| Started | Oct 02 11:09:02 PM UTC 24 |
| Finished | Oct 02 11:09:11 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804368190 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.2804368190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.652721540 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 21403215042 ps |
| CPU time | 28.9 seconds |
| Started | Oct 02 11:09:02 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=652721540 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.652721540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.2761249724 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 31383652424 ps |
| CPU time | 51.76 seconds |
| Started | Oct 02 11:09:03 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761249724 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.2761249724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.1671216407 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 167212333 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:09:03 PM UTC 24 |
| Finished | Oct 02 11:09:06 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671216407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.1671216407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.1653641274 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 150686734 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:09:03 PM UTC 24 |
| Finished | Oct 02 11:09:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653641274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.1653641274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.551154133 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 480848524 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:09:05 PM UTC 24 |
| Finished | Oct 02 11:09:08 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551154133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_data_toggle_clear.551154133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.33803217 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 474197485 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:09:05 PM UTC 24 |
| Finished | Oct 02 11:09:08 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=33803217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.33803217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.2531973963 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 25527501755 ps |
| CPU time | 51.4 seconds |
| Started | Oct 02 11:09:05 PM UTC 24 |
| Finished | Oct 02 11:09:58 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531973963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.2531973963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.3210326096 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 6141522641 ps |
| CPU time | 39.02 seconds |
| Started | Oct 02 11:09:05 PM UTC 24 |
| Finished | Oct 02 11:09:45 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210326096 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.3210326096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.3789475632 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 919502642 ps |
| CPU time | 2.47 seconds |
| Started | Oct 02 11:09:06 PM UTC 24 |
| Finished | Oct 02 11:09:10 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789475632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.3789475632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.1736342799 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 135317242 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:09 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736342799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.1736342799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_enable.1673250973 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 40886940 ps |
| CPU time | 0.88 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:08 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673250973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.1673250973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.3915709090 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 1085986006 ps |
| CPU time | 3.2 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:11 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915709090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.3915709090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.701067969 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 464739096 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:09 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701067969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.701067969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.244516009 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 153476374 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:09 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244516009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_fifo_levels.244516009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.1648652406 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 296510628 ps |
| CPU time | 2.78 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:11 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648652406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.1648652406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.2367741369 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 151831213 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:09:09 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367741369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.2367741369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.2101750354 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 145299012 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:09:11 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101750354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.2101750354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.2861773306 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 202767308 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:09:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861773306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.2861773306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.3970853202 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 3104617723 ps |
| CPU time | 77.72 seconds |
| Started | Oct 02 11:09:07 PM UTC 24 |
| Finished | Oct 02 11:10:27 PM UTC 24 |
| Peak memory | 235064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970853202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.3970853202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2455380706 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 4000280710 ps |
| CPU time | 45.68 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 217792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455380706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2455380706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.1696089191 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 213202719 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:09:11 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696089191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.1696089191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.1741014694 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 28611911219 ps |
| CPU time | 55.2 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:10:06 PM UTC 24 |
| Peak memory | 217928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741014694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.1741014694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.1632991081 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 10312503056 ps |
| CPU time | 18.21 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632991081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.1632991081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.3030630696 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 5042298334 ps |
| CPU time | 39.88 seconds |
| Started | Oct 02 11:09:09 PM UTC 24 |
| Finished | Oct 02 11:09:50 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030630696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3030630696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.2640119418 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 1719037067 ps |
| CPU time | 47.93 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:10:00 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640119418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.2640119418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.3304226956 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 244740929 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304226956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.3304226956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.4107622092 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 231922053 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107622092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.4107622092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.410207361 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 1306702672 ps |
| CPU time | 10.42 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:22 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410207361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.410207361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.817491322 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 152902484 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=817491322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.817491322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.3719010112 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 160858328 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719010112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.3719010112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.690221229 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 208367282 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690221229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_nak_trans.690221229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.745565770 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 176499602 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745565770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_out_iso.745565770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.3950261098 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 197860541 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:09:11 PM UTC 24 |
| Finished | Oct 02 11:09:13 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950261098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.3950261098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.2884530521 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 165664671 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:09:12 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884530521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.2884530521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.1674578754 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 150089692 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:09:12 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674578754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.1674578754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.51770846 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 214766982 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:13 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51770846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.51770846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.300394178 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 162676325 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:09:13 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300394178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.300394178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.3266576533 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 37502385 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:09:13 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266576533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.3266576533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.776186368 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 23952187043 ps |
| CPU time | 62 seconds |
| Started | Oct 02 11:09:13 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=776186368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_pkt_buffer.776186368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.1943564751 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 224796945 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:09:13 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943564751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.1943564751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3026942290 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 204734977 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:09:13 PM UTC 24 |
| Finished | Oct 02 11:09:15 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026942290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3026942290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.2313592411 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 228040582 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313592411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.2313592411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.821465673 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 165323638 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:16 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821465673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.821465673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.1619131518 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 187183231 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619131518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.1619131518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.2264215673 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 248898165 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264215673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.2264215673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.2907796247 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 163644650 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:16 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907796247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.2907796247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.4064827262 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 155245484 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:16 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064827262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.4064827262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.1152122176 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 221924742 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:09:14 PM UTC 24 |
| Finished | Oct 02 11:09:17 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152122176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1152122176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.1204350690 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 3383296927 ps |
| CPU time | 32.75 seconds |
| Started | Oct 02 11:09:15 PM UTC 24 |
| Finished | Oct 02 11:09:49 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204350690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1204350690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.2637918244 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 187237431 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:18 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637918244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.2637918244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.4264885364 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 184928628 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:18 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264885364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.4264885364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.1770060562 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 708197509 ps |
| CPU time | 2.25 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:19 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770060562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.1770060562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.4046258344 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 1605916051 ps |
| CPU time | 12.64 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:30 PM UTC 24 |
| Peak memory | 235028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046258344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.4046258344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.978526783 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 2940370344 ps |
| CPU time | 17.66 seconds |
| Started | Oct 02 11:09:05 PM UTC 24 |
| Finished | Oct 02 11:09:24 PM UTC 24 |
| Peak memory | 218492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978526783 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.978526783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.687849086 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 568070497 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:19 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=687849086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_tx _rx_disruption.687849086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.567670748 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 502245266 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=567670748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_t x_rx_disruption.567670748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.116344625 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 592210123 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=116344625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_t x_rx_disruption.116344625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.2618533040 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 562769851 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:20 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2618533040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.2618533040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.666792830 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 586719486 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:16:22 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=666792830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_t x_rx_disruption.666792830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.200359474 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 510695697 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:16:22 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=200359474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_t x_rx_disruption.200359474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.248923387 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 466795491 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:16:22 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=248923387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_t x_rx_disruption.248923387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.2036248362 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 576386798 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:25 PM UTC 24 |
| Finished | Oct 02 11:16:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2036248362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.2036248362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.2000381136 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 502847713 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:16:26 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2000381136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.2000381136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.2079759556 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 563686021 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:16:26 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2079759556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.2079759556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.3507913337 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 539311845 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:26 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3507913337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.3507913337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.480749048 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 78088228 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:00:13 PM UTC 24 |
| Finished | Oct 02 11:00:15 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480749048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.480749048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.1601288510 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 9155442553 ps |
| CPU time | 16.02 seconds |
| Started | Oct 02 10:59:28 PM UTC 24 |
| Finished | Oct 02 10:59:45 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601288510 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.1601288510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.3762360815 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 21331159110 ps |
| CPU time | 36.38 seconds |
| Started | Oct 02 10:59:28 PM UTC 24 |
| Finished | Oct 02 11:00:06 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762360815 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.3762360815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.3528339788 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 30622492241 ps |
| CPU time | 42.34 seconds |
| Started | Oct 02 10:59:28 PM UTC 24 |
| Finished | Oct 02 11:00:12 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3528339788 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.3528339788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2739380273 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 150904825 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 10:59:28 PM UTC 24 |
| Finished | Oct 02 10:59:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739380273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.2739380273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.487594925 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 143174229 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 10:59:29 PM UTC 24 |
| Finished | Oct 02 10:59:31 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487594925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_av_overflow.487594925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.267428929 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 142829523 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 10:59:30 PM UTC 24 |
| Finished | Oct 02 10:59:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=267428929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_bitstuff_err.267428929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.688248312 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 304115250 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 10:59:30 PM UTC 24 |
| Finished | Oct 02 10:59:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=688248312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_data_toggle_clear.688248312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.124222567 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 328156282 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 10:59:31 PM UTC 24 |
| Finished | Oct 02 10:59:34 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=124222567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.124222567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.4245208430 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 33268100411 ps |
| CPU time | 72.52 seconds |
| Started | Oct 02 10:59:31 PM UTC 24 |
| Finished | Oct 02 11:00:45 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245208430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.4245208430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.481754109 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 609955339 ps |
| CPU time | 13.64 seconds |
| Started | Oct 02 10:59:31 PM UTC 24 |
| Finished | Oct 02 10:59:46 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=481754109 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.481754109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.2161829646 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 662231589 ps |
| CPU time | 1.98 seconds |
| Started | Oct 02 10:59:32 PM UTC 24 |
| Finished | Oct 02 10:59:35 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2161829646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.2161829646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2676601389 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 159621786 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 10:59:32 PM UTC 24 |
| Finished | Oct 02 10:59:34 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676601389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.2676601389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_enable.3608573955 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 56941123 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 10:59:33 PM UTC 24 |
| Finished | Oct 02 10:59:35 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608573955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.3608573955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.3028901202 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 1088389944 ps |
| CPU time | 3.56 seconds |
| Started | Oct 02 10:59:34 PM UTC 24 |
| Finished | Oct 02 10:59:38 PM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028901202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.3028901202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.832130815 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 407864841 ps |
| CPU time | 2.5 seconds |
| Started | Oct 02 10:59:35 PM UTC 24 |
| Finished | Oct 02 10:59:38 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832130815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_fifo_rst.832130815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.1689705596 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 81179913808 ps |
| CPU time | 142.09 seconds |
| Started | Oct 02 10:59:35 PM UTC 24 |
| Finished | Oct 02 11:02:00 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689705596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.1689705596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.3539210104 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 119221565409 ps |
| CPU time | 220.35 seconds |
| Started | Oct 02 10:59:35 PM UTC 24 |
| Finished | Oct 02 11:03:19 PM UTC 24 |
| Peak memory | 220776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3539210104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.3539210104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.189974361 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 94141960442 ps |
| CPU time | 193.49 seconds |
| Started | Oct 02 10:59:36 PM UTC 24 |
| Finished | Oct 02 11:02:53 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=189974361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.189974361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.2488811971 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 100042095996 ps |
| CPU time | 207.37 seconds |
| Started | Oct 02 10:59:37 PM UTC 24 |
| Finished | Oct 02 11:03:08 PM UTC 24 |
| Peak memory | 218476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2488811971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.2488811971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1187357636 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 106162455296 ps |
| CPU time | 195.3 seconds |
| Started | Oct 02 10:59:37 PM UTC 24 |
| Finished | Oct 02 11:02:56 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187357636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.1187357636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.2902889610 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 254419149 ps |
| CPU time | 2.15 seconds |
| Started | Oct 02 10:59:39 PM UTC 24 |
| Finished | Oct 02 10:59:42 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902889610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.2902889610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.3677719081 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 141185654 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 10:59:39 PM UTC 24 |
| Finished | Oct 02 10:59:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677719081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.3677719081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.3452480313 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 181516829 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 10:59:39 PM UTC 24 |
| Finished | Oct 02 10:59:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452480313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.3452480313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.4070176521 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 5438720418 ps |
| CPU time | 144.45 seconds |
| Started | Oct 02 10:59:38 PM UTC 24 |
| Finished | Oct 02 11:02:05 PM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070176521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.4070176521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.3159844991 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 8417570527 ps |
| CPU time | 96.8 seconds |
| Started | Oct 02 10:59:40 PM UTC 24 |
| Finished | Oct 02 11:01:19 PM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159844991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.3159844991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.2234486962 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 231713268 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 10:59:41 PM UTC 24 |
| Finished | Oct 02 10:59:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234486962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.2234486962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.1084079441 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 29251031695 ps |
| CPU time | 49.92 seconds |
| Started | Oct 02 10:59:42 PM UTC 24 |
| Finished | Oct 02 11:00:34 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084079441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.1084079441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.1904770549 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 5010003441 ps |
| CPU time | 8.42 seconds |
| Started | Oct 02 10:59:43 PM UTC 24 |
| Finished | Oct 02 10:59:53 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904770549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.1904770549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.1188412570 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 3815969828 ps |
| CPU time | 106.71 seconds |
| Started | Oct 02 10:59:44 PM UTC 24 |
| Finished | Oct 02 11:01:33 PM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188412570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.1188412570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.4143561754 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 2348807388 ps |
| CPU time | 17.33 seconds |
| Started | Oct 02 10:59:45 PM UTC 24 |
| Finished | Oct 02 11:00:04 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143561754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.4143561754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.3945394906 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 240016954 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 10:59:46 PM UTC 24 |
| Finished | Oct 02 10:59:49 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945394906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.3945394906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.2794314436 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 184147490 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 10:59:49 PM UTC 24 |
| Finished | Oct 02 10:59:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794314436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.2794314436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.2475202065 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 2936162166 ps |
| CPU time | 91.68 seconds |
| Started | Oct 02 10:59:50 PM UTC 24 |
| Finished | Oct 02 11:01:24 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475202065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.2475202065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.3890054408 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 3054260315 ps |
| CPU time | 93.79 seconds |
| Started | Oct 02 10:59:50 PM UTC 24 |
| Finished | Oct 02 11:01:26 PM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890054408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.3890054408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.2339554849 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 3184056104 ps |
| CPU time | 26.18 seconds |
| Started | Oct 02 10:59:52 PM UTC 24 |
| Finished | Oct 02 11:00:20 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339554849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.2339554849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.1093189048 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 185926299 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 10:59:53 PM UTC 24 |
| Finished | Oct 02 10:59:55 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093189048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.1093189048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2225131679 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 150766692 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 10:59:53 PM UTC 24 |
| Finished | Oct 02 10:59:55 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225131679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2225131679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.1171802955 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 207708663 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 10:59:54 PM UTC 24 |
| Finished | Oct 02 10:59:57 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171802955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.1171802955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.117463199 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 185290461 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 10:59:56 PM UTC 24 |
| Finished | Oct 02 10:59:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117463199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_out_stall.117463199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.3987539640 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 145169461 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 10:59:56 PM UTC 24 |
| Finished | Oct 02 10:59:58 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987539640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.3987539640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.1379953264 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 145919944 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 10:59:57 PM UTC 24 |
| Finished | Oct 02 10:59:59 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379953264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.1379953264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.2362812244 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 241265175 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 10:59:58 PM UTC 24 |
| Finished | Oct 02 11:00:00 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362812244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.2362812244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.3016380685 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 216651009 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 10:59:58 PM UTC 24 |
| Finished | Oct 02 11:00:00 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016380685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.3016380685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.2632237152 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 155609530 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 10:59:58 PM UTC 24 |
| Finished | Oct 02 11:00:00 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632237152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.2632237152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3370719396 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 53622393 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:00:00 PM UTC 24 |
| Finished | Oct 02 11:00:02 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370719396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3370719396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.751850036 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 12104875993 ps |
| CPU time | 34.81 seconds |
| Started | Oct 02 11:00:00 PM UTC 24 |
| Finished | Oct 02 11:00:36 PM UTC 24 |
| Peak memory | 235164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751850036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_pkt_buffer.751850036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.1761234974 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 249136797 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:00:00 PM UTC 24 |
| Finished | Oct 02 11:00:06 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761234974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.1761234974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.1197550376 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 166972862 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:00:00 PM UTC 24 |
| Finished | Oct 02 11:00:02 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197550376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.1197550376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.3105426621 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 9266782326 ps |
| CPU time | 60.83 seconds |
| Started | Oct 02 11:00:01 PM UTC 24 |
| Finished | Oct 02 11:01:07 PM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105426621 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.3105426621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.3432731836 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 9751344267 ps |
| CPU time | 94.67 seconds |
| Started | Oct 02 11:00:01 PM UTC 24 |
| Finished | Oct 02 11:01:41 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432731836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.3432731836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.3881465566 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 6914146487 ps |
| CPU time | 96.73 seconds |
| Started | Oct 02 11:00:01 PM UTC 24 |
| Finished | Oct 02 11:01:43 PM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881465566 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.3881465566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2322154539 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 203264542 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:00:00 PM UTC 24 |
| Finished | Oct 02 11:00:06 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322154539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2322154539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.4170744202 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 174214157 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:00:00 PM UTC 24 |
| Finished | Oct 02 11:00:06 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170744202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.4170744202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.1238741511 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 20183254306 ps |
| CPU time | 28.24 seconds |
| Started | Oct 02 11:00:05 PM UTC 24 |
| Finished | Oct 02 11:00:35 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238741511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.1238741511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.1111688794 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 155335651 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:00:05 PM UTC 24 |
| Finished | Oct 02 11:00:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111688794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.1111688794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.702378482 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 247948507 ps |
| CPU time | 1.83 seconds |
| Started | Oct 02 11:00:05 PM UTC 24 |
| Finished | Oct 02 11:00:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=702378482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_rx_full.702378482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.3070720544 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 214987772 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:00:05 PM UTC 24 |
| Finished | Oct 02 11:00:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070720544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.3070720544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.4138114425 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 475686883 ps |
| CPU time | 2.44 seconds |
| Started | Oct 02 11:00:13 PM UTC 24 |
| Finished | Oct 02 11:00:16 PM UTC 24 |
| Peak memory | 252156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138114425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.4138114425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.3234495738 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 354639418 ps |
| CPU time | 2.3 seconds |
| Started | Oct 02 11:00:07 PM UTC 24 |
| Finished | Oct 02 11:00:10 PM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234495738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.3234495738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.422293996 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 182381186 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:00:07 PM UTC 24 |
| Finished | Oct 02 11:00:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=422293996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.422293996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.125378494 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 156649397 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:00:07 PM UTC 24 |
| Finished | Oct 02 11:00:09 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=125378494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_setup_stage.125378494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.2507223638 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 151551610 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:00:07 PM UTC 24 |
| Finished | Oct 02 11:00:09 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507223638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.2507223638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.3864739372 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 219461767 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:00:09 PM UTC 24 |
| Finished | Oct 02 11:00:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864739372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.3864739372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.277537116 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 2601529802 ps |
| CPU time | 23.92 seconds |
| Started | Oct 02 11:00:09 PM UTC 24 |
| Finished | Oct 02 11:00:34 PM UTC 24 |
| Peak memory | 235008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277537116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.277537116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.1304051790 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 158404834 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:00:09 PM UTC 24 |
| Finished | Oct 02 11:00:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304051790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.1304051790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2007718650 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 172026069 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:00:10 PM UTC 24 |
| Finished | Oct 02 11:00:13 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007718650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2007718650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.3552201256 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 213135413 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:00:10 PM UTC 24 |
| Finished | Oct 02 11:00:13 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552201256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.3552201256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.3222869136 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 2103840814 ps |
| CPU time | 21.89 seconds |
| Started | Oct 02 11:00:10 PM UTC 24 |
| Finished | Oct 02 11:00:34 PM UTC 24 |
| Peak memory | 235020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222869136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.3222869136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.3561824244 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 2461857241 ps |
| CPU time | 22.23 seconds |
| Started | Oct 02 10:59:32 PM UTC 24 |
| Finished | Oct 02 10:59:56 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561824244 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.3561824244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.1014568145 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 43353841 ps |
| CPU time | 0.79 seconds |
| Started | Oct 02 11:09:31 PM UTC 24 |
| Finished | Oct 02 11:09:33 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014568145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.1014568145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.454598297 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 9584300551 ps |
| CPU time | 13.43 seconds |
| Started | Oct 02 11:09:16 PM UTC 24 |
| Finished | Oct 02 11:09:31 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454598297 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.454598297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.1488214900 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 18857372510 ps |
| CPU time | 26.21 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:09:46 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488214900 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.1488214900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.348657275 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 25284813019 ps |
| CPU time | 42.06 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:10:02 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=348657275 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.348657275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.3151671146 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 167287953 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:09:20 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151671146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.3151671146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.4178825173 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 142840069 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:09:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178825173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.4178825173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.2936687812 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 595031529 ps |
| CPU time | 1.98 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:09:21 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936687812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.2936687812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.243914304 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 617445961 ps |
| CPU time | 2.16 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:09:22 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=243914304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.243914304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.2209517517 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 22684515307 ps |
| CPU time | 42.95 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209517517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.2209517517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.1985056751 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 4268792021 ps |
| CPU time | 36.07 seconds |
| Started | Oct 02 11:09:18 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985056751 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.1985056751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.3649005306 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 394103850 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:09:19 PM UTC 24 |
| Finished | Oct 02 11:09:21 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649005306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.3649005306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.3052719778 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 138565564 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:09:19 PM UTC 24 |
| Finished | Oct 02 11:09:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052719778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.3052719778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_enable.80816651 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 55453695 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:09:19 PM UTC 24 |
| Finished | Oct 02 11:09:21 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=80816651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_enable.80816651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.2910957633 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 794056168 ps |
| CPU time | 2.44 seconds |
| Started | Oct 02 11:09:20 PM UTC 24 |
| Finished | Oct 02 11:09:23 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910957633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.2910957633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.1328714995 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 516872278 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:09:20 PM UTC 24 |
| Finished | Oct 02 11:09:23 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328714995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1328714995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.3794115332 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 172669266 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:09:20 PM UTC 24 |
| Finished | Oct 02 11:09:23 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794115332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.3794115332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.312592185 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 398447207 ps |
| CPU time | 3.03 seconds |
| Started | Oct 02 11:09:20 PM UTC 24 |
| Finished | Oct 02 11:09:24 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312592185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_fifo_rst.312592185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.1523214417 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 264172271 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:09:20 PM UTC 24 |
| Finished | Oct 02 11:09:22 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523214417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.1523214417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.3429071265 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 147579744 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:09:22 PM UTC 24 |
| Finished | Oct 02 11:09:24 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429071265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.3429071265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.3755763046 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 230465601 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:09:22 PM UTC 24 |
| Finished | Oct 02 11:09:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755763046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.3755763046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.3101891261 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 3751380300 ps |
| CPU time | 37.52 seconds |
| Started | Oct 02 11:09:20 PM UTC 24 |
| Finished | Oct 02 11:09:59 PM UTC 24 |
| Peak memory | 234896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101891261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.3101891261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.1544687275 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 13716497195 ps |
| CPU time | 84.27 seconds |
| Started | Oct 02 11:09:22 PM UTC 24 |
| Finished | Oct 02 11:10:48 PM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544687275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.1544687275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.3360404157 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 270834491 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:09:22 PM UTC 24 |
| Finished | Oct 02 11:09:24 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360404157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.3360404157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.3816349002 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 8508298231 ps |
| CPU time | 16 seconds |
| Started | Oct 02 11:09:23 PM UTC 24 |
| Finished | Oct 02 11:09:41 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816349002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.3816349002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.269309715 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 10237236926 ps |
| CPU time | 15.14 seconds |
| Started | Oct 02 11:09:23 PM UTC 24 |
| Finished | Oct 02 11:09:40 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269309715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_suspend.269309715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.2493008714 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 3788547223 ps |
| CPU time | 34.86 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:10:00 PM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493008714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.2493008714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.1286435761 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 2556441296 ps |
| CPU time | 66.53 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:10:32 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286435761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.1286435761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.2566858351 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 239730165 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:09:26 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566858351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.2566858351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.3230210837 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 186046017 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:09:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230210837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.3230210837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.1175592118 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 2436394137 ps |
| CPU time | 64.54 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:10:30 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175592118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.1175592118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.496504522 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 157502618 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:09:26 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496504522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.496504522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.1501935683 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 151850575 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:09:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501935683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.1501935683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.2484595048 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 245463418 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:09:24 PM UTC 24 |
| Finished | Oct 02 11:09:26 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484595048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.2484595048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.3155776764 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 200432844 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155776764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.3155776764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.297174547 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 179774919 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297174547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_out_stall.297174547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.3356823090 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 182077780 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356823090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.3356823090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.3880447223 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 149560440 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880447223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.3880447223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.2144090528 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 231481330 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144090528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.2144090528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.1520062136 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 149003578 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520062136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.1520062136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.3335869590 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 31319432 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:09:26 PM UTC 24 |
| Finished | Oct 02 11:09:28 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335869590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.3335869590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.3152442558 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 22811664375 ps |
| CPU time | 65.88 seconds |
| Started | Oct 02 11:09:27 PM UTC 24 |
| Finished | Oct 02 11:10:35 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152442558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.3152442558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.1303442865 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 185905510 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:09:27 PM UTC 24 |
| Finished | Oct 02 11:09:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303442865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.1303442865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.1356431948 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 215076301 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:09:27 PM UTC 24 |
| Finished | Oct 02 11:09:30 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356431948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.1356431948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.2535992274 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 263780407 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:09:28 PM UTC 24 |
| Finished | Oct 02 11:09:30 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535992274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.2535992274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3876505166 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 189168737 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:09:28 PM UTC 24 |
| Finished | Oct 02 11:09:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876505166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3876505166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.4063920849 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 144307677 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:31 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063920849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.4063920849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.1760228734 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 244848049 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760228734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.1760228734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.356111191 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 150713909 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 215512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356111191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_setup_stage.356111191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.2828158708 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 156222924 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828158708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.2828158708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.3536343241 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 221203988 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536343241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.3536343241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.4132681172 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 3639248293 ps |
| CPU time | 27.22 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:58 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132681172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.4132681172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.1195649496 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 195724714 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195649496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.1195649496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.3135336566 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 198672300 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:32 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135336566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.3135336566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.2597057358 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 1179127558 ps |
| CPU time | 3.17 seconds |
| Started | Oct 02 11:09:31 PM UTC 24 |
| Finished | Oct 02 11:09:35 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597057358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.2597057358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.71790655 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 1897010717 ps |
| CPU time | 13.98 seconds |
| Started | Oct 02 11:09:29 PM UTC 24 |
| Finished | Oct 02 11:09:45 PM UTC 24 |
| Peak memory | 234752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71790655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_streaming_out.71790655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.4141047543 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 750850266 ps |
| CPU time | 15.41 seconds |
| Started | Oct 02 11:09:19 PM UTC 24 |
| Finished | Oct 02 11:09:35 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141047543 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.4141047543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.484815748 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 469876834 ps |
| CPU time | 2.26 seconds |
| Started | Oct 02 11:09:31 PM UTC 24 |
| Finished | Oct 02 11:09:34 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=484815748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.484815748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.51289635 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 585115913 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:27 PM UTC 24 |
| Finished | Oct 02 11:16:31 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=51289635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_tx _rx_disruption.51289635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.2816035235 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 432653450 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:16:28 PM UTC 24 |
| Finished | Oct 02 11:16:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2816035235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.2816035235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.138146547 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 522930141 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:16:29 PM UTC 24 |
| Finished | Oct 02 11:16:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=138146547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_t x_rx_disruption.138146547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2864200885 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 560349167 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:16:29 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2864200885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2864200885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.1835726887 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 518199825 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:16:29 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1835726887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.1835726887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.3273979495 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 561941251 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:29 PM UTC 24 |
| Finished | Oct 02 11:16:32 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3273979495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.3273979495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.2712997239 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 651064074 ps |
| CPU time | 1.83 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2712997239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.2712997239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.64155430 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 530900162 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=64155430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_tx _rx_disruption.64155430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.3886760492 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 502166084 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3886760492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.3886760492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.3588161923 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 569867754 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3588161923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.3588161923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.3584878733 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 35230348 ps |
| CPU time | 0.68 seconds |
| Started | Oct 02 11:09:50 PM UTC 24 |
| Finished | Oct 02 11:09:51 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584878733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.3584878733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.2180489168 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 12204259295 ps |
| CPU time | 18.84 seconds |
| Started | Oct 02 11:09:31 PM UTC 24 |
| Finished | Oct 02 11:09:51 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180489168 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.2180489168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.490574556 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 14520491823 ps |
| CPU time | 22.09 seconds |
| Started | Oct 02 11:09:32 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 228160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=490574556 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.490574556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3634541334 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 30625227003 ps |
| CPU time | 42.65 seconds |
| Started | Oct 02 11:09:32 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 217656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634541334 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3634541334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.3469562663 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 160219477 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:09:32 PM UTC 24 |
| Finished | Oct 02 11:09:35 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469562663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.3469562663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.3962413373 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 141922089 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:09:32 PM UTC 24 |
| Finished | Oct 02 11:09:35 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962413373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.3962413373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.2610773334 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 313254759 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:09:32 PM UTC 24 |
| Finished | Oct 02 11:09:35 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610773334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.2610773334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.2289800487 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 1213650951 ps |
| CPU time | 5.1 seconds |
| Started | Oct 02 11:09:32 PM UTC 24 |
| Finished | Oct 02 11:09:39 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289800487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.2289800487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.408021164 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 42485938411 ps |
| CPU time | 89.39 seconds |
| Started | Oct 02 11:09:34 PM UTC 24 |
| Finished | Oct 02 11:11:05 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=408021164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_device_address.408021164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.2447790441 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 1567692813 ps |
| CPU time | 14.34 seconds |
| Started | Oct 02 11:09:34 PM UTC 24 |
| Finished | Oct 02 11:09:49 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447790441 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.2447790441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.3011352137 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 853999265 ps |
| CPU time | 2.63 seconds |
| Started | Oct 02 11:09:34 PM UTC 24 |
| Finished | Oct 02 11:09:38 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011352137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.3011352137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.3510742858 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 142831447 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:09:34 PM UTC 24 |
| Finished | Oct 02 11:09:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510742858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.3510742858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_enable.3441067480 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 64831713 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:09:34 PM UTC 24 |
| Finished | Oct 02 11:09:36 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441067480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.3441067480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.2788352303 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 903191373 ps |
| CPU time | 2.84 seconds |
| Started | Oct 02 11:09:35 PM UTC 24 |
| Finished | Oct 02 11:09:39 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788352303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.2788352303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.3367309525 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 478143828 ps |
| CPU time | 1.94 seconds |
| Started | Oct 02 11:09:35 PM UTC 24 |
| Finished | Oct 02 11:09:38 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367309525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.3367309525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.1447351692 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 554902337 ps |
| CPU time | 3.91 seconds |
| Started | Oct 02 11:09:36 PM UTC 24 |
| Finished | Oct 02 11:09:40 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447351692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.1447351692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.2214505040 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 245775920 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:09:37 PM UTC 24 |
| Finished | Oct 02 11:09:40 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2214505040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.2214505040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.2172993423 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 151637729 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:09:37 PM UTC 24 |
| Finished | Oct 02 11:09:39 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172993423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.2172993423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.3483805903 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 301576643 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:09:37 PM UTC 24 |
| Finished | Oct 02 11:09:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483805903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.3483805903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.4167041440 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 3550215479 ps |
| CPU time | 28.59 seconds |
| Started | Oct 02 11:09:36 PM UTC 24 |
| Finished | Oct 02 11:10:05 PM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167041440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.4167041440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.247683193 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 13036314183 ps |
| CPU time | 150.5 seconds |
| Started | Oct 02 11:09:37 PM UTC 24 |
| Finished | Oct 02 11:12:10 PM UTC 24 |
| Peak memory | 220972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=247683193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.247683193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.3392263312 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 202006379 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:09:37 PM UTC 24 |
| Finished | Oct 02 11:09:39 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392263312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.3392263312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.1088613802 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 27919311170 ps |
| CPU time | 39.75 seconds |
| Started | Oct 02 11:09:38 PM UTC 24 |
| Finished | Oct 02 11:10:20 PM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088613802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.1088613802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.633890542 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 8570537801 ps |
| CPU time | 13.22 seconds |
| Started | Oct 02 11:09:38 PM UTC 24 |
| Finished | Oct 02 11:09:53 PM UTC 24 |
| Peak memory | 217844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=633890542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_suspend.633890542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2488334955 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 4552142453 ps |
| CPU time | 115.82 seconds |
| Started | Oct 02 11:09:40 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 230216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488334955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.2488334955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.3879187677 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 2176542425 ps |
| CPU time | 54.18 seconds |
| Started | Oct 02 11:09:40 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 228080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879187677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.3879187677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.3948245064 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 238141973 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:09:40 PM UTC 24 |
| Finished | Oct 02 11:09:43 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948245064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.3948245064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.3918474855 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 211337775 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:09:40 PM UTC 24 |
| Finished | Oct 02 11:09:43 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918474855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3918474855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.1775909672 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 3918724050 ps |
| CPU time | 105.45 seconds |
| Started | Oct 02 11:09:40 PM UTC 24 |
| Finished | Oct 02 11:11:28 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775909672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.1775909672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.2157410297 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 188451089 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:09:42 PM UTC 24 |
| Finished | Oct 02 11:09:44 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157410297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.2157410297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.139844807 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 157781230 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:09:42 PM UTC 24 |
| Finished | Oct 02 11:09:44 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139844807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.139844807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.1230869700 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 221341396 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:09:42 PM UTC 24 |
| Finished | Oct 02 11:09:44 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230869700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.1230869700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1514679441 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 217543036 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:09:42 PM UTC 24 |
| Finished | Oct 02 11:09:44 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514679441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1514679441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.1581542451 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 172679540 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:09:42 PM UTC 24 |
| Finished | Oct 02 11:09:44 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581542451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.1581542451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.2461305351 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 166953857 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:09:42 PM UTC 24 |
| Finished | Oct 02 11:09:44 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461305351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.2461305351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.3356527050 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 148392253 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:09:44 PM UTC 24 |
| Finished | Oct 02 11:09:46 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356527050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.3356527050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.414032027 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 237369107 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:09:44 PM UTC 24 |
| Finished | Oct 02 11:09:47 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414032027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.414032027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.67202729 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 197947383 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67202729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.67202729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.700792159 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 106278871 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 215232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=700792159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.700792159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.4048251271 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 14622251752 ps |
| CPU time | 39.79 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:10:27 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048251271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.4048251271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.3695244305 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 205705294 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695244305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.3695244305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.2812142062 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 176181658 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812142062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.2812142062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.3340310880 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 227051812 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340310880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.3340310880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.2714710668 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 209700391 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:09:46 PM UTC 24 |
| Finished | Oct 02 11:09:48 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714710668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2714710668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.1636559012 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 147226435 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:09:47 PM UTC 24 |
| Finished | Oct 02 11:09:50 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636559012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.1636559012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.1844778359 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 251230076 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:09:47 PM UTC 24 |
| Finished | Oct 02 11:09:50 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844778359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.1844778359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.1476433889 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 177341962 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:09:47 PM UTC 24 |
| Finished | Oct 02 11:09:49 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476433889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.1476433889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.1075571815 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 148184274 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:09:47 PM UTC 24 |
| Finished | Oct 02 11:09:50 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075571815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.1075571815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.1553917341 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 229822220 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:09:47 PM UTC 24 |
| Finished | Oct 02 11:09:50 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553917341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.1553917341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.2040368028 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 2260335774 ps |
| CPU time | 15.96 seconds |
| Started | Oct 02 11:09:49 PM UTC 24 |
| Finished | Oct 02 11:10:06 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040368028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.2040368028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.1741416070 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 211895389 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:09:49 PM UTC 24 |
| Finished | Oct 02 11:09:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741416070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.1741416070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.3085848894 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 157234429 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:09:49 PM UTC 24 |
| Finished | Oct 02 11:09:51 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3085848894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.3085848894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.2522273952 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 634944727 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:09:49 PM UTC 24 |
| Finished | Oct 02 11:09:52 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522273952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.2522273952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.630014534 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 3556997303 ps |
| CPU time | 101.43 seconds |
| Started | Oct 02 11:09:49 PM UTC 24 |
| Finished | Oct 02 11:11:33 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630014534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_streaming_out.630014534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.72477617 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 681104097 ps |
| CPU time | 14.11 seconds |
| Started | Oct 02 11:09:34 PM UTC 24 |
| Finished | Oct 02 11:09:49 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=72477617 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.72477617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.2094769140 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 550065591 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:09:50 PM UTC 24 |
| Finished | Oct 02 11:09:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2094769140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.2094769140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.297804281 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 530200824 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=297804281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_t x_rx_disruption.297804281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.2770060444 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 498993784 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2770060444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.2770060444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.2364768578 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 636790442 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:30 PM UTC 24 |
| Finished | Oct 02 11:16:33 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2364768578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.2364768578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.2990529230 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 649628379 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2990529230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.2990529230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.2805892266 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 591398544 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2805892266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.2805892266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.829604248 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 509570272 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=829604248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_t x_rx_disruption.829604248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.2810501909 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 550892274 ps |
| CPU time | 1.92 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2810501909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.2810501909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.2616841778 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 452458337 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:40 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2616841778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.2616841778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.726250349 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 527227866 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=726250349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_t x_rx_disruption.726250349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.4239391255 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 61703034 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:10:03 PM UTC 24 |
| Finished | Oct 02 11:10:05 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239391255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.4239391255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.3873024179 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 11139047880 ps |
| CPU time | 18.9 seconds |
| Started | Oct 02 11:09:50 PM UTC 24 |
| Finished | Oct 02 11:10:10 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873024179 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.3873024179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3285935043 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 20837249264 ps |
| CPU time | 28.88 seconds |
| Started | Oct 02 11:09:50 PM UTC 24 |
| Finished | Oct 02 11:10:20 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285935043 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3285935043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.3290194277 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 24400541568 ps |
| CPU time | 35.01 seconds |
| Started | Oct 02 11:09:50 PM UTC 24 |
| Finished | Oct 02 11:10:26 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290194277 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.3290194277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.531821851 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 209599227 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:09:51 PM UTC 24 |
| Finished | Oct 02 11:09:53 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531821851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_av_buffer.531821851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.1043634924 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 162011701 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:09:51 PM UTC 24 |
| Finished | Oct 02 11:09:53 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043634924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.1043634924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.2213807046 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 418392860 ps |
| CPU time | 2.23 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:09:55 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213807046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.2213807046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.4045317714 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 975504229 ps |
| CPU time | 3.4 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045317714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.4045317714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.798391249 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 25282718661 ps |
| CPU time | 43.65 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:10:37 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798391249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_device_address.798391249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.2060523127 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 1459444340 ps |
| CPU time | 9.47 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:10:02 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060523127 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.2060523127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.1035115733 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 785027404 ps |
| CPU time | 2.16 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:09:55 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035115733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.1035115733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.3976613265 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 186659741 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:09:54 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976613265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.3976613265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_enable.1204754858 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 68106058 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:09:53 PM UTC 24 |
| Finished | Oct 02 11:09:55 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204754858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.1204754858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.2929501663 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 955993453 ps |
| CPU time | 3.7 seconds |
| Started | Oct 02 11:09:53 PM UTC 24 |
| Finished | Oct 02 11:09:58 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929501663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.2929501663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.516316242 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 146717333 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:09:53 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=516316242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.516316242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.52369111 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 285551154 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:09:53 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52369111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_fifo_levels.52369111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.3785279529 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 312900118 ps |
| CPU time | 2.96 seconds |
| Started | Oct 02 11:09:53 PM UTC 24 |
| Finished | Oct 02 11:09:57 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785279529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.3785279529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.4192901364 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 197247312 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:09:54 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192901364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.4192901364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.2356657228 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 160794429 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:09:54 PM UTC 24 |
| Finished | Oct 02 11:09:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356657228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.2356657228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.3917895968 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 189746565 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:09:55 PM UTC 24 |
| Finished | Oct 02 11:09:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917895968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.3917895968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.3067065688 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 3923580191 ps |
| CPU time | 36.74 seconds |
| Started | Oct 02 11:09:54 PM UTC 24 |
| Finished | Oct 02 11:10:32 PM UTC 24 |
| Peak memory | 234892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067065688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.3067065688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.4063856537 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 8356566183 ps |
| CPU time | 59.24 seconds |
| Started | Oct 02 11:09:55 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063856537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.4063856537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.1256037177 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 178805623 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:09:55 PM UTC 24 |
| Finished | Oct 02 11:09:58 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256037177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.1256037177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.1346786449 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 6244185956 ps |
| CPU time | 9.85 seconds |
| Started | Oct 02 11:09:55 PM UTC 24 |
| Finished | Oct 02 11:10:06 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346786449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.1346786449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3265133635 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 6300752938 ps |
| CPU time | 10.19 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:10:08 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265133635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3265133635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.896912460 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 3484217967 ps |
| CPU time | 88.67 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:11:27 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=896912460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.896912460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.2432214086 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 3529379413 ps |
| CPU time | 27.45 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:10:26 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432214086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2432214086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.3409211586 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 241395520 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:09:59 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409211586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.3409211586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.3509831979 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 196509479 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:09:59 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509831979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.3509831979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.163267474 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 3390270259 ps |
| CPU time | 94.59 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:11:33 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163267474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.163267474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.2570182349 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 154763211 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:09:59 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570182349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.2570182349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.3757770521 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 162231497 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:09:59 PM UTC 24 |
| Peak memory | 217528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757770521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.3757770521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.2869061707 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 184226853 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:09:59 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869061707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.2869061707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.3548688571 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 169986418 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:10:00 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548688571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.3548688571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.1175050261 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 150378466 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:10:00 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175050261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.1175050261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.2298557196 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 173031238 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:10:00 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298557196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.2298557196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.540822649 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 174905946 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:09:57 PM UTC 24 |
| Finished | Oct 02 11:10:00 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540822649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.540822649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.678051747 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 209530147 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:01 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=678051747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.678051747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.3959571846 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 151150420 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959571846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.3959571846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.1214140961 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 36917804 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214140961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1214140961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.2970883382 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 14109761647 ps |
| CPU time | 38.08 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:38 PM UTC 24 |
| Peak memory | 232440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970883382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.2970883382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.1751163661 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 168269859 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751163661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.1751163661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.2240356286 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 172698847 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:01 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240356286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.2240356286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.1138737174 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 228272604 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:09:59 PM UTC 24 |
| Finished | Oct 02 11:10:02 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138737174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.1138737174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.3156460114 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 215065884 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156460114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.3156460114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.1875127074 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 144401796 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875127074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.1875127074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.856574003 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 279344936 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856574003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_rx_full.856574003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.2645873500 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 173993598 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645873500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.2645873500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.1358066244 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 191787594 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358066244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.1358066244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.67138470 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 237708750 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67138470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 32.usbdev_smoke.67138470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.1670747279 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 2461603623 ps |
| CPU time | 25.76 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:28 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670747279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.1670747279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.3376829071 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 168721115 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376829071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.3376829071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.1000312734 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 192780168 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:04 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000312734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.1000312734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.692478298 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 344847554 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692478298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_stream_len_max.692478298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.3363797358 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 2676789735 ps |
| CPU time | 19.98 seconds |
| Started | Oct 02 11:10:01 PM UTC 24 |
| Finished | Oct 02 11:10:22 PM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363797358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.3363797358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.2540792924 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 6702109436 ps |
| CPU time | 45.99 seconds |
| Started | Oct 02 11:09:52 PM UTC 24 |
| Finished | Oct 02 11:10:39 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540792924 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.2540792924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.3456588978 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 533122959 ps |
| CPU time | 1.94 seconds |
| Started | Oct 02 11:10:02 PM UTC 24 |
| Finished | Oct 02 11:10:06 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3456588978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.3456588978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.3753480915 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 552001964 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3753480915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.3753480915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.2527883621 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 625491582 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 216480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2527883621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.2527883621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.2414189214 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 479334997 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:40 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2414189214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.2414189214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.1580553723 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 612503757 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1580553723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.1580553723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.2196199778 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 479280837 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:16:32 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2196199778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.2196199778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.4056348117 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 608006684 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:16:34 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4056348117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.4056348117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.2351121418 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 587881878 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:34 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2351121418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.2351121418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.3846197555 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 604412913 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:16:34 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3846197555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.3846197555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.3896664980 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 462799838 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:16:34 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3896664980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.3896664980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.2722052059 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 531311301 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:16:34 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2722052059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.2722052059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.711981490 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 43262676 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:10:15 PM UTC 24 |
| Finished | Oct 02 11:10:17 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711981490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.711981490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.891332530 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 6311385038 ps |
| CPU time | 11.55 seconds |
| Started | Oct 02 11:10:03 PM UTC 24 |
| Finished | Oct 02 11:10:15 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=891332530 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.891332530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.1601207023 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 15334490010 ps |
| CPU time | 19.46 seconds |
| Started | Oct 02 11:10:03 PM UTC 24 |
| Finished | Oct 02 11:10:23 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601207023 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.1601207023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.2675720041 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 24166373393 ps |
| CPU time | 33.53 seconds |
| Started | Oct 02 11:10:03 PM UTC 24 |
| Finished | Oct 02 11:10:38 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675720041 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.2675720041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.2992649358 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 190046377 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:10:03 PM UTC 24 |
| Finished | Oct 02 11:10:05 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992649358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.2992649358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.239814484 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 143408463 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:10:03 PM UTC 24 |
| Finished | Oct 02 11:10:05 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239814484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_bitstuff_err.239814484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.2749836898 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 357876537 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:10:04 PM UTC 24 |
| Finished | Oct 02 11:10:07 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749836898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.2749836898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.316360393 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 488007052 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:10:04 PM UTC 24 |
| Finished | Oct 02 11:10:07 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=316360393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.316360393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.300566017 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 24968822327 ps |
| CPU time | 47.41 seconds |
| Started | Oct 02 11:10:04 PM UTC 24 |
| Finished | Oct 02 11:10:53 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300566017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_device_address.300566017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.3148994226 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 1527952120 ps |
| CPU time | 9.67 seconds |
| Started | Oct 02 11:10:04 PM UTC 24 |
| Finished | Oct 02 11:10:15 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148994226 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.3148994226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.3324757018 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 864529581 ps |
| CPU time | 2.54 seconds |
| Started | Oct 02 11:10:05 PM UTC 24 |
| Finished | Oct 02 11:10:08 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324757018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.3324757018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.741997193 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 165559870 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:10:05 PM UTC 24 |
| Finished | Oct 02 11:10:07 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741997193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_disconnected.741997193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_enable.2736128828 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 41774462 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:10:05 PM UTC 24 |
| Finished | Oct 02 11:10:07 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736128828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.2736128828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.1662464576 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 942392730 ps |
| CPU time | 2.74 seconds |
| Started | Oct 02 11:10:05 PM UTC 24 |
| Finished | Oct 02 11:10:08 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662464576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1662464576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.2998175435 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 323213389 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:10:05 PM UTC 24 |
| Finished | Oct 02 11:10:07 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998175435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.2998175435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.1073453381 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 279851800 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:10:05 PM UTC 24 |
| Finished | Oct 02 11:10:07 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073453381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_fifo_levels.1073453381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.3798606646 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 485969166 ps |
| CPU time | 3.13 seconds |
| Started | Oct 02 11:10:06 PM UTC 24 |
| Finished | Oct 02 11:10:11 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798606646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.3798606646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.512824102 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 222791964 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:10:07 PM UTC 24 |
| Finished | Oct 02 11:10:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=512824102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.512824102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.2686951878 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 167325983 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:10:07 PM UTC 24 |
| Finished | Oct 02 11:10:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686951878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.2686951878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.1226090852 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 250381227 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:10:07 PM UTC 24 |
| Finished | Oct 02 11:10:09 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226090852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.1226090852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.1424453071 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 3501542343 ps |
| CPU time | 35.12 seconds |
| Started | Oct 02 11:10:06 PM UTC 24 |
| Finished | Oct 02 11:10:43 PM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424453071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1424453071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.2517228570 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 9318659464 ps |
| CPU time | 107.34 seconds |
| Started | Oct 02 11:10:07 PM UTC 24 |
| Finished | Oct 02 11:11:57 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517228570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.2517228570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.1875434906 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 187135011 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:10:07 PM UTC 24 |
| Finished | Oct 02 11:10:09 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875434906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.1875434906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.2712562432 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 29229635595 ps |
| CPU time | 50.98 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:11:01 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2712562432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.2712562432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.3815698019 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 10359402921 ps |
| CPU time | 15.14 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:10:25 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815698019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.3815698019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.2888417320 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 2848314774 ps |
| CPU time | 25.81 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:10:35 PM UTC 24 |
| Peak memory | 228720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888417320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.2888417320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.2780748797 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 2515871175 ps |
| CPU time | 24.15 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:10:34 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780748797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.2780748797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.2437364413 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 246367177 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:10:11 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437364413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.2437364413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.959304242 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 266038275 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:10:11 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959304242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.959304242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.2964344177 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 2756925095 ps |
| CPU time | 67.08 seconds |
| Started | Oct 02 11:10:08 PM UTC 24 |
| Finished | Oct 02 11:11:17 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964344177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.2964344177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.583908569 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 172977809 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:10:09 PM UTC 24 |
| Finished | Oct 02 11:10:11 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583908569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.583908569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.334495567 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 159857303 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:10:09 PM UTC 24 |
| Finished | Oct 02 11:10:11 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=334495567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.334495567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.285325027 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 195683125 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:13 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285325027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_out_iso.285325027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.3819461572 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 182368889 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:12 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819461572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.3819461572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.2899191209 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 182397842 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:12 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899191209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.2899191209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.3711875509 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 210333277 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:13 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711875509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.3711875509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.192499593 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 191562364 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:13 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192499593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.192499593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.4074082431 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 142230429 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:10:10 PM UTC 24 |
| Finished | Oct 02 11:10:13 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074082431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.4074082431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.1680848180 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 37388668 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:10:11 PM UTC 24 |
| Finished | Oct 02 11:10:13 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680848180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1680848180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.4247174789 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 15589092058 ps |
| CPU time | 37.89 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:51 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247174789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.4247174789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.1712273866 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 247459783 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:14 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712273866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.1712273866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.4090362177 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 252047523 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090362177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.4090362177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.596499660 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 201999679 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:14 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596499660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_random_length_in_transaction.596499660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1018346937 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 183267269 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018346937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1018346937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.1361850597 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 201322597 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:15 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361850597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.1361850597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.3731449001 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 349944339 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:10:12 PM UTC 24 |
| Finished | Oct 02 11:10:15 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731449001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.3731449001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.609583556 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 219245636 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:10:13 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609583556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_setup_stage.609583556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.1996561527 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 165714407 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:10:13 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996561527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.1996561527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.414199133 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 207059939 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:10:14 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=414199133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.414199133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.922544930 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 1890982432 ps |
| CPU time | 48.45 seconds |
| Started | Oct 02 11:10:14 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 234764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=922544930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.922544930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.2889174075 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 173227381 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:10:14 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889174075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.2889174075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.3911427174 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 152330266 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:10:14 PM UTC 24 |
| Finished | Oct 02 11:10:16 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911427174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.3911427174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.3107775822 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 1023009267 ps |
| CPU time | 3.41 seconds |
| Started | Oct 02 11:10:14 PM UTC 24 |
| Finished | Oct 02 11:10:18 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107775822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.3107775822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.1932612378 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 3567007354 ps |
| CPU time | 93.23 seconds |
| Started | Oct 02 11:10:14 PM UTC 24 |
| Finished | Oct 02 11:11:49 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932612378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.1932612378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.98266067 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 3688288763 ps |
| CPU time | 23.87 seconds |
| Started | Oct 02 11:10:04 PM UTC 24 |
| Finished | Oct 02 11:10:30 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=98266067 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.98266067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.2534681152 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 448679358 ps |
| CPU time | 2.42 seconds |
| Started | Oct 02 11:10:15 PM UTC 24 |
| Finished | Oct 02 11:10:19 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2534681152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.2534681152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.3072657553 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 535432153 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:34 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3072657553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.3072657553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.417762993 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 489444272 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=417762993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_t x_rx_disruption.417762993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.2347377202 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 634663854 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2347377202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.2347377202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.2946543971 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 507774408 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2946543971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.2946543971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.1780997696 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 475086371 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1780997696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.1780997696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.1109749882 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 479222539 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1109749882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.1109749882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.3658524196 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 538515455 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3658524196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.3658524196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.2805176733 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 607876446 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2805176733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.2805176733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.1576512012 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 480918795 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:37 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1576512012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.1576512012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.3721841766 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 619484327 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3721841766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.3721841766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.165497965 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 64544624 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:10:32 PM UTC 24 |
| Finished | Oct 02 11:10:34 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=165497965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.165497965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.3704414242 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 6629449654 ps |
| CPU time | 9.29 seconds |
| Started | Oct 02 11:10:15 PM UTC 24 |
| Finished | Oct 02 11:10:26 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704414242 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.3704414242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.3844912736 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 15841341227 ps |
| CPU time | 23.9 seconds |
| Started | Oct 02 11:10:15 PM UTC 24 |
| Finished | Oct 02 11:10:41 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844912736 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.3844912736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.646060110 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 31053610258 ps |
| CPU time | 38.85 seconds |
| Started | Oct 02 11:10:15 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=646060110 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.646060110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.2923372206 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 174320114 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:10:19 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923372206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.2923372206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.269967180 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 151726156 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:10:19 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269967180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_bitstuff_err.269967180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.55534568 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 489465695 ps |
| CPU time | 2.86 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:10:21 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55534568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_clear.55534568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.2154472244 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 422501329 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:10:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154472244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.2154472244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.3321458472 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 25831287171 ps |
| CPU time | 45.14 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321458472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.3321458472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.2838279339 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 6357128816 ps |
| CPU time | 41.04 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:11:00 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838279339 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.2838279339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.1767561552 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 775290945 ps |
| CPU time | 3.03 seconds |
| Started | Oct 02 11:10:19 PM UTC 24 |
| Finished | Oct 02 11:10:23 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767561552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.1767561552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.99836439 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 158252634 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:10:19 PM UTC 24 |
| Finished | Oct 02 11:10:22 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99836439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_disconnected.99836439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_enable.508601650 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 31090342 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:10:19 PM UTC 24 |
| Finished | Oct 02 11:10:21 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=508601650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.508601650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.2520201600 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 994167380 ps |
| CPU time | 3.14 seconds |
| Started | Oct 02 11:10:19 PM UTC 24 |
| Finished | Oct 02 11:10:23 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520201600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.2520201600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.226640101 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 250374353 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:10:19 PM UTC 24 |
| Finished | Oct 02 11:10:22 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=226640101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.226640101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.47960047 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 151194666 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:10:21 PM UTC 24 |
| Finished | Oct 02 11:10:23 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47960047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_fifo_levels.47960047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.430374580 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 192830114 ps |
| CPU time | 3.13 seconds |
| Started | Oct 02 11:10:21 PM UTC 24 |
| Finished | Oct 02 11:10:25 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430374580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_fifo_rst.430374580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.3961027803 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 231480121 ps |
| CPU time | 1.97 seconds |
| Started | Oct 02 11:10:21 PM UTC 24 |
| Finished | Oct 02 11:10:24 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961027803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.3961027803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.1186317299 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 141246288 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:10:21 PM UTC 24 |
| Finished | Oct 02 11:10:23 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186317299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.1186317299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.522943451 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 242899950 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:10:21 PM UTC 24 |
| Finished | Oct 02 11:10:24 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=522943451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_in_trans.522943451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.3168789823 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 3917078498 ps |
| CPU time | 28.48 seconds |
| Started | Oct 02 11:10:21 PM UTC 24 |
| Finished | Oct 02 11:10:51 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168789823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.3168789823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.2892874735 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 3707934199 ps |
| CPU time | 37.54 seconds |
| Started | Oct 02 11:10:22 PM UTC 24 |
| Finished | Oct 02 11:11:01 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892874735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.2892874735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.2057521101 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 198152332 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:10:22 PM UTC 24 |
| Finished | Oct 02 11:10:25 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057521101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.2057521101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.4141846524 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 24965153582 ps |
| CPU time | 47.07 seconds |
| Started | Oct 02 11:10:23 PM UTC 24 |
| Finished | Oct 02 11:11:12 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141846524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.4141846524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.2139886647 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 3956216116 ps |
| CPU time | 7.14 seconds |
| Started | Oct 02 11:10:23 PM UTC 24 |
| Finished | Oct 02 11:10:32 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139886647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.2139886647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2519792084 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 3624255399 ps |
| CPU time | 103.37 seconds |
| Started | Oct 02 11:10:23 PM UTC 24 |
| Finished | Oct 02 11:12:09 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519792084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.2519792084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1858600641 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 2305232974 ps |
| CPU time | 63.05 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:11:30 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858600641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1858600641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.1717160258 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 269018233 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:10:28 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717160258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1717160258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.3971222975 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 201207595 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:10:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971222975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.3971222975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.1860190527 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 3073256499 ps |
| CPU time | 81.06 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:11:48 PM UTC 24 |
| Peak memory | 234812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860190527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.1860190527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.470266915 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 167744853 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:10:28 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470266915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.470266915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.15868170 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 149019705 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:10:25 PM UTC 24 |
| Finished | Oct 02 11:10:27 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=15868170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.15868170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.1047192804 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 219003980 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:10:27 PM UTC 24 |
| Finished | Oct 02 11:10:29 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047192804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.1047192804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.3107091290 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 193183636 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:10:27 PM UTC 24 |
| Finished | Oct 02 11:10:29 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107091290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.3107091290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.480055600 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 161656296 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:10:27 PM UTC 24 |
| Finished | Oct 02 11:10:29 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480055600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_out_trans_nak.480055600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.848397530 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 166288595 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 11:10:27 PM UTC 24 |
| Finished | Oct 02 11:10:29 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=848397530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pending_in_trans.848397530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.2884000305 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 250158114 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:10:27 PM UTC 24 |
| Finished | Oct 02 11:10:29 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884000305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2884000305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.2767196988 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 156112814 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:10:28 PM UTC 24 |
| Finished | Oct 02 11:10:31 PM UTC 24 |
| Peak memory | 215400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2767196988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.2767196988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.2326103797 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 48530938 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:10:31 PM UTC 24 |
| Peak memory | 215380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326103797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.2326103797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.3245466630 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 19663818384 ps |
| CPU time | 52.34 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:11:23 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245466630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.3245466630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.3768176122 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 202117503 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:10:32 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768176122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.3768176122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.1553307000 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 264130150 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:10:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553307000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.1553307000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.4206424232 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 239490860 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:10:31 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206424232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.4206424232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.1307579259 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 172922281 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:10:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307579259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.1307579259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.4008366662 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 186628203 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:10:29 PM UTC 24 |
| Finished | Oct 02 11:10:31 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008366662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.4008366662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.3636787999 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 350339193 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:33 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636787999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.3636787999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.3990932237 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 184222735 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:33 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990932237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.3990932237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.1284864940 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 189727928 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:32 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284864940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.1284864940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.901485745 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 270754043 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:33 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901485745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.901485745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.605184349 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 3067805409 ps |
| CPU time | 24.22 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 234936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=605184349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.605184349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.2956161280 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 235486780 ps |
| CPU time | 1.02 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:32 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956161280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.2956161280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.460820405 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 189774654 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:10:30 PM UTC 24 |
| Finished | Oct 02 11:10:33 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460820405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_stall_trans.460820405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.1233021899 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 919514808 ps |
| CPU time | 2.77 seconds |
| Started | Oct 02 11:10:32 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233021899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.1233021899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.2002480142 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 2217087402 ps |
| CPU time | 20.6 seconds |
| Started | Oct 02 11:10:32 PM UTC 24 |
| Finished | Oct 02 11:10:54 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002480142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.2002480142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.3586143913 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 861503094 ps |
| CPU time | 17.56 seconds |
| Started | Oct 02 11:10:17 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586143913 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.3586143913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.2511727105 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 449829697 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:10:32 PM UTC 24 |
| Finished | Oct 02 11:10:35 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2511727105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.2511727105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.15862702 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 592584054 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:40 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=15862702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_tx _rx_disruption.15862702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.1620696820 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 510306927 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:40 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1620696820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.1620696820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.3528035152 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 612567477 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3528035152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.3528035152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.3595920261 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 591120059 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 216644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3595920261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.3595920261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.1974097995 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 520435584 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1974097995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.1974097995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.3296902956 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 592826034 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3296902956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.3296902956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2728604694 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 580022880 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2728604694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2728604694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.3006284755 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 637293363 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3006284755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.3006284755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.670289776 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 453052098 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=670289776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_t x_rx_disruption.670289776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.3022161971 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 661120396 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3022161971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.3022161971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.3286686673 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 32749875 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:10:47 PM UTC 24 |
| Finished | Oct 02 11:10:49 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286686673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.3286686673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.2865342868 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 10749379629 ps |
| CPU time | 15.72 seconds |
| Started | Oct 02 11:10:32 PM UTC 24 |
| Finished | Oct 02 11:10:49 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865342868 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.2865342868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.1239393441 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 14331827901 ps |
| CPU time | 17.47 seconds |
| Started | Oct 02 11:10:32 PM UTC 24 |
| Finished | Oct 02 11:10:51 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239393441 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.1239393441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.3623353176 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 23449875905 ps |
| CPU time | 30.63 seconds |
| Started | Oct 02 11:10:33 PM UTC 24 |
| Finished | Oct 02 11:11:05 PM UTC 24 |
| Peak memory | 228672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3623353176 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.3623353176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.3591990584 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 198518597 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:10:33 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591990584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.3591990584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.434600038 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 149105068 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:10:33 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434600038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_bitstuff_err.434600038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.2668063688 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 165159359 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:10:33 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668063688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.2668063688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.2043932721 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 329226987 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:10:34 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043932721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.2043932721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.1164544025 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 37727528278 ps |
| CPU time | 64.37 seconds |
| Started | Oct 02 11:10:34 PM UTC 24 |
| Finished | Oct 02 11:11:40 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164544025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1164544025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.2343312787 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 1110322733 ps |
| CPU time | 24.22 seconds |
| Started | Oct 02 11:10:34 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343312787 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.2343312787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.2333140415 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 744933612 ps |
| CPU time | 2.15 seconds |
| Started | Oct 02 11:10:34 PM UTC 24 |
| Finished | Oct 02 11:10:37 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333140415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.2333140415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.1953372799 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 135787603 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:10:34 PM UTC 24 |
| Finished | Oct 02 11:10:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953372799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.1953372799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_enable.445129796 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 49556077 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:10:35 PM UTC 24 |
| Finished | Oct 02 11:10:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445129796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.445129796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.2396782455 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 834112506 ps |
| CPU time | 2.63 seconds |
| Started | Oct 02 11:10:35 PM UTC 24 |
| Finished | Oct 02 11:10:39 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396782455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.2396782455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.4043958358 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 227083433 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:10:35 PM UTC 24 |
| Finished | Oct 02 11:10:37 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043958358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.4043958358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.3118440698 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 281973777 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:10:35 PM UTC 24 |
| Finished | Oct 02 11:10:38 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118440698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.3118440698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.3757225188 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 404924251 ps |
| CPU time | 2.58 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:10:41 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757225188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.3757225188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3658443964 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 184971614 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:10:40 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658443964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3658443964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.1588804633 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 148022367 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:10:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588804633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.1588804633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.662751492 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 251889740 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:10:40 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=662751492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_trans.662751492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.2366696373 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 3547529106 ps |
| CPU time | 26.59 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:11:05 PM UTC 24 |
| Peak memory | 234972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366696373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.2366696373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.1005773239 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 13209769005 ps |
| CPU time | 166.39 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:13:27 PM UTC 24 |
| Peak memory | 220908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005773239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.1005773239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.2421314849 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 211522756 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:10:37 PM UTC 24 |
| Finished | Oct 02 11:10:40 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421314849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.2421314849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.2738506839 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 12805156161 ps |
| CPU time | 20.63 seconds |
| Started | Oct 02 11:10:38 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2738506839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.2738506839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.3692677684 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 10916578042 ps |
| CPU time | 16.79 seconds |
| Started | Oct 02 11:10:38 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3692677684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.3692677684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.3756780954 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 2779161366 ps |
| CPU time | 25.89 seconds |
| Started | Oct 02 11:10:38 PM UTC 24 |
| Finished | Oct 02 11:11:05 PM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756780954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.3756780954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.3471860182 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 2775755125 ps |
| CPU time | 21.07 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:11:02 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471860182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3471860182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.672601552 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 251711017 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:10:42 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=672601552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.672601552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.905316300 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 198192716 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:10:42 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905316300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.905316300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.3808015644 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 2838237611 ps |
| CPU time | 75.47 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:11:57 PM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808015644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.3808015644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3837650410 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 162095172 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:10:42 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837650410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3837650410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.3098170962 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 216483832 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:10:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098170962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.3098170962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.1989048609 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 216725879 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:10:42 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989048609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.1989048609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.1628599528 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 206418080 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:10:40 PM UTC 24 |
| Finished | Oct 02 11:10:42 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628599528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.1628599528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.3362638664 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 166455515 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:10:41 PM UTC 24 |
| Finished | Oct 02 11:10:44 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362638664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.3362638664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.1353930608 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 164247814 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:10:41 PM UTC 24 |
| Finished | Oct 02 11:10:44 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353930608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.1353930608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.760370693 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 148972255 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:10:41 PM UTC 24 |
| Finished | Oct 02 11:10:44 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760370693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.760370693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.2077777148 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 253889170 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:10:41 PM UTC 24 |
| Finished | Oct 02 11:10:44 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077777148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.2077777148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.2913178748 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 148350931 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:10:42 PM UTC 24 |
| Finished | Oct 02 11:10:44 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913178748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2913178748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.1509065812 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 39852958 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:10:42 PM UTC 24 |
| Finished | Oct 02 11:10:44 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509065812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.1509065812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.2238805070 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 17716528355 ps |
| CPU time | 47.22 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:11:32 PM UTC 24 |
| Peak memory | 234908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238805070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.2238805070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1835441646 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 197784399 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:10:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835441646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1835441646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.169389524 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 222480177 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:10:45 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169389524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_pkt_sent.169389524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.1531129198 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 178362084 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:10:45 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531129198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.1531129198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.3283979765 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 166621653 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:10:45 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283979765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.3283979765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.3970757125 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 172240014 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:10:45 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970757125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.3970757125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.3618626808 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 356529768 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:10:43 PM UTC 24 |
| Finished | Oct 02 11:10:46 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618626808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.3618626808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.2263730808 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 181451731 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:10:47 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2263730808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.2263730808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.2210946587 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 153343884 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:10:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210946587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.2210946587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.2997753722 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 219771517 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:10:48 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997753722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.2997753722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.3924093182 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 2279139588 ps |
| CPU time | 61.15 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:11:48 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924093182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.3924093182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.2637532115 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 169481615 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:10:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637532115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.2637532115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.3121222222 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 247097894 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:10:47 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121222222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.3121222222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3160662700 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 453549274 ps |
| CPU time | 1.95 seconds |
| Started | Oct 02 11:10:46 PM UTC 24 |
| Finished | Oct 02 11:10:49 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160662700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3160662700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.130682581 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 1915107483 ps |
| CPU time | 52.16 seconds |
| Started | Oct 02 11:10:45 PM UTC 24 |
| Finished | Oct 02 11:11:39 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=130682581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_streaming_out.130682581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.693275321 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 1549565947 ps |
| CPU time | 10.34 seconds |
| Started | Oct 02 11:10:34 PM UTC 24 |
| Finished | Oct 02 11:10:45 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=693275321 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.693275321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.786700489 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 621004941 ps |
| CPU time | 2.82 seconds |
| Started | Oct 02 11:10:46 PM UTC 24 |
| Finished | Oct 02 11:10:50 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=786700489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_tx _rx_disruption.786700489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.3445677336 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 627788963 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3445677336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.3445677336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.2406061147 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 613214815 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2406061147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.2406061147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.57462150 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 469602047 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=57462150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_tx _rx_disruption.57462150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.2524711045 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 441274226 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2524711045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.2524711045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.1044194964 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 534482289 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1044194964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.1044194964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.536141049 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 563931891 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=536141049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_t x_rx_disruption.536141049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.2953242405 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 452940795 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2953242405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.2953242405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.250346372 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 596702142 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=250346372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_t x_rx_disruption.250346372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.1915894841 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 551178897 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1915894841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.1915894841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.537923779 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 650839014 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=537923779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_t x_rx_disruption.537923779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.2883860692 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 39329351 ps |
| CPU time | 0.74 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:06 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883860692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.2883860692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.1112000160 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 5357331072 ps |
| CPU time | 10.52 seconds |
| Started | Oct 02 11:10:47 PM UTC 24 |
| Finished | Oct 02 11:10:58 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112000160 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.1112000160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.475249756 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 19208666835 ps |
| CPU time | 25.22 seconds |
| Started | Oct 02 11:10:47 PM UTC 24 |
| Finished | Oct 02 11:11:13 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475249756 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.475249756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.466743323 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 25789121152 ps |
| CPU time | 39.22 seconds |
| Started | Oct 02 11:10:47 PM UTC 24 |
| Finished | Oct 02 11:11:27 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=466743323 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.466743323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.2025707422 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 176035991 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:10:48 PM UTC 24 |
| Finished | Oct 02 11:10:50 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025707422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.2025707422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.2490241209 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 172456179 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:10:48 PM UTC 24 |
| Finished | Oct 02 11:10:50 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490241209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.2490241209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.2180658173 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 600503988 ps |
| CPU time | 2.22 seconds |
| Started | Oct 02 11:10:48 PM UTC 24 |
| Finished | Oct 02 11:10:51 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180658173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.2180658173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.1769501255 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 725132622 ps |
| CPU time | 2.88 seconds |
| Started | Oct 02 11:10:48 PM UTC 24 |
| Finished | Oct 02 11:10:52 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769501255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.1769501255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.618848173 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 19144230819 ps |
| CPU time | 39.34 seconds |
| Started | Oct 02 11:10:49 PM UTC 24 |
| Finished | Oct 02 11:11:30 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618848173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_device_address.618848173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.3439525979 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 2014632831 ps |
| CPU time | 13.05 seconds |
| Started | Oct 02 11:10:50 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439525979 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.3439525979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.3490703662 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 1183963932 ps |
| CPU time | 3.24 seconds |
| Started | Oct 02 11:10:50 PM UTC 24 |
| Finished | Oct 02 11:10:54 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3490703662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.3490703662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.1665923163 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 136646957 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:10:50 PM UTC 24 |
| Finished | Oct 02 11:10:52 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665923163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.1665923163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_enable.1167742929 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 40773549 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:10:51 PM UTC 24 |
| Finished | Oct 02 11:10:53 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167742929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.1167742929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.2751064993 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 1011450592 ps |
| CPU time | 3.76 seconds |
| Started | Oct 02 11:10:51 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751064993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.2751064993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.2593454596 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 575956312 ps |
| CPU time | 2.31 seconds |
| Started | Oct 02 11:10:51 PM UTC 24 |
| Finished | Oct 02 11:10:54 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593454596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.2593454596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.2056704515 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 146525745 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:10:51 PM UTC 24 |
| Finished | Oct 02 11:10:53 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056704515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.2056704515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2491088104 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 210163807 ps |
| CPU time | 3.09 seconds |
| Started | Oct 02 11:10:53 PM UTC 24 |
| Finished | Oct 02 11:10:57 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491088104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2491088104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.3290576659 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 224850193 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:10:53 PM UTC 24 |
| Finished | Oct 02 11:10:55 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290576659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.3290576659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.2514800713 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 162863681 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:10:53 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514800713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.2514800713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.957120720 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 193779524 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:10:53 PM UTC 24 |
| Finished | Oct 02 11:10:56 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957120720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_in_trans.957120720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.2725480581 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 2643307944 ps |
| CPU time | 20.09 seconds |
| Started | Oct 02 11:10:53 PM UTC 24 |
| Finished | Oct 02 11:11:14 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725480581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.2725480581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.955632870 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 12194505641 ps |
| CPU time | 148.71 seconds |
| Started | Oct 02 11:10:53 PM UTC 24 |
| Finished | Oct 02 11:13:25 PM UTC 24 |
| Peak memory | 218360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=955632870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.955632870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.4256746366 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 183360921 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:10:55 PM UTC 24 |
| Finished | Oct 02 11:10:58 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256746366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.4256746366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.789635684 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 28220091991 ps |
| CPU time | 38.03 seconds |
| Started | Oct 02 11:10:55 PM UTC 24 |
| Finished | Oct 02 11:11:35 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789635684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_resume.789635684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2677399155 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 5381896067 ps |
| CPU time | 7.62 seconds |
| Started | Oct 02 11:10:55 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677399155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.2677399155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.813208070 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 4062196020 ps |
| CPU time | 39.83 seconds |
| Started | Oct 02 11:10:55 PM UTC 24 |
| Finished | Oct 02 11:11:37 PM UTC 24 |
| Peak memory | 230332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=813208070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.813208070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.2335913884 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 2551877607 ps |
| CPU time | 67.94 seconds |
| Started | Oct 02 11:10:55 PM UTC 24 |
| Finished | Oct 02 11:12:05 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335913884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.2335913884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.3392257499 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 241527258 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:10:55 PM UTC 24 |
| Finished | Oct 02 11:10:58 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392257499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.3392257499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.123761006 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 185077648 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=123761006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.123761006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.2058830445 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 2393597233 ps |
| CPU time | 63.11 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:12:02 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058830445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.2058830445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.300740295 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 163611866 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=300740295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.300740295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.2873684774 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 191714007 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873684774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.2873684774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.2307429669 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 191137989 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307429669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.2307429669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.96369330 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 229909095 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:11:00 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96369330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_iso.96369330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.452528855 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 160627386 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:10:59 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=452528855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_out_stall.452528855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.2406534153 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 192944165 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:10:57 PM UTC 24 |
| Finished | Oct 02 11:11:00 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406534153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.2406534153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.3989258332 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 161281731 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:10:59 PM UTC 24 |
| Finished | Oct 02 11:11:01 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989258332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.3989258332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.1463704774 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 220932755 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:10:59 PM UTC 24 |
| Finished | Oct 02 11:11:01 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463704774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.1463704774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.278021877 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 184541551 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:10:59 PM UTC 24 |
| Finished | Oct 02 11:11:01 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=278021877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.278021877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3105041070 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 43457631 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105041070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3105041070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.1261250419 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 14141418080 ps |
| CPU time | 37.23 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:39 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261250419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.1261250419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.877772978 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 187302977 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:03 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877772978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_pkt_received.877772978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.3461726879 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 179194769 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:02 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461726879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.3461726879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.2094420100 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 242474371 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:03 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094420100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.2094420100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.2369949639 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 172141358 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:02 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369949639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.2369949639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.3738174401 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 156319830 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:02 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738174401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.3738174401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.2696517811 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 246031365 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:03 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696517811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.2696517811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.1214222487 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 167608736 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:11:00 PM UTC 24 |
| Finished | Oct 02 11:11:03 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214222487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.1214222487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.3449134826 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 151388623 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:11:02 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449134826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.3449134826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1163888055 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 251588142 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:11:02 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163888055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.1163888055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.1811559460 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 2765990457 ps |
| CPU time | 26.73 seconds |
| Started | Oct 02 11:11:02 PM UTC 24 |
| Finished | Oct 02 11:11:30 PM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811559460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.1811559460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2343070800 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 167916092 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:11:02 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343070800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2343070800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.1107889353 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 167711895 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:11:02 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107889353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.1107889353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.1559631558 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 1182981104 ps |
| CPU time | 2.98 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:08 PM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559631558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.1559631558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.56783675 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 2166743789 ps |
| CPU time | 55.73 seconds |
| Started | Oct 02 11:11:02 PM UTC 24 |
| Finished | Oct 02 11:11:59 PM UTC 24 |
| Peak memory | 228652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56783675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_streaming_out.56783675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.2689730159 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 1942843911 ps |
| CPU time | 13.63 seconds |
| Started | Oct 02 11:10:50 PM UTC 24 |
| Finished | Oct 02 11:11:04 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689730159 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.2689730159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.2439669553 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 625053584 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:07 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2439669553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.2439669553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.2056749492 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 538330688 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2056749492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.2056749492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.663157455 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 608873227 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=663157455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_t x_rx_disruption.663157455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.4261711293 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 515089594 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4261711293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.4261711293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.565365074 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 563199068 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:16:35 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=565365074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_t x_rx_disruption.565365074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.889865457 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 510863351 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:16:36 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=889865457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_t x_rx_disruption.889865457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.988150049 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 500092489 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:36 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=988150049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_t x_rx_disruption.988150049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.1777388890 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 595034009 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:16:36 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1777388890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.1777388890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.2381511302 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 522302796 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:16:37 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2381511302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.2381511302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.4143775692 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 574496761 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:16:37 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4143775692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.4143775692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.4294873798 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 604412670 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:16:37 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4294873798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.4294873798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.4165044931 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 46537391 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:21 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165044931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.4165044931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.562537983 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 4647352524 ps |
| CPU time | 8.76 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:14 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=562537983 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.562537983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.868001294 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 15678321718 ps |
| CPU time | 22.35 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:28 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=868001294 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.868001294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.1359351295 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 25750898380 ps |
| CPU time | 38.3 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359351295 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.1359351295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.2941369251 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 222393039 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:06 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941369251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.2941369251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.4241618385 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 160970453 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241618385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.4241618385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.4122179320 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 541905461 ps |
| CPU time | 2.6 seconds |
| Started | Oct 02 11:11:04 PM UTC 24 |
| Finished | Oct 02 11:11:08 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122179320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.4122179320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3735880651 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 854666837 ps |
| CPU time | 3.52 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:11 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735880651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.3735880651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.3009537167 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 50946713551 ps |
| CPU time | 88.34 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:12:36 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009537167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.3009537167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2003735309 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 4260136113 ps |
| CPU time | 36.09 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 218408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003735309 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.2003735309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.313967742 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 953235004 ps |
| CPU time | 2.62 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:10 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=313967742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.313967742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.2106953304 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 220992877 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:09 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106953304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.2106953304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_enable.2654869755 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 47048003 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:08 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654869755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.2654869755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.1657053993 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 823931222 ps |
| CPU time | 2.78 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:10 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657053993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.1657053993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.282386138 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 302786325 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:11:07 PM UTC 24 |
| Finished | Oct 02 11:11:09 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=282386138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.282386138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.2981005863 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 272429633 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:11:07 PM UTC 24 |
| Finished | Oct 02 11:11:09 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981005863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.2981005863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.1427041329 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 363040139 ps |
| CPU time | 3.37 seconds |
| Started | Oct 02 11:11:07 PM UTC 24 |
| Finished | Oct 02 11:11:11 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427041329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.1427041329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2968461937 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 172141287 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:11:07 PM UTC 24 |
| Finished | Oct 02 11:11:09 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968461937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2968461937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.681162206 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 139024667 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:11:07 PM UTC 24 |
| Finished | Oct 02 11:11:09 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681162206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_in_stall.681162206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1358191377 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 204078782 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:11:08 PM UTC 24 |
| Finished | Oct 02 11:11:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358191377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.1358191377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2584549924 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 3981050409 ps |
| CPU time | 29.09 seconds |
| Started | Oct 02 11:11:07 PM UTC 24 |
| Finished | Oct 02 11:11:37 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2584549924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2584549924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.2206145225 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 7597597351 ps |
| CPU time | 83.45 seconds |
| Started | Oct 02 11:11:08 PM UTC 24 |
| Finished | Oct 02 11:12:34 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206145225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.2206145225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.4000627780 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 257342523 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:11:09 PM UTC 24 |
| Finished | Oct 02 11:11:11 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000627780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.4000627780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.1165126665 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 28368864838 ps |
| CPU time | 48.63 seconds |
| Started | Oct 02 11:11:09 PM UTC 24 |
| Finished | Oct 02 11:11:59 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165126665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.1165126665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.1564097876 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 9810521211 ps |
| CPU time | 17.79 seconds |
| Started | Oct 02 11:11:09 PM UTC 24 |
| Finished | Oct 02 11:11:28 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564097876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.1564097876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2697557449 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 2719472391 ps |
| CPU time | 20.78 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:32 PM UTC 24 |
| Peak memory | 230704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697557449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2697557449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3991262112 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 1828679120 ps |
| CPU time | 18.98 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:30 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991262112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.3991262112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.75397885 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 259798429 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:13 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75397885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.75397885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.1753515701 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 193057795 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:13 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753515701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.1753515701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.1115240994 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 3395623315 ps |
| CPU time | 31.4 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:43 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115240994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.1115240994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.765131292 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 172013272 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:13 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765131292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.765131292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.3718574090 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 151026729 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:11:10 PM UTC 24 |
| Finished | Oct 02 11:11:13 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718574090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.3718574090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.2462020968 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 232224188 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:11:12 PM UTC 24 |
| Finished | Oct 02 11:11:15 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462020968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.2462020968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.4098203553 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 221373558 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:11:12 PM UTC 24 |
| Finished | Oct 02 11:11:15 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098203553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.4098203553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.903123314 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 156835333 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:11:12 PM UTC 24 |
| Finished | Oct 02 11:11:14 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903123314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_out_stall.903123314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.2222528840 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 159511915 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:11:12 PM UTC 24 |
| Finished | Oct 02 11:11:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222528840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.2222528840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.4000173926 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 148112742 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:11:12 PM UTC 24 |
| Finished | Oct 02 11:11:14 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000173926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.4000173926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.3132386935 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 189324830 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:11:12 PM UTC 24 |
| Finished | Oct 02 11:11:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132386935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.3132386935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2108746961 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 145322030 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:11:14 PM UTC 24 |
| Finished | Oct 02 11:11:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108746961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2108746961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.263882184 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 42576271 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:11:14 PM UTC 24 |
| Finished | Oct 02 11:11:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=263882184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_phy_pins_sense.263882184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.4152190583 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 12325750468 ps |
| CPU time | 33.81 seconds |
| Started | Oct 02 11:11:14 PM UTC 24 |
| Finished | Oct 02 11:11:49 PM UTC 24 |
| Peak memory | 232476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152190583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.4152190583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.2465000516 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 155260827 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:11:14 PM UTC 24 |
| Finished | Oct 02 11:11:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465000516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.2465000516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.703776981 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 230422818 ps |
| CPU time | 1.83 seconds |
| Started | Oct 02 11:11:14 PM UTC 24 |
| Finished | Oct 02 11:11:17 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703776981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_pkt_sent.703776981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.3852624173 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 203473647 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:11:14 PM UTC 24 |
| Finished | Oct 02 11:11:16 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3852624173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.3852624173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3030700092 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 193900124 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:11:15 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030700092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3030700092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2340442805 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 185605636 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340442805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.2340442805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2248024894 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 259683862 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248024894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.2248024894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1078127842 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 147092110 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078127842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.1078127842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.4105778758 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 165165070 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105778758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.4105778758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.3154397720 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 274279665 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154397720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.3154397720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.3317243839 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 2503582803 ps |
| CPU time | 67.46 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317243839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.3317243839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.1543149763 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 205158377 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:11:16 PM UTC 24 |
| Finished | Oct 02 11:11:18 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543149763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1543149763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.1403674376 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 186221420 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:11:17 PM UTC 24 |
| Finished | Oct 02 11:11:19 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403674376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.1403674376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.3503043775 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 881564430 ps |
| CPU time | 2.74 seconds |
| Started | Oct 02 11:11:17 PM UTC 24 |
| Finished | Oct 02 11:11:21 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503043775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.3503043775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.3455476245 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 2748860100 ps |
| CPU time | 22.53 seconds |
| Started | Oct 02 11:11:17 PM UTC 24 |
| Finished | Oct 02 11:11:41 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455476245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.3455476245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2881375798 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 7732890016 ps |
| CPU time | 47.4 seconds |
| Started | Oct 02 11:11:06 PM UTC 24 |
| Finished | Oct 02 11:11:55 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881375798 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.2881375798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.3334284335 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 586628112 ps |
| CPU time | 3.22 seconds |
| Started | Oct 02 11:11:17 PM UTC 24 |
| Finished | Oct 02 11:11:22 PM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3334284335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.3334284335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.2507041780 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 548586208 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:38 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2507041780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.2507041780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.719090529 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 489756642 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=719090529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_t x_rx_disruption.719090529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.544171692 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 471889743 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=544171692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_t x_rx_disruption.544171692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.1181328138 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 601252676 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1181328138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.1181328138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.4162360015 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 637000636 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4162360015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.4162360015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2188961672 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 491915057 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2188961672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2188961672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.1392083408 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 643077215 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1392083408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.1392083408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.3565500807 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 549049165 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3565500807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.3565500807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.3750951051 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 450385792 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:51 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3750951051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.3750951051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.226719416 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 85373106 ps |
| CPU time | 0.79 seconds |
| Started | Oct 02 11:11:37 PM UTC 24 |
| Finished | Oct 02 11:11:39 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=226719416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.226719416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.1710927253 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 4125677350 ps |
| CPU time | 8.87 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:29 PM UTC 24 |
| Peak memory | 228432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710927253 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.1710927253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.3145054211 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 15572981090 ps |
| CPU time | 27.92 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:48 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145054211 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.3145054211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1369759713 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 30025017764 ps |
| CPU time | 43.15 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:12:04 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369759713 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1369759713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.1175379479 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 178573816 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:22 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175379479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.1175379479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.3369117714 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 151414573 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:22 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369117714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.3369117714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3224935808 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 404284399 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:22 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224935808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.3224935808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.2688416859 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 770856196 ps |
| CPU time | 4.03 seconds |
| Started | Oct 02 11:11:19 PM UTC 24 |
| Finished | Oct 02 11:11:24 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688416859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.2688416859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.3674471618 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 27412019454 ps |
| CPU time | 55.69 seconds |
| Started | Oct 02 11:11:21 PM UTC 24 |
| Finished | Oct 02 11:12:18 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674471618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.3674471618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.485673285 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 4769595509 ps |
| CPU time | 41.08 seconds |
| Started | Oct 02 11:11:21 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=485673285 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.485673285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.1244174841 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 495876015 ps |
| CPU time | 2.35 seconds |
| Started | Oct 02 11:11:22 PM UTC 24 |
| Finished | Oct 02 11:11:26 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244174841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.1244174841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.2696429701 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 148808734 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:11:23 PM UTC 24 |
| Finished | Oct 02 11:11:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696429701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.2696429701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_enable.2809507621 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 55576004 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:11:23 PM UTC 24 |
| Finished | Oct 02 11:11:25 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809507621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.2809507621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.2241670004 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 915897380 ps |
| CPU time | 3.59 seconds |
| Started | Oct 02 11:11:23 PM UTC 24 |
| Finished | Oct 02 11:11:28 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241670004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.2241670004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.1128305853 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 647057758 ps |
| CPU time | 2.43 seconds |
| Started | Oct 02 11:11:23 PM UTC 24 |
| Finished | Oct 02 11:11:27 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128305853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.1128305853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.1152396979 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 314230411 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:11:25 PM UTC 24 |
| Finished | Oct 02 11:11:28 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152396979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.1152396979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.580881842 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 493105197 ps |
| CPU time | 3.95 seconds |
| Started | Oct 02 11:11:25 PM UTC 24 |
| Finished | Oct 02 11:11:30 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580881842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.580881842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1150625444 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 224152319 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:11:26 PM UTC 24 |
| Finished | Oct 02 11:11:30 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150625444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.1150625444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.826331260 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 204461761 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:11:26 PM UTC 24 |
| Finished | Oct 02 11:11:29 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=826331260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_in_stall.826331260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2396252989 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 208996408 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:11:26 PM UTC 24 |
| Finished | Oct 02 11:11:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396252989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.2396252989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.192081814 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 3820874401 ps |
| CPU time | 28.06 seconds |
| Started | Oct 02 11:11:25 PM UTC 24 |
| Finished | Oct 02 11:11:54 PM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192081814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.192081814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.3395731459 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 12523925299 ps |
| CPU time | 80.07 seconds |
| Started | Oct 02 11:11:28 PM UTC 24 |
| Finished | Oct 02 11:12:50 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395731459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.3395731459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2139754665 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 192539607 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:11:28 PM UTC 24 |
| Finished | Oct 02 11:11:31 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139754665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.2139754665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.1544264906 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 26870275313 ps |
| CPU time | 43.87 seconds |
| Started | Oct 02 11:11:28 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544264906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.1544264906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4274541142 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 11245489207 ps |
| CPU time | 18.03 seconds |
| Started | Oct 02 11:11:28 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274541142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.4274541142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2965978214 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 2603944573 ps |
| CPU time | 20.34 seconds |
| Started | Oct 02 11:11:29 PM UTC 24 |
| Finished | Oct 02 11:11:51 PM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965978214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.2965978214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3841342553 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 2123452777 ps |
| CPU time | 19.24 seconds |
| Started | Oct 02 11:11:29 PM UTC 24 |
| Finished | Oct 02 11:11:50 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3841342553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.3841342553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.1181463700 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 263174868 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:11:30 PM UTC 24 |
| Finished | Oct 02 11:11:33 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181463700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.1181463700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3542327454 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 196137171 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:11:30 PM UTC 24 |
| Finished | Oct 02 11:11:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542327454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.3542327454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.1865904616 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 2229477402 ps |
| CPU time | 16.46 seconds |
| Started | Oct 02 11:11:30 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865904616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.1865904616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.2025471781 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 152101571 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:11:30 PM UTC 24 |
| Finished | Oct 02 11:11:32 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025471781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.2025471781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.2050574092 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 147968492 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050574092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.2050574092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.2020245435 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 203971746 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020245435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.2020245435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.3472302121 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 187576680 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472302121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.3472302121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3657268124 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 211007052 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657268124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.3657268124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.262258261 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 185932895 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=262258261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_out_trans_nak.262258261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3847153110 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 151072673 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847153110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.3847153110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.3647196577 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 251406061 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:11:31 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647196577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.3647196577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.340385670 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 148577895 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:11:32 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340385670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.340385670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.1599865418 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 116458553 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:11:32 PM UTC 24 |
| Finished | Oct 02 11:11:34 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599865418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.1599865418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.1029881912 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 14423153435 ps |
| CPU time | 37.34 seconds |
| Started | Oct 02 11:11:33 PM UTC 24 |
| Finished | Oct 02 11:12:12 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029881912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.1029881912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.3751666509 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 185662497 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:11:33 PM UTC 24 |
| Finished | Oct 02 11:11:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751666509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.3751666509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.4067057659 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 178702086 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:11:33 PM UTC 24 |
| Finished | Oct 02 11:11:36 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067057659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.4067057659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.3139389410 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 183087140 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:11:33 PM UTC 24 |
| Finished | Oct 02 11:11:36 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139389410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.3139389410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.3580415728 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 209911677 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:11:33 PM UTC 24 |
| Finished | Oct 02 11:11:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580415728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.3580415728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.2581899690 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 263334142 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581899690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.2581899690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.3409051361 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 267215082 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:37 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409051361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.3409051361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.3485964711 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 149953191 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:37 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485964711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.3485964711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.1570406217 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 151408187 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570406217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.1570406217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.893891229 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 229522188 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=893891229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.893891229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.2385746115 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 2629914321 ps |
| CPU time | 18.93 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:56 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385746115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.2385746115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1761857363 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 194408953 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:37 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761857363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.1761857363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.93311372 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 189824540 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=93311372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_stall_trans.93311372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.2020503323 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 417272523 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020503323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.2020503323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.792249239 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 3241276033 ps |
| CPU time | 30.35 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:12:07 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792249239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_streaming_out.792249239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2789577854 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 185941834 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:11:22 PM UTC 24 |
| Finished | Oct 02 11:11:25 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789577854 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.2789577854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.3469626061 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 497455474 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:11:35 PM UTC 24 |
| Finished | Oct 02 11:11:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3469626061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.3469626061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3452484001 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 667571355 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:52 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3452484001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3452484001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.4214073708 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 477586490 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4214073708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.4214073708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.1859709574 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 519465152 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:39 PM UTC 24 |
| Finished | Oct 02 11:16:42 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1859709574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.1859709574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.839572802 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 690595164 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:16:42 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=839572802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_t x_rx_disruption.839572802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.4197069508 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 580229301 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:16:42 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4197069508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.4197069508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.4170046263 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 560878306 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4170046263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.4170046263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1208206252 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 57525362 ps |
| CPU time | 0.84 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:52 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208206252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1208206252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.3862615204 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 5077016053 ps |
| CPU time | 8.87 seconds |
| Started | Oct 02 11:11:37 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862615204 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.3862615204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.794693160 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 13428980947 ps |
| CPU time | 19 seconds |
| Started | Oct 02 11:11:37 PM UTC 24 |
| Finished | Oct 02 11:11:57 PM UTC 24 |
| Peak memory | 228232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=794693160 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.794693160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.740547394 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 30610569304 ps |
| CPU time | 42.59 seconds |
| Started | Oct 02 11:11:37 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=740547394 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.740547394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.1729448175 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 146117648 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:41 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729448175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.1729448175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.3818464181 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 149628072 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:41 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818464181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.3818464181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.2374645366 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 370736203 ps |
| CPU time | 2.43 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:42 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374645366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.2374645366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.1254056551 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 355129246 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:41 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254056551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.1254056551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2112466930 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 28047934483 ps |
| CPU time | 50.48 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:12:31 PM UTC 24 |
| Peak memory | 218500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112466930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.2112466930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.3787713961 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 147789964 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:41 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787713961 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.3787713961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.767061210 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 881332775 ps |
| CPU time | 3.46 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767061210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.767061210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.3477299063 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 144679662 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:42 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477299063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.3477299063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_enable.3549603969 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 35974360 ps |
| CPU time | 0.77 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:41 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549603969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.3549603969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2835801551 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 790341830 ps |
| CPU time | 2.98 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835801551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.2835801551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.2396808999 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 397478860 ps |
| CPU time | 2.13 seconds |
| Started | Oct 02 11:11:41 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396808999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.2396808999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.4001236758 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 167575730 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:11:41 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001236758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.4001236758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.2620519895 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 509704887 ps |
| CPU time | 3.14 seconds |
| Started | Oct 02 11:11:41 PM UTC 24 |
| Finished | Oct 02 11:11:46 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620519895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.2620519895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.3535759319 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 251284187 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:11:41 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535759319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.3535759319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.1227298094 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 146529704 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:11:41 PM UTC 24 |
| Finished | Oct 02 11:11:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227298094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.1227298094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3946123544 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 224461501 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:11:45 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946123544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.3946123544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.1359121481 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 2396361217 ps |
| CPU time | 59.14 seconds |
| Started | Oct 02 11:11:41 PM UTC 24 |
| Finished | Oct 02 11:12:42 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359121481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.1359121481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.4267826920 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 12346538250 ps |
| CPU time | 139.46 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 219840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267826920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.4267826920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.1363654877 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 191335285 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:11:46 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363654877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.1363654877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1366631166 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 6874459305 ps |
| CPU time | 12.88 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:11:57 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366631166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.1366631166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.3897839096 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 9319551977 ps |
| CPU time | 13.36 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:11:58 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897839096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.3897839096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.1367000514 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 3218050696 ps |
| CPU time | 26.3 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:12:11 PM UTC 24 |
| Peak memory | 230724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367000514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.1367000514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1447181388 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 2547226438 ps |
| CPU time | 69.3 seconds |
| Started | Oct 02 11:11:43 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447181388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1447181388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.110979543 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 241285273 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=110979543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.110979543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.2219623282 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 206449333 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:48 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219623282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.2219623282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.317964310 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 4130755866 ps |
| CPU time | 107.75 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:13:35 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317964310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.317964310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3768913638 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 154690439 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768913638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.3768913638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.4049479415 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 169378367 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:48 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049479415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.4049479415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.3951427283 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 242495013 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951427283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.3951427283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.592631307 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 184853445 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592631307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_out_iso.592631307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2925300913 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 150509840 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925300913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.2925300913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3226525068 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 195689387 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:11:45 PM UTC 24 |
| Finished | Oct 02 11:11:48 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226525068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.3226525068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2580934043 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 166206966 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:11:46 PM UTC 24 |
| Finished | Oct 02 11:11:49 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580934043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.2580934043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.548968135 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 214321408 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:11:46 PM UTC 24 |
| Finished | Oct 02 11:11:49 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=548968135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.548968135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.568989938 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 147390075 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:11:46 PM UTC 24 |
| Finished | Oct 02 11:11:49 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=568989938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.568989938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.794441867 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 33127816 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:11:47 PM UTC 24 |
| Finished | Oct 02 11:11:49 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794441867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_phy_pins_sense.794441867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.1204872223 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 18452489792 ps |
| CPU time | 51.65 seconds |
| Started | Oct 02 11:11:48 PM UTC 24 |
| Finished | Oct 02 11:12:41 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204872223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.1204872223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.3253457150 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 169974196 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:11:48 PM UTC 24 |
| Finished | Oct 02 11:11:50 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253457150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.3253457150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.4026202633 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 169160219 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:11:48 PM UTC 24 |
| Finished | Oct 02 11:11:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026202633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.4026202633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.3343864929 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 155194817 ps |
| CPU time | 0.87 seconds |
| Started | Oct 02 11:11:48 PM UTC 24 |
| Finished | Oct 02 11:11:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343864929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.3343864929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.22671791 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 164004398 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:11:48 PM UTC 24 |
| Finished | Oct 02 11:11:50 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22671791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.22671791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.2746027367 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 154064214 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:11:48 PM UTC 24 |
| Finished | Oct 02 11:11:50 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746027367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.2746027367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.1633534590 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 353952762 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:52 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633534590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.1633534590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.761312892 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 150876040 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:52 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761312892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_setup_stage.761312892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.3896054033 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 179341509 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:52 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896054033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.3896054033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.1798048911 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 255151942 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798048911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.1798048911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.3591267186 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 2702332235 ps |
| CPU time | 68.05 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:13:00 PM UTC 24 |
| Peak memory | 230444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591267186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.3591267186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.2595225515 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 193679185 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:53 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595225515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.2595225515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.3560057806 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 189646674 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:52 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560057806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.3560057806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.3289350241 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 1337863291 ps |
| CPU time | 3.6 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:55 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289350241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.3289350241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.2080496570 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 3667085050 ps |
| CPU time | 34.54 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:12:26 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080496570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.2080496570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.2452543304 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 6065543028 ps |
| CPU time | 40.59 seconds |
| Started | Oct 02 11:11:39 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452543304 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.2452543304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.1065972933 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 618250167 ps |
| CPU time | 1.93 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:11:53 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1065972933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.1065972933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3887290556 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 606153789 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3887290556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3887290556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.3762452295 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 487017791 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3762452295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.3762452295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.2126361213 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 618547792 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2126361213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.2126361213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.3033514790 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 446100435 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3033514790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.3033514790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.4212158431 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 614764441 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4212158431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.4212158431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.2323616582 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 424740257 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2323616582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.2323616582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1645033946 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 487202837 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1645033946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1645033946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.3196917845 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 552721702 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3196917845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.3196917845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.2197556356 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 493367320 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2197556356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.2197556356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.1000489213 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 611739634 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1000489213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.1000489213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.4223841156 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 54787909 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:01:07 PM UTC 24 |
| Finished | Oct 02 11:01:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223841156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.4223841156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.2441285585 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 9638165999 ps |
| CPU time | 17.85 seconds |
| Started | Oct 02 11:00:13 PM UTC 24 |
| Finished | Oct 02 11:00:32 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441285585 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.2441285585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.3149379355 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 20598036805 ps |
| CPU time | 38.28 seconds |
| Started | Oct 02 11:00:14 PM UTC 24 |
| Finished | Oct 02 11:00:54 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149379355 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.3149379355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.1851484961 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 30112610873 ps |
| CPU time | 47.78 seconds |
| Started | Oct 02 11:00:14 PM UTC 24 |
| Finished | Oct 02 11:01:04 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851484961 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.1851484961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.147117761 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 236599774 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:00:14 PM UTC 24 |
| Finished | Oct 02 11:00:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=147117761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_buffer.147117761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2436393168 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 158473332 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:00:14 PM UTC 24 |
| Finished | Oct 02 11:00:17 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436393168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.2436393168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.1736615453 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 139927362 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:00:16 PM UTC 24 |
| Finished | Oct 02 11:00:18 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736615453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.1736615453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.4290687920 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 187621373 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:00:16 PM UTC 24 |
| Finished | Oct 02 11:00:18 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4290687920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.4290687920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.4246470264 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 315391907 ps |
| CPU time | 2.14 seconds |
| Started | Oct 02 11:00:16 PM UTC 24 |
| Finished | Oct 02 11:00:19 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246470264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.4246470264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.3570388456 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 668224840 ps |
| CPU time | 3.5 seconds |
| Started | Oct 02 11:00:17 PM UTC 24 |
| Finished | Oct 02 11:00:21 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570388456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.3570388456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.2122796398 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 15234853194 ps |
| CPU time | 33.47 seconds |
| Started | Oct 02 11:00:18 PM UTC 24 |
| Finished | Oct 02 11:00:53 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122796398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.2122796398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.500091062 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 1534276823 ps |
| CPU time | 13 seconds |
| Started | Oct 02 11:00:18 PM UTC 24 |
| Finished | Oct 02 11:00:32 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=500091062 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.500091062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.1087823288 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 1141187881 ps |
| CPU time | 4.31 seconds |
| Started | Oct 02 11:00:19 PM UTC 24 |
| Finished | Oct 02 11:00:24 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087823288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.1087823288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.4028289049 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 185526096 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:00:20 PM UTC 24 |
| Finished | Oct 02 11:00:23 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028289049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.4028289049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_enable.1450679420 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 40986081 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:00:20 PM UTC 24 |
| Finished | Oct 02 11:00:22 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450679420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.1450679420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.3811179135 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 807976228 ps |
| CPU time | 4.11 seconds |
| Started | Oct 02 11:00:22 PM UTC 24 |
| Finished | Oct 02 11:00:27 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811179135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.3811179135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.1099149862 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 153035925 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:00:22 PM UTC 24 |
| Finished | Oct 02 11:00:24 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099149862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.1099149862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.2515928198 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 173997838 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:00:23 PM UTC 24 |
| Finished | Oct 02 11:00:25 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515928198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.2515928198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3629952611 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 277695490 ps |
| CPU time | 2.55 seconds |
| Started | Oct 02 11:00:23 PM UTC 24 |
| Finished | Oct 02 11:00:26 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629952611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3629952611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.342236991 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 93184105947 ps |
| CPU time | 165.53 seconds |
| Started | Oct 02 11:00:24 PM UTC 24 |
| Finished | Oct 02 11:03:12 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=342236991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.342236991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.424271795 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 119120470668 ps |
| CPU time | 211.5 seconds |
| Started | Oct 02 11:00:25 PM UTC 24 |
| Finished | Oct 02 11:04:00 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=424271795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_hiclk_max.424271795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.16388366 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 95107482213 ps |
| CPU time | 180.03 seconds |
| Started | Oct 02 11:00:25 PM UTC 24 |
| Finished | Oct 02 11:03:28 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16388366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.16388366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.655330931 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 89090768426 ps |
| CPU time | 184.19 seconds |
| Started | Oct 02 11:00:25 PM UTC 24 |
| Finished | Oct 02 11:03:32 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=655330931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_loclk_max.655330931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.2612346173 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 95160738952 ps |
| CPU time | 170.93 seconds |
| Started | Oct 02 11:00:26 PM UTC 24 |
| Finished | Oct 02 11:03:20 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612346173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.2612346173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.1492806711 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 159339782 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:00:27 PM UTC 24 |
| Finished | Oct 02 11:00:30 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492806711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.1492806711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.1522539512 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 142996308 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:00:29 PM UTC 24 |
| Finished | Oct 02 11:00:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522539512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.1522539512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.2275930210 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 158837014 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:00:31 PM UTC 24 |
| Finished | Oct 02 11:00:33 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275930210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.2275930210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.91487217 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 4185333695 ps |
| CPU time | 112.63 seconds |
| Started | Oct 02 11:00:27 PM UTC 24 |
| Finished | Oct 02 11:02:22 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91487217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.91487217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.931389527 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 7938154829 ps |
| CPU time | 50.35 seconds |
| Started | Oct 02 11:00:32 PM UTC 24 |
| Finished | Oct 02 11:01:24 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=931389527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.931389527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.2130769640 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 194947159 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:00:33 PM UTC 24 |
| Finished | Oct 02 11:00:35 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130769640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.2130769640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.2131177299 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 12845728023 ps |
| CPU time | 26.03 seconds |
| Started | Oct 02 11:00:33 PM UTC 24 |
| Finished | Oct 02 11:01:00 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131177299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.2131177299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.308819138 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 8421742403 ps |
| CPU time | 23.3 seconds |
| Started | Oct 02 11:00:34 PM UTC 24 |
| Finished | Oct 02 11:00:59 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=308819138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_suspend.308819138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.2756035562 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 5056423314 ps |
| CPU time | 48.28 seconds |
| Started | Oct 02 11:00:34 PM UTC 24 |
| Finished | Oct 02 11:01:24 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756035562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.2756035562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.2413912068 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 3643821156 ps |
| CPU time | 27.25 seconds |
| Started | Oct 02 11:00:34 PM UTC 24 |
| Finished | Oct 02 11:01:03 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413912068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.2413912068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.1320246148 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 237425593 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:00:35 PM UTC 24 |
| Finished | Oct 02 11:00:38 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320246148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.1320246148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.1376569064 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 250376761 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:00:35 PM UTC 24 |
| Finished | Oct 02 11:00:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376569064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.1376569064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2859854540 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 3228834648 ps |
| CPU time | 89.13 seconds |
| Started | Oct 02 11:00:37 PM UTC 24 |
| Finished | Oct 02 11:02:08 PM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859854540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.2859854540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.952664354 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 1860218977 ps |
| CPU time | 19.47 seconds |
| Started | Oct 02 11:00:37 PM UTC 24 |
| Finished | Oct 02 11:00:58 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=952664354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.952664354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.2371699640 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 2927916844 ps |
| CPU time | 26.58 seconds |
| Started | Oct 02 11:00:39 PM UTC 24 |
| Finished | Oct 02 11:01:07 PM UTC 24 |
| Peak memory | 228656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371699640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.2371699640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2791295741 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 150113429 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:00:39 PM UTC 24 |
| Finished | Oct 02 11:00:41 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791295741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2791295741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.2147898780 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 141569043 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:00:39 PM UTC 24 |
| Finished | Oct 02 11:00:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147898780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.2147898780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.909680533 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 190045621 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:00:42 PM UTC 24 |
| Finished | Oct 02 11:00:45 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909680533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_nak_trans.909680533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.1779731841 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 174776867 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:00:42 PM UTC 24 |
| Finished | Oct 02 11:00:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779731841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.1779731841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.2203473553 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 160021991 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:00:45 PM UTC 24 |
| Finished | Oct 02 11:00:48 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203473553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.2203473553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.4005236128 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 213782209 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:00:47 PM UTC 24 |
| Finished | Oct 02 11:00:49 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005236128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.4005236128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.1172765498 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 165691726 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:00:47 PM UTC 24 |
| Finished | Oct 02 11:00:49 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172765498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.1172765498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.627923124 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 194945620 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:00:47 PM UTC 24 |
| Finished | Oct 02 11:00:50 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627923124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.627923124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.3986831127 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 229152526 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:00:48 PM UTC 24 |
| Finished | Oct 02 11:00:51 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986831127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.3986831127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.3860218012 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 185940705 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:00:50 PM UTC 24 |
| Finished | Oct 02 11:00:53 PM UTC 24 |
| Peak memory | 215264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860218012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.3860218012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.1254518081 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 17580645574 ps |
| CPU time | 57.71 seconds |
| Started | Oct 02 11:00:50 PM UTC 24 |
| Finished | Oct 02 11:01:50 PM UTC 24 |
| Peak memory | 232508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254518081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.1254518081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.426851698 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 176843313 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:00:51 PM UTC 24 |
| Finished | Oct 02 11:00:54 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=426851698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_pkt_received.426851698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.3822386945 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 238637805 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:00:51 PM UTC 24 |
| Finished | Oct 02 11:00:54 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822386945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.3822386945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.2216996854 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 4452754278 ps |
| CPU time | 28.44 seconds |
| Started | Oct 02 11:00:54 PM UTC 24 |
| Finished | Oct 02 11:01:24 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216996854 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.2216996854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.771157244 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 2857749994 ps |
| CPU time | 60.85 seconds |
| Started | Oct 02 11:00:54 PM UTC 24 |
| Finished | Oct 02 11:01:57 PM UTC 24 |
| Peak memory | 230476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771157244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.771157244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.1858792201 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 9573158529 ps |
| CPU time | 174.41 seconds |
| Started | Oct 02 11:00:55 PM UTC 24 |
| Finished | Oct 02 11:03:53 PM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858792201 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.1858792201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.2967001387 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 238186730 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:00:54 PM UTC 24 |
| Finished | Oct 02 11:00:57 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967001387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.2967001387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.1171255455 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 178531275 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:00:54 PM UTC 24 |
| Finished | Oct 02 11:00:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171255455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.1171255455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.985984339 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 20192315678 ps |
| CPU time | 30.66 seconds |
| Started | Oct 02 11:00:55 PM UTC 24 |
| Finished | Oct 02 11:01:27 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985984339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_resume_link_active.985984339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.4025232515 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 174634478 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:00:55 PM UTC 24 |
| Finished | Oct 02 11:00:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025232515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.4025232515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.4285629857 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 386690752 ps |
| CPU time | 2.05 seconds |
| Started | Oct 02 11:00:57 PM UTC 24 |
| Finished | Oct 02 11:01:01 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285629857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.4285629857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.1021518185 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 150782309 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:00:57 PM UTC 24 |
| Finished | Oct 02 11:01:00 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021518185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.1021518185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.2776220280 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 253921429 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:01:07 PM UTC 24 |
| Finished | Oct 02 11:01:10 PM UTC 24 |
| Peak memory | 250624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776220280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.2776220280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.4053948562 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 356945230 ps |
| CPU time | 2.14 seconds |
| Started | Oct 02 11:00:59 PM UTC 24 |
| Finished | Oct 02 11:01:02 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053948562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.4053948562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.2131902550 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 243565011 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:00:59 PM UTC 24 |
| Finished | Oct 02 11:01:02 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131902550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.2131902550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.3878653677 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 148253356 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:01:00 PM UTC 24 |
| Finished | Oct 02 11:01:02 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878653677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.3878653677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.3586523330 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 150987557 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:01:01 PM UTC 24 |
| Finished | Oct 02 11:01:03 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586523330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.3586523330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.837828959 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 207045652 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:01:01 PM UTC 24 |
| Finished | Oct 02 11:01:04 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=837828959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.837828959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.529532630 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 1768342016 ps |
| CPU time | 17.79 seconds |
| Started | Oct 02 11:01:02 PM UTC 24 |
| Finished | Oct 02 11:01:21 PM UTC 24 |
| Peak memory | 234708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=529532630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.529532630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.3283742861 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 174470058 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:01:02 PM UTC 24 |
| Finished | Oct 02 11:01:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283742861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.3283742861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.2517411837 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 184518533 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:01:03 PM UTC 24 |
| Finished | Oct 02 11:01:06 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517411837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.2517411837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.4138552559 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 430906234 ps |
| CPU time | 2.5 seconds |
| Started | Oct 02 11:01:03 PM UTC 24 |
| Finished | Oct 02 11:01:07 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138552559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.4138552559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.421439868 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 3290274319 ps |
| CPU time | 37.43 seconds |
| Started | Oct 02 11:01:03 PM UTC 24 |
| Finished | Oct 02 11:01:42 PM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421439868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_streaming_out.421439868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.3249837503 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 499465183 ps |
| CPU time | 7.79 seconds |
| Started | Oct 02 11:00:19 PM UTC 24 |
| Finished | Oct 02 11:00:28 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249837503 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.3249837503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.43388000 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 492000088 ps |
| CPU time | 2.09 seconds |
| Started | Oct 02 11:01:05 PM UTC 24 |
| Finished | Oct 02 11:01:08 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=43388000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_r x_disruption.43388000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2734552099 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 41208811 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:12:04 PM UTC 24 |
| Finished | Oct 02 11:12:06 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734552099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2734552099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.61075082 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 6448963206 ps |
| CPU time | 11.32 seconds |
| Started | Oct 02 11:11:50 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61075082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.61075082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.243748227 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 20133435606 ps |
| CPU time | 27.92 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=243748227 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.243748227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.1855220610 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 23884968034 ps |
| CPU time | 34.76 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:12:28 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855220610 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.1855220610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.3534212161 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 147553392 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:11:54 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534212161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.3534212161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.1186680116 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 142874869 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:11:54 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186680116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.1186680116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1060124003 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 251238670 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:11:55 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060124003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.1060124003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.309269120 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 1101682910 ps |
| CPU time | 3.02 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:11:56 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309269120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.309269120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.1166765350 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 22885249512 ps |
| CPU time | 46.52 seconds |
| Started | Oct 02 11:11:52 PM UTC 24 |
| Finished | Oct 02 11:12:40 PM UTC 24 |
| Peak memory | 218436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166765350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.1166765350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.2968178110 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 887772983 ps |
| CPU time | 5.55 seconds |
| Started | Oct 02 11:11:53 PM UTC 24 |
| Finished | Oct 02 11:12:00 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968178110 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.2968178110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.754835749 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 710596495 ps |
| CPU time | 2.39 seconds |
| Started | Oct 02 11:11:53 PM UTC 24 |
| Finished | Oct 02 11:11:57 PM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754835749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.754835749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1896745304 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 142021214 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:11:54 PM UTC 24 |
| Finished | Oct 02 11:11:56 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896745304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.1896745304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3823241846 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 51016155 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:11:54 PM UTC 24 |
| Finished | Oct 02 11:11:56 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823241846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.3823241846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.25327128 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 956279420 ps |
| CPU time | 2.98 seconds |
| Started | Oct 02 11:11:54 PM UTC 24 |
| Finished | Oct 02 11:11:58 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25327128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_endpoint_access.25327128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.3855120752 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 438418524 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:11:54 PM UTC 24 |
| Finished | Oct 02 11:11:56 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855120752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.3855120752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.660928415 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 302136501 ps |
| CPU time | 3.1 seconds |
| Started | Oct 02 11:11:54 PM UTC 24 |
| Finished | Oct 02 11:11:58 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=660928415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_fifo_rst.660928415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.304254474 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 258720774 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:11:55 PM UTC 24 |
| Finished | Oct 02 11:11:58 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=304254474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.304254474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.4037062770 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 159125128 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:11:55 PM UTC 24 |
| Finished | Oct 02 11:11:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037062770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.4037062770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.3447635785 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 222129311 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:11:55 PM UTC 24 |
| Finished | Oct 02 11:11:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447635785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.3447635785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.3667035452 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 4452152358 ps |
| CPU time | 31.61 seconds |
| Started | Oct 02 11:11:55 PM UTC 24 |
| Finished | Oct 02 11:12:28 PM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667035452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.3667035452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.2202497877 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 5844926038 ps |
| CPU time | 64.82 seconds |
| Started | Oct 02 11:11:55 PM UTC 24 |
| Finished | Oct 02 11:13:02 PM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2202497877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.2202497877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.820217994 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 243917358 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:11:59 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=820217994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_in_err.820217994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.1001877693 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 29836150041 ps |
| CPU time | 50.6 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:12:49 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001877693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.1001877693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.1834662072 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 5277754541 ps |
| CPU time | 8.73 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:12:07 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834662072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.1834662072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.3379957871 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 4145775270 ps |
| CPU time | 36.03 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 230724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379957871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.3379957871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.1823233646 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 2896535464 ps |
| CPU time | 26.88 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823233646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.1823233646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1457692255 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 236336847 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:11:59 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457692255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.1457692255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.3706725958 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 186944409 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:12:00 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706725958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.3706725958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.2391321264 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 3190322633 ps |
| CPU time | 82.32 seconds |
| Started | Oct 02 11:11:57 PM UTC 24 |
| Finished | Oct 02 11:13:22 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391321264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.2391321264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.3947919608 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 163914203 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:01 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947919608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.3947919608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.3241816595 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 149875679 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241816595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.3241816595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.1436736950 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 193795431 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:02 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436736950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.1436736950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.2725846766 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 198164238 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:01 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725846766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.2725846766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.593911709 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 168224086 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:02 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593911709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_out_stall.593911709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.263742688 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 171935801 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=263742688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_out_trans_nak.263742688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.2721022761 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 171601136 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:01 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721022761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.2721022761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.3032460630 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 216203632 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:02 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032460630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.3032460630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.1656048839 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 228841736 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656048839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.1656048839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1149601727 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 111392190 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149601727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.1149601727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.958221808 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 12698139596 ps |
| CPU time | 32.45 seconds |
| Started | Oct 02 11:11:59 PM UTC 24 |
| Finished | Oct 02 11:12:33 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=958221808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_buffer.958221808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.357428404 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 187884405 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:12:01 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357428404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_pkt_received.357428404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.2007277587 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 214702309 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:12:01 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007277587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.2007277587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.2290659965 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 193851591 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:12:01 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290659965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.2290659965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2767416468 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 175305222 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:12:01 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2767416468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2767416468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.177517822 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 186917432 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:12:01 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177517822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_rx_crc_err.177517822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.1038604129 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 257665026 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:12:01 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038604129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.1038604129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.956562607 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 158361074 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:12:02 PM UTC 24 |
| Finished | Oct 02 11:12:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=956562607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_setup_stage.956562607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.392246390 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 174088624 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:12:02 PM UTC 24 |
| Finished | Oct 02 11:12:04 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=392246390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 40.usbdev_setup_trans_ignored.392246390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.3953197206 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 270268887 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:12:02 PM UTC 24 |
| Finished | Oct 02 11:12:05 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953197206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.3953197206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.416673684 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 2574155397 ps |
| CPU time | 65.5 seconds |
| Started | Oct 02 11:12:03 PM UTC 24 |
| Finished | Oct 02 11:13:10 PM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=416673684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.416673684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.3717855790 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 206930591 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:12:03 PM UTC 24 |
| Finished | Oct 02 11:12:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717855790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.3717855790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.1252177643 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 156764262 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:12:03 PM UTC 24 |
| Finished | Oct 02 11:12:05 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252177643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.1252177643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.4090892334 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 982908868 ps |
| CPU time | 2.74 seconds |
| Started | Oct 02 11:12:03 PM UTC 24 |
| Finished | Oct 02 11:12:06 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090892334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.4090892334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.2780743724 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 4079127712 ps |
| CPU time | 42.99 seconds |
| Started | Oct 02 11:12:03 PM UTC 24 |
| Finished | Oct 02 11:12:47 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780743724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.2780743724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.2914674800 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 488725091 ps |
| CPU time | 8.11 seconds |
| Started | Oct 02 11:11:53 PM UTC 24 |
| Finished | Oct 02 11:12:03 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914674800 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.2914674800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.4283621484 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 455332180 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:12:03 PM UTC 24 |
| Finished | Oct 02 11:12:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4283621484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.4283621484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.1352957956 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 450613696 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1352957956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.1352957956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.4034018478 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 495878289 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4034018478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.4034018478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.4099104636 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 479174866 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4099104636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.4099104636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.764874169 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 526084039 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=764874169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.764874169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.1529357377 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 522496859 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:45 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1529357377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.1529357377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.2812909665 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 623052294 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2812909665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.2812909665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.2206677169 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 480673219 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2206677169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.2206677169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.4150097763 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 552556268 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4150097763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.4150097763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.1185217674 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 495324200 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1185217674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.1185217674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.2904256873 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 445903297 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2904256873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.2904256873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.1431574004 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 51916880 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:12:17 PM UTC 24 |
| Finished | Oct 02 11:12:19 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431574004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.1431574004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.2529782466 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 9950922899 ps |
| CPU time | 14.29 seconds |
| Started | Oct 02 11:12:04 PM UTC 24 |
| Finished | Oct 02 11:12:20 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529782466 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.2529782466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.1218701586 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 16076040944 ps |
| CPU time | 25.62 seconds |
| Started | Oct 02 11:12:04 PM UTC 24 |
| Finished | Oct 02 11:12:31 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218701586 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.1218701586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.1256454749 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 31138460038 ps |
| CPU time | 48.68 seconds |
| Started | Oct 02 11:12:04 PM UTC 24 |
| Finished | Oct 02 11:12:55 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256454749 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.1256454749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.623391295 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 180776623 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:12:04 PM UTC 24 |
| Finished | Oct 02 11:12:07 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623391295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_av_buffer.623391295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.1107727645 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 153462849 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:12:04 PM UTC 24 |
| Finished | Oct 02 11:12:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107727645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.1107727645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.1567092888 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 375318652 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:12:05 PM UTC 24 |
| Finished | Oct 02 11:12:07 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567092888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.1567092888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.2032653538 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 825729170 ps |
| CPU time | 3.01 seconds |
| Started | Oct 02 11:12:05 PM UTC 24 |
| Finished | Oct 02 11:12:09 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032653538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.2032653538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.1968602378 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 37640953483 ps |
| CPU time | 57.62 seconds |
| Started | Oct 02 11:12:05 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968602378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.1968602378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.4277216883 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 169407640 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:12:05 PM UTC 24 |
| Finished | Oct 02 11:12:07 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277216883 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.4277216883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.2104179246 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 904297816 ps |
| CPU time | 2.1 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:09 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104179246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.2104179246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.4223173076 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 145757452 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:08 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223173076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.4223173076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_enable.4212185147 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 68573787 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:08 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212185147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.4212185147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.845785192 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 788475444 ps |
| CPU time | 2.96 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:10 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845785192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.845785192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.2923936507 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 680900037 ps |
| CPU time | 2.29 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:09 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923936507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.2923936507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.1835495016 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 149108016 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:08 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835495016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.1835495016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.4179282304 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 464053317 ps |
| CPU time | 3.58 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:11 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179282304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.4179282304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.4048935135 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 225886387 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:12:11 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048935135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.4048935135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.2100522865 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 160951306 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:12:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100522865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.2100522865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.2390737486 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 270636367 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:12:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390737486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.2390737486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.3493184249 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 4035871366 ps |
| CPU time | 107.15 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:13:56 PM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493184249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.3493184249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.53269577 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 3775990932 ps |
| CPU time | 25.16 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:12:34 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53269577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.53269577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.2125755087 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 258653092 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:12:10 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125755087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.2125755087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.814518047 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 32462253513 ps |
| CPU time | 60.11 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:13:10 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814518047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_link_resume.814518047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.900771016 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 5976764327 ps |
| CPU time | 9.28 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:12:19 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=900771016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_suspend.900771016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.1892751111 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 4659424600 ps |
| CPU time | 122.16 seconds |
| Started | Oct 02 11:12:08 PM UTC 24 |
| Finished | Oct 02 11:14:13 PM UTC 24 |
| Peak memory | 234980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892751111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.1892751111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1118242128 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 3031700385 ps |
| CPU time | 78.81 seconds |
| Started | Oct 02 11:12:09 PM UTC 24 |
| Finished | Oct 02 11:13:30 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118242128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1118242128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.1200777481 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 245542890 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:12:09 PM UTC 24 |
| Finished | Oct 02 11:12:12 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200777481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.1200777481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.3002252190 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 187737621 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:12:10 PM UTC 24 |
| Finished | Oct 02 11:12:12 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002252190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.3002252190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.3427494691 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 2869358078 ps |
| CPU time | 27.31 seconds |
| Started | Oct 02 11:12:10 PM UTC 24 |
| Finished | Oct 02 11:12:38 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427494691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.3427494691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.1090057896 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 153959138 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:12:11 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090057896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.1090057896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.1525531577 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 152090243 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:12:11 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525531577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.1525531577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.3510219608 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 293161231 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:12:11 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510219608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.3510219608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.817179967 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 225772194 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:12:11 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=817179967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_out_iso.817179967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.691071500 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 248299619 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:12:12 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=691071500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_out_stall.691071500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.483433582 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 148984218 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:12:12 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483433582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_out_trans_nak.483433582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.3664489751 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 166129762 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:12:12 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664489751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.3664489751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.1678388930 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 243631459 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:12:12 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678388930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.1678388930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.881403724 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 142066309 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:12:12 PM UTC 24 |
| Finished | Oct 02 11:12:14 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=881403724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.881403724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.2297855662 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 39001270 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:12:13 PM UTC 24 |
| Finished | Oct 02 11:12:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297855662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.2297855662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.161366755 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 7182765019 ps |
| CPU time | 19.64 seconds |
| Started | Oct 02 11:12:13 PM UTC 24 |
| Finished | Oct 02 11:12:34 PM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=161366755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_pkt_buffer.161366755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.3549066289 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 192704105 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:12:13 PM UTC 24 |
| Finished | Oct 02 11:12:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549066289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.3549066289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.1018388485 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 179769972 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:12:13 PM UTC 24 |
| Finished | Oct 02 11:12:16 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018388485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.1018388485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.2806406653 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 240755808 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:12:13 PM UTC 24 |
| Finished | Oct 02 11:12:16 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806406653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.2806406653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.767709541 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 167724814 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:17 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767709541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.767709541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.3685305990 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 166664662 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:17 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685305990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.3685305990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.2634024329 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 265458250 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:18 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634024329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.2634024329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.3190087634 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 164205916 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:17 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3190087634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.3190087634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.2531132049 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 146179277 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:17 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531132049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.2531132049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.4136404707 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 230742149 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:17 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136404707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.4136404707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1130200069 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 3328488667 ps |
| CPU time | 88.41 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:13:45 PM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130200069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1130200069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.785371279 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 149071473 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:18 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=785371279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.785371279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.3082423836 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 181198740 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:12:18 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082423836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.3082423836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.564819669 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 964968402 ps |
| CPU time | 2.95 seconds |
| Started | Oct 02 11:12:17 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564819669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_stream_len_max.564819669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.1764490140 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 3066149244 ps |
| CPU time | 81.65 seconds |
| Started | Oct 02 11:12:15 PM UTC 24 |
| Finished | Oct 02 11:13:39 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764490140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.1764490140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.980067936 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 1264326919 ps |
| CPU time | 24.2 seconds |
| Started | Oct 02 11:12:06 PM UTC 24 |
| Finished | Oct 02 11:12:31 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=980067936 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.980067936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.2429255924 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 440539590 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:12:17 PM UTC 24 |
| Finished | Oct 02 11:12:19 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2429255924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.2429255924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.4165611404 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 594354661 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4165611404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.4165611404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.877436785 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 449489704 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=877436785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_t x_rx_disruption.877436785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.3572948160 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 467677493 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3572948160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.3572948160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.4058625423 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 597341138 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4058625423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.4058625423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.3191098714 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 612120819 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3191098714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.3191098714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.215885036 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 451800188 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=215885036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_t x_rx_disruption.215885036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1307705967 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 650268170 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1307705967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.1307705967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.1996112604 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 458025794 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1996112604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.1996112604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.1882491682 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 504969941 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1882491682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.1882491682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.2639471960 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 542614834 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2639471960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.2639471960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.2881484635 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 33028936 ps |
| CPU time | 0.82 seconds |
| Started | Oct 02 11:12:35 PM UTC 24 |
| Finished | Oct 02 11:12:36 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881484635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.2881484635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.1860619743 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 9456085430 ps |
| CPU time | 15.83 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860619743 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.1860619743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.684410182 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 15273422230 ps |
| CPU time | 20.89 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:12:40 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=684410182 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.684410182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.713348705 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 31318201661 ps |
| CPU time | 44.3 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=713348705 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.713348705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.4039821575 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 203018336 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4039821575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.4039821575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.1500429892 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 163565899 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500429892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.1500429892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.436706727 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 346051304 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:12:21 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436706727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_data_toggle_clear.436706727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.819880846 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 1253869110 ps |
| CPU time | 3.7 seconds |
| Started | Oct 02 11:12:18 PM UTC 24 |
| Finished | Oct 02 11:12:23 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819880846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.819880846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.2967519473 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 13100329699 ps |
| CPU time | 29.54 seconds |
| Started | Oct 02 11:12:20 PM UTC 24 |
| Finished | Oct 02 11:12:51 PM UTC 24 |
| Peak memory | 217924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967519473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.2967519473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.3254105203 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 3141161385 ps |
| CPU time | 21.39 seconds |
| Started | Oct 02 11:12:20 PM UTC 24 |
| Finished | Oct 02 11:12:42 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254105203 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.3254105203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3787231700 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 871103690 ps |
| CPU time | 2.31 seconds |
| Started | Oct 02 11:12:20 PM UTC 24 |
| Finished | Oct 02 11:12:23 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787231700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3787231700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.1478749933 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 139242552 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:12:20 PM UTC 24 |
| Finished | Oct 02 11:12:22 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478749933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.1478749933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_enable.1840885932 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 40123717 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:12:20 PM UTC 24 |
| Finished | Oct 02 11:12:22 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840885932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.1840885932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.4289362643 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 846772887 ps |
| CPU time | 2.99 seconds |
| Started | Oct 02 11:12:21 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289362643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.4289362643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.2966759339 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 312310922 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:12:21 PM UTC 24 |
| Finished | Oct 02 11:12:24 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966759339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.2966759339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.2774836897 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 170140209 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:12:21 PM UTC 24 |
| Finished | Oct 02 11:12:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774836897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.2774836897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.2881375302 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 207361293 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:12:23 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881375302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2881375302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1747108970 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 189845336 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:12:23 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747108970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1747108970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.2037754770 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 175966573 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:12:23 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037754770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.2037754770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.2629738896 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 4372148902 ps |
| CPU time | 32.63 seconds |
| Started | Oct 02 11:12:21 PM UTC 24 |
| Finished | Oct 02 11:12:56 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629738896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.2629738896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.1130327925 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 4705865444 ps |
| CPU time | 58.16 seconds |
| Started | Oct 02 11:12:23 PM UTC 24 |
| Finished | Oct 02 11:13:23 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130327925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.1130327925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.1975047006 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 191122215 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:12:23 PM UTC 24 |
| Finished | Oct 02 11:12:25 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975047006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.1975047006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.522273655 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 27808814481 ps |
| CPU time | 51.58 seconds |
| Started | Oct 02 11:12:24 PM UTC 24 |
| Finished | Oct 02 11:13:17 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=522273655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_link_resume.522273655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.2742158055 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 4923601581 ps |
| CPU time | 8.6 seconds |
| Started | Oct 02 11:12:24 PM UTC 24 |
| Finished | Oct 02 11:12:34 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742158055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.2742158055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.2234781589 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 4340674522 ps |
| CPU time | 45.4 seconds |
| Started | Oct 02 11:12:24 PM UTC 24 |
| Finished | Oct 02 11:13:11 PM UTC 24 |
| Peak memory | 230440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234781589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.2234781589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.1733728565 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 3828807405 ps |
| CPU time | 35.69 seconds |
| Started | Oct 02 11:12:25 PM UTC 24 |
| Finished | Oct 02 11:13:02 PM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733728565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.1733728565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.1206329495 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 297581856 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:12:25 PM UTC 24 |
| Finished | Oct 02 11:12:27 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206329495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.1206329495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.701836489 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 194285200 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:28 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701836489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.701836489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.735891296 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 2355183234 ps |
| CPU time | 17.39 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:44 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=735891296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.735891296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.3073039383 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 152213817 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:28 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073039383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.3073039383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.3684174192 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 205127711 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684174192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.3684174192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.1196549894 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 181833692 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:28 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196549894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.1196549894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.4097849256 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 184001155 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:29 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097849256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.4097849256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.138795481 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 191585243 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:12:26 PM UTC 24 |
| Finished | Oct 02 11:12:29 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=138795481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_out_stall.138795481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.501388517 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 150173864 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:12:27 PM UTC 24 |
| Finished | Oct 02 11:12:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501388517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.501388517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.759067779 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 170482261 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:12:27 PM UTC 24 |
| Finished | Oct 02 11:12:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759067779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.759067779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.1955782695 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 262701776 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:32 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955782695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.1955782695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.252490775 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 146704693 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:31 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252490775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.252490775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.2476771801 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 34145116 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:31 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476771801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.2476771801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.2031396676 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 6410410280 ps |
| CPU time | 17.23 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:48 PM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031396676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.2031396676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.1501018444 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 189338170 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501018444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.1501018444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.197305837 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 161325788 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:32 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197305837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_pkt_sent.197305837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.975140607 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 199832370 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=975140607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_random_length_in_transaction.975140607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.145261786 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 187473924 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:12:29 PM UTC 24 |
| Finished | Oct 02 11:12:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=145261786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.145261786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.1751527388 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 166680235 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:12:31 PM UTC 24 |
| Finished | Oct 02 11:12:33 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751527388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.1751527388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.293432273 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 335163182 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:12:31 PM UTC 24 |
| Finished | Oct 02 11:12:33 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=293432273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_rx_full.293432273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.903908752 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 195068196 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903908752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_setup_stage.903908752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.609281059 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 180820686 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609281059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 42.usbdev_setup_trans_ignored.609281059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.1473695478 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 203793623 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473695478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.1473695478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.877699432 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 2590962248 ps |
| CPU time | 25.45 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:13:00 PM UTC 24 |
| Peak memory | 234892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877699432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.877699432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.1944060934 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 207969947 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944060934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.1944060934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.402683909 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 171167736 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:35 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=402683909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_stall_trans.402683909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.1353478189 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 447189154 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:36 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353478189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.1353478189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.3891851846 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 1576939955 ps |
| CPU time | 14.65 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:49 PM UTC 24 |
| Peak memory | 234768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891851846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.3891851846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.3470840140 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 4270200528 ps |
| CPU time | 27.15 seconds |
| Started | Oct 02 11:12:20 PM UTC 24 |
| Finished | Oct 02 11:12:48 PM UTC 24 |
| Peak memory | 218432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470840140 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.3470840140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.1835544567 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 561555504 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:12:33 PM UTC 24 |
| Finished | Oct 02 11:12:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1835544567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.1835544567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.433976123 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 524240204 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=433976123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_t x_rx_disruption.433976123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.2011199738 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 627738356 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:16:56 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2011199738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.2011199738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.1264252427 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 687979289 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:16:43 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1264252427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.1264252427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3235782217 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 545410166 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:16:44 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3235782217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3235782217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.468386460 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 598777695 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:16:44 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=468386460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_t x_rx_disruption.468386460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.473485641 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 588239020 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:16:44 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=473485641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_t x_rx_disruption.473485641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.498523010 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 548365256 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:16:46 PM UTC 24 |
| Finished | Oct 02 11:17:02 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=498523010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_t x_rx_disruption.498523010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.1183940182 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 523187667 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:16:46 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1183940182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.1183940182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.610671045 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 517458610 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:16:46 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=610671045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.610671045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.3680860496 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 661606296 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:46 PM UTC 24 |
| Finished | Oct 02 11:17:02 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3680860496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.3680860496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.3560746156 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 75418170 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560746156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3560746156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.3910930869 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 9449457776 ps |
| CPU time | 17.56 seconds |
| Started | Oct 02 11:12:35 PM UTC 24 |
| Finished | Oct 02 11:12:53 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910930869 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.3910930869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.2809907619 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 18775213298 ps |
| CPU time | 29.2 seconds |
| Started | Oct 02 11:12:35 PM UTC 24 |
| Finished | Oct 02 11:13:05 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809907619 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.2809907619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.3050436646 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 29509146425 ps |
| CPU time | 38 seconds |
| Started | Oct 02 11:12:35 PM UTC 24 |
| Finished | Oct 02 11:13:14 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050436646 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.3050436646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.3002857250 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 170532537 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:12:35 PM UTC 24 |
| Finished | Oct 02 11:12:37 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002857250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.3002857250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.1127407461 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 169541577 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:12:36 PM UTC 24 |
| Finished | Oct 02 11:12:39 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127407461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.1127407461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.2074211218 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 295619520 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:12:36 PM UTC 24 |
| Finished | Oct 02 11:12:39 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074211218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.2074211218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.3444120653 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 383321350 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:12:36 PM UTC 24 |
| Finished | Oct 02 11:12:39 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444120653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3444120653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.57588193 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 22706566879 ps |
| CPU time | 40 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:13:18 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57588193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_device_address.57588193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.4008477513 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 4364571152 ps |
| CPU time | 36.13 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:13:14 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008477513 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.4008477513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.2608844090 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 711229700 ps |
| CPU time | 2.14 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:12:40 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608844090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.2608844090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.2811753373 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 147140429 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:12:39 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811753373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.2811753373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_enable.833812337 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 86215062 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:12:39 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833812337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.833812337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.2981425774 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 905198014 ps |
| CPU time | 2.72 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:12:41 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981425774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.2981425774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.2863056167 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 563200916 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:12:40 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863056167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2863056167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.3216193450 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 148275871 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:12:39 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216193450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.3216193450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.523132236 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 306727043 ps |
| CPU time | 1.85 seconds |
| Started | Oct 02 11:12:39 PM UTC 24 |
| Finished | Oct 02 11:12:41 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523132236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.523132236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.832875222 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 217786169 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:12:39 PM UTC 24 |
| Finished | Oct 02 11:12:41 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=832875222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.832875222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.3069467807 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 138813245 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:12:39 PM UTC 24 |
| Finished | Oct 02 11:12:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069467807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.3069467807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.2873445939 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 201754707 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:12:40 PM UTC 24 |
| Finished | Oct 02 11:12:43 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873445939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.2873445939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.3036924585 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 3718829418 ps |
| CPU time | 34.29 seconds |
| Started | Oct 02 11:12:39 PM UTC 24 |
| Finished | Oct 02 11:13:14 PM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036924585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.3036924585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.1743060800 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 13168640527 ps |
| CPU time | 83.4 seconds |
| Started | Oct 02 11:12:40 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743060800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.1743060800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.1487786944 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 201494205 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:12:40 PM UTC 24 |
| Finished | Oct 02 11:12:42 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487786944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.1487786944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.3563517855 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 8150296608 ps |
| CPU time | 14.73 seconds |
| Started | Oct 02 11:12:40 PM UTC 24 |
| Finished | Oct 02 11:12:56 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563517855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.3563517855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.4275614308 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 4447385461 ps |
| CPU time | 7.99 seconds |
| Started | Oct 02 11:12:40 PM UTC 24 |
| Finished | Oct 02 11:12:50 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275614308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.4275614308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.3303168580 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 3881895916 ps |
| CPU time | 37.44 seconds |
| Started | Oct 02 11:12:41 PM UTC 24 |
| Finished | Oct 02 11:13:19 PM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303168580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.3303168580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.3141968040 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 3147419427 ps |
| CPU time | 23.09 seconds |
| Started | Oct 02 11:12:41 PM UTC 24 |
| Finished | Oct 02 11:13:05 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141968040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.3141968040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.3660582654 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 277422985 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:12:42 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660582654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.3660582654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.2870349395 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 228133170 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870349395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2870349395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.1171681473 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 3805553085 ps |
| CPU time | 36.89 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 228668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171681473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.1171681473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.70918951 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 186015793 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=70918951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.70918951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.1052335661 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 160527315 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052335661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.1052335661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.2961688238 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 285573408 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961688238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.2961688238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.214637152 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 161364513 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214637152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_out_iso.214637152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.917957513 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 181893564 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:12:43 PM UTC 24 |
| Finished | Oct 02 11:12:45 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917957513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_out_stall.917957513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.3398497289 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 158618183 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:12:44 PM UTC 24 |
| Finished | Oct 02 11:12:47 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398497289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.3398497289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.2746213065 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 201701512 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:12:44 PM UTC 24 |
| Finished | Oct 02 11:12:47 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746213065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.2746213065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.2813910075 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 256369013 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:12:44 PM UTC 24 |
| Finished | Oct 02 11:12:47 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813910075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.2813910075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.959330876 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 148198804 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:12:44 PM UTC 24 |
| Finished | Oct 02 11:12:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959330876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.959330876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.44398610 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 39114035 ps |
| CPU time | 0.76 seconds |
| Started | Oct 02 11:12:45 PM UTC 24 |
| Finished | Oct 02 11:12:47 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=44398610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_phy_pins_sense.44398610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.1469543176 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 15701447681 ps |
| CPU time | 47.04 seconds |
| Started | Oct 02 11:12:45 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469543176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.1469543176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.78863007 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 184110570 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:12:47 PM UTC 24 |
| Finished | Oct 02 11:12:49 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=78863007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_received.78863007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.2816915201 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 190366742 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:12:47 PM UTC 24 |
| Finished | Oct 02 11:12:50 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816915201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.2816915201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.2007954913 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 252297223 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:12:47 PM UTC 24 |
| Finished | Oct 02 11:12:50 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007954913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.2007954913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.448167544 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 178389499 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:12:47 PM UTC 24 |
| Finished | Oct 02 11:12:50 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=448167544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.448167544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.2000272816 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 144026695 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:12:47 PM UTC 24 |
| Finished | Oct 02 11:12:49 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000272816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.2000272816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.180321471 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 373188323 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:12:47 PM UTC 24 |
| Finished | Oct 02 11:12:50 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180321471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.180321471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.288141228 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 153480764 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:12:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288141228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_setup_stage.288141228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.1598348639 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 146242066 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:12:51 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598348639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.1598348639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.2019048760 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 244698628 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:12:51 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019048760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.2019048760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.2839402075 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 1936048747 ps |
| CPU time | 50.38 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:13:41 PM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839402075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2839402075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.269160299 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 207200832 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:12:51 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269160299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.269160299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.3150137717 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 143019922 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:12:51 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150137717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.3150137717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.2252956774 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 268161501 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252956774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.2252956774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.312965777 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 3911452565 ps |
| CPU time | 102.07 seconds |
| Started | Oct 02 11:12:49 PM UTC 24 |
| Finished | Oct 02 11:14:34 PM UTC 24 |
| Peak memory | 230756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312965777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_streaming_out.312965777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.1094524253 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 5244057935 ps |
| CPU time | 42.21 seconds |
| Started | Oct 02 11:12:37 PM UTC 24 |
| Finished | Oct 02 11:13:20 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094524253 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.1094524253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.31338262 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 521915022 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=31338262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_tx_ rx_disruption.31338262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.1586127888 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 540279637 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:16:46 PM UTC 24 |
| Finished | Oct 02 11:17:02 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1586127888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.1586127888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.1670744177 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 467450195 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:16:46 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1670744177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.1670744177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.1464312966 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 517072820 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:16:47 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1464312966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.1464312966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.1712554501 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 503307582 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:47 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1712554501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.1712554501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.2460341799 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 562284191 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:47 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2460341799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.2460341799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.4006414603 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 476318935 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4006414603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.4006414603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.2232411228 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 489233794 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2232411228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.2232411228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.55524410 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 536256985 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=55524410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_tx _rx_disruption.55524410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.1950409580 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 596722546 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1950409580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.1950409580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.1442525337 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 555898996 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1442525337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.1442525337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.3711433119 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 37606546 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:13:06 PM UTC 24 |
| Finished | Oct 02 11:13:08 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711433119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.3711433119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.3506758715 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 10623657572 ps |
| CPU time | 16.05 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:13:09 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506758715 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.3506758715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.2011157190 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 18929050920 ps |
| CPU time | 25 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:13:18 PM UTC 24 |
| Peak memory | 218432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011157190 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.2011157190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.2077988509 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 29576977712 ps |
| CPU time | 41.63 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077988509 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.2077988509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.1920564732 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 221949490 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920564732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.1920564732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.3226524717 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 152946557 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226524717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.3226524717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.2083812540 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 199570538 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:12:51 PM UTC 24 |
| Finished | Oct 02 11:12:54 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083812540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.2083812540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.724677647 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 1035119673 ps |
| CPU time | 3.58 seconds |
| Started | Oct 02 11:12:52 PM UTC 24 |
| Finished | Oct 02 11:12:57 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=724677647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.724677647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.3561527979 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 22312210124 ps |
| CPU time | 43.05 seconds |
| Started | Oct 02 11:12:52 PM UTC 24 |
| Finished | Oct 02 11:13:37 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561527979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.3561527979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.3532363196 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 993948508 ps |
| CPU time | 21.56 seconds |
| Started | Oct 02 11:12:52 PM UTC 24 |
| Finished | Oct 02 11:13:16 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532363196 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.3532363196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.1647565127 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 843312972 ps |
| CPU time | 2.66 seconds |
| Started | Oct 02 11:12:53 PM UTC 24 |
| Finished | Oct 02 11:12:57 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647565127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.1647565127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.152018590 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 145594742 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:12:53 PM UTC 24 |
| Finished | Oct 02 11:12:55 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=152018590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_disconnected.152018590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_enable.3989340447 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 77001716 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:12:53 PM UTC 24 |
| Finished | Oct 02 11:12:55 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989340447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.3989340447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.1262805363 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 716365869 ps |
| CPU time | 3.18 seconds |
| Started | Oct 02 11:12:54 PM UTC 24 |
| Finished | Oct 02 11:12:58 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262805363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.1262805363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.1470829295 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 209853187 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:12:54 PM UTC 24 |
| Finished | Oct 02 11:12:56 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470829295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.1470829295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.1673198244 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 295148358 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:12:54 PM UTC 24 |
| Finished | Oct 02 11:12:56 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673198244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.1673198244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.1022780575 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 442591295 ps |
| CPU time | 3.23 seconds |
| Started | Oct 02 11:12:55 PM UTC 24 |
| Finished | Oct 02 11:13:00 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022780575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.1022780575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.2658957544 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 206603019 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:12:58 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658957544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.2658957544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.3554316664 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 167635169 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:12:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554316664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.3554316664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.3982027836 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 173251131 ps |
| CPU time | 0.95 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:12:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982027836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.3982027836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.3417941501 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 4150476524 ps |
| CPU time | 30.05 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:13:27 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417941501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.3417941501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.2337888301 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 5988645134 ps |
| CPU time | 44.84 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:13:42 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337888301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.2337888301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.1194629260 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 268247693 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:12:58 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194629260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.1194629260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.2525918394 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 7009748250 ps |
| CPU time | 12.28 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:13:09 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525918394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.2525918394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.254614431 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 9331332229 ps |
| CPU time | 13.87 seconds |
| Started | Oct 02 11:12:56 PM UTC 24 |
| Finished | Oct 02 11:13:11 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254614431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_suspend.254614431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.4071450728 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 2863374607 ps |
| CPU time | 75.59 seconds |
| Started | Oct 02 11:12:57 PM UTC 24 |
| Finished | Oct 02 11:14:15 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071450728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.4071450728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.2676327194 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 3663342657 ps |
| CPU time | 33.58 seconds |
| Started | Oct 02 11:12:57 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676327194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.2676327194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.2264330235 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 241450938 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:12:57 PM UTC 24 |
| Finished | Oct 02 11:13:00 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264330235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.2264330235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.1837941378 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 193091786 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:12:57 PM UTC 24 |
| Finished | Oct 02 11:13:00 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837941378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.1837941378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.1297312510 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 3943816194 ps |
| CPU time | 105.22 seconds |
| Started | Oct 02 11:12:57 PM UTC 24 |
| Finished | Oct 02 11:14:45 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297312510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.1297312510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.403181042 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 160374209 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:12:59 PM UTC 24 |
| Finished | Oct 02 11:13:01 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403181042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.403181042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.586139524 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 150347958 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:12:59 PM UTC 24 |
| Finished | Oct 02 11:13:01 PM UTC 24 |
| Peak memory | 215936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=586139524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.586139524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.1724768930 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 180807204 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:12:59 PM UTC 24 |
| Finished | Oct 02 11:13:01 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724768930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.1724768930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.3292635547 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 168867349 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:12:59 PM UTC 24 |
| Finished | Oct 02 11:13:01 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292635547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.3292635547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.3456779585 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 149314396 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:13:00 PM UTC 24 |
| Finished | Oct 02 11:13:02 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456779585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.3456779585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.2396783544 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 150909926 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:13:00 PM UTC 24 |
| Finished | Oct 02 11:13:03 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396783544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.2396783544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.134063427 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 246806130 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:13:00 PM UTC 24 |
| Finished | Oct 02 11:13:03 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=134063427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.134063427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.658403273 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 141303093 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:13:00 PM UTC 24 |
| Finished | Oct 02 11:13:03 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658403273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.658403273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.1018729839 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 76115384 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:13:02 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018729839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.1018729839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.2822233466 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 12608623216 ps |
| CPU time | 34.17 seconds |
| Started | Oct 02 11:13:02 PM UTC 24 |
| Finished | Oct 02 11:13:37 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822233466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.2822233466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.2551578083 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 179091075 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:13:02 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551578083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.2551578083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.1867285291 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 182693003 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:13:02 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867285291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.1867285291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.808435254 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 170380046 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:13:02 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=808435254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_random_length_in_transaction.808435254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.41683387 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 196077930 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:13:02 PM UTC 24 |
| Finished | Oct 02 11:13:04 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41683387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.41683387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.1682040136 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 150461105 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:13:03 PM UTC 24 |
| Finished | Oct 02 11:13:05 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682040136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.1682040136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.1388309954 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 248534804 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:13:03 PM UTC 24 |
| Finished | Oct 02 11:13:06 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1388309954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.1388309954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.1757845383 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 155679047 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:13:03 PM UTC 24 |
| Finished | Oct 02 11:13:06 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757845383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.1757845383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.3190078763 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 171221751 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:13:03 PM UTC 24 |
| Finished | Oct 02 11:13:06 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3190078763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.3190078763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.941502247 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 247490749 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:13:03 PM UTC 24 |
| Finished | Oct 02 11:13:06 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941502247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.941502247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.1383882904 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 2819647536 ps |
| CPU time | 25.15 seconds |
| Started | Oct 02 11:13:04 PM UTC 24 |
| Finished | Oct 02 11:13:30 PM UTC 24 |
| Peak memory | 235064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383882904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.1383882904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.272744301 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 185484176 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:13:04 PM UTC 24 |
| Finished | Oct 02 11:13:06 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272744301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.272744301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.3141054178 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 192557597 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:13:05 PM UTC 24 |
| Finished | Oct 02 11:13:08 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141054178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.3141054178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.3951155852 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 1097983469 ps |
| CPU time | 2.95 seconds |
| Started | Oct 02 11:13:05 PM UTC 24 |
| Finished | Oct 02 11:13:09 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951155852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.3951155852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3474643496 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 2339830752 ps |
| CPU time | 66.52 seconds |
| Started | Oct 02 11:13:05 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474643496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3474643496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.210545828 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 4879281048 ps |
| CPU time | 31.9 seconds |
| Started | Oct 02 11:12:53 PM UTC 24 |
| Finished | Oct 02 11:13:26 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210545828 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.210545828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.279172075 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 452300843 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:13:05 PM UTC 24 |
| Finished | Oct 02 11:13:08 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=279172075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_tx _rx_disruption.279172075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.302499110 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 517762986 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=302499110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_t x_rx_disruption.302499110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.3485219631 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 635567214 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3485219631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.3485219631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.1207879358 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 576981818 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1207879358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.1207879358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.339511357 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 565842763 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=339511357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_t x_rx_disruption.339511357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.3943397566 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 436317866 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:16:53 PM UTC 24 |
| Finished | Oct 02 11:17:04 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3943397566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.3943397566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.2333680636 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 502826479 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2333680636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.2333680636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.3212050737 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 496597582 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3212050737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.3212050737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2754505286 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 610510172 ps |
| CPU time | 1.79 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2754505286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2754505286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.2290771295 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 450508262 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2290771295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.2290771295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.1618070188 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 555263775 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1618070188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.1618070188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3259797566 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 70615176 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:24 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259797566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.3259797566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.120515976 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 10104579594 ps |
| CPU time | 17.61 seconds |
| Started | Oct 02 11:13:06 PM UTC 24 |
| Finished | Oct 02 11:13:25 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120515976 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.120515976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.3205016365 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 13744129935 ps |
| CPU time | 21.83 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:30 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205016365 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.3205016365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.3104148243 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 29774365856 ps |
| CPU time | 47.32 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:56 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104148243 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.3104148243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.790230224 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 186341731 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:10 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790230224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_av_buffer.790230224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.3633326651 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 148800201 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:10 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633326651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.3633326651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.2169326975 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 588372475 ps |
| CPU time | 2.52 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:11 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169326975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.2169326975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.599260041 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 747462597 ps |
| CPU time | 2.73 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:11 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=599260041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.599260041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.404004585 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 27816709586 ps |
| CPU time | 57.19 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=404004585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_device_address.404004585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.4241792279 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 1043566547 ps |
| CPU time | 22.18 seconds |
| Started | Oct 02 11:13:07 PM UTC 24 |
| Finished | Oct 02 11:13:31 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241792279 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.4241792279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.2108725040 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 734334700 ps |
| CPU time | 2.32 seconds |
| Started | Oct 02 11:13:09 PM UTC 24 |
| Finished | Oct 02 11:13:12 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108725040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.2108725040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.989254854 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 166978696 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:13:09 PM UTC 24 |
| Finished | Oct 02 11:13:11 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=989254854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_disconnected.989254854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_enable.3106196067 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 35372845 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:13:10 PM UTC 24 |
| Finished | Oct 02 11:13:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106196067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.3106196067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.804439298 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 1025483526 ps |
| CPU time | 3.5 seconds |
| Started | Oct 02 11:13:10 PM UTC 24 |
| Finished | Oct 02 11:13:15 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804439298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.804439298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.1334401999 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 173616832 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:13:10 PM UTC 24 |
| Finished | Oct 02 11:13:13 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334401999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.1334401999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.3338147585 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 452059961 ps |
| CPU time | 3.67 seconds |
| Started | Oct 02 11:13:10 PM UTC 24 |
| Finished | Oct 02 11:13:15 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338147585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.3338147585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.95526015 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 247247037 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:13:12 PM UTC 24 |
| Finished | Oct 02 11:13:14 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=95526015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.95526015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3066350763 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 142178038 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:13:12 PM UTC 24 |
| Finished | Oct 02 11:13:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066350763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.3066350763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.741253427 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 261589383 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:13:12 PM UTC 24 |
| Finished | Oct 02 11:13:14 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741253427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_in_trans.741253427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3570688441 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 4187128868 ps |
| CPU time | 107.15 seconds |
| Started | Oct 02 11:13:12 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 235284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570688441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3570688441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.2581105416 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 12208733111 ps |
| CPU time | 76.76 seconds |
| Started | Oct 02 11:13:12 PM UTC 24 |
| Finished | Oct 02 11:14:31 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581105416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2581105416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.1886492049 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 196006920 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:13:13 PM UTC 24 |
| Finished | Oct 02 11:13:16 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886492049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.1886492049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.3795170684 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 29351614975 ps |
| CPU time | 50.18 seconds |
| Started | Oct 02 11:13:13 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795170684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.3795170684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.1046061654 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 5247097515 ps |
| CPU time | 8.76 seconds |
| Started | Oct 02 11:13:13 PM UTC 24 |
| Finished | Oct 02 11:13:23 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046061654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.1046061654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.3710322707 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 2429413098 ps |
| CPU time | 17.72 seconds |
| Started | Oct 02 11:13:13 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 234980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710322707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.3710322707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.2398351892 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 1730671026 ps |
| CPU time | 17.32 seconds |
| Started | Oct 02 11:13:13 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398351892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.2398351892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.4120324651 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 262663652 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:13:14 PM UTC 24 |
| Finished | Oct 02 11:13:16 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120324651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.4120324651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.2872435387 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 198423085 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:18 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2872435387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.2872435387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.3597252886 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 3063800685 ps |
| CPU time | 21.46 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 228160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597252886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.3597252886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.1488227672 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 154642842 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488227672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.1488227672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.1562178089 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 159431851 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:18 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562178089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1562178089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.284581060 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 208879477 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:17 PM UTC 24 |
| Peak memory | 215388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=284581060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_nak_trans.284581060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.3779921982 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 169278504 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:18 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779921982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.3779921982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.4076414330 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 179939099 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:13:15 PM UTC 24 |
| Finished | Oct 02 11:13:18 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076414330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.4076414330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.1776522337 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 162255820 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:13:17 PM UTC 24 |
| Finished | Oct 02 11:13:19 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776522337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.1776522337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.3850262010 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 145946809 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:13:17 PM UTC 24 |
| Finished | Oct 02 11:13:19 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850262010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.3850262010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.4001537463 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 232217516 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:13:17 PM UTC 24 |
| Finished | Oct 02 11:13:19 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001537463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.4001537463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.1251610509 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 137757894 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:13:17 PM UTC 24 |
| Finished | Oct 02 11:13:19 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251610509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.1251610509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.4271778109 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 42625783 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:13:17 PM UTC 24 |
| Finished | Oct 02 11:13:19 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271778109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.4271778109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.2864668083 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 21867076263 ps |
| CPU time | 58.16 seconds |
| Started | Oct 02 11:13:18 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864668083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.2864668083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.2249773260 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 175537616 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:13:18 PM UTC 24 |
| Finished | Oct 02 11:13:20 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249773260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.2249773260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.1443992860 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 175616259 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:13:18 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443992860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.1443992860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.3807971235 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 150331271 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:13:18 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807971235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.3807971235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.657774188 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 175044951 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:13:18 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=657774188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.657774188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.3131284677 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 208325761 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:13:18 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131284677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.3131284677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.2142271525 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 254621886 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:13:19 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142271525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.2142271525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.3843714084 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 179198122 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:13:19 PM UTC 24 |
| Finished | Oct 02 11:13:21 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3843714084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.3843714084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2223001073 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 170847495 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:13:22 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223001073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2223001073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.826154644 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 207811459 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:13:23 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=826154644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.826154644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.3960225037 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 1957049081 ps |
| CPU time | 52.12 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 235024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960225037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.3960225037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.3300544765 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 165426758 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:13:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300544765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.3300544765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.2314729206 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 147964608 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:13:22 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314729206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.2314729206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.339815144 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 755490383 ps |
| CPU time | 2.56 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:13:24 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339815144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_stream_len_max.339815144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.2252857027 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 3974336574 ps |
| CPU time | 101.97 seconds |
| Started | Oct 02 11:13:20 PM UTC 24 |
| Finished | Oct 02 11:15:04 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252857027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.2252857027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.4274597428 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 2933070630 ps |
| CPU time | 18.04 seconds |
| Started | Oct 02 11:13:08 PM UTC 24 |
| Finished | Oct 02 11:13:28 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274597428 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.4274597428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.2097756468 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 473798356 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2097756468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.2097756468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.813444973 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 554840998 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=813444973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_t x_rx_disruption.813444973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.4037557845 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 567529798 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:16:57 PM UTC 24 |
| Finished | Oct 02 11:17:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4037557845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.4037557845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1996481180 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 470465721 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:17:01 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1996481180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.1996481180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.596011857 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 534056568 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:17:01 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=596011857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_t x_rx_disruption.596011857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.1762568098 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 465691279 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:17:01 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1762568098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.1762568098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.3653782273 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 603804810 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:17:01 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3653782273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.3653782273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.984349110 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 533870824 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:17:01 PM UTC 24 |
| Finished | Oct 02 11:17:03 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=984349110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_t x_rx_disruption.984349110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.3220459123 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 641011411 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3220459123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.3220459123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.120564700 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 500497591 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=120564700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_t x_rx_disruption.120564700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.3680669518 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 507823231 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3680669518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.3680669518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.2086227187 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 98971665 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:13:35 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086227187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.2086227187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.4254424615 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 4683622310 ps |
| CPU time | 7.67 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:31 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254424615 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.4254424615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.2089888952 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 19962370676 ps |
| CPU time | 26.5 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:50 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089888952 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.2089888952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.2119531913 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 23501823706 ps |
| CPU time | 37.92 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:14:01 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119531913 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.2119531913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1395005871 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 162867515 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:24 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395005871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1395005871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.3140581104 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 188591453 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:25 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140581104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.3140581104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.1014756877 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 551787857 ps |
| CPU time | 2.07 seconds |
| Started | Oct 02 11:13:22 PM UTC 24 |
| Finished | Oct 02 11:13:25 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014756877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.1014756877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.445754818 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 777609348 ps |
| CPU time | 2.29 seconds |
| Started | Oct 02 11:13:23 PM UTC 24 |
| Finished | Oct 02 11:13:27 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445754818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.445754818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.3153634457 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 26193070539 ps |
| CPU time | 42.52 seconds |
| Started | Oct 02 11:13:23 PM UTC 24 |
| Finished | Oct 02 11:14:08 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153634457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.3153634457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.3390491475 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 564108593 ps |
| CPU time | 11.9 seconds |
| Started | Oct 02 11:13:24 PM UTC 24 |
| Finished | Oct 02 11:13:37 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390491475 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.3390491475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3080923059 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 313436792 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:13:24 PM UTC 24 |
| Finished | Oct 02 11:13:26 PM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080923059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3080923059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.199352123 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 168632045 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:13:24 PM UTC 24 |
| Finished | Oct 02 11:13:26 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199352123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_disconnected.199352123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_enable.3831357958 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 35702343 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:13:27 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831357958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.3831357958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.2273697400 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 858615162 ps |
| CPU time | 3.15 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:13:29 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273697400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.2273697400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.2676284254 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 334218987 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:13:28 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676284254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.2676284254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.722732416 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 482457498 ps |
| CPU time | 3.93 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:13:30 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722732416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_fifo_rst.722732416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.449562434 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 179229721 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:13:28 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449562434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.449562434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.787882304 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 184655739 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:13:27 PM UTC 24 |
| Finished | Oct 02 11:13:29 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=787882304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_stall.787882304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.3673622702 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 168672259 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:13:27 PM UTC 24 |
| Finished | Oct 02 11:13:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673622702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.3673622702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3982081541 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 3545441383 ps |
| CPU time | 92.83 seconds |
| Started | Oct 02 11:13:25 PM UTC 24 |
| Finished | Oct 02 11:15:00 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982081541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.3982081541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.3820310664 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 6562198043 ps |
| CPU time | 66.6 seconds |
| Started | Oct 02 11:13:27 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 218380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3820310664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.3820310664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.3784212062 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 183746568 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:13:27 PM UTC 24 |
| Finished | Oct 02 11:13:29 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784212062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.3784212062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.2942496872 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 6152037092 ps |
| CPU time | 10.78 seconds |
| Started | Oct 02 11:13:27 PM UTC 24 |
| Finished | Oct 02 11:13:39 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942496872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.2942496872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.3290284810 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 9822488483 ps |
| CPU time | 17.08 seconds |
| Started | Oct 02 11:13:28 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290284810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.3290284810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.2132873587 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 4352531880 ps |
| CPU time | 35.69 seconds |
| Started | Oct 02 11:13:28 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132873587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.2132873587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.1796422604 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 2764290312 ps |
| CPU time | 71.2 seconds |
| Started | Oct 02 11:13:28 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796422604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.1796422604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.1888826279 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 312918549 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:13:28 PM UTC 24 |
| Finished | Oct 02 11:13:31 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888826279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.1888826279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.3342617521 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 203753015 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:13:29 PM UTC 24 |
| Finished | Oct 02 11:13:31 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342617521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.3342617521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.804986701 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 2462204393 ps |
| CPU time | 24.14 seconds |
| Started | Oct 02 11:13:29 PM UTC 24 |
| Finished | Oct 02 11:13:54 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=804986701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.804986701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3096860828 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 156226362 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:13:29 PM UTC 24 |
| Finished | Oct 02 11:13:31 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096860828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3096860828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.1909060409 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 188549912 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:13:29 PM UTC 24 |
| Finished | Oct 02 11:13:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909060409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.1909060409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.1009588699 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 231281070 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:13:30 PM UTC 24 |
| Finished | Oct 02 11:13:33 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009588699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.1009588699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.4170388990 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 175273218 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:13:30 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170388990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.4170388990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.3364361670 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 151737172 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:13:30 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364361670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.3364361670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.1240339330 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 174865109 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:13:30 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240339330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.1240339330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.1757578307 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 154807896 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:13:30 PM UTC 24 |
| Finished | Oct 02 11:13:32 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757578307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.1757578307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2848344285 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 266234716 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848344285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2848344285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.173454665 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 153294391 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173454665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.173454665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.3115345071 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 38350149 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115345071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.3115345071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.1699601245 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 22013485132 ps |
| CPU time | 56.7 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699601245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.1699601245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.1801193855 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 213181544 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801193855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.1801193855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.811147663 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 228656561 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811147663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_pkt_sent.811147663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.1095034388 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 223853534 ps |
| CPU time | 1.17 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095034388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.1095034388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.445396981 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 179022588 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445396981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.445396981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.493121831 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 155342040 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:13:32 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493121831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_rx_crc_err.493121831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.1340752451 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 303720942 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:13:33 PM UTC 24 |
| Finished | Oct 02 11:13:36 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340752451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.1340752451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.3150103582 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 165983320 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:13:33 PM UTC 24 |
| Finished | Oct 02 11:13:35 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150103582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.3150103582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.478806227 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 154044875 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:13:33 PM UTC 24 |
| Finished | Oct 02 11:13:35 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478806227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 46.usbdev_setup_trans_ignored.478806227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.2748317899 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 194404818 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:13:33 PM UTC 24 |
| Finished | Oct 02 11:13:36 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748317899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.2748317899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.169971220 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 2136443745 ps |
| CPU time | 15.95 seconds |
| Started | Oct 02 11:13:34 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 234704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169971220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.169971220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.4028485861 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 155260438 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:13:34 PM UTC 24 |
| Finished | Oct 02 11:13:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028485861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.4028485861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.362415143 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 157078641 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:13:34 PM UTC 24 |
| Finished | Oct 02 11:13:36 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=362415143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_stall_trans.362415143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.2786848093 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 1074800182 ps |
| CPU time | 3.07 seconds |
| Started | Oct 02 11:13:34 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786848093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.2786848093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.444893957 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 2431778197 ps |
| CPU time | 64.81 seconds |
| Started | Oct 02 11:13:34 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=444893957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_streaming_out.444893957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.1360886308 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 430189341 ps |
| CPU time | 8.82 seconds |
| Started | Oct 02 11:13:24 PM UTC 24 |
| Finished | Oct 02 11:13:34 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360886308 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.1360886308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.4016980238 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 475453334 ps |
| CPU time | 1.91 seconds |
| Started | Oct 02 11:13:35 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4016980238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.4016980238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.509646487 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 645203279 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:05 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=509646487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_t x_rx_disruption.509646487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.3804916565 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 507417539 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3804916565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.3804916565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.1163031937 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 485705643 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1163031937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.1163031937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.820044319 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 578304335 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=820044319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_t x_rx_disruption.820044319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.257784119 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 512953647 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:17:02 PM UTC 24 |
| Finished | Oct 02 11:17:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=257784119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_t x_rx_disruption.257784119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.3796873575 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 481799547 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:17:03 PM UTC 24 |
| Finished | Oct 02 11:17:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3796873575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.3796873575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.1788900926 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 464081667 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:17:03 PM UTC 24 |
| Finished | Oct 02 11:17:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1788900926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.1788900926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.3701842367 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 462637916 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:17:03 PM UTC 24 |
| Finished | Oct 02 11:17:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3701842367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.3701842367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.2050103259 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 620072038 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:17:03 PM UTC 24 |
| Finished | Oct 02 11:17:06 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2050103259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.2050103259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.3927165158 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 649069734 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:21 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3927165158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.3927165158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.3777216027 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 61065085 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:13:50 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777216027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.3777216027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.1838593287 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 9963438967 ps |
| CPU time | 14.33 seconds |
| Started | Oct 02 11:13:35 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 218436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838593287 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.1838593287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.3079490824 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 19613954983 ps |
| CPU time | 24.96 seconds |
| Started | Oct 02 11:13:35 PM UTC 24 |
| Finished | Oct 02 11:14:02 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079490824 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.3079490824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2139475565 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 24755948189 ps |
| CPU time | 34.45 seconds |
| Started | Oct 02 11:13:36 PM UTC 24 |
| Finished | Oct 02 11:14:11 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139475565 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.2139475565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.2309039022 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 171058237 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:13:36 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309039022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.2309039022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.1089185398 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 161949128 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:13:36 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089185398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.1089185398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.2745332229 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 174342763 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:13:36 PM UTC 24 |
| Finished | Oct 02 11:13:38 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2745332229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.2745332229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.120588142 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 817735882 ps |
| CPU time | 2.56 seconds |
| Started | Oct 02 11:13:36 PM UTC 24 |
| Finished | Oct 02 11:13:39 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120588142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.120588142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.964700897 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 31198463808 ps |
| CPU time | 53.96 seconds |
| Started | Oct 02 11:13:36 PM UTC 24 |
| Finished | Oct 02 11:14:31 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=964700897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_device_address.964700897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.2835516105 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 168060103 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:13:39 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835516105 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.2835516105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.1048524862 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 875907933 ps |
| CPU time | 2.21 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:13:40 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048524862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.1048524862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.1263405905 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 152888110 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:13:39 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263405905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.1263405905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_enable.2638135050 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 91785685 ps |
| CPU time | 0.96 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:13:39 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638135050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.2638135050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.3013127602 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 1001531894 ps |
| CPU time | 2.88 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:13:41 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013127602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.3013127602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3798397155 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 236578730 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:13:40 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798397155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3798397155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.568544834 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 386115627 ps |
| CPU time | 2.69 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:13:43 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=568544834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_fifo_rst.568544834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.1149681435 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 264335133 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:13:42 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149681435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.1149681435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.1464614685 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 136849666 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:13:42 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464614685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.1464614685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.3591165908 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 157999827 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:13:42 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591165908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.3591165908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.3504267822 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 3044487440 ps |
| CPU time | 25.46 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504267822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.3504267822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.751379979 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 11092023440 ps |
| CPU time | 124.3 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:15:46 PM UTC 24 |
| Peak memory | 219512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=751379979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.751379979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.1673259131 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 245564983 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:13:42 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673259131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.1673259131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.696654788 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 30698507905 ps |
| CPU time | 57.17 seconds |
| Started | Oct 02 11:13:39 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696654788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_resume.696654788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1076500396 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 6236601248 ps |
| CPU time | 10.01 seconds |
| Started | Oct 02 11:13:40 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076500396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1076500396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3549038302 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 3505184866 ps |
| CPU time | 95.37 seconds |
| Started | Oct 02 11:13:40 PM UTC 24 |
| Finished | Oct 02 11:15:17 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549038302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3549038302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1296144459 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 3174763109 ps |
| CPU time | 84.6 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:15:07 PM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296144459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.1296144459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.598491025 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 256511660 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:13:43 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=598491025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.598491025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.2733076615 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 221978907 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:13:44 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733076615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.2733076615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1363676528 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 3049528336 ps |
| CPU time | 76.74 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:15:00 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363676528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1363676528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.2463176583 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 157235977 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:13:43 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463176583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.2463176583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.2885918444 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 159227378 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:13:43 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885918444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.2885918444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.2201232709 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 221169513 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:13:44 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201232709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.2201232709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.220830618 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 187479906 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:13:41 PM UTC 24 |
| Finished | Oct 02 11:13:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220830618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_out_iso.220830618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.306522864 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 154711229 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:13:45 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306522864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_out_stall.306522864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2671402038 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 189740678 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:13:45 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671402038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2671402038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.3157646162 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 224692214 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:13:46 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157646162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.3157646162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.318942859 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 223950505 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=318942859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.318942859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.477332053 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 212240704 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:13:46 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477332053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.477332053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.520809084 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 62141372 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:13:46 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520809084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_phy_pins_sense.520809084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.487692171 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 15164385843 ps |
| CPU time | 42.52 seconds |
| Started | Oct 02 11:13:43 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 232372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487692171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_pkt_buffer.487692171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.1734740266 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 158918084 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734740266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.1734740266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.2349750042 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 164254950 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349750042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.2349750042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.13109016 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 234415556 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13109016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_random_length_in_transaction.13109016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.2351065102 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 181860645 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351065102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.2351065102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.4040596392 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 151881702 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040596392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.4040596392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.266347087 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 434576979 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=266347087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_rx_full.266347087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.539317958 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 194568354 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539317958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_setup_stage.539317958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3414409394 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 152031833 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:13:45 PM UTC 24 |
| Finished | Oct 02 11:13:47 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414409394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.3414409394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.969799547 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 232085861 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:13:46 PM UTC 24 |
| Finished | Oct 02 11:13:49 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969799547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.969799547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.363972848 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 2501483780 ps |
| CPU time | 17.94 seconds |
| Started | Oct 02 11:13:46 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 235220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=363972848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.363972848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2159159361 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 155348755 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:13:46 PM UTC 24 |
| Finished | Oct 02 11:13:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159159361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2159159361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.1420270743 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 157228859 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420270743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.1420270743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.4056621474 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 1256473564 ps |
| CPU time | 4.1 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:13:54 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056621474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.4056621474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.901321155 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 2963636387 ps |
| CPU time | 22.9 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:14:13 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901321155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_streaming_out.901321155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.361379840 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 7045398536 ps |
| CPU time | 60.6 seconds |
| Started | Oct 02 11:13:37 PM UTC 24 |
| Finished | Oct 02 11:14:39 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=361379840 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.361379840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.2339299491 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 500386680 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:13:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2339299491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.2339299491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.2270623304 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 505995085 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2270623304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.2270623304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.1332929952 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 481011513 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1332929952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.1332929952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.1032406252 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 645829772 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1032406252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.1032406252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.1125086512 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 590705129 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1125086512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.1125086512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.691839707 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 568379534 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=691839707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_t x_rx_disruption.691839707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.4148571214 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 636642217 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4148571214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.4148571214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.2052112874 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 528135476 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2052112874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_ tx_rx_disruption.2052112874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.601158255 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 683793324 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:16 PM UTC 24 |
| Peak memory | 216788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=601158255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_t x_rx_disruption.601158255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.4093032935 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 524062523 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:15 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4093032935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.4093032935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.3045160140 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 656083975 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:22 PM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3045160140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.3045160140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.631603604 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 92173658 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=631603604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.631603604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.2654394807 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 9612937572 ps |
| CPU time | 20.67 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654394807 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.2654394807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1377129254 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 16037037953 ps |
| CPU time | 25.19 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:14:15 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377129254 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1377129254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3532136954 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 30168727956 ps |
| CPU time | 40.63 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532136954 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3532136954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.2510691400 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 190554257 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510691400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.2510691400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.125706804 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 175774819 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:13:48 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=125706804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_bitstuff_err.125706804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.1695191936 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 407228723 ps |
| CPU time | 1.98 seconds |
| Started | Oct 02 11:13:49 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695191936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.1695191936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.2353007228 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 454471892 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:13:49 PM UTC 24 |
| Finished | Oct 02 11:13:51 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353007228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.2353007228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.454031452 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 16701057308 ps |
| CPU time | 35.89 seconds |
| Started | Oct 02 11:13:50 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=454031452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_device_address.454031452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.218526180 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 1551087609 ps |
| CPU time | 15.17 seconds |
| Started | Oct 02 11:13:51 PM UTC 24 |
| Finished | Oct 02 11:14:11 PM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=218526180 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.218526180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.669077283 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 738482647 ps |
| CPU time | 3.05 seconds |
| Started | Oct 02 11:13:51 PM UTC 24 |
| Finished | Oct 02 11:13:58 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669077283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.669077283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.881914898 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 173332853 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:13:51 PM UTC 24 |
| Finished | Oct 02 11:13:57 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=881914898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.881914898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_enable.2787627147 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 50738834 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:13:51 PM UTC 24 |
| Finished | Oct 02 11:13:57 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787627147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.2787627147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.4188146184 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 929611239 ps |
| CPU time | 2.65 seconds |
| Started | Oct 02 11:13:51 PM UTC 24 |
| Finished | Oct 02 11:13:58 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188146184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.4188146184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.2949050498 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 572250359 ps |
| CPU time | 2.07 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:13:57 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949050498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.2949050498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.554560095 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 271485563 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:13:56 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554560095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_fifo_levels.554560095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.788866149 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 302385844 ps |
| CPU time | 2.9 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:13:58 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788866149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_fifo_rst.788866149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.2761608379 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 203323663 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:13:56 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761608379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.2761608379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.1361897819 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 192797540 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:13:55 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361897819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.1361897819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.3053352179 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 184650624 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:13:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053352179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.3053352179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.2941074568 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 3686037938 ps |
| CPU time | 33.26 seconds |
| Started | Oct 02 11:13:53 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941074568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.2941074568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.1835692039 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 11632295669 ps |
| CPU time | 122.81 seconds |
| Started | Oct 02 11:13:54 PM UTC 24 |
| Finished | Oct 02 11:15:59 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835692039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.1835692039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.3118897637 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 219263316 ps |
| CPU time | 1.23 seconds |
| Started | Oct 02 11:13:56 PM UTC 24 |
| Finished | Oct 02 11:13:58 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118897637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.3118897637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.3634705107 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 8187624760 ps |
| CPU time | 13.95 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:14:12 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634705107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.3634705107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.1607581847 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 4276780659 ps |
| CPU time | 8.58 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:14:07 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607581847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.1607581847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.1119356789 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 4048344530 ps |
| CPU time | 102.37 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:15:41 PM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119356789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.1119356789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.1157373067 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 2914038748 ps |
| CPU time | 75.59 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:15:14 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157373067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.1157373067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.3413967480 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 245615362 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:14:00 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413967480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.3413967480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.725799704 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 193639115 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:14:00 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725799704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.725799704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.2391676836 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 2896036493 ps |
| CPU time | 74 seconds |
| Started | Oct 02 11:13:57 PM UTC 24 |
| Finished | Oct 02 11:15:13 PM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391676836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.2391676836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.169069759 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 162017212 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:13:59 PM UTC 24 |
| Finished | Oct 02 11:14:01 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169069759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.169069759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.3987784427 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 180218181 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:13:59 PM UTC 24 |
| Finished | Oct 02 11:14:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987784427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.3987784427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.430711982 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 197049376 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:13:59 PM UTC 24 |
| Finished | Oct 02 11:14:01 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430711982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_nak_trans.430711982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.382002679 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 224334708 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:13:59 PM UTC 24 |
| Finished | Oct 02 11:14:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382002679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_out_iso.382002679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.3903739043 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 225782428 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:14:00 PM UTC 24 |
| Finished | Oct 02 11:14:03 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903739043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.3903739043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.2055755168 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 213628605 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:14:00 PM UTC 24 |
| Finished | Oct 02 11:14:03 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055755168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.2055755168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.883438626 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 160353430 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:14:00 PM UTC 24 |
| Finished | Oct 02 11:14:02 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883438626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pending_in_trans.883438626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.4019028357 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 223783177 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:14:01 PM UTC 24 |
| Finished | Oct 02 11:14:04 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019028357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.4019028357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.361544487 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 158430173 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:14:03 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361544487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.361544487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.2120710445 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 56337996 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:14:03 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120710445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.2120710445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3375424914 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 23069987821 ps |
| CPU time | 60.54 seconds |
| Started | Oct 02 11:14:03 PM UTC 24 |
| Finished | Oct 02 11:15:05 PM UTC 24 |
| Peak memory | 232676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375424914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.3375424914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.1953274023 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 181174224 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:14:03 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953274023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.1953274023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.1706858051 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 171794335 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:14:03 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706858051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.1706858051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.3932079947 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 170157878 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:14:03 PM UTC 24 |
| Finished | Oct 02 11:14:05 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932079947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.3932079947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3452630350 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 174847870 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:14:04 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452630350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3452630350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.2668790962 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 159382373 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:14:04 PM UTC 24 |
| Finished | Oct 02 11:14:06 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668790962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.2668790962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.1849221274 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 380067693 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:14:04 PM UTC 24 |
| Finished | Oct 02 11:14:07 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849221274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.1849221274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.1242777623 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 193459700 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:14:05 PM UTC 24 |
| Finished | Oct 02 11:14:07 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242777623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.1242777623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.1749974640 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 150040705 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:14:06 PM UTC 24 |
| Finished | Oct 02 11:14:07 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749974640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.1749974640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.3738049835 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 220561041 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:14:06 PM UTC 24 |
| Finished | Oct 02 11:14:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738049835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.3738049835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2593179159 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 2116006892 ps |
| CPU time | 15.98 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:25 PM UTC 24 |
| Peak memory | 234768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593179159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.2593179159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.1410341460 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 184413083 ps |
| CPU time | 1.03 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410341460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1410341460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.3775947684 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 158034903 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775947684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.3775947684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.2284829182 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 359085106 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284829182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.2284829182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1510013622 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 2911934359 ps |
| CPU time | 73.49 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:15:23 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510013622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.1510013622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.1251142865 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 1132998732 ps |
| CPU time | 24.58 seconds |
| Started | Oct 02 11:13:51 PM UTC 24 |
| Finished | Oct 02 11:14:20 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251142865 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.1251142865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.283937561 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 589402526 ps |
| CPU time | 1.92 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:11 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=283937561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_tx _rx_disruption.283937561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.3208394363 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 574424368 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:22 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3208394363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.3208394363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.2573068232 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 505905564 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:22 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2573068232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.2573068232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.4006319426 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 570817808 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:22 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4006319426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.4006319426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.2723246697 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 559531148 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2723246697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.2723246697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.459004399 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 599269559 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=459004399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_t x_rx_disruption.459004399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.1528877929 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 530367129 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1528877929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.1528877929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.3005008582 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 551346575 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:32 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3005008582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.3005008582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.1607065822 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 482067031 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:16 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1607065822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.1607065822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.56063325 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 483588882 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=56063325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_tx _rx_disruption.56063325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.3628165650 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 537657942 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3628165650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.3628165650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.263436951 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 30143017 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:24 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=263436951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.263436951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.2982710137 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 5538867157 ps |
| CPU time | 9.5 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:19 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982710137 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.2982710137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.1162326748 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 14785955811 ps |
| CPU time | 19.21 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162326748 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.1162326748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.4005150900 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 24941040336 ps |
| CPU time | 38.02 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:47 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005150900 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.4005150900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.1986169111 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 193422850 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986169111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.1986169111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.1407569180 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 152906286 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:10 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407569180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.1407569180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.228728875 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 478965550 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:14:08 PM UTC 24 |
| Finished | Oct 02 11:14:11 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228728875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_data_toggle_clear.228728875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.1839686803 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 568795783 ps |
| CPU time | 2.45 seconds |
| Started | Oct 02 11:14:10 PM UTC 24 |
| Finished | Oct 02 11:14:13 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839686803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.1839686803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.3813967384 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 39078208715 ps |
| CPU time | 74.95 seconds |
| Started | Oct 02 11:14:10 PM UTC 24 |
| Finished | Oct 02 11:15:26 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813967384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.3813967384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.4108479622 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 879455383 ps |
| CPU time | 17.38 seconds |
| Started | Oct 02 11:14:10 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108479622 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.4108479622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1445982828 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 592898251 ps |
| CPU time | 2.29 seconds |
| Started | Oct 02 11:14:11 PM UTC 24 |
| Finished | Oct 02 11:14:15 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445982828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.1445982828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1063568393 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 145472492 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063568393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.1063568393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_enable.3371545764 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 53276458 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3371545764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.3371545764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3153770561 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 991941274 ps |
| CPU time | 3 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:16 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153770561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3153770561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.782582010 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 342456117 ps |
| CPU time | 1.82 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=782582010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.782582010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.17699730 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 252034888 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17699730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_fifo_levels.17699730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.765701053 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 206343779 ps |
| CPU time | 2.97 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:16 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765701053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_fifo_rst.765701053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.1251647865 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 162269558 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251647865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.1251647865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.1024555628 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 144333897 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024555628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.1024555628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.3980451344 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 231506783 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:14:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980451344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.3980451344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.3465735485 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 2422708639 ps |
| CPU time | 61.65 seconds |
| Started | Oct 02 11:14:12 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 229760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465735485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.3465735485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.3921861 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 9411655626 ps |
| CPU time | 62 seconds |
| Started | Oct 02 11:14:13 PM UTC 24 |
| Finished | Oct 02 11:15:17 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.3921861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.2143867795 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 236101263 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:14:13 PM UTC 24 |
| Finished | Oct 02 11:14:15 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143867795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.2143867795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.4242335060 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 5480222157 ps |
| CPU time | 8.83 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:14:25 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242335060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.4242335060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.1902174939 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 3397742696 ps |
| CPU time | 6.14 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1902174939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.1902174939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.1064661846 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 3520770561 ps |
| CPU time | 32.46 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:14:49 PM UTC 24 |
| Peak memory | 235172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064661846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.1064661846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.1769221859 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 1940857078 ps |
| CPU time | 46.16 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:15:03 PM UTC 24 |
| Peak memory | 228220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769221859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.1769221859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.1287805268 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 248178086 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287805268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1287805268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.809544481 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 192921744 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809544481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.809544481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.2095652085 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 2622437692 ps |
| CPU time | 20.55 seconds |
| Started | Oct 02 11:14:15 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095652085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.2095652085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.1498070016 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 154756461 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:14:16 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498070016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.1498070016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.1381842811 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 144186295 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:14:16 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381842811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.1381842811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.1988350275 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 178576759 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:14:16 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988350275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.1988350275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2214870608 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 174241438 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:14:16 PM UTC 24 |
| Finished | Oct 02 11:14:18 PM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2214870608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.2214870608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.1041959407 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 204777453 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:14:16 PM UTC 24 |
| Finished | Oct 02 11:14:19 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041959407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.1041959407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.832483068 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 188089309 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:14:20 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832483068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_out_trans_nak.832483068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2967610348 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 160126228 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:14:19 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967610348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2967610348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.636176886 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 251253401 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:14:20 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636176886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.636176886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1224068061 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 147400547 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:14:19 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224068061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1224068061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1716407942 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 39020916 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:14:19 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716407942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1716407942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.3008139481 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 19010138154 ps |
| CPU time | 48.75 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:15:08 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008139481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.3008139481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2214890133 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 167377837 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:14:17 PM UTC 24 |
| Finished | Oct 02 11:14:20 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2214890133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2214890133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.1974805818 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 179173011 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:14:19 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974805818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.1974805818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3222486806 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 188421234 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:14:19 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222486806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.3222486806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.90243221 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 186944285 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:14:19 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=90243221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.90243221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.1159024809 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 162599035 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:14:19 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159024809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.1159024809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.90658966 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 250402539 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:14:19 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=90658966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_full.90658966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.559781845 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 143629575 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:14:19 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559781845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_setup_stage.559781845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2514700786 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 170477017 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:14:20 PM UTC 24 |
| Finished | Oct 02 11:14:23 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514700786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2514700786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.3936542208 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 199054852 ps |
| CPU time | 1.21 seconds |
| Started | Oct 02 11:14:20 PM UTC 24 |
| Finished | Oct 02 11:14:22 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936542208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.3936542208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.530311632 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 2566518828 ps |
| CPU time | 18.35 seconds |
| Started | Oct 02 11:14:20 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 234892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530311632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.530311632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.243610731 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 199489889 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:23 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243610731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.243610731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.1491995497 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 179595800 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:24 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491995497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.1491995497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.1959098517 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 433205631 ps |
| CPU time | 2.4 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:25 PM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959098517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.1959098517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.2064330961 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 2601142533 ps |
| CPU time | 23.65 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 230312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064330961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.2064330961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.905308139 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 351439018 ps |
| CPU time | 5.1 seconds |
| Started | Oct 02 11:14:10 PM UTC 24 |
| Finished | Oct 02 11:14:16 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=905308139 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.905308139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.1427651507 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 600848571 ps |
| CPU time | 2.06 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:25 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1427651507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.1427651507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.4126201013 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 519468019 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4126201013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.4126201013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.3879737968 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 541030163 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3879737968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.3879737968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.1924593156 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 486788023 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1924593156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.1924593156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.1729182324 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 637373494 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1729182324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.1729182324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3967894705 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 560133768 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3967894705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.3967894705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.4126229303 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 522789908 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4126229303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.4126229303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.3722788291 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 560060375 ps |
| CPU time | 2 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3722788291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.3722788291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2110114440 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 478548919 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2110114440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2110114440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.3578020982 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 452876867 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:17:06 PM UTC 24 |
| Finished | Oct 02 11:17:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3578020982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.3578020982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.3329025865 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 587363739 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:17:07 PM UTC 24 |
| Finished | Oct 02 11:17:34 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3329025865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.3329025865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2323267340 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 67617562 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:01:38 PM UTC 24 |
| Finished | Oct 02 11:01:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2323267340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2323267340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.153783090 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 11226470249 ps |
| CPU time | 23.48 seconds |
| Started | Oct 02 11:01:08 PM UTC 24 |
| Finished | Oct 02 11:01:33 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=153783090 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.153783090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.3894340743 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 13912584459 ps |
| CPU time | 20.13 seconds |
| Started | Oct 02 11:01:08 PM UTC 24 |
| Finished | Oct 02 11:01:30 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894340743 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.3894340743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.170331499 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 30280426848 ps |
| CPU time | 45.81 seconds |
| Started | Oct 02 11:01:08 PM UTC 24 |
| Finished | Oct 02 11:01:56 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170331499 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.170331499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.96862520 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 167769099 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:01:08 PM UTC 24 |
| Finished | Oct 02 11:01:11 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96862520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_av_buffer.96862520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.2094380325 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 163128590 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:01:08 PM UTC 24 |
| Finished | Oct 02 11:01:10 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094380325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.2094380325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.2839315579 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 153883097 ps |
| CPU time | 1.45 seconds |
| Started | Oct 02 11:01:10 PM UTC 24 |
| Finished | Oct 02 11:01:12 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839315579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.2839315579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.1684496720 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 1305971608 ps |
| CPU time | 6.04 seconds |
| Started | Oct 02 11:01:11 PM UTC 24 |
| Finished | Oct 02 11:01:18 PM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684496720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.1684496720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.3135854233 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 29698490164 ps |
| CPU time | 50.51 seconds |
| Started | Oct 02 11:01:11 PM UTC 24 |
| Finished | Oct 02 11:02:03 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135854233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.3135854233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.237842722 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 2922103475 ps |
| CPU time | 18.18 seconds |
| Started | Oct 02 11:01:12 PM UTC 24 |
| Finished | Oct 02 11:01:31 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237842722 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.237842722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.2357914503 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 952767449 ps |
| CPU time | 2.49 seconds |
| Started | Oct 02 11:01:13 PM UTC 24 |
| Finished | Oct 02 11:01:17 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357914503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.2357914503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.3922221287 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 163119064 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:01:13 PM UTC 24 |
| Finished | Oct 02 11:01:16 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922221287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.3922221287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_enable.24567219 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 40809177 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:01:15 PM UTC 24 |
| Finished | Oct 02 11:01:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24567219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.24567219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.2199116312 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 896631848 ps |
| CPU time | 3.1 seconds |
| Started | Oct 02 11:01:15 PM UTC 24 |
| Finished | Oct 02 11:01:19 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199116312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.2199116312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.1099741298 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 150862505 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:01:17 PM UTC 24 |
| Finished | Oct 02 11:01:19 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099741298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.1099741298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.1529853091 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 375251446 ps |
| CPU time | 3.04 seconds |
| Started | Oct 02 11:01:19 PM UTC 24 |
| Finished | Oct 02 11:01:23 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529853091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.1529853091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.3368597566 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 248092416 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:01:19 PM UTC 24 |
| Finished | Oct 02 11:01:21 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368597566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.3368597566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.792113335 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 152133665 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:01:19 PM UTC 24 |
| Finished | Oct 02 11:01:21 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792113335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_stall.792113335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.2787259761 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 184508680 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:01:20 PM UTC 24 |
| Finished | Oct 02 11:01:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787259761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.2787259761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.25016601 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 5406957345 ps |
| CPU time | 37.17 seconds |
| Started | Oct 02 11:01:19 PM UTC 24 |
| Finished | Oct 02 11:01:57 PM UTC 24 |
| Peak memory | 234956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25016601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.25016601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.962800531 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 11905013500 ps |
| CPU time | 72.44 seconds |
| Started | Oct 02 11:01:20 PM UTC 24 |
| Finished | Oct 02 11:02:34 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962800531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.962800531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.1363220282 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 194664122 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:01:20 PM UTC 24 |
| Finished | Oct 02 11:01:23 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363220282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.1363220282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.3815734118 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 7499139611 ps |
| CPU time | 15.32 seconds |
| Started | Oct 02 11:01:21 PM UTC 24 |
| Finished | Oct 02 11:01:38 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815734118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.3815734118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.2314474949 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 3375831600 ps |
| CPU time | 5.91 seconds |
| Started | Oct 02 11:01:23 PM UTC 24 |
| Finished | Oct 02 11:01:29 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314474949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.2314474949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.2812484362 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 4370194842 ps |
| CPU time | 31.09 seconds |
| Started | Oct 02 11:01:23 PM UTC 24 |
| Finished | Oct 02 11:01:55 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812484362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.2812484362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.3435666043 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 3314062285 ps |
| CPU time | 87.55 seconds |
| Started | Oct 02 11:01:23 PM UTC 24 |
| Finished | Oct 02 11:02:52 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435666043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3435666043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.2490124353 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 261514575 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:01:25 PM UTC 24 |
| Finished | Oct 02 11:01:28 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490124353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.2490124353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.1836199354 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 200385401 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:01:25 PM UTC 24 |
| Finished | Oct 02 11:01:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836199354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.1836199354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2856675251 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 2699138160 ps |
| CPU time | 68.41 seconds |
| Started | Oct 02 11:01:25 PM UTC 24 |
| Finished | Oct 02 11:02:36 PM UTC 24 |
| Peak memory | 235144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856675251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2856675251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.859787093 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 2899962625 ps |
| CPU time | 23.99 seconds |
| Started | Oct 02 11:01:25 PM UTC 24 |
| Finished | Oct 02 11:01:51 PM UTC 24 |
| Peak memory | 235016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859787093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.859787093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.691223645 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 2574380448 ps |
| CPU time | 30.51 seconds |
| Started | Oct 02 11:01:25 PM UTC 24 |
| Finished | Oct 02 11:01:57 PM UTC 24 |
| Peak memory | 228656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=691223645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.691223645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3975890462 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 151978829 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:01:26 PM UTC 24 |
| Finished | Oct 02 11:01:28 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975890462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.3975890462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2362560591 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 153544334 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:01:26 PM UTC 24 |
| Finished | Oct 02 11:01:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362560591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2362560591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.890614014 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 190706333 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:01:26 PM UTC 24 |
| Finished | Oct 02 11:01:28 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890614014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_nak_trans.890614014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2363760973 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 173486724 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:01:26 PM UTC 24 |
| Finished | Oct 02 11:01:29 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363760973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2363760973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.2302782663 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 160805998 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:01:27 PM UTC 24 |
| Finished | Oct 02 11:01:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302782663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.2302782663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.1288257058 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 205256675 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:01:27 PM UTC 24 |
| Finished | Oct 02 11:01:30 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288257058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.1288257058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.183434179 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 154713410 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:01:29 PM UTC 24 |
| Finished | Oct 02 11:01:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=183434179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pending_in_trans.183434179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.3461051593 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 204027015 ps |
| CPU time | 1.31 seconds |
| Started | Oct 02 11:01:29 PM UTC 24 |
| Finished | Oct 02 11:01:31 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461051593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.3461051593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.208225791 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 170269839 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:01:29 PM UTC 24 |
| Finished | Oct 02 11:01:31 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208225791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.208225791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.589923913 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 42175332 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:01:29 PM UTC 24 |
| Finished | Oct 02 11:01:31 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589923913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_phy_pins_sense.589923913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.2390253108 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 16518984133 ps |
| CPU time | 50.49 seconds |
| Started | Oct 02 11:01:30 PM UTC 24 |
| Finished | Oct 02 11:02:22 PM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390253108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.2390253108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.1078379393 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 184177124 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:01:30 PM UTC 24 |
| Finished | Oct 02 11:01:33 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078379393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.1078379393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.1713071613 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 227814393 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:01:30 PM UTC 24 |
| Finished | Oct 02 11:01:33 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713071613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.1713071613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.769349265 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 2844790772 ps |
| CPU time | 48.73 seconds |
| Started | Oct 02 11:01:31 PM UTC 24 |
| Finished | Oct 02 11:02:22 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769349265 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.769349265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.4083203508 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 6348777642 ps |
| CPU time | 37.53 seconds |
| Started | Oct 02 11:01:31 PM UTC 24 |
| Finished | Oct 02 11:02:10 PM UTC 24 |
| Peak memory | 230732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083203508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.4083203508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.434431674 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 10270541422 ps |
| CPU time | 55.96 seconds |
| Started | Oct 02 11:01:31 PM UTC 24 |
| Finished | Oct 02 11:02:29 PM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434431674 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.434431674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.4193710149 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 223100352 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:01:30 PM UTC 24 |
| Finished | Oct 02 11:01:33 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193710149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.4193710149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.4116176223 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 199715546 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:01:31 PM UTC 24 |
| Finished | Oct 02 11:01:33 PM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116176223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.4116176223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.157055751 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 20188054908 ps |
| CPU time | 25.82 seconds |
| Started | Oct 02 11:01:32 PM UTC 24 |
| Finished | Oct 02 11:02:00 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157055751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_resume_link_active.157055751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.1872100595 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 181824445 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:01:33 PM UTC 24 |
| Finished | Oct 02 11:01:35 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872100595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.1872100595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.2064722874 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 340731179 ps |
| CPU time | 2.33 seconds |
| Started | Oct 02 11:01:33 PM UTC 24 |
| Finished | Oct 02 11:01:36 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064722874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.2064722874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.1626215457 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 152481502 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:01:33 PM UTC 24 |
| Finished | Oct 02 11:01:35 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626215457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.1626215457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.779277037 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 149432667 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:01:34 PM UTC 24 |
| Finished | Oct 02 11:01:36 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=779277037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_setup_trans_ignored.779277037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.3431868420 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 234199889 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:01:34 PM UTC 24 |
| Finished | Oct 02 11:01:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431868420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.3431868420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.2739515873 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 2404273920 ps |
| CPU time | 64.75 seconds |
| Started | Oct 02 11:01:34 PM UTC 24 |
| Finished | Oct 02 11:02:40 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739515873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.2739515873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.3462994219 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 147210420 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:01:34 PM UTC 24 |
| Finished | Oct 02 11:01:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462994219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.3462994219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.3375200009 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 169496771 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:01:34 PM UTC 24 |
| Finished | Oct 02 11:01:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375200009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.3375200009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.3771813589 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 1395666808 ps |
| CPU time | 6.23 seconds |
| Started | Oct 02 11:01:35 PM UTC 24 |
| Finished | Oct 02 11:01:43 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771813589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.3771813589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.129115096 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 2182601843 ps |
| CPU time | 55.82 seconds |
| Started | Oct 02 11:01:34 PM UTC 24 |
| Finished | Oct 02 11:02:32 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=129115096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_streaming_out.129115096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.2718793716 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 4531660272 ps |
| CPU time | 103.12 seconds |
| Started | Oct 02 11:01:36 PM UTC 24 |
| Finished | Oct 02 11:03:22 PM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718793716 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.2718793716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.675713626 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 2421960759 ps |
| CPU time | 20.6 seconds |
| Started | Oct 02 11:01:12 PM UTC 24 |
| Finished | Oct 02 11:01:34 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=675713626 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.675713626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.706798438 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 579846155 ps |
| CPU time | 2.92 seconds |
| Started | Oct 02 11:01:37 PM UTC 24 |
| Finished | Oct 02 11:01:40 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=706798438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx_ rx_disruption.706798438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.371620888 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 345084958 ps |
| CPU time | 2.23 seconds |
| Started | Oct 02 11:14:21 PM UTC 24 |
| Finished | Oct 02 11:14:25 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=371620888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.371620888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3138123547 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 244414724 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:14:22 PM UTC 24 |
| Finished | Oct 02 11:14:25 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138123547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.3138123547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.2631167096 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 527059474 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:26 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2631167096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.2631167096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1850615274 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 322319860 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:26 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850615274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.1850615274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.91640314 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 151397852 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:26 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=91640314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 51.usbdev_fifo_levels.91640314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.3977608752 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 440496721 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3977608752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.3977608752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.231360047 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 478629675 ps |
| CPU time | 1.9 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=231360047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.231360047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.1979817276 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 250436813 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979817276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.1979817276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.262343992 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 490341618 ps |
| CPU time | 1.92 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=262343992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_tx _rx_disruption.262343992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.1936801588 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 274103574 ps |
| CPU time | 1.58 seconds |
| Started | Oct 02 11:14:24 PM UTC 24 |
| Finished | Oct 02 11:14:27 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1936801588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.1936801588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3969065301 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 616810483 ps |
| CPU time | 2.15 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:29 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3969065301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.3969065301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.2790723069 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 260598595 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790723069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.2790723069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.89511647 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 530389578 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=89511647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_tx_ rx_disruption.89511647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.1315767763 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 269810379 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:28 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315767763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.1315767763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.3000108037 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 657659512 ps |
| CPU time | 2.1 seconds |
| Started | Oct 02 11:14:26 PM UTC 24 |
| Finished | Oct 02 11:14:29 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3000108037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.3000108037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.2343072208 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 242998164 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:14:27 PM UTC 24 |
| Finished | Oct 02 11:14:29 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343072208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.2343072208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.2118122226 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 501885726 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:14:27 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2118122226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.2118122226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.3120548457 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 659663551 ps |
| CPU time | 2.03 seconds |
| Started | Oct 02 11:14:27 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120548457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.3120548457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.1527785444 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 285414466 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:14:27 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527785444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.1527785444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2461742426 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 704567754 ps |
| CPU time | 1.93 seconds |
| Started | Oct 02 11:14:27 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2461742426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.2461742426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.71899857 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 337738168 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:14:28 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=71899857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.71899857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.2632264679 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 304083583 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:28 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632264679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.2632264679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.2677051231 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 596722706 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:14:28 PM UTC 24 |
| Finished | Oct 02 11:14:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2677051231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.2677051231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.2028074633 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 308869936 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028074633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.2028074633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.2039193891 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 474007015 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2039193891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.2039193891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1671042278 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 52017609 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:02:08 PM UTC 24 |
| Finished | Oct 02 11:02:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671042278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1671042278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3869479294 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 5985562690 ps |
| CPU time | 13.43 seconds |
| Started | Oct 02 11:01:38 PM UTC 24 |
| Finished | Oct 02 11:01:52 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869479294 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3869479294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.3714608757 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 14418154415 ps |
| CPU time | 18.11 seconds |
| Started | Oct 02 11:01:38 PM UTC 24 |
| Finished | Oct 02 11:01:57 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714608757 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.3714608757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.635564680 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 30053313743 ps |
| CPU time | 47.09 seconds |
| Started | Oct 02 11:01:38 PM UTC 24 |
| Finished | Oct 02 11:02:26 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635564680 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.635564680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.1964422396 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 147131813 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:01:39 PM UTC 24 |
| Finished | Oct 02 11:01:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964422396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.1964422396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1759817514 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 148968939 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:01:40 PM UTC 24 |
| Finished | Oct 02 11:01:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759817514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1759817514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.562032774 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 569186135 ps |
| CPU time | 2.66 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:01:46 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=562032774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_data_toggle_clear.562032774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.236043155 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 305112965 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:01:46 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=236043155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.236043155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.1033671398 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 1064209441 ps |
| CPU time | 12.17 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:01:56 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033671398 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.1033671398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.2619998812 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 548168619 ps |
| CPU time | 2.24 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:01:46 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619998812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.2619998812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.2456629571 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 145080794 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:01:46 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456629571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.2456629571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_enable.1819937592 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 51278931 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:01:46 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819937592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.1819937592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.2029880054 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 948034265 ps |
| CPU time | 3.98 seconds |
| Started | Oct 02 11:01:45 PM UTC 24 |
| Finished | Oct 02 11:01:50 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029880054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.2029880054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.2940617024 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 203008394 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:01:45 PM UTC 24 |
| Finished | Oct 02 11:01:48 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940617024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.2940617024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1609087184 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 157443854 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:01:45 PM UTC 24 |
| Finished | Oct 02 11:01:48 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609087184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1609087184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.732355046 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 393709548 ps |
| CPU time | 3 seconds |
| Started | Oct 02 11:01:46 PM UTC 24 |
| Finished | Oct 02 11:01:51 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732355046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_fifo_rst.732355046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.3138215380 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 170082619 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:01:47 PM UTC 24 |
| Finished | Oct 02 11:01:49 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138215380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.3138215380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.33722372 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 136150557 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:01:48 PM UTC 24 |
| Finished | Oct 02 11:01:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33722372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_in_stall.33722372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.733564334 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 190793110 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:01:48 PM UTC 24 |
| Finished | Oct 02 11:01:50 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733564334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_in_trans.733564334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.4187597002 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 3099663337 ps |
| CPU time | 31.95 seconds |
| Started | Oct 02 11:01:47 PM UTC 24 |
| Finished | Oct 02 11:02:20 PM UTC 24 |
| Peak memory | 234768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187597002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.4187597002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.1608868851 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 10631347222 ps |
| CPU time | 77.11 seconds |
| Started | Oct 02 11:01:49 PM UTC 24 |
| Finished | Oct 02 11:03:08 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608868851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.1608868851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.503363164 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 159922941 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:01:49 PM UTC 24 |
| Finished | Oct 02 11:01:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=503363164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_in_err.503363164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.2601832031 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 27860105036 ps |
| CPU time | 67.09 seconds |
| Started | Oct 02 11:01:51 PM UTC 24 |
| Finished | Oct 02 11:02:59 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601832031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.2601832031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.3332519829 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 8873824889 ps |
| CPU time | 14.9 seconds |
| Started | Oct 02 11:01:51 PM UTC 24 |
| Finished | Oct 02 11:02:07 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332519829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.3332519829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.3060647899 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 4981017885 ps |
| CPU time | 141.21 seconds |
| Started | Oct 02 11:01:51 PM UTC 24 |
| Finished | Oct 02 11:04:14 PM UTC 24 |
| Peak memory | 235024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060647899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.3060647899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.437369203 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 2089083888 ps |
| CPU time | 58.61 seconds |
| Started | Oct 02 11:01:51 PM UTC 24 |
| Finished | Oct 02 11:02:51 PM UTC 24 |
| Peak memory | 234904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=437369203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.437369203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.385626350 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 248145120 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:01:52 PM UTC 24 |
| Finished | Oct 02 11:01:55 PM UTC 24 |
| Peak memory | 215872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385626350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.385626350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.3126790330 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 237522131 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:01:52 PM UTC 24 |
| Finished | Oct 02 11:01:55 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126790330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.3126790330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.4018082998 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 3253006011 ps |
| CPU time | 83.95 seconds |
| Started | Oct 02 11:01:52 PM UTC 24 |
| Finished | Oct 02 11:03:18 PM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018082998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.4018082998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.2911529345 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 2059920417 ps |
| CPU time | 15.46 seconds |
| Started | Oct 02 11:01:52 PM UTC 24 |
| Finished | Oct 02 11:02:09 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911529345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2911529345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.1048987763 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 2662921045 ps |
| CPU time | 74.03 seconds |
| Started | Oct 02 11:01:53 PM UTC 24 |
| Finished | Oct 02 11:03:09 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048987763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.1048987763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2807774844 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 166543117 ps |
| CPU time | 1.24 seconds |
| Started | Oct 02 11:01:56 PM UTC 24 |
| Finished | Oct 02 11:01:58 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807774844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2807774844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.2756486823 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 152292958 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:01:56 PM UTC 24 |
| Finished | Oct 02 11:01:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756486823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.2756486823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.2003813694 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 195612048 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:01:56 PM UTC 24 |
| Finished | Oct 02 11:01:58 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003813694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_nak_trans.2003813694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.1654449518 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 148700379 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:01:57 PM UTC 24 |
| Finished | Oct 02 11:02:00 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654449518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.1654449518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.3537559397 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 161183289 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:01:57 PM UTC 24 |
| Finished | Oct 02 11:01:59 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537559397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.3537559397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.4032109487 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 156891727 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:01:57 PM UTC 24 |
| Finished | Oct 02 11:01:59 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032109487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.4032109487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.4064212543 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 159965322 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:01:59 PM UTC 24 |
| Finished | Oct 02 11:02:01 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064212543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.4064212543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.1568292379 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 261709930 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:01:59 PM UTC 24 |
| Finished | Oct 02 11:02:01 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568292379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.1568292379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.2286413692 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 139754300 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:01:59 PM UTC 24 |
| Finished | Oct 02 11:02:01 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286413692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.2286413692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.2429732568 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 42614747 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:01:59 PM UTC 24 |
| Finished | Oct 02 11:02:01 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429732568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.2429732568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.1055568304 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 17002650398 ps |
| CPU time | 46.57 seconds |
| Started | Oct 02 11:01:59 PM UTC 24 |
| Finished | Oct 02 11:02:47 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055568304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.1055568304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.124559819 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 192656068 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:01:59 PM UTC 24 |
| Finished | Oct 02 11:02:01 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124559819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_pkt_received.124559819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.1512414192 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 219633814 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:02:01 PM UTC 24 |
| Finished | Oct 02 11:02:03 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512414192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.1512414192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.960725215 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 5248690370 ps |
| CPU time | 18.29 seconds |
| Started | Oct 02 11:02:01 PM UTC 24 |
| Finished | Oct 02 11:02:20 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=960725215 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.960725215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.904454210 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 2409103128 ps |
| CPU time | 46.64 seconds |
| Started | Oct 02 11:02:01 PM UTC 24 |
| Finished | Oct 02 11:02:49 PM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904454210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.904454210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.2916101403 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 10365531349 ps |
| CPU time | 199.79 seconds |
| Started | Oct 02 11:02:02 PM UTC 24 |
| Finished | Oct 02 11:05:26 PM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916101403 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.2916101403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.67136953 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 195148834 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:02:01 PM UTC 24 |
| Finished | Oct 02 11:02:03 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67136953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_random_length_in_transaction.67136953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.3759420554 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 216612382 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:02:01 PM UTC 24 |
| Finished | Oct 02 11:02:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759420554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.3759420554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.4167965998 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 20165024336 ps |
| CPU time | 28.75 seconds |
| Started | Oct 02 11:02:02 PM UTC 24 |
| Finished | Oct 02 11:02:33 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167965998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.4167965998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.2105845122 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 174371215 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:02:02 PM UTC 24 |
| Finished | Oct 02 11:02:05 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105845122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.2105845122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1538740916 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 262373628 ps |
| CPU time | 1.99 seconds |
| Started | Oct 02 11:02:02 PM UTC 24 |
| Finished | Oct 02 11:02:06 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538740916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1538740916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.1758365172 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 162595784 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:02:02 PM UTC 24 |
| Finished | Oct 02 11:02:05 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758365172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.1758365172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.237043259 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 152706896 ps |
| CPU time | 1.28 seconds |
| Started | Oct 02 11:02:04 PM UTC 24 |
| Finished | Oct 02 11:02:06 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237043259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_setup_trans_ignored.237043259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.330095088 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 243852615 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:02:04 PM UTC 24 |
| Finished | Oct 02 11:02:07 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=330095088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.330095088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.274621108 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 2130459028 ps |
| CPU time | 15.92 seconds |
| Started | Oct 02 11:02:04 PM UTC 24 |
| Finished | Oct 02 11:02:21 PM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=274621108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.274621108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.3050471906 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 143506934 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:02:04 PM UTC 24 |
| Finished | Oct 02 11:02:07 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050471906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.3050471906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.1082831433 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 176077678 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:02:06 PM UTC 24 |
| Finished | Oct 02 11:02:08 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082831433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.1082831433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.1142386493 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 1143103679 ps |
| CPU time | 4.28 seconds |
| Started | Oct 02 11:02:08 PM UTC 24 |
| Finished | Oct 02 11:02:14 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142386493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.1142386493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.640148942 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 3491844872 ps |
| CPU time | 26.16 seconds |
| Started | Oct 02 11:02:06 PM UTC 24 |
| Finished | Oct 02 11:02:33 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640148942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_streaming_out.640148942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.3098255071 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 2941317739 ps |
| CPU time | 30.93 seconds |
| Started | Oct 02 11:01:43 PM UTC 24 |
| Finished | Oct 02 11:02:15 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098255071 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.3098255071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.498304236 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 485063361 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:02:08 PM UTC 24 |
| Finished | Oct 02 11:02:11 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=498304236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx_ rx_disruption.498304236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.2596229769 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 262596547 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596229769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.2596229769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.1721019666 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 565051626 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1721019666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.1721019666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.438270491 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 151990590 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=438270491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 61.usbdev_fifo_levels.438270491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.179688663 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 520990416 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=179688663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_tx _rx_disruption.179688663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.2549362835 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 584476189 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549362835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.2549362835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.28191287 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 425113395 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=28191287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_tx_ rx_disruption.28191287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.1317694258 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 154359263 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:32 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317694258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.1317694258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.2547305868 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 291336971 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547305868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.2547305868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1188696901 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 510310116 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:14:30 PM UTC 24 |
| Finished | Oct 02 11:14:33 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1188696901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1188696901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.567475918 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 400322235 ps |
| CPU time | 1.41 seconds |
| Started | Oct 02 11:14:32 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=567475918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.567475918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3900827623 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 181309203 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:14:32 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900827623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.3900827623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.3383991508 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 442278277 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:14:32 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3383991508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.3383991508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3447133399 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 507246952 ps |
| CPU time | 1.71 seconds |
| Started | Oct 02 11:14:32 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447133399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.3447133399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2632559251 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 465260684 ps |
| CPU time | 1.78 seconds |
| Started | Oct 02 11:14:32 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2632559251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.2632559251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.130947076 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 247718454 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=130947076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 66.usbdev_fifo_levels.130947076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2092271011 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 553903289 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2092271011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.2092271011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.3236482422 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 190323148 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236482422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.3236482422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.3603190775 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 561753288 ps |
| CPU time | 1.89 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3603190775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.3603190775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.550946511 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 421526096 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=550946511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.550946511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.2017440854 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 289129016 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:36 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017440854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.2017440854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.145563275 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 621901582 ps |
| CPU time | 1.87 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:36 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=145563275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_tx _rx_disruption.145563275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.608790567 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 266224178 ps |
| CPU time | 1.15 seconds |
| Started | Oct 02 11:14:33 PM UTC 24 |
| Finished | Oct 02 11:14:35 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=608790567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.608790567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.2702132455 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 201876707 ps |
| CPU time | 0.92 seconds |
| Started | Oct 02 11:14:34 PM UTC 24 |
| Finished | Oct 02 11:14:37 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702132455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.2702132455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.161466370 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 521509678 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:14:34 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=161466370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_tx _rx_disruption.161466370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.2902564721 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 74717944 ps |
| CPU time | 1.12 seconds |
| Started | Oct 02 11:02:37 PM UTC 24 |
| Finished | Oct 02 11:02:39 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902564721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.2902564721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.4034867687 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 12216271288 ps |
| CPU time | 18.08 seconds |
| Started | Oct 02 11:02:08 PM UTC 24 |
| Finished | Oct 02 11:02:28 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034867687 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.4034867687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.720611498 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 20617646458 ps |
| CPU time | 37.91 seconds |
| Started | Oct 02 11:02:09 PM UTC 24 |
| Finished | Oct 02 11:02:49 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=720611498 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.720611498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.3860751436 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 29715246339 ps |
| CPU time | 40.9 seconds |
| Started | Oct 02 11:02:09 PM UTC 24 |
| Finished | Oct 02 11:02:52 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860751436 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.3860751436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.761191878 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 227851719 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:02:09 PM UTC 24 |
| Finished | Oct 02 11:02:12 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761191878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_av_buffer.761191878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.1452042432 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 159619909 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:02:11 PM UTC 24 |
| Finished | Oct 02 11:02:14 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452042432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.1452042432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.579561954 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 286597285 ps |
| CPU time | 2 seconds |
| Started | Oct 02 11:02:11 PM UTC 24 |
| Finished | Oct 02 11:02:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=579561954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_data_toggle_clear.579561954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.3815379253 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 626214093 ps |
| CPU time | 3.18 seconds |
| Started | Oct 02 11:02:11 PM UTC 24 |
| Finished | Oct 02 11:02:16 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815379253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.3815379253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.1450296879 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 42172177290 ps |
| CPU time | 78.1 seconds |
| Started | Oct 02 11:02:12 PM UTC 24 |
| Finished | Oct 02 11:03:32 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450296879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.1450296879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.2696047093 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 3724355099 ps |
| CPU time | 28.58 seconds |
| Started | Oct 02 11:02:12 PM UTC 24 |
| Finished | Oct 02 11:02:42 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696047093 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.2696047093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.2745806144 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 449898641 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:02:13 PM UTC 24 |
| Finished | Oct 02 11:02:15 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2745806144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.2745806144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.734829258 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 146258798 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:02:14 PM UTC 24 |
| Finished | Oct 02 11:02:16 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734829258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_disconnected.734829258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_enable.834970249 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 41745451 ps |
| CPU time | 1.09 seconds |
| Started | Oct 02 11:02:15 PM UTC 24 |
| Finished | Oct 02 11:02:17 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834970249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.834970249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.2382660354 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 1001248800 ps |
| CPU time | 2.99 seconds |
| Started | Oct 02 11:02:15 PM UTC 24 |
| Finished | Oct 02 11:02:19 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382660354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.2382660354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.3942462738 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 278740801 ps |
| CPU time | 1.76 seconds |
| Started | Oct 02 11:02:17 PM UTC 24 |
| Finished | Oct 02 11:02:20 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942462738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.3942462738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.1576608699 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 166687477 ps |
| CPU time | 1.42 seconds |
| Started | Oct 02 11:02:17 PM UTC 24 |
| Finished | Oct 02 11:02:20 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1576608699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.1576608699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3442855257 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 351563697 ps |
| CPU time | 3.19 seconds |
| Started | Oct 02 11:02:17 PM UTC 24 |
| Finished | Oct 02 11:02:22 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442855257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3442855257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.897100959 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 203627781 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:02:17 PM UTC 24 |
| Finished | Oct 02 11:02:20 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=897100959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.897100959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.2014431273 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 141131711 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:02:19 PM UTC 24 |
| Finished | Oct 02 11:02:21 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014431273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.2014431273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.932476024 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 213586305 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:02:19 PM UTC 24 |
| Finished | Oct 02 11:02:21 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932476024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_in_trans.932476024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.3539242794 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 3918807138 ps |
| CPU time | 29.17 seconds |
| Started | Oct 02 11:02:17 PM UTC 24 |
| Finished | Oct 02 11:02:48 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539242794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.3539242794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.1901989229 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 4179057627 ps |
| CPU time | 28.65 seconds |
| Started | Oct 02 11:02:21 PM UTC 24 |
| Finished | Oct 02 11:02:51 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901989229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.1901989229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.3367241054 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 223473677 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:02:21 PM UTC 24 |
| Finished | Oct 02 11:02:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367241054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.3367241054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.1013188945 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 33974093542 ps |
| CPU time | 63.83 seconds |
| Started | Oct 02 11:02:21 PM UTC 24 |
| Finished | Oct 02 11:03:26 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013188945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.1013188945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.2683932465 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 3388454626 ps |
| CPU time | 9.42 seconds |
| Started | Oct 02 11:02:21 PM UTC 24 |
| Finished | Oct 02 11:02:31 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683932465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.2683932465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.2390708045 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 3821905789 ps |
| CPU time | 31.9 seconds |
| Started | Oct 02 11:02:21 PM UTC 24 |
| Finished | Oct 02 11:02:54 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390708045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.2390708045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.90831065 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 2666803062 ps |
| CPU time | 24.79 seconds |
| Started | Oct 02 11:02:22 PM UTC 24 |
| Finished | Oct 02 11:02:48 PM UTC 24 |
| Peak memory | 234892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=90831065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.90831065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.1590655851 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 237996923 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:02:22 PM UTC 24 |
| Finished | Oct 02 11:02:25 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590655851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.1590655851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.486361321 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 263418542 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:02:22 PM UTC 24 |
| Finished | Oct 02 11:02:25 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=486361321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.486361321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.335912372 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 3046605270 ps |
| CPU time | 24.13 seconds |
| Started | Oct 02 11:02:22 PM UTC 24 |
| Finished | Oct 02 11:02:48 PM UTC 24 |
| Peak memory | 234980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=335912372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.335912372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.2302338925 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 2935106148 ps |
| CPU time | 28.64 seconds |
| Started | Oct 02 11:02:22 PM UTC 24 |
| Finished | Oct 02 11:02:52 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302338925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.2302338925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.2130061879 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 4181292116 ps |
| CPU time | 40.87 seconds |
| Started | Oct 02 11:02:22 PM UTC 24 |
| Finished | Oct 02 11:03:05 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130061879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.2130061879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.1554659104 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 164885509 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:02:24 PM UTC 24 |
| Finished | Oct 02 11:02:27 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554659104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.1554659104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.522808689 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 178491318 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:02:24 PM UTC 24 |
| Finished | Oct 02 11:02:27 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=522808689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.522808689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.958648672 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 216149659 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:02:24 PM UTC 24 |
| Finished | Oct 02 11:02:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=958648672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_nak_trans.958648672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.3965017831 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 183028192 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:02:25 PM UTC 24 |
| Finished | Oct 02 11:02:28 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965017831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.3965017831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.506777724 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 182858622 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:02:27 PM UTC 24 |
| Finished | Oct 02 11:02:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506777724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_out_stall.506777724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.506686215 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 143358522 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:02:28 PM UTC 24 |
| Finished | Oct 02 11:02:31 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506686215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_out_trans_nak.506686215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.2684959812 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 162122162 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:02:28 PM UTC 24 |
| Finished | Oct 02 11:02:31 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684959812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.2684959812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.3733320073 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 235073922 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:02:28 PM UTC 24 |
| Finished | Oct 02 11:02:31 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733320073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.3733320073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.3168138184 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 144981530 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:02:28 PM UTC 24 |
| Finished | Oct 02 11:02:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168138184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.3168138184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.661421790 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 50284807 ps |
| CPU time | 1.07 seconds |
| Started | Oct 02 11:02:28 PM UTC 24 |
| Finished | Oct 02 11:02:30 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661421790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_phy_pins_sense.661421790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.3458706419 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 20691377781 ps |
| CPU time | 59.7 seconds |
| Started | Oct 02 11:02:30 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458706419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.3458706419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.227535222 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 187126693 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:02:30 PM UTC 24 |
| Finished | Oct 02 11:02:32 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227535222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_pkt_received.227535222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.2261050217 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 238804712 ps |
| CPU time | 1.63 seconds |
| Started | Oct 02 11:02:30 PM UTC 24 |
| Finished | Oct 02 11:02:32 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261050217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.2261050217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.410755192 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 7328171544 ps |
| CPU time | 99.2 seconds |
| Started | Oct 02 11:02:31 PM UTC 24 |
| Finished | Oct 02 11:04:12 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410755192 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.410755192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.1926404369 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 3157215027 ps |
| CPU time | 22.36 seconds |
| Started | Oct 02 11:02:33 PM UTC 24 |
| Finished | Oct 02 11:02:56 PM UTC 24 |
| Peak memory | 235224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926404369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.1926404369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.1803641715 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 5774532523 ps |
| CPU time | 25.59 seconds |
| Started | Oct 02 11:02:33 PM UTC 24 |
| Finished | Oct 02 11:02:59 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803641715 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.1803641715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.2344774063 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 200941814 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:02:30 PM UTC 24 |
| Finished | Oct 02 11:02:32 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344774063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.2344774063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.2803235004 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 153977533 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:02:31 PM UTC 24 |
| Finished | Oct 02 11:02:33 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803235004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.2803235004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.3110602312 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 20184433337 ps |
| CPU time | 31.29 seconds |
| Started | Oct 02 11:02:33 PM UTC 24 |
| Finished | Oct 02 11:03:05 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110602312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.3110602312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.2236659862 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 167609252 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:02:33 PM UTC 24 |
| Finished | Oct 02 11:02:35 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236659862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.2236659862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.2353753988 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 266018160 ps |
| CPU time | 1.65 seconds |
| Started | Oct 02 11:02:33 PM UTC 24 |
| Finished | Oct 02 11:02:35 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353753988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.2353753988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.1132073469 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 157029433 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:02:33 PM UTC 24 |
| Finished | Oct 02 11:02:35 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132073469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.1132073469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.3075835680 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 179174290 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:02:34 PM UTC 24 |
| Finished | Oct 02 11:02:37 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075835680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3075835680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.1641585816 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 215881713 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:02:34 PM UTC 24 |
| Finished | Oct 02 11:02:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641585816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.1641585816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.1728856497 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 3195893448 ps |
| CPU time | 86.26 seconds |
| Started | Oct 02 11:02:34 PM UTC 24 |
| Finished | Oct 02 11:04:03 PM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728856497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.1728856497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.247311461 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 160962867 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:02:34 PM UTC 24 |
| Finished | Oct 02 11:02:37 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=247311461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.247311461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.3842226047 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 184247236 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:02:34 PM UTC 24 |
| Finished | Oct 02 11:02:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842226047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.3842226047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3013815415 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 928481014 ps |
| CPU time | 4.09 seconds |
| Started | Oct 02 11:02:36 PM UTC 24 |
| Finished | Oct 02 11:02:41 PM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013815415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3013815415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.3113933619 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 2895476397 ps |
| CPU time | 75.72 seconds |
| Started | Oct 02 11:02:36 PM UTC 24 |
| Finished | Oct 02 11:03:53 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113933619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.3113933619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1179983844 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 6794649539 ps |
| CPU time | 78.33 seconds |
| Started | Oct 02 11:02:36 PM UTC 24 |
| Finished | Oct 02 11:03:56 PM UTC 24 |
| Peak memory | 228620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179983844 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.1179983844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.2681240689 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 1413530849 ps |
| CPU time | 33.2 seconds |
| Started | Oct 02 11:02:13 PM UTC 24 |
| Finished | Oct 02 11:02:47 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681240689 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.2681240689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.119181646 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 552736482 ps |
| CPU time | 2.83 seconds |
| Started | Oct 02 11:02:37 PM UTC 24 |
| Finished | Oct 02 11:02:41 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=119181646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_ rx_disruption.119181646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.2339055382 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 165840837 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:37 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339055382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.2339055382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3515251116 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 208634313 ps |
| CPU time | 0.94 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:37 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515251116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.3515251116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.2029355137 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 682528671 ps |
| CPU time | 2.17 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2029355137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.2029355137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.1843212213 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 624947364 ps |
| CPU time | 1.74 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843212213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.1843212213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.810600156 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 172678728 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:37 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=810600156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 71.usbdev_fifo_levels.810600156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.4031814040 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 480364068 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4031814040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.4031814040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.2368824626 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 156815121 ps |
| CPU time | 1.13 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:37 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368824626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.2368824626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.855072542 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 629951519 ps |
| CPU time | 1.8 seconds |
| Started | Oct 02 11:14:35 PM UTC 24 |
| Finished | Oct 02 11:14:38 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=855072542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_tx _rx_disruption.855072542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1340925759 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 539717126 ps |
| CPU time | 1.73 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340925759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1340925759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.948958340 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 243361437 ps |
| CPU time | 1.22 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:39 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=948958340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 73.usbdev_fifo_levels.948958340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2804902240 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 549991481 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2804902240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.2804902240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.993417900 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 184136689 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:39 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=993417900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.993417900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.1076349464 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 282438714 ps |
| CPU time | 1.56 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076349464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.1076349464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2472700188 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 717798532 ps |
| CPU time | 1.92 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 216596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2472700188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.2472700188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.566523024 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 270000219 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=566523024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.566523024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.804523711 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 257408659 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804523711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 75.usbdev_fifo_levels.804523711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.1785714791 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 496921600 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1785714791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.1785714791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.3531305865 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 393519200 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531305865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.3531305865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.2322893060 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 261843087 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322893060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.2322893060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.630320875 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 544823323 ps |
| CPU time | 2.16 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:41 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=630320875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx _rx_disruption.630320875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.46248927 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 396485793 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=46248927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.46248927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.1918849433 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 290428009 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918849433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.1918849433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.4244610231 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 528186754 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4244610231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.4244610231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.166476258 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 312774254 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 217620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=166476258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.166476258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.3292051244 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 249335688 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292051244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.3292051244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.3571242818 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 586223047 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:14:37 PM UTC 24 |
| Finished | Oct 02 11:14:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3571242818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.3571242818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.2841001562 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 725537277 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841001562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.2841001562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.2411633612 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 187172650 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:41 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411633612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.2411633612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.419654742 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 525591515 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=419654742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_tx _rx_disruption.419654742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.1173886023 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 32107418 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 11:03:06 PM UTC 24 |
| Finished | Oct 02 11:03:07 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173886023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.1173886023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.3234482947 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 5559262871 ps |
| CPU time | 10.32 seconds |
| Started | Oct 02 11:02:37 PM UTC 24 |
| Finished | Oct 02 11:02:49 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234482947 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.3234482947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1934785098 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 14625352191 ps |
| CPU time | 26.29 seconds |
| Started | Oct 02 11:02:38 PM UTC 24 |
| Finished | Oct 02 11:03:06 PM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934785098 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1934785098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.2396827276 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 25614633521 ps |
| CPU time | 41.39 seconds |
| Started | Oct 02 11:02:39 PM UTC 24 |
| Finished | Oct 02 11:03:21 PM UTC 24 |
| Peak memory | 228188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396827276 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.2396827276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.2858268012 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 164402494 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:02:40 PM UTC 24 |
| Finished | Oct 02 11:02:42 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858268012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.2858268012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.3319186508 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 204311496 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:02:40 PM UTC 24 |
| Finished | Oct 02 11:02:42 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319186508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.3319186508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.2533122647 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 196342076 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:02:41 PM UTC 24 |
| Finished | Oct 02 11:02:43 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533122647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.2533122647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.405503821 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 22423606192 ps |
| CPU time | 43.77 seconds |
| Started | Oct 02 11:02:42 PM UTC 24 |
| Finished | Oct 02 11:03:27 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=405503821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_device_address.405503821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.537758105 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 4266387924 ps |
| CPU time | 31.3 seconds |
| Started | Oct 02 11:02:42 PM UTC 24 |
| Finished | Oct 02 11:03:15 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537758105 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.537758105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.3001560492 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 752017164 ps |
| CPU time | 2.9 seconds |
| Started | Oct 02 11:02:44 PM UTC 24 |
| Finished | Oct 02 11:02:48 PM UTC 24 |
| Peak memory | 217776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001560492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.3001560492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.1090918651 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 149669713 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:02:45 PM UTC 24 |
| Finished | Oct 02 11:02:47 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090918651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.1090918651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_enable.689400371 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 41885033 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:02:48 PM UTC 24 |
| Finished | Oct 02 11:02:51 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689400371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_enable.689400371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.3832780834 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 990411246 ps |
| CPU time | 3.78 seconds |
| Started | Oct 02 11:02:49 PM UTC 24 |
| Finished | Oct 02 11:02:53 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832780834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.3832780834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.1368910527 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 367351397 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:02:49 PM UTC 24 |
| Finished | Oct 02 11:02:51 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1368910527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.1368910527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.351202073 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 298261508 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:02:49 PM UTC 24 |
| Finished | Oct 02 11:02:51 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=351202073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_fifo_levels.351202073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.1101680046 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 271845502 ps |
| CPU time | 1.83 seconds |
| Started | Oct 02 11:02:49 PM UTC 24 |
| Finished | Oct 02 11:02:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101680046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.1101680046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.1292406495 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 212780489 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:02:50 PM UTC 24 |
| Finished | Oct 02 11:02:52 PM UTC 24 |
| Peak memory | 226036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292406495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1292406495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.1309725917 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 169849403 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:02:50 PM UTC 24 |
| Finished | Oct 02 11:02:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309725917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.1309725917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.2633869184 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 223088798 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:02:50 PM UTC 24 |
| Finished | Oct 02 11:02:53 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633869184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.2633869184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.423851045 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 3297219994 ps |
| CPU time | 25.89 seconds |
| Started | Oct 02 11:02:49 PM UTC 24 |
| Finished | Oct 02 11:03:16 PM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=423851045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.423851045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.4014283494 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 9205598411 ps |
| CPU time | 55.15 seconds |
| Started | Oct 02 11:02:50 PM UTC 24 |
| Finished | Oct 02 11:03:47 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014283494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.4014283494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.1307185710 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 316507498 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:02:50 PM UTC 24 |
| Finished | Oct 02 11:02:53 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307185710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.1307185710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.1230274803 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 29417152852 ps |
| CPU time | 55.43 seconds |
| Started | Oct 02 11:02:51 PM UTC 24 |
| Finished | Oct 02 11:03:48 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230274803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.1230274803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.3163010452 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 4204271428 ps |
| CPU time | 7.52 seconds |
| Started | Oct 02 11:02:51 PM UTC 24 |
| Finished | Oct 02 11:03:00 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163010452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.3163010452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.909383720 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 2649986606 ps |
| CPU time | 28.52 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:03:23 PM UTC 24 |
| Peak memory | 230304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=909383720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.909383720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.1187165362 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 3715846584 ps |
| CPU time | 41.37 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:03:36 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187165362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.1187165362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.3868746430 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 299024848 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:02:56 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868746430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.3868746430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.3944090192 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 204471604 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:02:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944090192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.3944090192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.1091739613 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 3316482056 ps |
| CPU time | 32.95 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:03:27 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1091739613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1091739613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.2213689372 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 3506736807 ps |
| CPU time | 36.32 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 235280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213689372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.2213689372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.3012096452 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 2679914990 ps |
| CPU time | 22.73 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:03:17 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012096452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.3012096452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1918453709 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 154375865 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:02:53 PM UTC 24 |
| Finished | Oct 02 11:02:55 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918453709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1918453709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.255726917 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 151530728 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:02:55 PM UTC 24 |
| Finished | Oct 02 11:02:57 PM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255726917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.255726917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.2347044439 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 203597416 ps |
| CPU time | 1.5 seconds |
| Started | Oct 02 11:02:55 PM UTC 24 |
| Finished | Oct 02 11:02:57 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347044439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.2347044439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.1911472758 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 196197011 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:02:55 PM UTC 24 |
| Finished | Oct 02 11:02:57 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911472758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.1911472758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.1032261414 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 174870043 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:02:55 PM UTC 24 |
| Finished | Oct 02 11:02:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032261414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.1032261414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.649987383 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 226094353 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:02:55 PM UTC 24 |
| Finished | Oct 02 11:02:57 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=649987383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_out_trans_nak.649987383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.3792398973 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 156573770 ps |
| CPU time | 1.4 seconds |
| Started | Oct 02 11:02:55 PM UTC 24 |
| Finished | Oct 02 11:02:57 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792398973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.3792398973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.3931406093 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 233669623 ps |
| CPU time | 1.86 seconds |
| Started | Oct 02 11:02:57 PM UTC 24 |
| Finished | Oct 02 11:03:00 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931406093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.3931406093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.487892898 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 143174548 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:02:57 PM UTC 24 |
| Finished | Oct 02 11:02:59 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487892898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.487892898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.3710369690 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 129902158 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:02:57 PM UTC 24 |
| Finished | Oct 02 11:02:59 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710369690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3710369690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.2404173233 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 11365206928 ps |
| CPU time | 28.09 seconds |
| Started | Oct 02 11:02:57 PM UTC 24 |
| Finished | Oct 02 11:03:26 PM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404173233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.2404173233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.2411356888 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 161981819 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:02:57 PM UTC 24 |
| Finished | Oct 02 11:02:59 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411356888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.2411356888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.2993268710 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 176674939 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:02:58 PM UTC 24 |
| Finished | Oct 02 11:03:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993268710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.2993268710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.3948364115 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 6678836375 ps |
| CPU time | 97.26 seconds |
| Started | Oct 02 11:02:58 PM UTC 24 |
| Finished | Oct 02 11:04:38 PM UTC 24 |
| Peak memory | 234924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948364115 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.3948364115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.3413949159 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 4329808720 ps |
| CPU time | 105.27 seconds |
| Started | Oct 02 11:02:59 PM UTC 24 |
| Finished | Oct 02 11:04:46 PM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413949159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.3413949159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.3232204721 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 9942535457 ps |
| CPU time | 59.11 seconds |
| Started | Oct 02 11:02:59 PM UTC 24 |
| Finished | Oct 02 11:03:59 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232204721 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.3232204721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.3283864854 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 213779400 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:02:58 PM UTC 24 |
| Finished | Oct 02 11:03:01 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283864854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.3283864854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.624119147 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 198353734 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:02:58 PM UTC 24 |
| Finished | Oct 02 11:03:01 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=624119147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.624119147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.3021089394 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 20180737111 ps |
| CPU time | 27.57 seconds |
| Started | Oct 02 11:03:00 PM UTC 24 |
| Finished | Oct 02 11:03:29 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021089394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.3021089394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.3867714036 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 180423528 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:03:00 PM UTC 24 |
| Finished | Oct 02 11:03:02 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867714036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.3867714036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.361139547 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 417863442 ps |
| CPU time | 2.18 seconds |
| Started | Oct 02 11:03:00 PM UTC 24 |
| Finished | Oct 02 11:03:03 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361139547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_rx_full.361139547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.2059881095 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 228487610 ps |
| CPU time | 1.57 seconds |
| Started | Oct 02 11:03:01 PM UTC 24 |
| Finished | Oct 02 11:03:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059881095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.2059881095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.2849576582 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 202582866 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:03:01 PM UTC 24 |
| Finished | Oct 02 11:03:04 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849576582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.2849576582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1255256441 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 266179913 ps |
| CPU time | 1.81 seconds |
| Started | Oct 02 11:03:02 PM UTC 24 |
| Finished | Oct 02 11:03:04 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255256441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1255256441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.3591419744 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 2366267946 ps |
| CPU time | 21.22 seconds |
| Started | Oct 02 11:03:02 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 228364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591419744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.3591419744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.2500266259 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 189279283 ps |
| CPU time | 1.52 seconds |
| Started | Oct 02 11:03:02 PM UTC 24 |
| Finished | Oct 02 11:03:04 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500266259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.2500266259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.2091551811 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 183008969 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:03:02 PM UTC 24 |
| Finished | Oct 02 11:03:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091551811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.2091551811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.650016365 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 898410382 ps |
| CPU time | 3.99 seconds |
| Started | Oct 02 11:03:03 PM UTC 24 |
| Finished | Oct 02 11:03:08 PM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650016365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_stream_len_max.650016365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.2889967363 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 2649806540 ps |
| CPU time | 72.15 seconds |
| Started | Oct 02 11:03:03 PM UTC 24 |
| Finished | Oct 02 11:04:17 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889967363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.2889967363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.293883239 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 3993827648 ps |
| CPU time | 97.43 seconds |
| Started | Oct 02 11:03:05 PM UTC 24 |
| Finished | Oct 02 11:04:45 PM UTC 24 |
| Peak memory | 235064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293883239 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_0 2/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.293883239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.3164109386 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 7057290868 ps |
| CPU time | 45.52 seconds |
| Started | Oct 02 11:02:44 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164109386 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.3164109386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.2301427367 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 540125073 ps |
| CPU time | 2.37 seconds |
| Started | Oct 02 11:03:05 PM UTC 24 |
| Finished | Oct 02 11:03:09 PM UTC 24 |
| Peak memory | 217576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2301427367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.2301427367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.699361277 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 180871512 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:41 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=699361277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.699361277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.466814412 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 159629982 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:41 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466814412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 80.usbdev_fifo_levels.466814412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.727736864 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 515615057 ps |
| CPU time | 1.67 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=727736864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_tx _rx_disruption.727736864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.877365793 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 655026153 ps |
| CPU time | 1.64 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877365793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.877365793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2703270466 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 256024557 ps |
| CPU time | 1.27 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703270466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.2703270466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.977057180 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 554127226 ps |
| CPU time | 1.92 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=977057180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_tx _rx_disruption.977057180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.4161890271 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 146487622 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:41 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161890271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 82.usbdev_fifo_levels.4161890271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3116494782 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 469842003 ps |
| CPU time | 1.6 seconds |
| Started | Oct 02 11:14:39 PM UTC 24 |
| Finished | Oct 02 11:14:42 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3116494782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.3116494782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.1144125860 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 717125120 ps |
| CPU time | 1.75 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144125860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.1144125860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.3346218957 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 290779742 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3346218957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.3346218957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.2694974571 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 486154913 ps |
| CPU time | 1.43 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2694974571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.2694974571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.2574562505 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 205987293 ps |
| CPU time | 0.93 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:50 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574562505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.2574562505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.2854028755 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 292662787 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854028755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.2854028755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.815696972 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 464225498 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=815696972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_tx _rx_disruption.815696972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.220758747 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 176986932 ps |
| CPU time | 0.99 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:50 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=220758747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.220758747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.80652087 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 151778181 ps |
| CPU time | 0.91 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:50 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=80652087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 85.usbdev_fifo_levels.80652087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.3618567817 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 471024662 ps |
| CPU time | 1.46 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3618567817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.3618567817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3777826386 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 143124898 ps |
| CPU time | 0.9 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777826386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3777826386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.2766886783 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 207070689 ps |
| CPU time | 0.89 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:50 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766886783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.2766886783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3056551361 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 581215273 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:14:41 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3056551361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.3056551361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1721931180 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 263244713 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:14:51 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721931180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.1721931180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.2118084975 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 500681097 ps |
| CPU time | 1.54 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2118084975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.2118084975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.1136960676 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 498920287 ps |
| CPU time | 1.84 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136960676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.1136960676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.2207635456 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 299993701 ps |
| CPU time | 1.29 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207635456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.2207635456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3529709153 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 633771062 ps |
| CPU time | 2.05 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3529709153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.3529709153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.2448052008 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 328581764 ps |
| CPU time | 1.2 seconds |
| Started | Oct 02 11:14:42 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448052008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.2448052008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.3025890200 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 583007277 ps |
| CPU time | 1.66 seconds |
| Started | Oct 02 11:14:43 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3025890200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.3025890200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.3796784031 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 74551601 ps |
| CPU time | 0.98 seconds |
| Started | Oct 02 11:03:31 PM UTC 24 |
| Finished | Oct 02 11:03:33 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796784031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.3796784031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.1414455909 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 9783709524 ps |
| CPU time | 15.37 seconds |
| Started | Oct 02 11:03:06 PM UTC 24 |
| Finished | Oct 02 11:03:22 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414455909 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.1414455909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.2974146781 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 18734732248 ps |
| CPU time | 26.06 seconds |
| Started | Oct 02 11:03:07 PM UTC 24 |
| Finished | Oct 02 11:03:35 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974146781 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.2974146781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.2715050413 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 23379220666 ps |
| CPU time | 34.77 seconds |
| Started | Oct 02 11:03:07 PM UTC 24 |
| Finished | Oct 02 11:03:43 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715050413 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.2715050413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2969886263 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 184368351 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:03:07 PM UTC 24 |
| Finished | Oct 02 11:03:10 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969886263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.2969886263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.124627717 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 155829925 ps |
| CPU time | 1.06 seconds |
| Started | Oct 02 11:03:07 PM UTC 24 |
| Finished | Oct 02 11:03:09 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124627717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_bitstuff_err.124627717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.833232700 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 440104767 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:03:08 PM UTC 24 |
| Finished | Oct 02 11:03:10 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833232700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_data_toggle_clear.833232700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.1739751311 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 641178082 ps |
| CPU time | 3.59 seconds |
| Started | Oct 02 11:03:10 PM UTC 24 |
| Finished | Oct 02 11:03:14 PM UTC 24 |
| Peak memory | 217772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739751311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.1739751311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.1671722076 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 38102695690 ps |
| CPU time | 66.28 seconds |
| Started | Oct 02 11:03:10 PM UTC 24 |
| Finished | Oct 02 11:04:18 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671722076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1671722076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.1705422206 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 824686155 ps |
| CPU time | 19.27 seconds |
| Started | Oct 02 11:03:10 PM UTC 24 |
| Finished | Oct 02 11:03:30 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705422206 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.1705422206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.1818266823 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 684769432 ps |
| CPU time | 2.92 seconds |
| Started | Oct 02 11:03:10 PM UTC 24 |
| Finished | Oct 02 11:03:14 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818266823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.1818266823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.3839863952 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 146486158 ps |
| CPU time | 1.38 seconds |
| Started | Oct 02 11:03:10 PM UTC 24 |
| Finished | Oct 02 11:03:12 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839863952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.3839863952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_enable.2790045436 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 92194326 ps |
| CPU time | 1.26 seconds |
| Started | Oct 02 11:03:11 PM UTC 24 |
| Finished | Oct 02 11:03:14 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790045436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.2790045436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.1840623479 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 876288263 ps |
| CPU time | 3.75 seconds |
| Started | Oct 02 11:03:11 PM UTC 24 |
| Finished | Oct 02 11:03:16 PM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840623479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.1840623479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2344819938 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 242701144 ps |
| CPU time | 1.96 seconds |
| Started | Oct 02 11:03:11 PM UTC 24 |
| Finished | Oct 02 11:03:14 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344819938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.2344819938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.1174972714 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 256732181 ps |
| CPU time | 1.88 seconds |
| Started | Oct 02 11:03:11 PM UTC 24 |
| Finished | Oct 02 11:03:14 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174972714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.1174972714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.852889007 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 541441881 ps |
| CPU time | 4.13 seconds |
| Started | Oct 02 11:03:13 PM UTC 24 |
| Finished | Oct 02 11:03:18 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852889007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_fifo_rst.852889007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.2455620015 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 252240340 ps |
| CPU time | 2.15 seconds |
| Started | Oct 02 11:03:14 PM UTC 24 |
| Finished | Oct 02 11:03:18 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455620015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.2455620015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.1192450642 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 140342429 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:03:14 PM UTC 24 |
| Finished | Oct 02 11:03:17 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192450642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.1192450642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.1157841393 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 241937421 ps |
| CPU time | 1.72 seconds |
| Started | Oct 02 11:03:16 PM UTC 24 |
| Finished | Oct 02 11:03:18 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157841393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.1157841393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.3985186079 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 3352164202 ps |
| CPU time | 30.12 seconds |
| Started | Oct 02 11:03:13 PM UTC 24 |
| Finished | Oct 02 11:03:45 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985186079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.3985186079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.110132441 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 5538693473 ps |
| CPU time | 34.33 seconds |
| Started | Oct 02 11:03:16 PM UTC 24 |
| Finished | Oct 02 11:03:52 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=110132441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.110132441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.1668460133 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 288029600 ps |
| CPU time | 1.77 seconds |
| Started | Oct 02 11:03:16 PM UTC 24 |
| Finished | Oct 02 11:03:19 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668460133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.1668460133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1229434693 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 7246470724 ps |
| CPU time | 13.99 seconds |
| Started | Oct 02 11:03:16 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229434693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1229434693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.1786899665 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 6029753847 ps |
| CPU time | 9.78 seconds |
| Started | Oct 02 11:03:17 PM UTC 24 |
| Finished | Oct 02 11:03:28 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786899665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.1786899665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.3083671074 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 4763842022 ps |
| CPU time | 51.54 seconds |
| Started | Oct 02 11:03:17 PM UTC 24 |
| Finished | Oct 02 11:04:10 PM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083671074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.3083671074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.60861248 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 2637599383 ps |
| CPU time | 22.08 seconds |
| Started | Oct 02 11:03:17 PM UTC 24 |
| Finished | Oct 02 11:03:41 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60861248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.60861248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.3684092873 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 241218079 ps |
| CPU time | 1.61 seconds |
| Started | Oct 02 11:03:19 PM UTC 24 |
| Finished | Oct 02 11:03:21 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684092873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.3684092873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.2541447189 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 225519645 ps |
| CPU time | 1.25 seconds |
| Started | Oct 02 11:03:19 PM UTC 24 |
| Finished | Oct 02 11:03:21 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541447189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.2541447189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.467619469 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 1497204824 ps |
| CPU time | 38.52 seconds |
| Started | Oct 02 11:03:19 PM UTC 24 |
| Finished | Oct 02 11:03:59 PM UTC 24 |
| Peak memory | 235064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=467619469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.467619469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1249636039 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 2862334752 ps |
| CPU time | 79.63 seconds |
| Started | Oct 02 11:03:19 PM UTC 24 |
| Finished | Oct 02 11:04:41 PM UTC 24 |
| Peak memory | 234896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249636039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1249636039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.1726608934 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 1977412837 ps |
| CPU time | 54.78 seconds |
| Started | Oct 02 11:03:19 PM UTC 24 |
| Finished | Oct 02 11:04:15 PM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726608934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.1726608934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.2266635328 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 213124442 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:03:22 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266635328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.2266635328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.168402485 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 158805477 ps |
| CPU time | 1.37 seconds |
| Started | Oct 02 11:03:22 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168402485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.168402485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.3251152675 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 211068949 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:03:22 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251152675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.3251152675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.199002321 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 191186061 ps |
| CPU time | 1.34 seconds |
| Started | Oct 02 11:03:22 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199002321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_out_iso.199002321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1298148322 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 165476169 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:03:22 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1298148322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.1298148322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.3230236890 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 154422672 ps |
| CPU time | 1 seconds |
| Started | Oct 02 11:03:22 PM UTC 24 |
| Finished | Oct 02 11:03:24 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230236890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.3230236890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.1310990147 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 153136433 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:03:24 PM UTC 24 |
| Finished | Oct 02 11:03:26 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310990147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.1310990147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.1089339430 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 188881776 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:03:24 PM UTC 24 |
| Finished | Oct 02 11:03:26 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089339430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.1089339430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.17387171 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 153764129 ps |
| CPU time | 1.48 seconds |
| Started | Oct 02 11:03:24 PM UTC 24 |
| Finished | Oct 02 11:03:26 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17387171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.17387171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.727346097 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 36499495 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:03:24 PM UTC 24 |
| Finished | Oct 02 11:03:26 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727346097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_phy_pins_sense.727346097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1135420214 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 6319723782 ps |
| CPU time | 18.12 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:03:44 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135420214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1135420214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.1393692331 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 163197827 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:03:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393692331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.1393692331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.765872768 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 242131701 ps |
| CPU time | 1.32 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:03:28 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765872768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_pkt_sent.765872768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.3228003125 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 5895226292 ps |
| CPU time | 22.98 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:03:50 PM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228003125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.3228003125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.3250225245 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 9998643395 ps |
| CPU time | 179.45 seconds |
| Started | Oct 02 11:03:27 PM UTC 24 |
| Finished | Oct 02 11:06:29 PM UTC 24 |
| Peak memory | 230748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250225245 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.3250225245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.1554225565 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 176459052 ps |
| CPU time | 1.59 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:03:28 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554225565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.1554225565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.4109368864 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 186535976 ps |
| CPU time | 1.55 seconds |
| Started | Oct 02 11:03:25 PM UTC 24 |
| Finished | Oct 02 11:03:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109368864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.4109368864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.1161334406 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 20177521786 ps |
| CPU time | 31.23 seconds |
| Started | Oct 02 11:03:27 PM UTC 24 |
| Finished | Oct 02 11:04:00 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161334406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.1161334406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.787367992 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 169131126 ps |
| CPU time | 1.11 seconds |
| Started | Oct 02 11:03:27 PM UTC 24 |
| Finished | Oct 02 11:03:29 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=787367992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_rx_crc_err.787367992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3153713088 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 373766461 ps |
| CPU time | 2.09 seconds |
| Started | Oct 02 11:03:27 PM UTC 24 |
| Finished | Oct 02 11:03:30 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153713088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3153713088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1650452613 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 156935163 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:03:27 PM UTC 24 |
| Finished | Oct 02 11:03:29 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650452613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.1650452613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.4016860685 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 159198357 ps |
| CPU time | 0.97 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016860685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.4016860685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.1361764723 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 262812097 ps |
| CPU time | 1.35 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361764723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.1361764723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.1263916152 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 2373967709 ps |
| CPU time | 24.83 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:03:55 PM UTC 24 |
| Peak memory | 235008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263916152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.1263916152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2869172552 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 164283973 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869172552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2869172552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.3960642657 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 269841595 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:03:31 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960642657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.3960642657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.2051343453 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 1358313321 ps |
| CPU time | 3.54 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:03:34 PM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051343453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.2051343453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.3247364190 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 2427801515 ps |
| CPU time | 60.91 seconds |
| Started | Oct 02 11:03:29 PM UTC 24 |
| Finished | Oct 02 11:04:32 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247364190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.3247364190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.2408991348 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 7950333835 ps |
| CPU time | 109.08 seconds |
| Started | Oct 02 11:03:31 PM UTC 24 |
| Finished | Oct 02 11:05:22 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408991348 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.2408991348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.2247324619 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 1510379618 ps |
| CPU time | 10.29 seconds |
| Started | Oct 02 11:03:10 PM UTC 24 |
| Finished | Oct 02 11:03:21 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247324619 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.2247324619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.587376990 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 688512705 ps |
| CPU time | 2.15 seconds |
| Started | Oct 02 11:03:31 PM UTC 24 |
| Finished | Oct 02 11:03:34 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=587376990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx_ rx_disruption.587376990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.1708774742 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 534862841 ps |
| CPU time | 1.36 seconds |
| Started | Oct 02 11:14:43 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708774742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.1708774742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.618562577 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 173317916 ps |
| CPU time | 0.85 seconds |
| Started | Oct 02 11:14:43 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618562577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 90.usbdev_fifo_levels.618562577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3870235163 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 589720283 ps |
| CPU time | 1.69 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3870235163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3870235163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3299287003 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 395540302 ps |
| CPU time | 1.19 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299287003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.3299287003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.1930064631 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 262675128 ps |
| CPU time | 1.05 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930064631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.1930064631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.902891048 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 492307027 ps |
| CPU time | 1.51 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=902891048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_tx _rx_disruption.902891048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.3083389095 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 262885558 ps |
| CPU time | 1.1 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083389095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.3083389095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1984076014 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 491819058 ps |
| CPU time | 1.39 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1984076014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.1984076014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2162346481 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 349524284 ps |
| CPU time | 1.16 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162346481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2162346481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1843197787 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 246069596 ps |
| CPU time | 1.04 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843197787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.1843197787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1626933043 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 675217076 ps |
| CPU time | 1.68 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1626933043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.1626933043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.14942267 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 293270677 ps |
| CPU time | 1.14 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=14942267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.14942267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3060445467 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 169084016 ps |
| CPU time | 0.83 seconds |
| Started | Oct 02 11:14:44 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060445467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.3060445467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.2244801341 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 512370131 ps |
| CPU time | 1.47 seconds |
| Started | Oct 02 11:14:46 PM UTC 24 |
| Finished | Oct 02 11:14:56 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2244801341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.2244801341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.4281917890 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 215920241 ps |
| CPU time | 0.86 seconds |
| Started | Oct 02 11:14:46 PM UTC 24 |
| Finished | Oct 02 11:14:55 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281917890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.4281917890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1829903685 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 468781339 ps |
| CPU time | 1.44 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1829903685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1829903685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.1290850874 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 424393748 ps |
| CPU time | 1.3 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290850874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.1290850874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.277085643 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 435167377 ps |
| CPU time | 1.62 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=277085643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.277085643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.1026748153 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 415279803 ps |
| CPU time | 1.33 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026748153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.1026748153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.2849682961 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 246968394 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849682961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.2849682961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.422132280 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 474574342 ps |
| CPU time | 1.53 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=422132280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_tx _rx_disruption.422132280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3385064229 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 259942508 ps |
| CPU time | 1.08 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385064229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.3385064229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.150796304 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 195669272 ps |
| CPU time | 1.18 seconds |
| Started | Oct 02 11:14:48 PM UTC 24 |
| Finished | Oct 02 11:15:01 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150796304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 98.usbdev_fifo_levels.150796304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.208076018 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 486391614 ps |
| CPU time | 1.7 seconds |
| Started | Oct 02 11:14:49 PM UTC 24 |
| Finished | Oct 02 11:15:02 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=208076018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_tx _rx_disruption.208076018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.117289501 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 236256193 ps |
| CPU time | 1.01 seconds |
| Started | Oct 02 11:14:50 PM UTC 24 |
| Finished | Oct 02 11:15:15 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117289501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.117289501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.662415997 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 521914626 ps |
| CPU time | 1.49 seconds |
| Started | Oct 02 11:14:51 PM UTC 24 |
| Finished | Oct 02 11:14:57 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=662415997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_tx _rx_disruption.662415997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
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