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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.41 98.23 96.03 97.44 94.92 98.42 98.21 98.64


Total test records in report: 3837
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T2488 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_enable.2654869755 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:08 PM UTC 24 47048003 ps
T2489 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.681162206 Oct 02 11:11:07 PM UTC 24 Oct 02 11:11:09 PM UTC 24 139024667 ps
T2490 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.2106953304 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:09 PM UTC 24 220992877 ps
T427 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.282386138 Oct 02 11:11:07 PM UTC 24 Oct 02 11:11:09 PM UTC 24 302786325 ps
T2491 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2968461937 Oct 02 11:11:07 PM UTC 24 Oct 02 11:11:09 PM UTC 24 172141287 ps
T353 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.2981005863 Oct 02 11:11:07 PM UTC 24 Oct 02 11:11:09 PM UTC 24 272429633 ps
T2492 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.313967742 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:10 PM UTC 24 953235004 ps
T2493 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.1657053993 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:10 PM UTC 24 823931222 ps
T2494 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3735880651 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:11 PM UTC 24 854666837 ps
T2495 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1358191377 Oct 02 11:11:08 PM UTC 24 Oct 02 11:11:11 PM UTC 24 204078782 ps
T2496 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.1427041329 Oct 02 11:11:07 PM UTC 24 Oct 02 11:11:11 PM UTC 24 363040139 ps
T2497 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.4000627780 Oct 02 11:11:09 PM UTC 24 Oct 02 11:11:11 PM UTC 24 257342523 ps
T2498 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.4141846524 Oct 02 11:10:23 PM UTC 24 Oct 02 11:11:12 PM UTC 24 24965153582 ps
T2499 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.3718574090 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:13 PM UTC 24 151026729 ps
T2500 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.75397885 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:13 PM UTC 24 259798429 ps
T2501 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.1753515701 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:13 PM UTC 24 193057795 ps
T2502 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.765131292 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:13 PM UTC 24 172013272 ps
T2503 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.475249756 Oct 02 11:10:47 PM UTC 24 Oct 02 11:11:13 PM UTC 24 19208666835 ps
T2504 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.562537983 Oct 02 11:11:04 PM UTC 24 Oct 02 11:11:14 PM UTC 24 4647352524 ps
T2505 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.2725480581 Oct 02 11:10:53 PM UTC 24 Oct 02 11:11:14 PM UTC 24 2643307944 ps
T2506 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.3132386935 Oct 02 11:11:12 PM UTC 24 Oct 02 11:11:14 PM UTC 24 189324830 ps
T2507 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.903123314 Oct 02 11:11:12 PM UTC 24 Oct 02 11:11:14 PM UTC 24 156835333 ps
T2508 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.4000173926 Oct 02 11:11:12 PM UTC 24 Oct 02 11:11:14 PM UTC 24 148112742 ps
T2509 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.2222528840 Oct 02 11:11:12 PM UTC 24 Oct 02 11:11:15 PM UTC 24 159511915 ps
T2510 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.4098203553 Oct 02 11:11:12 PM UTC 24 Oct 02 11:11:15 PM UTC 24 221373558 ps
T2511 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.2462020968 Oct 02 11:11:12 PM UTC 24 Oct 02 11:11:15 PM UTC 24 232224188 ps
T2512 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.263882184 Oct 02 11:11:14 PM UTC 24 Oct 02 11:11:16 PM UTC 24 42576271 ps
T2513 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2108746961 Oct 02 11:11:14 PM UTC 24 Oct 02 11:11:16 PM UTC 24 145322030 ps
T2514 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.3852624173 Oct 02 11:11:14 PM UTC 24 Oct 02 11:11:16 PM UTC 24 203473647 ps
T2515 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.2465000516 Oct 02 11:11:14 PM UTC 24 Oct 02 11:11:16 PM UTC 24 155260827 ps
T2516 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.2964344177 Oct 02 11:10:08 PM UTC 24 Oct 02 11:11:17 PM UTC 24 2756925095 ps
T2517 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3030700092 Oct 02 11:11:15 PM UTC 24 Oct 02 11:11:18 PM UTC 24 193900124 ps
T2518 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1078127842 Oct 02 11:11:16 PM UTC 24 Oct 02 11:11:18 PM UTC 24 147092110 ps
T2519 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2248024894 Oct 02 11:11:16 PM UTC 24 Oct 02 11:11:18 PM UTC 24 259683862 ps
T2520 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.1543149763 Oct 02 11:11:16 PM UTC 24 Oct 02 11:11:18 PM UTC 24 205158377 ps
T2521 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2340442805 Oct 02 11:11:16 PM UTC 24 Oct 02 11:11:18 PM UTC 24 185605636 ps
T2522 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.4105778758 Oct 02 11:11:16 PM UTC 24 Oct 02 11:11:18 PM UTC 24 165165070 ps
T2523 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.3154397720 Oct 02 11:11:16 PM UTC 24 Oct 02 11:11:18 PM UTC 24 274279665 ps
T2524 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.3455476245 Oct 02 11:11:17 PM UTC 24 Oct 02 11:11:41 PM UTC 24 2748860100 ps
T2525 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.1403674376 Oct 02 11:11:17 PM UTC 24 Oct 02 11:11:19 PM UTC 24 186221420 ps
T2526 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.3503043775 Oct 02 11:11:17 PM UTC 24 Oct 02 11:11:21 PM UTC 24 881564430 ps
T2527 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.4165044931 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:21 PM UTC 24 46537391 ps
T2528 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.3369117714 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:22 PM UTC 24 151414573 ps
T2529 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.3334284335 Oct 02 11:11:17 PM UTC 24 Oct 02 11:11:22 PM UTC 24 586628112 ps
T2530 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.1175379479 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:22 PM UTC 24 178573816 ps
T2531 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3224935808 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:22 PM UTC 24 404284399 ps
T2532 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.3245466630 Oct 02 11:10:29 PM UTC 24 Oct 02 11:11:23 PM UTC 24 19663818384 ps
T2533 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.2688416859 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:24 PM UTC 24 770856196 ps
T2534 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2789577854 Oct 02 11:11:22 PM UTC 24 Oct 02 11:11:25 PM UTC 24 185941834 ps
T2535 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_enable.2809507621 Oct 02 11:11:23 PM UTC 24 Oct 02 11:11:25 PM UTC 24 55576004 ps
T2536 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.2696429701 Oct 02 11:11:23 PM UTC 24 Oct 02 11:11:26 PM UTC 24 148808734 ps
T2537 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.1244174841 Oct 02 11:11:22 PM UTC 24 Oct 02 11:11:26 PM UTC 24 495876015 ps
T2538 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1946112848 Oct 02 11:08:50 PM UTC 24 Oct 02 11:11:26 PM UTC 24 5623848472 ps
T417 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.1128305853 Oct 02 11:11:23 PM UTC 24 Oct 02 11:11:27 PM UTC 24 647057758 ps
T2539 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.466743323 Oct 02 11:10:47 PM UTC 24 Oct 02 11:11:27 PM UTC 24 25789121152 ps
T2540 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.896912460 Oct 02 11:09:57 PM UTC 24 Oct 02 11:11:27 PM UTC 24 3484217967 ps
T2541 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.1152396979 Oct 02 11:11:25 PM UTC 24 Oct 02 11:11:28 PM UTC 24 314230411 ps
T2542 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.1564097876 Oct 02 11:11:09 PM UTC 24 Oct 02 11:11:28 PM UTC 24 9810521211 ps
T2543 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.868001294 Oct 02 11:11:04 PM UTC 24 Oct 02 11:11:28 PM UTC 24 15678321718 ps
T2544 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.1775909672 Oct 02 11:09:40 PM UTC 24 Oct 02 11:11:28 PM UTC 24 3918724050 ps
T2545 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.2241670004 Oct 02 11:11:23 PM UTC 24 Oct 02 11:11:28 PM UTC 24 915897380 ps
T2546 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.1710927253 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:29 PM UTC 24 4125677350 ps
T2547 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2396252989 Oct 02 11:11:26 PM UTC 24 Oct 02 11:11:29 PM UTC 24 208996408 ps
T2548 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.826331260 Oct 02 11:11:26 PM UTC 24 Oct 02 11:11:29 PM UTC 24 204461761 ps
T2549 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1150625444 Oct 02 11:11:26 PM UTC 24 Oct 02 11:11:30 PM UTC 24 224152319 ps
T2550 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1858600641 Oct 02 11:10:25 PM UTC 24 Oct 02 11:11:30 PM UTC 24 2305232974 ps
T2551 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.1811559460 Oct 02 11:11:02 PM UTC 24 Oct 02 11:11:30 PM UTC 24 2765990457 ps
T2552 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.580881842 Oct 02 11:11:25 PM UTC 24 Oct 02 11:11:30 PM UTC 24 493105197 ps
T2553 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.618848173 Oct 02 11:10:49 PM UTC 24 Oct 02 11:11:30 PM UTC 24 19144230819 ps
T2554 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3991262112 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:30 PM UTC 24 1828679120 ps
T2555 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2139754665 Oct 02 11:11:28 PM UTC 24 Oct 02 11:11:31 PM UTC 24 192539607 ps
T2556 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.2238805070 Oct 02 11:10:43 PM UTC 24 Oct 02 11:11:32 PM UTC 24 17716528355 ps
T2557 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.2025471781 Oct 02 11:11:30 PM UTC 24 Oct 02 11:11:32 PM UTC 24 152101571 ps
T2558 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2697557449 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:32 PM UTC 24 2719472391 ps
T2559 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3542327454 Oct 02 11:11:30 PM UTC 24 Oct 02 11:11:32 PM UTC 24 196137171 ps
T2560 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.1181463700 Oct 02 11:11:30 PM UTC 24 Oct 02 11:11:33 PM UTC 24 263174868 ps
T2561 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.630014534 Oct 02 11:09:49 PM UTC 24 Oct 02 11:11:33 PM UTC 24 3556997303 ps
T2562 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.163267474 Oct 02 11:09:57 PM UTC 24 Oct 02 11:11:33 PM UTC 24 3390270259 ps
T2563 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.3472302121 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 187576680 ps
T2564 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.2050574092 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 147968492 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.2020245435 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 203971746 ps
T2565 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3657268124 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 211007052 ps
T2566 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.262258261 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 185932895 ps
T2567 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3847153110 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 151072673 ps
T2568 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.1599865418 Oct 02 11:11:32 PM UTC 24 Oct 02 11:11:34 PM UTC 24 116458553 ps
T2569 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.340385670 Oct 02 11:11:32 PM UTC 24 Oct 02 11:11:34 PM UTC 24 148577895 ps
T2570 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.3647196577 Oct 02 11:11:31 PM UTC 24 Oct 02 11:11:34 PM UTC 24 251406061 ps
T2571 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.789635684 Oct 02 11:10:55 PM UTC 24 Oct 02 11:11:35 PM UTC 24 28220091991 ps
T2572 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.3139389410 Oct 02 11:11:33 PM UTC 24 Oct 02 11:11:36 PM UTC 24 183087140 ps
T2573 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.3751666509 Oct 02 11:11:33 PM UTC 24 Oct 02 11:11:36 PM UTC 24 185662497 ps
T2574 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.4067057659 Oct 02 11:11:33 PM UTC 24 Oct 02 11:11:36 PM UTC 24 178702086 ps
T2575 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.3580415728 Oct 02 11:11:33 PM UTC 24 Oct 02 11:11:36 PM UTC 24 209911677 ps
T2576 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.813208070 Oct 02 11:10:55 PM UTC 24 Oct 02 11:11:37 PM UTC 24 4062196020 ps
T2577 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.130682581 Oct 02 11:10:45 PM UTC 24 Oct 02 11:11:39 PM UTC 24 1915107483 ps
T2578 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2584549924 Oct 02 11:11:07 PM UTC 24 Oct 02 11:11:37 PM UTC 24 3981050409 ps
T2579 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.3485964711 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:37 PM UTC 24 149953191 ps
T2580 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.3409051361 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:37 PM UTC 24 267215082 ps
T2581 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1761857363 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:37 PM UTC 24 194408953 ps
T2582 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.1570406217 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:38 PM UTC 24 151408187 ps
T2583 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.893891229 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:38 PM UTC 24 229522188 ps
T2584 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.2581899690 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:38 PM UTC 24 263334142 ps
T2585 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.93311372 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:38 PM UTC 24 189824540 ps
T2586 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2488334955 Oct 02 11:09:40 PM UTC 24 Oct 02 11:11:38 PM UTC 24 4552142453 ps
T2587 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.2020503323 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:38 PM UTC 24 417272523 ps
T2588 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.3469626061 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:38 PM UTC 24 497455474 ps
T2589 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.1164544025 Oct 02 11:10:34 PM UTC 24 Oct 02 11:11:40 PM UTC 24 37727528278 ps
T2590 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_enable.3549603969 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:41 PM UTC 24 35974360 ps
T2591 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.226719416 Oct 02 11:11:37 PM UTC 24 Oct 02 11:11:39 PM UTC 24 85373106 ps
T2592 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.1261250419 Oct 02 11:11:00 PM UTC 24 Oct 02 11:11:39 PM UTC 24 14141418080 ps
T2593 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.1254056551 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:41 PM UTC 24 355129246 ps
T2594 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.3787713961 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:41 PM UTC 24 147789964 ps
T2595 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.1729448175 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:41 PM UTC 24 146117648 ps
T2596 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.3477299063 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:42 PM UTC 24 144679662 ps
T2597 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.2374645366 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:42 PM UTC 24 370736203 ps
T2598 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.1115240994 Oct 02 11:11:10 PM UTC 24 Oct 02 11:11:43 PM UTC 24 3395623315 ps
T2599 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2835801551 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:44 PM UTC 24 790341830 ps
T2600 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.4001236758 Oct 02 11:11:41 PM UTC 24 Oct 02 11:11:44 PM UTC 24 167575730 ps
T2601 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2003735309 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:44 PM UTC 24 4260136113 ps
T2602 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.767061210 Oct 02 11:11:39 PM UTC 24 Oct 02 11:11:44 PM UTC 24 881332775 ps
T2603 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.1227298094 Oct 02 11:11:41 PM UTC 24 Oct 02 11:11:44 PM UTC 24 146529704 ps
T2604 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.1359351295 Oct 02 11:11:04 PM UTC 24 Oct 02 11:11:44 PM UTC 24 25750898380 ps
T2605 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.3535759319 Oct 02 11:11:41 PM UTC 24 Oct 02 11:11:44 PM UTC 24 251284187 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.2396808999 Oct 02 11:11:41 PM UTC 24 Oct 02 11:11:44 PM UTC 24 397478860 ps
T2606 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3946123544 Oct 02 11:11:43 PM UTC 24 Oct 02 11:11:45 PM UTC 24 224461501 ps
T2607 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.2620519895 Oct 02 11:11:41 PM UTC 24 Oct 02 11:11:46 PM UTC 24 509704887 ps
T2608 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.1363654877 Oct 02 11:11:43 PM UTC 24 Oct 02 11:11:46 PM UTC 24 191335285 ps
T2609 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.3862615204 Oct 02 11:11:37 PM UTC 24 Oct 02 11:11:47 PM UTC 24 5077016053 ps
T2610 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.110979543 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:47 PM UTC 24 241285273 ps
T2611 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.3951427283 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:47 PM UTC 24 242495013 ps
T2612 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3768913638 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:47 PM UTC 24 154690439 ps
T2613 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.592631307 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:47 PM UTC 24 184853445 ps
T2614 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2925300913 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:47 PM UTC 24 150509840 ps
T2615 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4274541142 Oct 02 11:11:28 PM UTC 24 Oct 02 11:11:47 PM UTC 24 11245489207 ps
T2616 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.1865904616 Oct 02 11:11:30 PM UTC 24 Oct 02 11:11:47 PM UTC 24 2229477402 ps
T2617 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.4049479415 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:48 PM UTC 24 169378367 ps
T2618 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3226525068 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:48 PM UTC 24 195689387 ps
T2619 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.2219623282 Oct 02 11:11:45 PM UTC 24 Oct 02 11:11:48 PM UTC 24 206449333 ps
T2620 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.3924093182 Oct 02 11:10:45 PM UTC 24 Oct 02 11:11:48 PM UTC 24 2279139588 ps
T2621 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.1860190527 Oct 02 11:10:25 PM UTC 24 Oct 02 11:11:48 PM UTC 24 3073256499 ps
T2622 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.3145054211 Oct 02 11:11:19 PM UTC 24 Oct 02 11:11:48 PM UTC 24 15572981090 ps
T2623 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.568989938 Oct 02 11:11:46 PM UTC 24 Oct 02 11:11:49 PM UTC 24 147390075 ps
T2624 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.794441867 Oct 02 11:11:47 PM UTC 24 Oct 02 11:11:49 PM UTC 24 33127816 ps
T2625 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.548968135 Oct 02 11:11:46 PM UTC 24 Oct 02 11:11:49 PM UTC 24 214321408 ps
T2626 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.4152190583 Oct 02 11:11:14 PM UTC 24 Oct 02 11:11:49 PM UTC 24 12325750468 ps
T2627 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.1932612378 Oct 02 11:10:14 PM UTC 24 Oct 02 11:11:49 PM UTC 24 3567007354 ps
T2628 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2580934043 Oct 02 11:11:46 PM UTC 24 Oct 02 11:11:49 PM UTC 24 166206966 ps
T2629 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.3343864929 Oct 02 11:11:48 PM UTC 24 Oct 02 11:11:50 PM UTC 24 155194817 ps
T2630 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.3253457150 Oct 02 11:11:48 PM UTC 24 Oct 02 11:11:50 PM UTC 24 169974196 ps
T2631 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3841342553 Oct 02 11:11:29 PM UTC 24 Oct 02 11:11:50 PM UTC 24 2123452777 ps
T2632 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.2746027367 Oct 02 11:11:48 PM UTC 24 Oct 02 11:11:50 PM UTC 24 154064214 ps
T2633 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.22671791 Oct 02 11:11:48 PM UTC 24 Oct 02 11:11:50 PM UTC 24 164004398 ps
T2634 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.4026202633 Oct 02 11:11:48 PM UTC 24 Oct 02 11:11:51 PM UTC 24 169160219 ps
T2635 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2965978214 Oct 02 11:11:29 PM UTC 24 Oct 02 11:11:51 PM UTC 24 2603944573 ps
T2636 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.761312892 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:52 PM UTC 24 150876040 ps
T2637 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.3560057806 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:52 PM UTC 24 189646674 ps
T2638 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1208206252 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:52 PM UTC 24 57525362 ps
T2639 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.3896054033 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:52 PM UTC 24 179341509 ps
T2640 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.1798048911 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:52 PM UTC 24 255151942 ps
T2641 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.1633534590 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:52 PM UTC 24 353952762 ps
T2642 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.2595225515 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:53 PM UTC 24 193679185 ps
T2643 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.1065972933 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:53 PM UTC 24 618250167 ps
T2644 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.1186680116 Oct 02 11:11:52 PM UTC 24 Oct 02 11:11:54 PM UTC 24 142874869 ps
T2645 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.3534212161 Oct 02 11:11:52 PM UTC 24 Oct 02 11:11:54 PM UTC 24 147553392 ps
T2646 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.192081814 Oct 02 11:11:25 PM UTC 24 Oct 02 11:11:54 PM UTC 24 3820874401 ps
T2647 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1060124003 Oct 02 11:11:52 PM UTC 24 Oct 02 11:11:55 PM UTC 24 251238670 ps
T2648 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.3289350241 Oct 02 11:11:50 PM UTC 24 Oct 02 11:11:55 PM UTC 24 1337863291 ps
T2649 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2881375798 Oct 02 11:11:06 PM UTC 24 Oct 02 11:11:55 PM UTC 24 7732890016 ps
T2650 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.2385746115 Oct 02 11:11:35 PM UTC 24 Oct 02 11:11:56 PM UTC 24 2629914321 ps
T2651 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1896745304 Oct 02 11:11:54 PM UTC 24 Oct 02 11:11:56 PM UTC 24 142021214 ps
T2652 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3823241846 Oct 02 11:11:54 PM UTC 24 Oct 02 11:11:56 PM UTC 24 51016155 ps
T2653 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.309269120 Oct 02 11:11:52 PM UTC 24 Oct 02 11:11:56 PM UTC 24 1101682910 ps
T306 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1415036640 Oct 02 11:11:54 PM UTC 24 Oct 02 11:11:56 PM UTC 24 259633257 ps
T393 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.3855120752 Oct 02 11:11:54 PM UTC 24 Oct 02 11:11:56 PM UTC 24 438418524 ps
T2654 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.2517228570 Oct 02 11:10:07 PM UTC 24 Oct 02 11:11:57 PM UTC 24 9318659464 ps
T2655 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.754835749 Oct 02 11:11:53 PM UTC 24 Oct 02 11:11:57 PM UTC 24 710596495 ps
T2656 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.3808015644 Oct 02 11:10:40 PM UTC 24 Oct 02 11:11:57 PM UTC 24 2838237611 ps
T2657 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1366631166 Oct 02 11:11:43 PM UTC 24 Oct 02 11:11:57 PM UTC 24 6874459305 ps
T2658 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.794693160 Oct 02 11:11:37 PM UTC 24 Oct 02 11:11:57 PM UTC 24 13428980947 ps
T2659 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.4037062770 Oct 02 11:11:55 PM UTC 24 Oct 02 11:11:57 PM UTC 24 159125128 ps
T2660 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.3897839096 Oct 02 11:11:43 PM UTC 24 Oct 02 11:11:58 PM UTC 24 9319551977 ps
T2661 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.25327128 Oct 02 11:11:54 PM UTC 24 Oct 02 11:11:58 PM UTC 24 956279420 ps
T2662 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.3447635785 Oct 02 11:11:55 PM UTC 24 Oct 02 11:11:58 PM UTC 24 222129311 ps
T2663 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.304254474 Oct 02 11:11:55 PM UTC 24 Oct 02 11:11:58 PM UTC 24 258720774 ps
T2664 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.660928415 Oct 02 11:11:54 PM UTC 24 Oct 02 11:11:58 PM UTC 24 302136501 ps
T2665 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.1165126665 Oct 02 11:11:09 PM UTC 24 Oct 02 11:11:59 PM UTC 24 28368864838 ps
T2666 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.820217994 Oct 02 11:11:57 PM UTC 24 Oct 02 11:11:59 PM UTC 24 243917358 ps
T2667 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1457692255 Oct 02 11:11:57 PM UTC 24 Oct 02 11:11:59 PM UTC 24 236336847 ps
T2668 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.56783675 Oct 02 11:11:02 PM UTC 24 Oct 02 11:11:59 PM UTC 24 2166743789 ps
T2669 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.3706725958 Oct 02 11:11:57 PM UTC 24 Oct 02 11:12:00 PM UTC 24 186944409 ps
T2670 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.2968178110 Oct 02 11:11:53 PM UTC 24 Oct 02 11:12:00 PM UTC 24 887772983 ps
T2671 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.3241816595 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:01 PM UTC 24 149875679 ps
T2672 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.3947919608 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:01 PM UTC 24 163914203 ps
T2673 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.2725846766 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:01 PM UTC 24 198164238 ps
T2674 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.2721022761 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:01 PM UTC 24 171601136 ps
T2675 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1149601727 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:01 PM UTC 24 111392190 ps
T2676 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.593911709 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:02 PM UTC 24 168224086 ps
T2677 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.3032460630 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:02 PM UTC 24 216203632 ps
T2678 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.1656048839 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:02 PM UTC 24 228841736 ps
T2679 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.1436736950 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:02 PM UTC 24 193795431 ps
T2680 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.263742688 Oct 02 11:11:59 PM UTC 24 Oct 02 11:12:02 PM UTC 24 171935801 ps
T2681 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.2058830445 Oct 02 11:10:57 PM UTC 24 Oct 02 11:12:02 PM UTC 24 2393597233 ps
T2682 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.2914674800 Oct 02 11:11:53 PM UTC 24 Oct 02 11:12:03 PM UTC 24 488725091 ps
T2683 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.61075082 Oct 02 11:11:50 PM UTC 24 Oct 02 11:12:03 PM UTC 24 6448963206 ps
T2684 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.357428404 Oct 02 11:12:01 PM UTC 24 Oct 02 11:12:03 PM UTC 24 187884405 ps
T2685 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.2007277587 Oct 02 11:12:01 PM UTC 24 Oct 02 11:12:03 PM UTC 24 214702309 ps
T2686 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2767416468 Oct 02 11:12:01 PM UTC 24 Oct 02 11:12:03 PM UTC 24 175305222 ps
T2687 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.485673285 Oct 02 11:11:21 PM UTC 24 Oct 02 11:12:03 PM UTC 24 4769595509 ps
T2688 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.2290659965 Oct 02 11:12:01 PM UTC 24 Oct 02 11:12:03 PM UTC 24 193851591 ps
T2689 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.177517822 Oct 02 11:12:01 PM UTC 24 Oct 02 11:12:03 PM UTC 24 186917432 ps
T2690 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.1038604129 Oct 02 11:12:01 PM UTC 24 Oct 02 11:12:03 PM UTC 24 257665026 ps
T2691 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1369759713 Oct 02 11:11:19 PM UTC 24 Oct 02 11:12:04 PM UTC 24 30025017764 ps
T2692 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.392246390 Oct 02 11:12:02 PM UTC 24 Oct 02 11:12:04 PM UTC 24 174088624 ps
T2693 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.956562607 Oct 02 11:12:02 PM UTC 24 Oct 02 11:12:04 PM UTC 24 158361074 ps
T2694 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.3953197206 Oct 02 11:12:02 PM UTC 24 Oct 02 11:12:05 PM UTC 24 270268887 ps
T2695 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.1252177643 Oct 02 11:12:03 PM UTC 24 Oct 02 11:12:05 PM UTC 24 156764262 ps
T2696 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.3717855790 Oct 02 11:12:03 PM UTC 24 Oct 02 11:12:05 PM UTC 24 206930591 ps
T2697 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.2335913884 Oct 02 11:10:55 PM UTC 24 Oct 02 11:12:05 PM UTC 24 2551877607 ps
T2698 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.4283621484 Oct 02 11:12:03 PM UTC 24 Oct 02 11:12:05 PM UTC 24 455332180 ps
T2699 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2734552099 Oct 02 11:12:04 PM UTC 24 Oct 02 11:12:06 PM UTC 24 41208811 ps
T2700 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.1107727645 Oct 02 11:12:04 PM UTC 24 Oct 02 11:12:06 PM UTC 24 153462849 ps
T2701 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.4090892334 Oct 02 11:12:03 PM UTC 24 Oct 02 11:12:06 PM UTC 24 982908868 ps
T2702 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.623391295 Oct 02 11:12:04 PM UTC 24 Oct 02 11:12:07 PM UTC 24 180776623 ps
T2703 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.4277216883 Oct 02 11:12:05 PM UTC 24 Oct 02 11:12:07 PM UTC 24 169407640 ps
T2704 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.1834662072 Oct 02 11:11:57 PM UTC 24 Oct 02 11:12:07 PM UTC 24 5277754541 ps
T2705 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.1567092888 Oct 02 11:12:05 PM UTC 24 Oct 02 11:12:07 PM UTC 24 375318652 ps
T2706 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.792249239 Oct 02 11:11:35 PM UTC 24 Oct 02 11:12:07 PM UTC 24 3241276033 ps
T2707 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.4223173076 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:08 PM UTC 24 145757452 ps
T2708 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_enable.4212185147 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:08 PM UTC 24 68573787 ps
T2709 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.1835495016 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:08 PM UTC 24 149108016 ps
T2710 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.2032653538 Oct 02 11:12:05 PM UTC 24 Oct 02 11:12:09 PM UTC 24 825729170 ps
T2711 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2519792084 Oct 02 11:10:23 PM UTC 24 Oct 02 11:12:09 PM UTC 24 3624255399 ps
T2712 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.2104179246 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:09 PM UTC 24 904297816 ps
T434 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.2923936507 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:09 PM UTC 24 680900037 ps
T2713 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.247683193 Oct 02 11:09:37 PM UTC 24 Oct 02 11:12:10 PM UTC 24 13036314183 ps
T2714 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.845785192 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:10 PM UTC 24 788475444 ps
T2715 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.2100522865 Oct 02 11:12:08 PM UTC 24 Oct 02 11:12:10 PM UTC 24 160951306 ps
T2716 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.2125755087 Oct 02 11:12:08 PM UTC 24 Oct 02 11:12:10 PM UTC 24 258653092 ps
T2717 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.4048935135 Oct 02 11:12:08 PM UTC 24 Oct 02 11:12:11 PM UTC 24 225886387 ps
T2718 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.2390737486 Oct 02 11:12:08 PM UTC 24 Oct 02 11:12:11 PM UTC 24 270636367 ps
T2719 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.4179282304 Oct 02 11:12:06 PM UTC 24 Oct 02 11:12:11 PM UTC 24 464053317 ps
T2720 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.1367000514 Oct 02 11:11:43 PM UTC 24 Oct 02 11:12:11 PM UTC 24 3218050696 ps
T2721 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.1200777481 Oct 02 11:12:09 PM UTC 24 Oct 02 11:12:12 PM UTC 24 245542890 ps
T2722 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.3002252190 Oct 02 11:12:10 PM UTC 24 Oct 02 11:12:12 PM UTC 24 187737621 ps
T2723 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.1029881912 Oct 02 11:11:33 PM UTC 24 Oct 02 11:12:12 PM UTC 24 14423153435 ps
T2724 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.1090057896 Oct 02 11:12:11 PM UTC 24 Oct 02 11:12:14 PM UTC 24 153959138 ps
T2725 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.1544264906 Oct 02 11:11:28 PM UTC 24 Oct 02 11:12:14 PM UTC 24 26870275313 ps
T2726 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.1525531577 Oct 02 11:12:11 PM UTC 24 Oct 02 11:12:14 PM UTC 24 152090243 ps
T2727 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.3664489751 Oct 02 11:12:12 PM UTC 24 Oct 02 11:12:14 PM UTC 24 166129762 ps
T2728 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.691071500 Oct 02 11:12:12 PM UTC 24 Oct 02 11:12:14 PM UTC 24 248299619 ps
T2729 /workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.483433582 Oct 02 11:12:12 PM UTC 24 Oct 02 11:12:14 PM UTC 24 148984218 ps
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