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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.69 95.42 94.23 98.00 94.87 97.93 99.69


Total test records in report: 2873
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T228 /workspace/coverage/default/2.chip_jtag_csr_rw.3595939808 Jan 10 01:52:08 PM PST 24 Jan 10 02:14:41 PM PST 24 11764212930 ps
T639 /workspace/coverage/default/96.chip_sw_all_escalation_resets.1014288319 Jan 10 02:07:01 PM PST 24 Jan 10 02:16:03 PM PST 24 5525381672 ps
T643 /workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.3307499950 Jan 10 02:06:42 PM PST 24 Jan 10 02:13:54 PM PST 24 4131270752 ps
T1124 /workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.389978946 Jan 10 01:56:57 PM PST 24 Jan 10 02:13:33 PM PST 24 6722171307 ps
T1125 /workspace/coverage/default/1.chip_sw_hmac_enc_idle.444654451 Jan 10 01:56:08 PM PST 24 Jan 10 02:00:26 PM PST 24 2670275780 ps
T1126 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.774881901 Jan 10 01:55:01 PM PST 24 Jan 10 02:01:43 PM PST 24 3676683992 ps
T300 /workspace/coverage/default/85.chip_sw_all_escalation_resets.847569902 Jan 10 02:06:17 PM PST 24 Jan 10 02:14:08 PM PST 24 4420938744 ps
T1127 /workspace/coverage/default/7.chip_sw_uart_rand_baudrate.3067509940 Jan 10 02:04:08 PM PST 24 Jan 10 03:10:59 PM PST 24 22596803240 ps
T1128 /workspace/coverage/default/12.chip_sw_lc_ctrl_transition.858902502 Jan 10 02:02:24 PM PST 24 Jan 10 02:17:10 PM PST 24 13525277805 ps
T1129 /workspace/coverage/default/1.rom_e2e_asm_init_prod.2522581966 Jan 10 02:02:29 PM PST 24 Jan 10 02:29:07 PM PST 24 8824711772 ps
T49 /workspace/coverage/default/1.chip_tap_straps_testunlock0.2524018338 Jan 10 01:55:51 PM PST 24 Jan 10 02:10:46 PM PST 24 8846555513 ps
T1130 /workspace/coverage/default/1.chip_sw_hmac_enc.586378965 Jan 10 01:55:13 PM PST 24 Jan 10 01:59:21 PM PST 24 2738983570 ps
T1131 /workspace/coverage/default/2.rom_volatile_raw_unlock.534854942 Jan 10 02:04:11 PM PST 24 Jan 10 02:27:45 PM PST 24 9659528696 ps
T178 /workspace/coverage/default/1.chip_plic_all_irqs_0.4218699364 Jan 10 01:56:48 PM PST 24 Jan 10 02:14:34 PM PST 24 6089327750 ps
T1132 /workspace/coverage/default/2.chip_sw_entropy_src_smoketest.2696484703 Jan 10 01:59:59 PM PST 24 Jan 10 02:06:43 PM PST 24 3816851144 ps
T1133 /workspace/coverage/default/1.chip_sw_plic_sw_irq.3678691929 Jan 10 01:58:49 PM PST 24 Jan 10 02:04:24 PM PST 24 3181870786 ps
T1134 /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.2097723758 Jan 10 01:58:08 PM PST 24 Jan 10 02:11:03 PM PST 24 5872196280 ps
T689 /workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3661267811 Jan 10 02:03:18 PM PST 24 Jan 10 02:08:47 PM PST 24 3227729124 ps
T1135 /workspace/coverage/default/2.chip_sw_spi_device_pass_through.3855447036 Jan 10 02:00:27 PM PST 24 Jan 10 02:10:49 PM PST 24 6614081590 ps
T1136 /workspace/coverage/default/0.chip_sw_otbn_mem_scramble.3562428785 Jan 10 01:56:07 PM PST 24 Jan 10 02:02:38 PM PST 24 3368112516 ps
T1137 /workspace/coverage/default/1.chip_sw_aes_enc.580780357 Jan 10 01:59:38 PM PST 24 Jan 10 02:03:54 PM PST 24 2727465906 ps
T767 /workspace/coverage/default/93.chip_sw_all_escalation_resets.839731654 Jan 10 02:09:29 PM PST 24 Jan 10 02:19:41 PM PST 24 6028388300 ps
T721 /workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.2845502458 Jan 10 02:01:49 PM PST 24 Jan 10 02:08:20 PM PST 24 3553156992 ps
T369 /workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1031830409 Jan 10 01:55:30 PM PST 24 Jan 10 02:49:06 PM PST 24 13974518288 ps
T1138 /workspace/coverage/default/0.chip_sw_usbdev_vbus.3167577774 Jan 10 01:54:01 PM PST 24 Jan 10 01:57:25 PM PST 24 2869076376 ps
T624 /workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1669794086 Jan 10 01:53:51 PM PST 24 Jan 10 01:56:05 PM PST 24 3007468956 ps
T1139 /workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.2430865068 Jan 10 01:55:31 PM PST 24 Jan 10 02:14:36 PM PST 24 9944693707 ps
T1140 /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.231621750 Jan 10 01:55:00 PM PST 24 Jan 10 02:16:10 PM PST 24 20418776332 ps
T1141 /workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg.3533321481 Jan 10 01:56:46 PM PST 24 Jan 10 02:03:28 PM PST 24 2985724474 ps
T1142 /workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.4110639602 Jan 10 02:06:32 PM PST 24 Jan 10 02:12:53 PM PST 24 3834109136 ps
T1143 /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.715746882 Jan 10 02:01:49 PM PST 24 Jan 10 02:12:04 PM PST 24 4320571178 ps
T1144 /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3278497972 Jan 10 01:57:35 PM PST 24 Jan 10 02:20:41 PM PST 24 12992410366 ps
T1145 /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.500981594 Jan 10 01:58:06 PM PST 24 Jan 10 02:03:10 PM PST 24 5373488552 ps
T625 /workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3007574857 Jan 10 01:54:10 PM PST 24 Jan 10 01:56:25 PM PST 24 3916225634 ps
T1146 /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.362425479 Jan 10 02:01:44 PM PST 24 Jan 10 02:07:21 PM PST 24 3429688835 ps
T1147 /workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2458277261 Jan 10 02:03:20 PM PST 24 Jan 10 02:11:50 PM PST 24 10131356522 ps
T1148 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.68221843 Jan 10 01:58:28 PM PST 24 Jan 10 02:20:07 PM PST 24 6936033452 ps
T1149 /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.3832165983 Jan 10 02:00:03 PM PST 24 Jan 10 02:51:30 PM PST 24 18867890823 ps
T1150 /workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.1443165523 Jan 10 01:55:33 PM PST 24 Jan 10 02:01:33 PM PST 24 3878499690 ps
T206 /workspace/coverage/default/2.chip_sw_spi_device_tx_rx.1313185403 Jan 10 01:56:56 PM PST 24 Jan 10 02:03:25 PM PST 24 3646729530 ps
T1151 /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.1354755055 Jan 10 01:59:52 PM PST 24 Jan 10 02:12:47 PM PST 24 5032771076 ps
T1152 /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.2397942560 Jan 10 01:56:23 PM PST 24 Jan 10 02:10:15 PM PST 24 6107749352 ps
T1153 /workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1974412857 Jan 10 02:01:18 PM PST 24 Jan 10 02:09:12 PM PST 24 3443568040 ps
T1154 /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.4045768554 Jan 10 01:54:45 PM PST 24 Jan 10 02:07:55 PM PST 24 4967510280 ps
T143 /workspace/coverage/default/0.chip_sw_alert_handler_entropy.1990923472 Jan 10 01:54:40 PM PST 24 Jan 10 02:00:46 PM PST 24 3135225240 ps
T1155 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.766209476 Jan 10 01:59:39 PM PST 24 Jan 10 02:29:44 PM PST 24 8939361862 ps
T1156 /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.2500327116 Jan 10 02:00:17 PM PST 24 Jan 10 03:00:09 PM PST 24 23124617752 ps
T1157 /workspace/coverage/default/2.chip_sw_entropy_src_kat_test.4209371989 Jan 10 01:59:46 PM PST 24 Jan 10 02:03:12 PM PST 24 3017877400 ps
T1158 /workspace/coverage/default/1.rom_e2e_static_critical.1715034370 Jan 10 01:59:50 PM PST 24 Jan 10 02:28:31 PM PST 24 9988596736 ps
T227 /workspace/coverage/default/2.chip_sw_sensor_ctrl_status.3371385730 Jan 10 02:00:55 PM PST 24 Jan 10 02:06:34 PM PST 24 3315571727 ps
T1159 /workspace/coverage/default/1.chip_sw_gpio_smoketest.1789882757 Jan 10 02:00:19 PM PST 24 Jan 10 02:03:52 PM PST 24 2369566991 ps
T1160 /workspace/coverage/default/2.chip_sw_rstmgr_smoketest.1279493935 Jan 10 02:01:06 PM PST 24 Jan 10 02:04:14 PM PST 24 2092224380 ps
T146 /workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.4201034518 Jan 10 01:53:44 PM PST 24 Jan 10 01:57:18 PM PST 24 3192091835 ps
T1161 /workspace/coverage/default/2.chip_sw_gpio_smoketest.1291043824 Jan 10 01:59:14 PM PST 24 Jan 10 02:02:38 PM PST 24 2937505309 ps
T1162 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3293964587 Jan 10 01:58:47 PM PST 24 Jan 10 02:25:25 PM PST 24 9510125292 ps
T1163 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3230241422 Jan 10 02:00:49 PM PST 24 Jan 10 02:32:14 PM PST 24 10220233202 ps
T1164 /workspace/coverage/default/2.chip_sw_rstmgr_sw_req.165868497 Jan 10 02:03:31 PM PST 24 Jan 10 02:09:30 PM PST 24 3482767400 ps
T1165 /workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.952527005 Jan 10 02:06:27 PM PST 24 Jan 10 02:12:43 PM PST 24 4008457608 ps
T1166 /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.2863591790 Jan 10 02:02:13 PM PST 24 Jan 10 02:06:26 PM PST 24 3030647884 ps
T1167 /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2713413947 Jan 10 01:58:05 PM PST 24 Jan 10 02:11:41 PM PST 24 5310954162 ps
T1168 /workspace/coverage/default/2.chip_sw_spi_device_tpm.3276841734 Jan 10 01:57:53 PM PST 24 Jan 10 02:04:23 PM PST 24 3667298061 ps
T1169 /workspace/coverage/default/1.chip_sw_example_flash.3864120678 Jan 10 01:59:00 PM PST 24 Jan 10 02:03:02 PM PST 24 3207333754 ps
T1170 /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1345596516 Jan 10 02:02:07 PM PST 24 Jan 10 02:10:32 PM PST 24 3950092508 ps
T1171 /workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.317171305 Jan 10 01:56:47 PM PST 24 Jan 10 02:12:30 PM PST 24 6128652705 ps
T640 /workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.1287508698 Jan 10 02:02:48 PM PST 24 Jan 10 02:08:42 PM PST 24 2966837388 ps
T258 /workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.3704122390 Jan 10 02:06:21 PM PST 24 Jan 10 02:11:48 PM PST 24 3266467632 ps
T644 /workspace/coverage/default/3.chip_tap_straps_dev.1317371872 Jan 10 02:01:01 PM PST 24 Jan 10 02:03:27 PM PST 24 2435712971 ps
T645 /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.2913692241 Jan 10 02:06:13 PM PST 24 Jan 10 02:12:49 PM PST 24 3857499236 ps
T646 /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.605641346 Jan 10 01:54:36 PM PST 24 Jan 10 02:02:26 PM PST 24 3655352858 ps
T647 /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3136298937 Jan 10 01:59:05 PM PST 24 Jan 10 02:06:12 PM PST 24 2955803416 ps
T648 /workspace/coverage/default/1.chip_sw_rv_plic_smoketest.2705590814 Jan 10 01:56:19 PM PST 24 Jan 10 01:59:17 PM PST 24 2837613608 ps
T1172 /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3745914914 Jan 10 01:58:04 PM PST 24 Jan 10 02:03:22 PM PST 24 2957203486 ps
T619 /workspace/coverage/default/0.chip_tap_straps_dev.3624171000 Jan 10 01:54:42 PM PST 24 Jan 10 02:14:18 PM PST 24 14593454468 ps
T762 /workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.112020731 Jan 10 02:05:05 PM PST 24 Jan 10 02:11:44 PM PST 24 3480927692 ps
T1173 /workspace/coverage/default/1.chip_sw_entropy_src_kat_test.904370731 Jan 10 01:56:20 PM PST 24 Jan 10 02:00:44 PM PST 24 2672292760 ps
T1174 /workspace/coverage/default/3.chip_sw_uart_tx_rx.1950732315 Jan 10 02:04:48 PM PST 24 Jan 10 02:20:06 PM PST 24 5588152424 ps
T656 /workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.1636684123 Jan 10 01:55:47 PM PST 24 Jan 10 02:04:08 PM PST 24 5096355524 ps
T641 /workspace/coverage/default/68.chip_sw_all_escalation_resets.3411341340 Jan 10 02:06:04 PM PST 24 Jan 10 02:15:14 PM PST 24 5092296184 ps
T153 /workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.1650406369 Jan 10 01:58:20 PM PST 24 Jan 10 02:08:31 PM PST 24 4437213464 ps
T265 /workspace/coverage/default/80.chip_sw_all_escalation_resets.3906314976 Jan 10 02:06:20 PM PST 24 Jan 10 02:16:24 PM PST 24 5704559132 ps
T1175 /workspace/coverage/default/18.chip_sw_uart_rand_baudrate.1100204626 Jan 10 02:07:25 PM PST 24 Jan 10 03:09:29 PM PST 24 23013602246 ps
T679 /workspace/coverage/default/13.chip_sw_all_escalation_resets.2666862943 Jan 10 02:01:47 PM PST 24 Jan 10 02:11:06 PM PST 24 5637186318 ps
T1176 /workspace/coverage/default/1.chip_tap_straps_rma.1959661759 Jan 10 01:57:03 PM PST 24 Jan 10 01:59:45 PM PST 24 2297191314 ps
T1177 /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3904896366 Jan 10 01:55:13 PM PST 24 Jan 10 02:16:59 PM PST 24 13150622873 ps
T1178 /workspace/coverage/default/1.chip_sw_keymgr_key_derivation.2397496814 Jan 10 01:55:36 PM PST 24 Jan 10 02:03:54 PM PST 24 4177481608 ps
T1179 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3598683741 Jan 10 01:59:24 PM PST 24 Jan 10 02:27:59 PM PST 24 7940328050 ps
T1180 /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.3331986173 Jan 10 02:00:21 PM PST 24 Jan 10 02:11:03 PM PST 24 4155012080 ps
T1181 /workspace/coverage/default/2.chip_sw_flash_crash_alert.348782366 Jan 10 02:00:52 PM PST 24 Jan 10 02:08:47 PM PST 24 5953109040 ps
T1182 /workspace/coverage/default/0.chip_sw_csrng_kat_test.3942176057 Jan 10 01:53:52 PM PST 24 Jan 10 01:57:42 PM PST 24 2589845200 ps
T204 /workspace/coverage/default/8.chip_sw_uart_rand_baudrate.4091426588 Jan 10 02:01:37 PM PST 24 Jan 10 02:11:33 PM PST 24 5055121800 ps
T1183 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3976485530 Jan 10 01:54:19 PM PST 24 Jan 10 02:39:53 PM PST 24 20603377504 ps
T1184 /workspace/coverage/default/1.rom_e2e_smoke.3154188813 Jan 10 01:56:28 PM PST 24 Jan 10 02:21:00 PM PST 24 8471984500 ps
T1185 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2311250275 Jan 10 01:57:22 PM PST 24 Jan 10 02:07:33 PM PST 24 4305347324 ps
T42 /workspace/coverage/default/0.chip_tap_straps_rma.1960557793 Jan 10 01:55:43 PM PST 24 Jan 10 02:01:45 PM PST 24 4936295861 ps
T1186 /workspace/coverage/default/2.chip_sw_kmac_mode_cshake.289530723 Jan 10 02:03:15 PM PST 24 Jan 10 02:06:59 PM PST 24 2889889382 ps
T1187 /workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.2759262912 Jan 10 01:59:58 PM PST 24 Jan 10 02:02:53 PM PST 24 2256690866 ps
T1188 /workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.857888919 Jan 10 01:54:25 PM PST 24 Jan 10 01:58:26 PM PST 24 2284214096 ps
T1189 /workspace/coverage/default/13.chip_sw_lc_ctrl_transition.1655305269 Jan 10 02:00:38 PM PST 24 Jan 10 02:09:32 PM PST 24 5779221768 ps
T1190 /workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.168361836 Jan 10 02:03:01 PM PST 24 Jan 10 02:08:39 PM PST 24 3535204206 ps
T732 /workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.2343092892 Jan 10 02:01:37 PM PST 24 Jan 10 02:08:30 PM PST 24 4212664580 ps
T25 /workspace/coverage/default/1.chip_sw_alert_test.1800663602 Jan 10 01:56:31 PM PST 24 Jan 10 02:01:38 PM PST 24 3584929900 ps
T1191 /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.856192236 Jan 10 02:05:51 PM PST 24 Jan 10 02:19:53 PM PST 24 5591018412 ps
T43 /workspace/coverage/default/2.chip_tap_straps_rma.962140139 Jan 10 01:58:38 PM PST 24 Jan 10 02:07:38 PM PST 24 6472059001 ps
T132 /workspace/coverage/default/0.chip_plic_all_irqs_10.91853521 Jan 10 01:55:15 PM PST 24 Jan 10 02:04:19 PM PST 24 4744082056 ps
T1192 /workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.2184588263 Jan 10 01:54:55 PM PST 24 Jan 10 02:02:36 PM PST 24 4568969416 ps
T690 /workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.1574439695 Jan 10 02:06:39 PM PST 24 Jan 10 02:13:48 PM PST 24 3967508876 ps
T1193 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3666325867 Jan 10 01:58:37 PM PST 24 Jan 10 02:10:14 PM PST 24 3492848016 ps
T1194 /workspace/coverage/default/41.chip_sw_all_escalation_resets.2587260671 Jan 10 02:04:56 PM PST 24 Jan 10 02:15:09 PM PST 24 5983879350 ps
T266 /workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.3075561430 Jan 10 01:57:06 PM PST 24 Jan 10 02:06:08 PM PST 24 6704382632 ps
T752 /workspace/coverage/default/43.chip_sw_all_escalation_resets.3483458703 Jan 10 02:05:48 PM PST 24 Jan 10 02:18:11 PM PST 24 5969089848 ps
T1195 /workspace/coverage/default/73.chip_sw_all_escalation_resets.4187923161 Jan 10 02:06:23 PM PST 24 Jan 10 02:15:13 PM PST 24 5232618670 ps
T113 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3050692272 Jan 10 01:57:06 PM PST 24 Jan 10 02:04:22 PM PST 24 5418099000 ps
T285 /workspace/coverage/default/32.chip_sw_all_escalation_resets.4009096611 Jan 10 02:05:10 PM PST 24 Jan 10 02:14:16 PM PST 24 5857182592 ps
T617 /workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.1832828920 Jan 10 01:56:39 PM PST 24 Jan 10 02:05:45 PM PST 24 6007032825 ps
T695 /workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1930497578 Jan 10 02:06:27 PM PST 24 Jan 10 02:12:50 PM PST 24 3849198460 ps
T1196 /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.3899525472 Jan 10 01:55:37 PM PST 24 Jan 10 02:40:13 PM PST 24 18338188416 ps
T1197 /workspace/coverage/default/1.chip_sw_kmac_mode_kmac.1329231616 Jan 10 01:56:29 PM PST 24 Jan 10 02:03:18 PM PST 24 3140073936 ps
T1198 /workspace/coverage/default/1.chip_sw_otbn_randomness.2976247626 Jan 10 01:56:11 PM PST 24 Jan 10 02:05:03 PM PST 24 6010245780 ps
T1199 /workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3917238595 Jan 10 02:03:29 PM PST 24 Jan 10 02:07:24 PM PST 24 2629149808 ps
T1200 /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.1355095961 Jan 10 02:01:29 PM PST 24 Jan 10 02:05:58 PM PST 24 3158875819 ps
T713 /workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.2081830164 Jan 10 02:06:29 PM PST 24 Jan 10 02:11:13 PM PST 24 3699916148 ps
T700 /workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.1251258751 Jan 10 02:10:33 PM PST 24 Jan 10 02:15:44 PM PST 24 3650477274 ps
T1201 /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1912228861 Jan 10 02:02:14 PM PST 24 Jan 10 02:14:53 PM PST 24 5098531200 ps
T1202 /workspace/coverage/default/1.chip_sw_spi_device_tpm.2565923794 Jan 10 01:55:06 PM PST 24 Jan 10 02:01:45 PM PST 24 3212695886 ps
T1203 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.2325844078 Jan 10 01:58:37 PM PST 24 Jan 10 02:41:34 PM PST 24 11634102136 ps
T1204 /workspace/coverage/default/5.chip_sw_uart_rand_baudrate.3638074538 Jan 10 02:01:41 PM PST 24 Jan 10 02:12:46 PM PST 24 4764260150 ps
T1205 /workspace/coverage/default/0.chip_sw_aes_enc.4191371317 Jan 10 01:57:53 PM PST 24 Jan 10 02:00:53 PM PST 24 2584360488 ps
T1206 /workspace/coverage/default/0.rom_volatile_raw_unlock.2059570620 Jan 10 01:57:45 PM PST 24 Jan 10 02:21:56 PM PST 24 9100987035 ps
T218 /workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.673799477 Jan 10 01:58:27 PM PST 24 Jan 10 02:09:55 PM PST 24 5430675574 ps
T620 /workspace/coverage/default/1.chip_tap_straps_dev.2151738416 Jan 10 01:56:57 PM PST 24 Jan 10 02:15:40 PM PST 24 11871003934 ps
T612 /workspace/coverage/default/1.chip_sw_edn_boot_mode.996838521 Jan 10 01:57:14 PM PST 24 Jan 10 02:07:26 PM PST 24 2934821256 ps
T1207 /workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.3412850532 Jan 10 01:54:53 PM PST 24 Jan 10 02:15:36 PM PST 24 7264711864 ps
T1208 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.918382291 Jan 10 02:00:34 PM PST 24 Jan 10 02:09:11 PM PST 24 3707578104 ps
T1209 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.1381655537 Jan 10 01:55:38 PM PST 24 Jan 10 02:20:49 PM PST 24 21156525300 ps
T1210 /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3395307309 Jan 10 01:55:03 PM PST 24 Jan 10 02:00:10 PM PST 24 3865340580 ps
T1211 /workspace/coverage/default/84.chip_sw_all_escalation_resets.4203565777 Jan 10 02:06:54 PM PST 24 Jan 10 02:17:19 PM PST 24 6250537236 ps
T1212 /workspace/coverage/default/1.chip_sw_rstmgr_sw_req.2505473342 Jan 10 01:55:55 PM PST 24 Jan 10 02:02:44 PM PST 24 3973146000 ps
T1213 /workspace/coverage/default/0.chip_sw_otbn_smoketest.207265713 Jan 10 01:59:27 PM PST 24 Jan 10 02:26:43 PM PST 24 9494820716 ps
T1214 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.22384789 Jan 10 01:55:55 PM PST 24 Jan 10 02:20:43 PM PST 24 23594359704 ps
T260 /workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3696733799 Jan 10 01:56:45 PM PST 24 Jan 10 02:03:23 PM PST 24 4122103444 ps
T1215 /workspace/coverage/default/0.chip_sw_kmac_entropy.552324334 Jan 10 01:54:19 PM PST 24 Jan 10 01:58:49 PM PST 24 2277340280 ps
T1216 /workspace/coverage/default/2.chip_sw_otbn_mem_scramble.222993116 Jan 10 01:58:31 PM PST 24 Jan 10 02:05:15 PM PST 24 4294723816 ps
T716 /workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.3980645318 Jan 10 02:07:28 PM PST 24 Jan 10 02:14:16 PM PST 24 3979725892 ps
T1217 /workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1736197689 Jan 10 01:59:56 PM PST 24 Jan 10 02:10:08 PM PST 24 6076670232 ps
T267 /workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.822394573 Jan 10 02:04:09 PM PST 24 Jan 10 02:12:08 PM PST 24 6135871514 ps
T733 /workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.2238642103 Jan 10 02:01:34 PM PST 24 Jan 10 02:07:11 PM PST 24 3352187082 ps
T618 /workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.317087627 Jan 10 01:59:34 PM PST 24 Jan 10 02:07:51 PM PST 24 5064414098 ps
T1218 /workspace/coverage/default/0.chip_sw_spi_device_tx_rx.3764398443 Jan 10 01:53:13 PM PST 24 Jan 10 01:58:56 PM PST 24 3283778424 ps
T1219 /workspace/coverage/default/0.chip_tap_straps_testunlock0.3351095085 Jan 10 01:56:19 PM PST 24 Jan 10 02:06:42 PM PST 24 6910159532 ps
T1220 /workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.2403804662 Jan 10 01:55:15 PM PST 24 Jan 10 02:05:44 PM PST 24 4827621692 ps
T1221 /workspace/coverage/default/71.chip_sw_all_escalation_resets.3423183961 Jan 10 02:06:12 PM PST 24 Jan 10 02:15:18 PM PST 24 5714738712 ps
T1222 /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1622676167 Jan 10 01:58:50 PM PST 24 Jan 10 02:21:42 PM PST 24 17577542052 ps
T1223 /workspace/coverage/default/2.chip_sw_clkmgr_smoketest.326232118 Jan 10 02:00:00 PM PST 24 Jan 10 02:03:33 PM PST 24 2992501980 ps
T1224 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.289967835 Jan 10 01:55:51 PM PST 24 Jan 10 02:06:17 PM PST 24 4840416360 ps
T1225 /workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3409800566 Jan 10 02:00:16 PM PST 24 Jan 10 02:07:15 PM PST 24 3078816952 ps
T1226 /workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.2442388856 Jan 10 02:00:17 PM PST 24 Jan 10 02:04:51 PM PST 24 2645792679 ps
T1227 /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.161161828 Jan 10 01:59:11 PM PST 24 Jan 10 02:03:37 PM PST 24 2918691944 ps
T1228 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.4148083070 Jan 10 01:59:23 PM PST 24 Jan 10 02:26:55 PM PST 24 9107475900 ps
T691 /workspace/coverage/default/66.chip_sw_all_escalation_resets.905887909 Jan 10 02:05:38 PM PST 24 Jan 10 02:13:21 PM PST 24 5896910380 ps
T1229 /workspace/coverage/default/1.chip_sw_rstmgr_smoketest.4141641576 Jan 10 01:56:57 PM PST 24 Jan 10 02:00:17 PM PST 24 2674138526 ps
T1230 /workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2528480836 Jan 10 02:04:11 PM PST 24 Jan 10 02:08:52 PM PST 24 4577295666 ps
T621 /workspace/coverage/default/4.chip_tap_straps_dev.2063856068 Jan 10 02:05:20 PM PST 24 Jan 10 02:23:27 PM PST 24 11107537723 ps
T741 /workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1546743156 Jan 10 02:04:26 PM PST 24 Jan 10 02:10:21 PM PST 24 4265889014 ps
T750 /workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.758803092 Jan 10 02:08:12 PM PST 24 Jan 10 02:13:53 PM PST 24 3815691036 ps
T363 /workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.3908325752 Jan 10 01:53:35 PM PST 24 Jan 10 02:02:42 PM PST 24 4653013685 ps
T1231 /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.1748009362 Jan 10 02:05:23 PM PST 24 Jan 10 02:09:08 PM PST 24 2998921788 ps
T1232 /workspace/coverage/default/0.rom_e2e_shutdown_exception_c.4013661195 Jan 10 02:03:27 PM PST 24 Jan 10 02:31:53 PM PST 24 9137062642 ps
T185 /workspace/coverage/default/1.chip_sw_entropy_src_csrng.3975163593 Jan 10 01:56:42 PM PST 24 Jan 10 02:20:32 PM PST 24 7862627922 ps
T1233 /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.518262479 Jan 10 01:57:25 PM PST 24 Jan 10 02:50:29 PM PST 24 23873623664 ps
T1234 /workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.2951450747 Jan 10 02:04:44 PM PST 24 Jan 10 02:09:55 PM PST 24 3076254112 ps
T1235 /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3014837406 Jan 10 01:53:50 PM PST 24 Jan 10 02:39:26 PM PST 24 32148419588 ps
T263 /workspace/coverage/default/2.chip_sw_alert_handler_entropy.1967305423 Jan 10 01:59:59 PM PST 24 Jan 10 02:05:36 PM PST 24 3375359158 ps
T692 /workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2052508595 Jan 10 02:05:42 PM PST 24 Jan 10 02:10:58 PM PST 24 4401990010 ps
T13 /workspace/coverage/default/0.chip_jtag_csr_rw.3788736566 Jan 10 01:47:21 PM PST 24 Jan 10 02:28:28 PM PST 24 21624500696 ps
T332 /workspace/coverage/default/0.chip_sw_clkmgr_jitter.3361719537 Jan 10 01:53:27 PM PST 24 Jan 10 01:57:53 PM PST 24 2645894053 ps
T174 /workspace/coverage/default/2.chip_sw_gpio.651668047 Jan 10 01:57:30 PM PST 24 Jan 10 02:04:53 PM PST 24 3363676387 ps
T333 /workspace/coverage/default/3.chip_tap_straps_testunlock0.1686839752 Jan 10 02:00:02 PM PST 24 Jan 10 02:04:47 PM PST 24 4417898618 ps
T334 /workspace/coverage/default/10.chip_sw_all_escalation_resets.3615599509 Jan 10 02:01:59 PM PST 24 Jan 10 02:09:39 PM PST 24 4432153124 ps
T335 /workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.2825677295 Jan 10 01:56:38 PM PST 24 Jan 10 02:13:45 PM PST 24 9283537180 ps
T336 /workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2552652508 Jan 10 02:00:06 PM PST 24 Jan 10 02:07:53 PM PST 24 3861722336 ps
T1236 /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3213969553 Jan 10 01:53:31 PM PST 24 Jan 10 02:01:45 PM PST 24 5234560752 ps
T1237 /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.2381494924 Jan 10 01:54:20 PM PST 24 Jan 10 02:11:17 PM PST 24 5411816755 ps
T261 /workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.716459507 Jan 10 01:58:09 PM PST 24 Jan 10 02:05:52 PM PST 24 4133678440 ps
T17 /workspace/coverage/default/2.chip_sw_sleep_pin_retention.2392506227 Jan 10 01:58:43 PM PST 24 Jan 10 02:04:53 PM PST 24 3813149964 ps
T1238 /workspace/coverage/default/1.rom_e2e_shutdown_exception_c.485456702 Jan 10 02:01:08 PM PST 24 Jan 10 02:25:04 PM PST 24 8556911067 ps
T1239 /workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3805383689 Jan 10 01:56:32 PM PST 24 Jan 10 02:02:05 PM PST 24 3144936035 ps
T1240 /workspace/coverage/default/33.chip_sw_all_escalation_resets.300856584 Jan 10 02:10:06 PM PST 24 Jan 10 02:20:46 PM PST 24 4682632964 ps
T1241 /workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.3898320874 Jan 10 01:56:08 PM PST 24 Jan 10 02:03:27 PM PST 24 5961616870 ps
T1242 /workspace/coverage/default/0.rom_e2e_smoke.628678369 Jan 10 01:59:56 PM PST 24 Jan 10 02:31:50 PM PST 24 8561855134 ps
T1243 /workspace/coverage/default/0.chip_sw_power_sleep_load.2510556464 Jan 10 01:58:40 PM PST 24 Jan 10 02:05:57 PM PST 24 3820117280 ps
T1244 /workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2597088192 Jan 10 01:58:08 PM PST 24 Jan 10 02:57:01 PM PST 24 23478508736 ps
T1245 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1108387817 Jan 10 01:55:26 PM PST 24 Jan 10 02:02:40 PM PST 24 4320654242 ps
T1246 /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.138673950 Jan 10 01:55:22 PM PST 24 Jan 10 02:05:34 PM PST 24 5121471890 ps
T1247 /workspace/coverage/default/54.chip_sw_all_escalation_resets.932199917 Jan 10 02:06:15 PM PST 24 Jan 10 02:15:26 PM PST 24 5340668980 ps
T1248 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1629085254 Jan 10 02:00:34 PM PST 24 Jan 10 02:11:23 PM PST 24 5353521710 ps
T1249 /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3369041177 Jan 10 01:59:19 PM PST 24 Jan 10 02:52:57 PM PST 24 24258619716 ps
T1250 /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.1869558142 Jan 10 02:01:17 PM PST 24 Jan 10 02:05:56 PM PST 24 2995023808 ps
T642 /workspace/coverage/default/6.chip_sw_all_escalation_resets.138825366 Jan 10 02:01:38 PM PST 24 Jan 10 02:10:52 PM PST 24 5097925588 ps
T1251 /workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.870025392 Jan 10 01:59:21 PM PST 24 Jan 10 02:04:36 PM PST 24 3319378420 ps
T1252 /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1833337371 Jan 10 02:05:56 PM PST 24 Jan 10 02:18:24 PM PST 24 5630126231 ps
T714 /workspace/coverage/default/3.chip_sw_all_escalation_resets.499713755 Jan 10 02:04:40 PM PST 24 Jan 10 02:16:09 PM PST 24 4951272840 ps
T1253 /workspace/coverage/default/2.chip_sw_ast_clk_outputs.487206720 Jan 10 01:58:57 PM PST 24 Jan 10 02:12:08 PM PST 24 8005195042 ps
T1254 /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.462045554 Jan 10 01:59:31 PM PST 24 Jan 10 02:10:17 PM PST 24 8424147180 ps
T1255 /workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1435845758 Jan 10 02:03:52 PM PST 24 Jan 10 02:29:40 PM PST 24 10945968952 ps
T54 /workspace/coverage/default/0.chip_sw_usbdev_pincfg.3771312198 Jan 10 01:57:07 PM PST 24 Jan 10 03:41:13 PM PST 24 31637878200 ps
T1256 /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.895278657 Jan 10 01:55:37 PM PST 24 Jan 10 02:02:14 PM PST 24 2835176614 ps
T1257 /workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.434694927 Jan 10 02:02:53 PM PST 24 Jan 10 02:24:47 PM PST 24 6794736197 ps
T1258 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.861909109 Jan 10 01:53:46 PM PST 24 Jan 10 02:03:46 PM PST 24 4479667880 ps
T1259 /workspace/coverage/default/2.chip_sw_hmac_enc.3846190235 Jan 10 02:00:30 PM PST 24 Jan 10 02:04:54 PM PST 24 3008657246 ps
T1260 /workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.2124455624 Jan 10 02:01:18 PM PST 24 Jan 10 02:08:49 PM PST 24 3728762220 ps
T1261 /workspace/coverage/default/22.chip_sw_all_escalation_resets.1592218820 Jan 10 02:02:48 PM PST 24 Jan 10 02:14:43 PM PST 24 4978636792 ps
T1262 /workspace/coverage/default/2.chip_sw_entropy_src_fuse_en_fw_read_test.3734917758 Jan 10 01:59:45 PM PST 24 Jan 10 02:07:31 PM PST 24 4355720270 ps
T1263 /workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.779014697 Jan 10 01:57:00 PM PST 24 Jan 10 02:06:30 PM PST 24 5159705940 ps
T1264 /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.1122376560 Jan 10 01:56:03 PM PST 24 Jan 10 02:09:38 PM PST 24 5342388260 ps
T1265 /workspace/coverage/default/1.chip_sw_flash_crash_alert.3487918110 Jan 10 01:58:19 PM PST 24 Jan 10 02:07:30 PM PST 24 5266606150 ps
T1266 /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.2608236365 Jan 10 01:53:25 PM PST 24 Jan 10 01:57:07 PM PST 24 3049233674 ps
T722 /workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.669255902 Jan 10 02:08:00 PM PST 24 Jan 10 02:14:30 PM PST 24 4050049508 ps
T682 /workspace/coverage/default/30.chip_sw_all_escalation_resets.2187694829 Jan 10 02:10:34 PM PST 24 Jan 10 02:20:11 PM PST 24 4936775970 ps
T746 /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1697380657 Jan 10 02:06:58 PM PST 24 Jan 10 02:12:22 PM PST 24 4045882056 ps
T747 /workspace/coverage/default/29.chip_sw_all_escalation_resets.1505819286 Jan 10 02:03:10 PM PST 24 Jan 10 02:14:44 PM PST 24 6060623932 ps
T1267 /workspace/coverage/default/4.chip_tap_straps_testunlock0.2047990813 Jan 10 02:01:49 PM PST 24 Jan 10 02:20:05 PM PST 24 10151029704 ps
T1268 /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1956509874 Jan 10 01:57:49 PM PST 24 Jan 10 02:05:50 PM PST 24 3602880548 ps
T1269 /workspace/coverage/default/9.chip_sw_lc_ctrl_transition.2247481194 Jan 10 02:01:40 PM PST 24 Jan 10 02:17:44 PM PST 24 10145126819 ps
T1270 /workspace/coverage/default/2.chip_sw_flash_ctrl_access.1012942621 Jan 10 02:03:44 PM PST 24 Jan 10 02:21:21 PM PST 24 5673893452 ps
T1271 /workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1209888653 Jan 10 02:01:58 PM PST 24 Jan 10 02:11:03 PM PST 24 3912441972 ps
T370 /workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2885808607 Jan 10 01:54:57 PM PST 24 Jan 10 02:54:48 PM PST 24 16135325800 ps
T729 /workspace/coverage/default/34.chip_sw_all_escalation_resets.3281037074 Jan 10 02:09:59 PM PST 24 Jan 10 02:19:11 PM PST 24 6304688440 ps
T1272 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2085042977 Jan 10 01:56:08 PM PST 24 Jan 10 02:05:08 PM PST 24 4387794120 ps
T292 /workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.3679330070 Jan 10 01:55:59 PM PST 24 Jan 10 02:05:23 PM PST 24 8742042328 ps
T1273 /workspace/coverage/default/1.chip_sw_data_integrity_escalation.1323306705 Jan 10 02:03:05 PM PST 24 Jan 10 02:13:45 PM PST 24 5483082486 ps
T1274 /workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1484761787 Jan 10 01:56:32 PM PST 24 Jan 10 02:06:35 PM PST 24 19859579636 ps
T1275 /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.844314420 Jan 10 01:58:50 PM PST 24 Jan 10 02:03:04 PM PST 24 2536828920 ps
T1276 /workspace/coverage/default/2.chip_jtag_mem_access.1227118337 Jan 10 01:52:12 PM PST 24 Jan 10 02:13:42 PM PST 24 13814022522 ps
T1277 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.700973973 Jan 10 02:00:40 PM PST 24 Jan 10 02:27:55 PM PST 24 8293123736 ps
T1278 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.4069274118 Jan 10 01:59:38 PM PST 24 Jan 10 02:33:26 PM PST 24 10156803664 ps
T194 /workspace/coverage/default/0.chip_sw_gpio.320893614 Jan 10 01:53:50 PM PST 24 Jan 10 02:00:27 PM PST 24 3480549061 ps
T757 /workspace/coverage/default/81.chip_sw_all_escalation_resets.1123324651 Jan 10 02:06:35 PM PST 24 Jan 10 02:17:15 PM PST 24 4880433484 ps
T1279 /workspace/coverage/default/1.chip_sw_example_concurrency.1769556900 Jan 10 01:59:29 PM PST 24 Jan 10 02:04:50 PM PST 24 3285299610 ps
T1280 /workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3852327294 Jan 10 02:06:14 PM PST 24 Jan 10 02:21:13 PM PST 24 6039191322 ps
T1281 /workspace/coverage/default/1.chip_sival_flash_info_access.4213672527 Jan 10 02:03:08 PM PST 24 Jan 10 02:12:25 PM PST 24 3678279846 ps
T1282 /workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1129091601 Jan 10 01:56:38 PM PST 24 Jan 10 02:12:03 PM PST 24 5231010800 ps
T1283 /workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1925839354 Jan 10 01:59:17 PM PST 24 Jan 10 04:52:23 PM PST 24 255018768262 ps
T723 /workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.2076807283 Jan 10 02:02:36 PM PST 24 Jan 10 02:08:48 PM PST 24 3751975250 ps
T1284 /workspace/coverage/default/2.chip_sw_rv_plic_smoketest.4247984158 Jan 10 02:04:21 PM PST 24 Jan 10 02:09:22 PM PST 24 2795696626 ps
T1285 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.2393232699 Jan 10 01:59:17 PM PST 24 Jan 10 02:14:52 PM PST 24 9320521322 ps
T705 /workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.3407012107 Jan 10 02:06:01 PM PST 24 Jan 10 02:11:13 PM PST 24 3554479160 ps
T1286 /workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1739472392 Jan 10 02:00:44 PM PST 24 Jan 10 02:14:59 PM PST 24 7429803041 ps
T1287 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.2149430765 Jan 10 01:59:18 PM PST 24 Jan 10 02:23:21 PM PST 24 8796509386 ps
T350 /workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.4127300242 Jan 10 01:59:51 PM PST 24 Jan 10 02:06:48 PM PST 24 4734667816 ps
T1288 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.363628811 Jan 10 01:59:32 PM PST 24 Jan 10 02:20:53 PM PST 24 6871223930 ps
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