| T1289 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.1131370338 |
|
|
Jan 10 01:54:20 PM PST 24 |
Jan 10 02:01:56 PM PST 24 |
4351805600 ps |
| T1290 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2157289589 |
|
|
Jan 10 02:06:42 PM PST 24 |
Jan 10 02:12:27 PM PST 24 |
3558157188 ps |
| T708 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1305619639 |
|
|
Jan 10 02:05:35 PM PST 24 |
Jan 10 02:12:49 PM PST 24 |
5378528642 ps |
| T1291 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.3069166605 |
|
|
Jan 10 02:00:54 PM PST 24 |
Jan 10 02:28:07 PM PST 24 |
8887969238 ps |
| T1292 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.846897967 |
|
|
Jan 10 02:01:30 PM PST 24 |
Jan 10 02:06:44 PM PST 24 |
3253848410 ps |
| T1293 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.2718519503 |
|
|
Jan 10 02:00:34 PM PST 24 |
Jan 10 02:32:56 PM PST 24 |
12665247138 ps |
| T1294 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1366493839 |
|
|
Jan 10 01:59:05 PM PST 24 |
Jan 10 02:05:18 PM PST 24 |
4114785928 ps |
| T1295 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.2077115620 |
|
|
Jan 10 01:59:54 PM PST 24 |
Jan 10 02:20:07 PM PST 24 |
7565167014 ps |
| T1296 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.707018085 |
|
|
Jan 10 02:06:05 PM PST 24 |
Jan 10 02:17:02 PM PST 24 |
6676034080 ps |
| T1297 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.463876234 |
|
|
Jan 10 01:54:08 PM PST 24 |
Jan 10 02:11:59 PM PST 24 |
6762479832 ps |
| T1298 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.3342840444 |
|
|
Jan 10 02:05:01 PM PST 24 |
Jan 10 02:32:37 PM PST 24 |
8621682365 ps |
| T1299 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.3713660741 |
|
|
Jan 10 01:55:36 PM PST 24 |
Jan 10 02:16:06 PM PST 24 |
7010255746 ps |
| T1300 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.1442357737 |
|
|
Jan 10 02:03:32 PM PST 24 |
Jan 10 02:34:33 PM PST 24 |
8927407740 ps |
| T1301 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.3569496747 |
|
|
Jan 10 01:59:17 PM PST 24 |
Jan 10 02:26:57 PM PST 24 |
8232574076 ps |
| T1302 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.746924053 |
|
|
Jan 10 01:59:54 PM PST 24 |
Jan 10 02:12:58 PM PST 24 |
5756417030 ps |
| T1303 |
/workspace/coverage/default/4.chip_tap_straps_rma.1690515688 |
|
|
Jan 10 02:00:42 PM PST 24 |
Jan 10 02:08:17 PM PST 24 |
4827050957 ps |
| T1304 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3568838698 |
|
|
Jan 10 02:05:41 PM PST 24 |
Jan 10 02:11:45 PM PST 24 |
4705556678 ps |
| T1305 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.2662462952 |
|
|
Jan 10 02:04:54 PM PST 24 |
Jan 10 02:09:29 PM PST 24 |
3133278580 ps |
| T1306 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3631050121 |
|
|
Jan 10 02:01:05 PM PST 24 |
Jan 10 02:07:08 PM PST 24 |
3989172420 ps |
| T1307 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.3379902643 |
|
|
Jan 10 01:55:51 PM PST 24 |
Jan 10 02:08:58 PM PST 24 |
9665930060 ps |
| T238 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.2138631329 |
|
|
Jan 10 01:57:12 PM PST 24 |
Jan 10 02:02:38 PM PST 24 |
3427239920 ps |
| T1308 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.3757331531 |
|
|
Jan 10 01:56:45 PM PST 24 |
Jan 10 02:18:08 PM PST 24 |
12161173600 ps |
| T1309 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4151037947 |
|
|
Jan 10 02:00:59 PM PST 24 |
Jan 10 02:10:37 PM PST 24 |
5387064494 ps |
| T1310 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.3132529637 |
|
|
Jan 10 01:55:40 PM PST 24 |
Jan 10 02:07:30 PM PST 24 |
8135465040 ps |
| T1311 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.780787666 |
|
|
Jan 10 01:54:22 PM PST 24 |
Jan 10 02:00:45 PM PST 24 |
3238778858 ps |
| T537 |
/workspace/coverage/cover_reg_top/35.xbar_stress_all_with_error.1911796149 |
|
|
Jan 10 01:39:51 PM PST 24 |
Jan 10 01:44:09 PM PST 24 |
3472571972 ps |
| T408 |
/workspace/coverage/cover_reg_top/80.xbar_stress_all.191607960 |
|
|
Jan 10 01:44:29 PM PST 24 |
Jan 10 01:55:47 PM PST 24 |
16698169945 ps |
| T506 |
/workspace/coverage/cover_reg_top/47.xbar_random_large_delays.3553286653 |
|
|
Jan 10 01:40:27 PM PST 24 |
Jan 10 01:59:47 PM PST 24 |
101481173193 ps |
| T546 |
/workspace/coverage/cover_reg_top/24.xbar_unmapped_addr.815272435 |
|
|
Jan 10 01:37:52 PM PST 24 |
Jan 10 01:38:48 PM PST 24 |
1364273415 ps |
| T571 |
/workspace/coverage/cover_reg_top/10.xbar_stress_all.364103211 |
|
|
Jan 10 01:36:43 PM PST 24 |
Jan 10 01:37:33 PM PST 24 |
734281177 ps |
| T552 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.4017089373 |
|
|
Jan 10 01:41:17 PM PST 24 |
Jan 10 01:47:54 PM PST 24 |
2161450864 ps |
| T803 |
/workspace/coverage/cover_reg_top/75.xbar_stress_all_with_rand_reset.2860846726 |
|
|
Jan 10 01:43:59 PM PST 24 |
Jan 10 01:45:06 PM PST 24 |
191951306 ps |
| T547 |
/workspace/coverage/cover_reg_top/93.xbar_stress_all.2057346154 |
|
|
Jan 10 01:45:57 PM PST 24 |
Jan 10 01:47:11 PM PST 24 |
1811791425 ps |
| T476 |
/workspace/coverage/cover_reg_top/95.xbar_same_source.1695172193 |
|
|
Jan 10 01:45:56 PM PST 24 |
Jan 10 01:46:34 PM PST 24 |
547673156 ps |
| T1312 |
/workspace/coverage/cover_reg_top/27.xbar_random_slow_rsp.3982390340 |
|
|
Jan 10 01:38:14 PM PST 24 |
Jan 10 01:41:38 PM PST 24 |
13070343917 ps |
| T295 |
/workspace/coverage/cover_reg_top/2.chip_csr_aliasing.626736145 |
|
|
Jan 10 01:35:43 PM PST 24 |
Jan 10 04:19:21 PM PST 24 |
57943792177 ps |
| T536 |
/workspace/coverage/cover_reg_top/26.xbar_same_source.3112658263 |
|
|
Jan 10 01:38:09 PM PST 24 |
Jan 10 01:38:50 PM PST 24 |
1334781874 ps |
| T490 |
/workspace/coverage/cover_reg_top/63.xbar_random.821924840 |
|
|
Jan 10 01:42:45 PM PST 24 |
Jan 10 01:43:11 PM PST 24 |
259481881 ps |
| T1313 |
/workspace/coverage/cover_reg_top/77.xbar_smoke_large_delays.2286881249 |
|
|
Jan 10 01:43:58 PM PST 24 |
Jan 10 01:45:30 PM PST 24 |
9152438936 ps |
| T549 |
/workspace/coverage/cover_reg_top/92.xbar_same_source.2959352177 |
|
|
Jan 10 01:45:53 PM PST 24 |
Jan 10 01:46:12 PM PST 24 |
483317535 ps |
| T431 |
/workspace/coverage/cover_reg_top/18.xbar_stress_all.74009067 |
|
|
Jan 10 01:37:36 PM PST 24 |
Jan 10 01:40:44 PM PST 24 |
2511345771 ps |
| T597 |
/workspace/coverage/cover_reg_top/13.chip_csr_mem_rw_with_rand_reset.878325676 |
|
|
Jan 10 01:37:15 PM PST 24 |
Jan 10 01:40:51 PM PST 24 |
6140999075 ps |
| T1314 |
/workspace/coverage/cover_reg_top/60.xbar_smoke_slow_rsp.4149807243 |
|
|
Jan 10 01:42:49 PM PST 24 |
Jan 10 01:44:43 PM PST 24 |
6693141172 ps |
| T1315 |
/workspace/coverage/cover_reg_top/51.xbar_stress_all_with_error.2424194250 |
|
|
Jan 10 01:41:16 PM PST 24 |
Jan 10 01:42:09 PM PST 24 |
487041661 ps |
| T772 |
/workspace/coverage/cover_reg_top/51.xbar_access_same_device_slow_rsp.4281861438 |
|
|
Jan 10 01:41:18 PM PST 24 |
Jan 10 02:06:28 PM PST 24 |
83647052423 ps |
| T485 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all_with_rand_reset.2327716547 |
|
|
Jan 10 01:40:29 PM PST 24 |
Jan 10 01:45:56 PM PST 24 |
2342679262 ps |
| T417 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all_with_error.2541071221 |
|
|
Jan 10 01:42:47 PM PST 24 |
Jan 10 01:50:39 PM PST 24 |
13171063882 ps |
| T1316 |
/workspace/coverage/cover_reg_top/79.xbar_error_random.2775647867 |
|
|
Jan 10 01:44:40 PM PST 24 |
Jan 10 01:45:13 PM PST 24 |
971732511 ps |
| T501 |
/workspace/coverage/cover_reg_top/43.xbar_smoke_zero_delays.1999576168 |
|
|
Jan 10 01:40:37 PM PST 24 |
Jan 10 01:40:48 PM PST 24 |
52314697 ps |
| T462 |
/workspace/coverage/cover_reg_top/87.xbar_random_slow_rsp.2894252788 |
|
|
Jan 10 01:45:08 PM PST 24 |
Jan 10 02:03:45 PM PST 24 |
62564316291 ps |
| T1317 |
/workspace/coverage/cover_reg_top/10.xbar_smoke.566562402 |
|
|
Jan 10 01:36:35 PM PST 24 |
Jan 10 01:36:45 PM PST 24 |
187472284 ps |
| T1318 |
/workspace/coverage/cover_reg_top/20.xbar_smoke_large_delays.1233421825 |
|
|
Jan 10 01:37:48 PM PST 24 |
Jan 10 01:39:30 PM PST 24 |
9796741064 ps |
| T589 |
/workspace/coverage/cover_reg_top/79.xbar_stress_all_with_rand_reset.3861339409 |
|
|
Jan 10 01:44:16 PM PST 24 |
Jan 10 01:48:49 PM PST 24 |
797511413 ps |
| T1319 |
/workspace/coverage/cover_reg_top/98.xbar_error_random.894827356 |
|
|
Jan 10 01:46:04 PM PST 24 |
Jan 10 01:47:21 PM PST 24 |
1579964143 ps |
| T535 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.4270207090 |
|
|
Jan 10 01:38:21 PM PST 24 |
Jan 10 01:44:06 PM PST 24 |
2940519314 ps |
| T514 |
/workspace/coverage/cover_reg_top/35.xbar_unmapped_addr.2033205503 |
|
|
Jan 10 01:40:08 PM PST 24 |
Jan 10 01:40:25 PM PST 24 |
277769659 ps |
| T788 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_error.782046669 |
|
|
Jan 10 01:37:50 PM PST 24 |
Jan 10 01:43:48 PM PST 24 |
10386161271 ps |
| T461 |
/workspace/coverage/cover_reg_top/24.xbar_random_zero_delays.332810069 |
|
|
Jan 10 01:38:04 PM PST 24 |
Jan 10 01:38:48 PM PST 24 |
434543500 ps |
| T405 |
/workspace/coverage/cover_reg_top/62.xbar_stress_all.871420143 |
|
|
Jan 10 01:42:50 PM PST 24 |
Jan 10 01:46:38 PM PST 24 |
2869618468 ps |
| T507 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all_with_rand_reset.1120621765 |
|
|
Jan 10 01:38:54 PM PST 24 |
Jan 10 01:44:54 PM PST 24 |
973369287 ps |
| T321 |
/workspace/coverage/cover_reg_top/12.chip_tl_errors.261177697 |
|
|
Jan 10 01:36:47 PM PST 24 |
Jan 10 01:41:40 PM PST 24 |
4304235408 ps |
| T1320 |
/workspace/coverage/cover_reg_top/51.xbar_random.2813801975 |
|
|
Jan 10 01:41:17 PM PST 24 |
Jan 10 01:42:27 PM PST 24 |
1626047026 ps |
| T593 |
/workspace/coverage/cover_reg_top/51.xbar_random_large_delays.1324441023 |
|
|
Jan 10 01:41:16 PM PST 24 |
Jan 10 01:42:34 PM PST 24 |
6450295717 ps |
| T792 |
/workspace/coverage/cover_reg_top/85.xbar_access_same_device.2932189552 |
|
|
Jan 10 01:44:53 PM PST 24 |
Jan 10 01:45:37 PM PST 24 |
445720242 ps |
| T769 |
/workspace/coverage/cover_reg_top/30.xbar_access_same_device_slow_rsp.1627726438 |
|
|
Jan 10 01:38:21 PM PST 24 |
Jan 10 01:50:18 PM PST 24 |
41313180650 ps |
| T463 |
/workspace/coverage/cover_reg_top/74.xbar_same_source.3612603315 |
|
|
Jan 10 01:43:45 PM PST 24 |
Jan 10 01:44:14 PM PST 24 |
352793853 ps |
| T798 |
/workspace/coverage/cover_reg_top/49.xbar_access_same_device.701552983 |
|
|
Jan 10 01:41:01 PM PST 24 |
Jan 10 01:41:33 PM PST 24 |
314896211 ps |
| T1321 |
/workspace/coverage/cover_reg_top/29.xbar_error_and_unmapped_addr.1463718440 |
|
|
Jan 10 01:38:13 PM PST 24 |
Jan 10 01:38:25 PM PST 24 |
38231215 ps |
| T1322 |
/workspace/coverage/cover_reg_top/16.xbar_smoke.3072360854 |
|
|
Jan 10 01:37:34 PM PST 24 |
Jan 10 01:37:52 PM PST 24 |
197541615 ps |
| T1323 |
/workspace/coverage/cover_reg_top/51.xbar_smoke_large_delays.173538586 |
|
|
Jan 10 01:41:15 PM PST 24 |
Jan 10 01:42:48 PM PST 24 |
7068706068 ps |
| T573 |
/workspace/coverage/cover_reg_top/3.xbar_same_source.1062631837 |
|
|
Jan 10 01:35:56 PM PST 24 |
Jan 10 01:36:21 PM PST 24 |
161092769 ps |
| T770 |
/workspace/coverage/cover_reg_top/14.xbar_stress_all_with_error.2316311804 |
|
|
Jan 10 01:37:58 PM PST 24 |
Jan 10 01:45:08 PM PST 24 |
11129389302 ps |
| T1324 |
/workspace/coverage/cover_reg_top/35.xbar_random_slow_rsp.2599457336 |
|
|
Jan 10 01:38:59 PM PST 24 |
Jan 10 01:44:40 PM PST 24 |
17964079738 ps |
| T458 |
/workspace/coverage/cover_reg_top/46.xbar_random_zero_delays.3807022958 |
|
|
Jan 10 01:40:34 PM PST 24 |
Jan 10 01:41:25 PM PST 24 |
533982912 ps |
| T432 |
/workspace/coverage/cover_reg_top/53.xbar_random.3166949935 |
|
|
Jan 10 01:42:23 PM PST 24 |
Jan 10 01:43:41 PM PST 24 |
1943771416 ps |
| T775 |
/workspace/coverage/cover_reg_top/64.xbar_stress_all_with_error.2756611858 |
|
|
Jan 10 01:43:07 PM PST 24 |
Jan 10 01:53:13 PM PST 24 |
17615766143 ps |
| T1325 |
/workspace/coverage/cover_reg_top/75.xbar_error_random.1664003286 |
|
|
Jan 10 01:43:51 PM PST 24 |
Jan 10 01:44:44 PM PST 24 |
1656954653 ps |
| T486 |
/workspace/coverage/cover_reg_top/59.xbar_smoke_zero_delays.3804539645 |
|
|
Jan 10 01:42:46 PM PST 24 |
Jan 10 01:42:54 PM PST 24 |
48244785 ps |
| T781 |
/workspace/coverage/cover_reg_top/32.xbar_access_same_device_slow_rsp.959780227 |
|
|
Jan 10 01:38:55 PM PST 24 |
Jan 10 01:57:59 PM PST 24 |
62592339243 ps |
| T1326 |
/workspace/coverage/cover_reg_top/61.xbar_smoke_slow_rsp.668617133 |
|
|
Jan 10 01:42:45 PM PST 24 |
Jan 10 01:44:15 PM PST 24 |
5555270252 ps |
| T522 |
/workspace/coverage/cover_reg_top/74.xbar_random_large_delays.2297145514 |
|
|
Jan 10 01:43:47 PM PST 24 |
Jan 10 01:45:31 PM PST 24 |
10165358011 ps |
| T556 |
/workspace/coverage/cover_reg_top/19.xbar_random_slow_rsp.3054477350 |
|
|
Jan 10 01:37:48 PM PST 24 |
Jan 10 01:45:09 PM PST 24 |
28091572059 ps |
| T1327 |
/workspace/coverage/cover_reg_top/0.xbar_random_zero_delays.1347215363 |
|
|
Jan 10 01:35:51 PM PST 24 |
Jan 10 01:36:11 PM PST 24 |
36159168 ps |
| T400 |
/workspace/coverage/cover_reg_top/25.xbar_smoke_slow_rsp.2801520583 |
|
|
Jan 10 01:38:08 PM PST 24 |
Jan 10 01:39:34 PM PST 24 |
5461112726 ps |
| T1328 |
/workspace/coverage/cover_reg_top/67.xbar_random_slow_rsp.3971660148 |
|
|
Jan 10 01:43:33 PM PST 24 |
Jan 10 01:45:33 PM PST 24 |
7193968450 ps |
| T606 |
/workspace/coverage/cover_reg_top/3.chip_tl_errors.3276074539 |
|
|
Jan 10 01:35:50 PM PST 24 |
Jan 10 01:37:39 PM PST 24 |
2549497248 ps |
| T1329 |
/workspace/coverage/cover_reg_top/63.xbar_error_and_unmapped_addr.3632798333 |
|
|
Jan 10 01:43:01 PM PST 24 |
Jan 10 01:43:26 PM PST 24 |
546883716 ps |
| T1330 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.1107695977 |
|
|
Jan 10 01:46:01 PM PST 24 |
Jan 10 01:46:19 PM PST 24 |
16668472 ps |
| T518 |
/workspace/coverage/cover_reg_top/76.xbar_same_source.1246956469 |
|
|
Jan 10 01:43:57 PM PST 24 |
Jan 10 01:44:11 PM PST 24 |
336920182 ps |
| T1331 |
/workspace/coverage/cover_reg_top/85.xbar_random_zero_delays.1961749481 |
|
|
Jan 10 01:44:46 PM PST 24 |
Jan 10 01:45:12 PM PST 24 |
199039028 ps |
| T1332 |
/workspace/coverage/cover_reg_top/17.xbar_same_source.213481804 |
|
|
Jan 10 01:38:01 PM PST 24 |
Jan 10 01:38:18 PM PST 24 |
295224522 ps |
| T568 |
/workspace/coverage/cover_reg_top/49.xbar_unmapped_addr.1136494767 |
|
|
Jan 10 01:41:01 PM PST 24 |
Jan 10 01:41:46 PM PST 24 |
1055177745 ps |
| T441 |
/workspace/coverage/cover_reg_top/36.xbar_random.1030520895 |
|
|
Jan 10 01:40:05 PM PST 24 |
Jan 10 01:40:35 PM PST 24 |
374648698 ps |
| T1333 |
/workspace/coverage/cover_reg_top/15.xbar_smoke_slow_rsp.3112109398 |
|
|
Jan 10 01:38:03 PM PST 24 |
Jan 10 01:39:44 PM PST 24 |
5744090241 ps |
| T1334 |
/workspace/coverage/cover_reg_top/24.xbar_error_and_unmapped_addr.2580589192 |
|
|
Jan 10 01:38:02 PM PST 24 |
Jan 10 01:38:43 PM PST 24 |
908712121 ps |
| T526 |
/workspace/coverage/cover_reg_top/46.xbar_smoke.4052880761 |
|
|
Jan 10 01:40:37 PM PST 24 |
Jan 10 01:40:49 PM PST 24 |
201331674 ps |
| T406 |
/workspace/coverage/cover_reg_top/58.xbar_random.2837378948 |
|
|
Jan 10 01:42:41 PM PST 24 |
Jan 10 01:43:29 PM PST 24 |
1204683692 ps |
| T1335 |
/workspace/coverage/cover_reg_top/25.xbar_error_random.2191706766 |
|
|
Jan 10 01:38:13 PM PST 24 |
Jan 10 01:38:51 PM PST 24 |
1057192768 ps |
| T446 |
/workspace/coverage/cover_reg_top/40.xbar_stress_all_with_rand_reset.3601212903 |
|
|
Jan 10 01:40:26 PM PST 24 |
Jan 10 01:46:31 PM PST 24 |
7800139444 ps |
| T793 |
/workspace/coverage/cover_reg_top/14.xbar_access_same_device_slow_rsp.3026618442 |
|
|
Jan 10 01:37:51 PM PST 24 |
Jan 10 01:38:47 PM PST 24 |
3160854704 ps |
| T531 |
/workspace/coverage/cover_reg_top/58.xbar_same_source.4067900424 |
|
|
Jan 10 01:42:46 PM PST 24 |
Jan 10 01:43:45 PM PST 24 |
2152580715 ps |
| T489 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all.107771888 |
|
|
Jan 10 01:38:13 PM PST 24 |
Jan 10 01:41:54 PM PST 24 |
6612651858 ps |
| T1336 |
/workspace/coverage/cover_reg_top/80.xbar_smoke_zero_delays.1239046697 |
|
|
Jan 10 01:44:43 PM PST 24 |
Jan 10 01:44:51 PM PST 24 |
44425188 ps |
| T804 |
/workspace/coverage/cover_reg_top/54.xbar_stress_all_with_reset_error.1279293428 |
|
|
Jan 10 01:42:44 PM PST 24 |
Jan 10 01:45:01 PM PST 24 |
239224003 ps |
| T1337 |
/workspace/coverage/cover_reg_top/42.xbar_smoke.2452292785 |
|
|
Jan 10 01:40:29 PM PST 24 |
Jan 10 01:40:39 PM PST 24 |
45763922 ps |
| T561 |
/workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.4271652683 |
|
|
Jan 10 01:43:04 PM PST 24 |
Jan 10 01:43:35 PM PST 24 |
656187454 ps |
| T504 |
/workspace/coverage/cover_reg_top/59.xbar_unmapped_addr.1699860239 |
|
|
Jan 10 01:42:48 PM PST 24 |
Jan 10 01:43:33 PM PST 24 |
1102943199 ps |
| T1338 |
/workspace/coverage/cover_reg_top/56.xbar_smoke.3991370615 |
|
|
Jan 10 01:42:13 PM PST 24 |
Jan 10 01:42:23 PM PST 24 |
169229287 ps |
| T783 |
/workspace/coverage/cover_reg_top/42.xbar_access_same_device.2684871801 |
|
|
Jan 10 01:40:30 PM PST 24 |
Jan 10 01:42:13 PM PST 24 |
2470227146 ps |
| T492 |
/workspace/coverage/cover_reg_top/81.xbar_random_slow_rsp.890292276 |
|
|
Jan 10 01:44:57 PM PST 24 |
Jan 10 02:00:31 PM PST 24 |
46860931184 ps |
| T448 |
/workspace/coverage/cover_reg_top/23.xbar_access_same_device.2918651068 |
|
|
Jan 10 01:37:56 PM PST 24 |
Jan 10 01:38:57 PM PST 24 |
710914611 ps |
| T449 |
/workspace/coverage/cover_reg_top/83.xbar_stress_all.3351001046 |
|
|
Jan 10 01:45:02 PM PST 24 |
Jan 10 01:51:29 PM PST 24 |
9017997832 ps |
| T1339 |
/workspace/coverage/cover_reg_top/7.xbar_random_large_delays.975637 |
|
|
Jan 10 01:36:27 PM PST 24 |
Jan 10 01:39:51 PM PST 24 |
17827703087 ps |
| T786 |
/workspace/coverage/cover_reg_top/7.xbar_access_same_device.2753408128 |
|
|
Jan 10 01:36:31 PM PST 24 |
Jan 10 01:37:57 PM PST 24 |
2009493225 ps |
| T1340 |
/workspace/coverage/cover_reg_top/31.xbar_smoke_slow_rsp.1611216648 |
|
|
Jan 10 01:38:23 PM PST 24 |
Jan 10 01:39:59 PM PST 24 |
5686873466 ps |
| T1341 |
/workspace/coverage/cover_reg_top/42.xbar_error_and_unmapped_addr.2856714695 |
|
|
Jan 10 01:40:32 PM PST 24 |
Jan 10 01:40:50 PM PST 24 |
243500211 ps |
| T1342 |
/workspace/coverage/cover_reg_top/82.xbar_smoke_zero_delays.282293766 |
|
|
Jan 10 01:45:09 PM PST 24 |
Jan 10 01:45:38 PM PST 24 |
42382375 ps |
| T590 |
/workspace/coverage/cover_reg_top/87.xbar_random_zero_delays.2720918702 |
|
|
Jan 10 01:44:59 PM PST 24 |
Jan 10 01:45:53 PM PST 24 |
430531309 ps |
| T447 |
/workspace/coverage/cover_reg_top/50.xbar_same_source.66313407 |
|
|
Jan 10 01:41:05 PM PST 24 |
Jan 10 01:41:43 PM PST 24 |
526237801 ps |
| T562 |
/workspace/coverage/cover_reg_top/28.xbar_random_slow_rsp.964934569 |
|
|
Jan 10 01:38:22 PM PST 24 |
Jan 10 01:41:55 PM PST 24 |
12699467724 ps |
| T1343 |
/workspace/coverage/cover_reg_top/95.xbar_unmapped_addr.1338026326 |
|
|
Jan 10 01:46:02 PM PST 24 |
Jan 10 01:46:15 PM PST 24 |
36662141 ps |
| T1344 |
/workspace/coverage/cover_reg_top/82.xbar_smoke.618463908 |
|
|
Jan 10 01:45:07 PM PST 24 |
Jan 10 01:45:39 PM PST 24 |
253850760 ps |
| T607 |
/workspace/coverage/cover_reg_top/78.xbar_stress_all_with_error.2246042253 |
|
|
Jan 10 01:44:50 PM PST 24 |
Jan 10 01:47:31 PM PST 24 |
1810496380 ps |
| T553 |
/workspace/coverage/cover_reg_top/4.xbar_stress_all_with_error.2582012676 |
|
|
Jan 10 01:35:50 PM PST 24 |
Jan 10 01:40:29 PM PST 24 |
3751199774 ps |
| T1345 |
/workspace/coverage/cover_reg_top/92.xbar_smoke_zero_delays.3712236344 |
|
|
Jan 10 01:45:54 PM PST 24 |
Jan 10 01:46:03 PM PST 24 |
39009447 ps |
| T1346 |
/workspace/coverage/cover_reg_top/67.xbar_smoke_zero_delays.1555487054 |
|
|
Jan 10 01:43:21 PM PST 24 |
Jan 10 01:43:31 PM PST 24 |
54457281 ps |
| T420 |
/workspace/coverage/cover_reg_top/48.xbar_access_same_device_slow_rsp.1504405151 |
|
|
Jan 10 01:40:28 PM PST 24 |
Jan 10 02:21:49 PM PST 24 |
145506120822 ps |
| T1347 |
/workspace/coverage/cover_reg_top/86.xbar_stress_all_with_error.2680701079 |
|
|
Jan 10 01:45:10 PM PST 24 |
Jan 10 01:46:38 PM PST 24 |
951683818 ps |
| T459 |
/workspace/coverage/cover_reg_top/69.xbar_unmapped_addr.3053834876 |
|
|
Jan 10 01:43:45 PM PST 24 |
Jan 10 01:44:08 PM PST 24 |
159455947 ps |
| T1348 |
/workspace/coverage/cover_reg_top/65.xbar_smoke.3694656123 |
|
|
Jan 10 01:43:06 PM PST 24 |
Jan 10 01:43:15 PM PST 24 |
164942596 ps |
| T464 |
/workspace/coverage/cover_reg_top/67.xbar_stress_all_with_rand_reset.3547441405 |
|
|
Jan 10 01:43:25 PM PST 24 |
Jan 10 01:47:19 PM PST 24 |
1460761402 ps |
| T1349 |
/workspace/coverage/cover_reg_top/9.xbar_same_source.2610222392 |
|
|
Jan 10 01:36:33 PM PST 24 |
Jan 10 01:36:44 PM PST 24 |
92192205 ps |
| T497 |
/workspace/coverage/cover_reg_top/40.xbar_random_zero_delays.1609774843 |
|
|
Jan 10 01:40:29 PM PST 24 |
Jan 10 01:40:44 PM PST 24 |
89693235 ps |
| T521 |
/workspace/coverage/cover_reg_top/6.xbar_unmapped_addr.2049911682 |
|
|
Jan 10 01:35:57 PM PST 24 |
Jan 10 01:36:33 PM PST 24 |
232443713 ps |
| T1350 |
/workspace/coverage/cover_reg_top/71.xbar_stress_all_with_error.2533520177 |
|
|
Jan 10 01:43:43 PM PST 24 |
Jan 10 01:50:01 PM PST 24 |
11020942516 ps |
| T1351 |
/workspace/coverage/cover_reg_top/45.xbar_random_zero_delays.2173164949 |
|
|
Jan 10 01:40:30 PM PST 24 |
Jan 10 01:40:41 PM PST 24 |
38739538 ps |
| T1352 |
/workspace/coverage/cover_reg_top/74.xbar_stress_all_with_error.3484695765 |
|
|
Jan 10 01:43:43 PM PST 24 |
Jan 10 01:45:18 PM PST 24 |
1571785831 ps |
| T1353 |
/workspace/coverage/cover_reg_top/15.xbar_smoke.2975506458 |
|
|
Jan 10 01:38:00 PM PST 24 |
Jan 10 01:38:16 PM PST 24 |
244211181 ps |
| T577 |
/workspace/coverage/cover_reg_top/12.xbar_same_source.3165587788 |
|
|
Jan 10 01:36:39 PM PST 24 |
Jan 10 01:37:05 PM PST 24 |
636643312 ps |
| T1354 |
/workspace/coverage/cover_reg_top/61.xbar_stress_all_with_rand_reset.1447821158 |
|
|
Jan 10 01:42:49 PM PST 24 |
Jan 10 01:43:26 PM PST 24 |
81559128 ps |
| T1355 |
/workspace/coverage/cover_reg_top/71.xbar_error_random.1952642974 |
|
|
Jan 10 01:43:34 PM PST 24 |
Jan 10 01:44:43 PM PST 24 |
1994930472 ps |
| T570 |
/workspace/coverage/cover_reg_top/30.xbar_random_slow_rsp.4153687976 |
|
|
Jan 10 01:38:25 PM PST 24 |
Jan 10 01:54:09 PM PST 24 |
51987460104 ps |
| T402 |
/workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.3105038647 |
|
|
Jan 10 01:39:52 PM PST 24 |
Jan 10 01:44:20 PM PST 24 |
1850150348 ps |
| T541 |
/workspace/coverage/cover_reg_top/94.xbar_stress_all.3240072434 |
|
|
Jan 10 01:45:45 PM PST 24 |
Jan 10 01:47:22 PM PST 24 |
1029124751 ps |
| T1356 |
/workspace/coverage/cover_reg_top/46.xbar_smoke_slow_rsp.114964285 |
|
|
Jan 10 01:40:37 PM PST 24 |
Jan 10 01:41:57 PM PST 24 |
4651658855 ps |
| T477 |
/workspace/coverage/cover_reg_top/44.xbar_same_source.1723313327 |
|
|
Jan 10 01:40:25 PM PST 24 |
Jan 10 01:41:05 PM PST 24 |
557576379 ps |
| T787 |
/workspace/coverage/cover_reg_top/6.xbar_access_same_device.108599223 |
|
|
Jan 10 01:35:57 PM PST 24 |
Jan 10 01:37:58 PM PST 24 |
2911247902 ps |
| T1357 |
/workspace/coverage/cover_reg_top/57.xbar_error_random.1021037954 |
|
|
Jan 10 01:42:42 PM PST 24 |
Jan 10 01:43:20 PM PST 24 |
469925456 ps |
| T442 |
/workspace/coverage/cover_reg_top/62.xbar_stress_all_with_error.61574704 |
|
|
Jan 10 01:42:45 PM PST 24 |
Jan 10 01:48:06 PM PST 24 |
9243611249 ps |
| T634 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_error.3730871087 |
|
|
Jan 10 01:44:27 PM PST 24 |
Jan 10 01:56:41 PM PST 24 |
17539036821 ps |
| T520 |
/workspace/coverage/cover_reg_top/66.xbar_random.4126232608 |
|
|
Jan 10 01:43:02 PM PST 24 |
Jan 10 01:43:49 PM PST 24 |
1531474171 ps |
| T1358 |
/workspace/coverage/cover_reg_top/18.xbar_random_slow_rsp.1028722148 |
|
|
Jan 10 01:37:29 PM PST 24 |
Jan 10 01:40:29 PM PST 24 |
9458109240 ps |
| T540 |
/workspace/coverage/cover_reg_top/25.xbar_random_large_delays.1324428008 |
|
|
Jan 10 01:38:04 PM PST 24 |
Jan 10 01:49:50 PM PST 24 |
67648626453 ps |
| T1359 |
/workspace/coverage/cover_reg_top/12.xbar_stress_all_with_reset_error.1775924285 |
|
|
Jan 10 01:36:42 PM PST 24 |
Jan 10 01:38:13 PM PST 24 |
645050505 ps |
| T586 |
/workspace/coverage/cover_reg_top/56.xbar_stress_all_with_error.1472710840 |
|
|
Jan 10 01:42:23 PM PST 24 |
Jan 10 01:44:54 PM PST 24 |
2068919858 ps |
| T1360 |
/workspace/coverage/cover_reg_top/82.xbar_random.2806032653 |
|
|
Jan 10 01:45:09 PM PST 24 |
Jan 10 01:45:39 PM PST 24 |
155070705 ps |
| T1361 |
/workspace/coverage/cover_reg_top/94.xbar_smoke.3097127800 |
|
|
Jan 10 01:46:02 PM PST 24 |
Jan 10 01:46:17 PM PST 24 |
216710009 ps |
| T1362 |
/workspace/coverage/cover_reg_top/60.xbar_random_zero_delays.1529890511 |
|
|
Jan 10 01:42:44 PM PST 24 |
Jan 10 01:43:01 PM PST 24 |
160829686 ps |
| T1363 |
/workspace/coverage/cover_reg_top/41.xbar_smoke_zero_delays.2286326491 |
|
|
Jan 10 01:40:20 PM PST 24 |
Jan 10 01:40:27 PM PST 24 |
37159026 ps |
| T534 |
/workspace/coverage/cover_reg_top/91.xbar_same_source.3712385790 |
|
|
Jan 10 01:45:48 PM PST 24 |
Jan 10 01:46:14 PM PST 24 |
666888305 ps |
| T774 |
/workspace/coverage/cover_reg_top/16.xbar_access_same_device_slow_rsp.2934435804 |
|
|
Jan 10 01:37:37 PM PST 24 |
Jan 10 01:48:38 PM PST 24 |
41312090257 ps |
| T795 |
/workspace/coverage/cover_reg_top/94.xbar_access_same_device.3158135894 |
|
|
Jan 10 01:46:04 PM PST 24 |
Jan 10 01:47:30 PM PST 24 |
1452791433 ps |
| T491 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all_with_rand_reset.1686128444 |
|
|
Jan 10 01:42:39 PM PST 24 |
Jan 10 01:46:18 PM PST 24 |
3304602323 ps |
| T1364 |
/workspace/coverage/cover_reg_top/81.xbar_access_same_device.1364804720 |
|
|
Jan 10 01:45:01 PM PST 24 |
Jan 10 01:45:36 PM PST 24 |
156845621 ps |
| T807 |
/workspace/coverage/cover_reg_top/22.xbar_stress_all_with_reset_error.3733385793 |
|
|
Jan 10 01:37:36 PM PST 24 |
Jan 10 01:44:30 PM PST 24 |
2885659331 ps |
| T493 |
/workspace/coverage/cover_reg_top/46.xbar_random.3990687338 |
|
|
Jan 10 01:40:25 PM PST 24 |
Jan 10 01:41:58 PM PST 24 |
2509965610 ps |
| T428 |
/workspace/coverage/cover_reg_top/5.xbar_random_large_delays.3816254851 |
|
|
Jan 10 01:36:01 PM PST 24 |
Jan 10 01:47:19 PM PST 24 |
63910360284 ps |
| T1365 |
/workspace/coverage/cover_reg_top/27.xbar_unmapped_addr.2421832630 |
|
|
Jan 10 01:38:02 PM PST 24 |
Jan 10 01:39:01 PM PST 24 |
1342076672 ps |
| T456 |
/workspace/coverage/cover_reg_top/99.xbar_random_large_delays.993553548 |
|
|
Jan 10 01:46:05 PM PST 24 |
Jan 10 02:01:33 PM PST 24 |
72801894064 ps |
| T533 |
/workspace/coverage/cover_reg_top/21.xbar_same_source.2101520169 |
|
|
Jan 10 01:37:32 PM PST 24 |
Jan 10 01:37:56 PM PST 24 |
166393344 ps |
| T516 |
/workspace/coverage/cover_reg_top/70.xbar_random_large_delays.3793873252 |
|
|
Jan 10 01:43:47 PM PST 24 |
Jan 10 02:03:10 PM PST 24 |
102499618894 ps |
| T1366 |
/workspace/coverage/cover_reg_top/55.xbar_smoke_slow_rsp.2958851882 |
|
|
Jan 10 01:42:42 PM PST 24 |
Jan 10 01:44:11 PM PST 24 |
5018506768 ps |
| T773 |
/workspace/coverage/cover_reg_top/85.xbar_access_same_device_slow_rsp.3088833263 |
|
|
Jan 10 01:45:05 PM PST 24 |
Jan 10 02:29:21 PM PST 24 |
152752019737 ps |
| T776 |
/workspace/coverage/cover_reg_top/65.xbar_access_same_device_slow_rsp.3603962019 |
|
|
Jan 10 01:43:11 PM PST 24 |
Jan 10 02:19:59 PM PST 24 |
126800007230 ps |
| T294 |
/workspace/coverage/cover_reg_top/8.chip_same_csr_outstanding.3982798141 |
|
|
Jan 10 01:36:19 PM PST 24 |
Jan 10 02:14:07 PM PST 24 |
14730903901 ps |
| T777 |
/workspace/coverage/cover_reg_top/59.xbar_stress_all_with_error.1437757327 |
|
|
Jan 10 01:42:45 PM PST 24 |
Jan 10 01:46:39 PM PST 24 |
7031549744 ps |
| T555 |
/workspace/coverage/cover_reg_top/72.xbar_stress_all_with_reset_error.3354791920 |
|
|
Jan 10 01:43:49 PM PST 24 |
Jan 10 01:48:13 PM PST 24 |
977220035 ps |
| T419 |
/workspace/coverage/cover_reg_top/86.xbar_access_same_device.3883953301 |
|
|
Jan 10 01:45:09 PM PST 24 |
Jan 10 01:46:35 PM PST 24 |
840893454 ps |
| T478 |
/workspace/coverage/cover_reg_top/83.xbar_unmapped_addr.16259277 |
|
|
Jan 10 01:45:00 PM PST 24 |
Jan 10 01:45:57 PM PST 24 |
829905753 ps |
| T587 |
/workspace/coverage/cover_reg_top/16.xbar_random_slow_rsp.1637254513 |
|
|
Jan 10 01:37:40 PM PST 24 |
Jan 10 01:46:35 PM PST 24 |
34129412560 ps |
| T429 |
/workspace/coverage/cover_reg_top/9.xbar_random_slow_rsp.4035374085 |
|
|
Jan 10 01:36:35 PM PST 24 |
Jan 10 01:48:14 PM PST 24 |
38705837094 ps |
| T479 |
/workspace/coverage/cover_reg_top/99.xbar_stress_all.2340873100 |
|
|
Jan 10 01:46:53 PM PST 24 |
Jan 10 01:55:39 PM PST 24 |
13639690238 ps |
| T296 |
/workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.1401130899 |
|
|
Jan 10 01:35:58 PM PST 24 |
Jan 10 02:09:15 PM PST 24 |
14060372588 ps |
| T515 |
/workspace/coverage/cover_reg_top/62.xbar_smoke_large_delays.2712903618 |
|
|
Jan 10 01:42:49 PM PST 24 |
Jan 10 01:44:08 PM PST 24 |
7509092121 ps |
| T1367 |
/workspace/coverage/cover_reg_top/43.xbar_unmapped_addr.363439264 |
|
|
Jan 10 01:40:21 PM PST 24 |
Jan 10 01:41:06 PM PST 24 |
1044608919 ps |
| T1368 |
/workspace/coverage/cover_reg_top/48.xbar_smoke.127120215 |
|
|
Jan 10 01:40:21 PM PST 24 |
Jan 10 01:40:29 PM PST 24 |
45933011 ps |
| T508 |
/workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.2259297840 |
|
|
Jan 10 01:36:37 PM PST 24 |
Jan 10 01:38:15 PM PST 24 |
5935410053 ps |
| T297 |
/workspace/coverage/cover_reg_top/18.chip_csr_rw.359823101 |
|
|
Jan 10 01:37:47 PM PST 24 |
Jan 10 01:43:21 PM PST 24 |
4344595453 ps |
| T799 |
/workspace/coverage/cover_reg_top/77.xbar_stress_all_with_reset_error.2681605029 |
|
|
Jan 10 01:44:16 PM PST 24 |
Jan 10 01:46:58 PM PST 24 |
661994072 ps |
| T1369 |
/workspace/coverage/cover_reg_top/80.xbar_smoke_large_delays.1860840118 |
|
|
Jan 10 01:44:31 PM PST 24 |
Jan 10 01:45:46 PM PST 24 |
7175146552 ps |
| T812 |
/workspace/coverage/cover_reg_top/32.xbar_stress_all_with_reset_error.2115225460 |
|
|
Jan 10 01:38:53 PM PST 24 |
Jan 10 01:45:09 PM PST 24 |
3701392429 ps |
| T474 |
/workspace/coverage/cover_reg_top/52.xbar_random.1013294532 |
|
|
Jan 10 01:41:15 PM PST 24 |
Jan 10 01:42:48 PM PST 24 |
2168395916 ps |
| T1370 |
/workspace/coverage/cover_reg_top/26.xbar_error_random.1330576738 |
|
|
Jan 10 01:38:00 PM PST 24 |
Jan 10 01:39:19 PM PST 24 |
2298005025 ps |
| T778 |
/workspace/coverage/cover_reg_top/46.xbar_access_same_device_slow_rsp.742234293 |
|
|
Jan 10 01:40:22 PM PST 24 |
Jan 10 02:06:06 PM PST 24 |
89923236045 ps |
| T403 |
/workspace/coverage/cover_reg_top/22.chip_tl_errors.3569420132 |
|
|
Jan 10 01:37:34 PM PST 24 |
Jan 10 01:42:17 PM PST 24 |
3713957404 ps |
| T409 |
/workspace/coverage/cover_reg_top/75.xbar_random_zero_delays.3341593157 |
|
|
Jan 10 01:43:50 PM PST 24 |
Jan 10 01:44:17 PM PST 24 |
255282457 ps |
| T1371 |
/workspace/coverage/cover_reg_top/17.xbar_error_random.3728494071 |
|
|
Jan 10 01:38:11 PM PST 24 |
Jan 10 01:38:38 PM PST 24 |
258567116 ps |
| T1372 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all.3648925952 |
|
|
Jan 10 01:40:26 PM PST 24 |
Jan 10 01:41:03 PM PST 24 |
477196613 ps |
| T1373 |
/workspace/coverage/cover_reg_top/60.xbar_error_random.1487835769 |
|
|
Jan 10 01:42:47 PM PST 24 |
Jan 10 01:43:27 PM PST 24 |
1211733518 ps |
| T794 |
/workspace/coverage/cover_reg_top/12.xbar_access_same_device.3407747586 |
|
|
Jan 10 01:36:46 PM PST 24 |
Jan 10 01:37:28 PM PST 24 |
1017942784 ps |
| T1374 |
/workspace/coverage/cover_reg_top/44.xbar_smoke_large_delays.165524072 |
|
|
Jan 10 01:40:22 PM PST 24 |
Jan 10 01:42:03 PM PST 24 |
10269513771 ps |
| T1375 |
/workspace/coverage/cover_reg_top/45.xbar_error_and_unmapped_addr.364618157 |
|
|
Jan 10 01:40:32 PM PST 24 |
Jan 10 01:40:45 PM PST 24 |
97043297 ps |
| T330 |
/workspace/coverage/cover_reg_top/13.chip_same_csr_outstanding.24590086 |
|
|
Jan 10 01:36:47 PM PST 24 |
Jan 10 02:12:20 PM PST 24 |
15401337192 ps |
| T1376 |
/workspace/coverage/cover_reg_top/18.xbar_smoke_zero_delays.2239162189 |
|
|
Jan 10 01:38:15 PM PST 24 |
Jan 10 01:38:27 PM PST 24 |
53301128 ps |
| T1377 |
/workspace/coverage/cover_reg_top/14.xbar_smoke_large_delays.1491278405 |
|
|
Jan 10 01:38:03 PM PST 24 |
Jan 10 01:39:49 PM PST 24 |
9131320241 ps |
| T1378 |
/workspace/coverage/cover_reg_top/8.xbar_error_and_unmapped_addr.2153820161 |
|
|
Jan 10 01:36:34 PM PST 24 |
Jan 10 01:37:24 PM PST 24 |
1239843381 ps |
| T1379 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_slow_rsp.1207313780 |
|
|
Jan 10 01:41:17 PM PST 24 |
Jan 10 01:43:09 PM PST 24 |
5637133977 ps |
| T1380 |
/workspace/coverage/cover_reg_top/3.xbar_access_same_device.1425769545 |
|
|
Jan 10 01:35:52 PM PST 24 |
Jan 10 01:37:41 PM PST 24 |
2764107862 ps |
| T1381 |
/workspace/coverage/cover_reg_top/22.xbar_smoke_slow_rsp.3671463761 |
|
|
Jan 10 01:37:31 PM PST 24 |
Jan 10 01:39:02 PM PST 24 |
4706465480 ps |
| T480 |
/workspace/coverage/cover_reg_top/43.xbar_random_slow_rsp.2395431512 |
|
|
Jan 10 01:40:34 PM PST 24 |
Jan 10 01:45:53 PM PST 24 |
18736219968 ps |
| T528 |
/workspace/coverage/cover_reg_top/33.xbar_stress_all_with_error.3507208568 |
|
|
Jan 10 01:38:55 PM PST 24 |
Jan 10 01:48:20 PM PST 24 |
16045231722 ps |
| T407 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all.284179478 |
|
|
Jan 10 01:40:29 PM PST 24 |
Jan 10 01:42:40 PM PST 24 |
1660900685 ps |
| T460 |
/workspace/coverage/cover_reg_top/6.xbar_stress_all_with_rand_reset.2167133312 |
|
|
Jan 10 01:35:58 PM PST 24 |
Jan 10 01:46:09 PM PST 24 |
11423885745 ps |
| T430 |
/workspace/coverage/cover_reg_top/49.xbar_random_slow_rsp.3132241815 |
|
|
Jan 10 01:41:02 PM PST 24 |
Jan 10 01:58:25 PM PST 24 |
55296432874 ps |
| T1382 |
/workspace/coverage/cover_reg_top/40.xbar_smoke_large_delays.975075872 |
|
|
Jan 10 01:40:26 PM PST 24 |
Jan 10 01:41:41 PM PST 24 |
6858906286 ps |
| T467 |
/workspace/coverage/cover_reg_top/72.xbar_random_slow_rsp.2936346794 |
|
|
Jan 10 01:43:46 PM PST 24 |
Jan 10 02:00:10 PM PST 24 |
61516738362 ps |
| T1383 |
/workspace/coverage/cover_reg_top/39.xbar_access_same_device.4226601106 |
|
|
Jan 10 01:40:22 PM PST 24 |
Jan 10 01:41:04 PM PST 24 |
736771285 ps |
| T649 |
/workspace/coverage/cover_reg_top/8.chip_csr_mem_rw_with_rand_reset.316728262 |
|
|
Jan 10 01:36:31 PM PST 24 |
Jan 10 01:42:04 PM PST 24 |
7071658816 ps |
| T509 |
/workspace/coverage/cover_reg_top/0.xbar_same_source.1083955856 |
|
|
Jan 10 01:35:46 PM PST 24 |
Jan 10 01:36:53 PM PST 24 |
1728377130 ps |
| T1384 |
/workspace/coverage/cover_reg_top/4.xbar_error_random.1646875118 |
|
|
Jan 10 01:36:04 PM PST 24 |
Jan 10 01:36:34 PM PST 24 |
259542337 ps |
| T472 |
/workspace/coverage/cover_reg_top/98.xbar_random_large_delays.1972732899 |
|
|
Jan 10 01:46:06 PM PST 24 |
Jan 10 01:59:41 PM PST 24 |
62006896074 ps |
| T410 |
/workspace/coverage/cover_reg_top/10.chip_tl_errors.604955947 |
|
|
Jan 10 01:36:38 PM PST 24 |
Jan 10 01:38:57 PM PST 24 |
2497996870 ps |
| T1385 |
/workspace/coverage/cover_reg_top/80.xbar_unmapped_addr.3015048552 |
|
|
Jan 10 01:44:30 PM PST 24 |
Jan 10 01:44:43 PM PST 24 |
192467583 ps |
| T1386 |
/workspace/coverage/cover_reg_top/39.xbar_unmapped_addr.1281110655 |
|
|
Jan 10 01:40:24 PM PST 24 |
Jan 10 01:40:34 PM PST 24 |
38469710 ps |
| T525 |
/workspace/coverage/cover_reg_top/82.xbar_unmapped_addr.1098879889 |
|
|
Jan 10 01:45:18 PM PST 24 |
Jan 10 01:46:22 PM PST 24 |
1180102674 ps |
| T1387 |
/workspace/coverage/cover_reg_top/13.xbar_smoke.2877813596 |
|
|
Jan 10 01:36:47 PM PST 24 |
Jan 10 01:36:55 PM PST 24 |
149794570 ps |
| T1388 |
/workspace/coverage/cover_reg_top/38.xbar_error_random.83359623 |
|
|
Jan 10 01:40:21 PM PST 24 |
Jan 10 01:41:17 PM PST 24 |
1586626438 ps |
| T457 |
/workspace/coverage/cover_reg_top/0.xbar_stress_all.1472605789 |
|
|
Jan 10 01:35:45 PM PST 24 |
Jan 10 01:46:08 PM PST 24 |
13955284951 ps |
| T1389 |
/workspace/coverage/cover_reg_top/15.chip_csr_mem_rw_with_rand_reset.3711782944 |
|
|
Jan 10 01:37:30 PM PST 24 |
Jan 10 01:43:29 PM PST 24 |
9560232582 ps |
| T564 |
/workspace/coverage/cover_reg_top/90.xbar_random_large_delays.2161303674 |
|
|
Jan 10 01:45:13 PM PST 24 |
Jan 10 01:54:50 PM PST 24 |
47164849329 ps |
| T596 |
/workspace/coverage/cover_reg_top/5.xbar_same_source.3091156645 |
|
|
Jan 10 01:36:02 PM PST 24 |
Jan 10 01:36:52 PM PST 24 |
569314029 ps |
| T1390 |
/workspace/coverage/cover_reg_top/91.xbar_smoke.872988916 |
|
|
Jan 10 01:45:18 PM PST 24 |
Jan 10 01:45:43 PM PST 24 |
50596233 ps |
| T418 |
/workspace/coverage/cover_reg_top/9.xbar_smoke.1289138688 |
|
|
Jan 10 01:36:26 PM PST 24 |
Jan 10 01:36:37 PM PST 24 |
49808506 ps |
| T1391 |
/workspace/coverage/cover_reg_top/67.xbar_smoke.642387292 |
|
|
Jan 10 01:43:33 PM PST 24 |
Jan 10 01:43:42 PM PST 24 |
156338549 ps |
| T1392 |
/workspace/coverage/cover_reg_top/58.xbar_error_and_unmapped_addr.2252419327 |
|
|
Jan 10 01:42:47 PM PST 24 |
Jan 10 01:43:19 PM PST 24 |
842988804 ps |
| T545 |
/workspace/coverage/cover_reg_top/32.xbar_random.582922427 |
|
|
Jan 10 01:38:31 PM PST 24 |
Jan 10 01:39:07 PM PST 24 |
408822616 ps |
| T576 |
/workspace/coverage/cover_reg_top/54.xbar_random_large_delays.3167299512 |
|
|
Jan 10 01:42:29 PM PST 24 |
Jan 10 01:54:53 PM PST 24 |
67588199979 ps |
| T1393 |
/workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.349921427 |
|
|
Jan 10 01:45:55 PM PST 24 |
Jan 10 01:47:02 PM PST 24 |
4070530150 ps |
| T575 |
/workspace/coverage/cover_reg_top/83.xbar_random_slow_rsp.196647683 |
|
|
Jan 10 01:44:58 PM PST 24 |
Jan 10 02:02:18 PM PST 24 |
55211321168 ps |
| T1394 |
/workspace/coverage/cover_reg_top/59.xbar_random.179164438 |
|
|
Jan 10 01:42:47 PM PST 24 |
Jan 10 01:43:16 PM PST 24 |
663459799 ps |
| T453 |
/workspace/coverage/cover_reg_top/98.xbar_same_source.3199476303 |
|
|
Jan 10 01:46:06 PM PST 24 |
Jan 10 01:46:43 PM PST 24 |
155233511 ps |
| T437 |
/workspace/coverage/cover_reg_top/87.xbar_access_same_device_slow_rsp.2629365821 |
|
|
Jan 10 01:45:02 PM PST 24 |
Jan 10 02:32:37 PM PST 24 |
162795894705 ps |
| T790 |
/workspace/coverage/cover_reg_top/70.xbar_access_same_device_slow_rsp.4219212512 |
|
|
Jan 10 01:43:36 PM PST 24 |
Jan 10 01:50:13 PM PST 24 |
23631520605 ps |
| T1395 |
/workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.4264341156 |
|
|
Jan 10 01:36:45 PM PST 24 |
Jan 10 01:40:45 PM PST 24 |
5478918880 ps |
| T784 |
/workspace/coverage/cover_reg_top/57.xbar_stress_all_with_error.2356964254 |
|
|
Jan 10 01:42:44 PM PST 24 |
Jan 10 01:46:56 PM PST 24 |
8076102943 ps |
| T1396 |
/workspace/coverage/cover_reg_top/64.xbar_error_and_unmapped_addr.1103782866 |
|
|
Jan 10 01:43:07 PM PST 24 |
Jan 10 01:43:26 PM PST 24 |
158511369 ps |
| T422 |
/workspace/coverage/cover_reg_top/45.xbar_unmapped_addr.1833539651 |
|
|
Jan 10 01:40:33 PM PST 24 |
Jan 10 01:40:56 PM PST 24 |
344257029 ps |
| T488 |
/workspace/coverage/cover_reg_top/79.xbar_random_slow_rsp.4258945619 |
|
|
Jan 10 01:44:29 PM PST 24 |
Jan 10 01:59:11 PM PST 24 |
49485535402 ps |
| T1397 |
/workspace/coverage/cover_reg_top/22.xbar_smoke.1156918374 |
|
|
Jan 10 01:37:35 PM PST 24 |
Jan 10 01:37:51 PM PST 24 |
168692036 ps |
| T823 |
/workspace/coverage/cover_reg_top/28.xbar_stress_all_with_reset_error.1371968673 |
|
|
Jan 10 01:38:18 PM PST 24 |
Jan 10 01:42:58 PM PST 24 |
4547473427 ps |