| T202 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.4024802836 |
|
|
Jan 17 05:06:44 PM PST 24 |
Jan 17 05:18:12 PM PST 24 |
6346322200 ps |
| T843 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.3964679599 |
|
|
Jan 17 04:41:40 PM PST 24 |
Jan 17 04:50:05 PM PST 24 |
5173655956 ps |
| T672 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.3557008740 |
|
|
Jan 17 05:09:10 PM PST 24 |
Jan 17 05:18:57 PM PST 24 |
6186142292 ps |
| T171 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.2784371248 |
|
|
Jan 17 04:55:02 PM PST 24 |
Jan 17 05:03:46 PM PST 24 |
3320239656 ps |
| T844 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.370644282 |
|
|
Jan 17 04:42:12 PM PST 24 |
Jan 17 04:47:05 PM PST 24 |
2513592812 ps |
| T25 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.4126955611 |
|
|
Jan 17 04:45:27 PM PST 24 |
Jan 17 05:15:18 PM PST 24 |
9604551950 ps |
| T83 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.3101824502 |
|
|
Jan 17 05:01:07 PM PST 24 |
Jan 17 05:10:18 PM PST 24 |
10798745518 ps |
| T49 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.4282767696 |
|
|
Jan 17 04:39:46 PM PST 24 |
Jan 17 04:50:38 PM PST 24 |
4548646752 ps |
| T137 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.993925314 |
|
|
Jan 17 04:49:44 PM PST 24 |
Jan 17 05:02:57 PM PST 24 |
4359350244 ps |
| T845 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.1484115403 |
|
|
Jan 17 04:55:34 PM PST 24 |
Jan 17 05:01:49 PM PST 24 |
4446004472 ps |
| T717 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2168369390 |
|
|
Jan 17 05:10:17 PM PST 24 |
Jan 17 05:16:32 PM PST 24 |
3130100736 ps |
| T846 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3563241302 |
|
|
Jan 17 04:41:37 PM PST 24 |
Jan 17 04:47:50 PM PST 24 |
3793449432 ps |
| T662 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.1368109697 |
|
|
Jan 17 05:07:31 PM PST 24 |
Jan 17 05:14:57 PM PST 24 |
3282123806 ps |
| T26 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.3044648516 |
|
|
Jan 17 05:00:41 PM PST 24 |
Jan 17 05:27:16 PM PST 24 |
9439298997 ps |
| T847 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1984884221 |
|
|
Jan 17 04:50:58 PM PST 24 |
Jan 17 05:03:12 PM PST 24 |
4434148022 ps |
| T848 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2316826548 |
|
|
Jan 17 04:40:50 PM PST 24 |
Jan 17 04:48:52 PM PST 24 |
4543126175 ps |
| T849 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.895862962 |
|
|
Jan 17 04:47:17 PM PST 24 |
Jan 17 05:20:53 PM PST 24 |
8540425514 ps |
| T705 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.647031310 |
|
|
Jan 17 05:07:27 PM PST 24 |
Jan 17 05:14:04 PM PST 24 |
3358810892 ps |
| T701 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.2261003673 |
|
|
Jan 17 05:07:18 PM PST 24 |
Jan 17 05:13:36 PM PST 24 |
3363308680 ps |
| T8 |
/workspace/coverage/default/2.chip_jtag_csr_rw.664826368 |
|
|
Jan 17 04:51:16 PM PST 24 |
Jan 17 05:29:55 PM PST 24 |
20306127276 ps |
| T345 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.2211058862 |
|
|
Jan 17 05:05:22 PM PST 24 |
Jan 17 05:33:17 PM PST 24 |
8658389934 ps |
| T346 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.4163807594 |
|
|
Jan 17 04:40:36 PM PST 24 |
Jan 17 04:47:20 PM PST 24 |
9388224881 ps |
| T347 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3014173719 |
|
|
Jan 17 05:03:58 PM PST 24 |
Jan 17 05:09:55 PM PST 24 |
3551912458 ps |
| T319 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.619372010 |
|
|
Jan 17 05:06:45 PM PST 24 |
Jan 17 05:16:21 PM PST 24 |
5494456204 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3803762765 |
|
|
Jan 17 04:45:34 PM PST 24 |
Jan 17 04:52:47 PM PST 24 |
3854602000 ps |
| T349 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.589570628 |
|
|
Jan 17 04:47:54 PM PST 24 |
Jan 17 05:24:25 PM PST 24 |
8666630164 ps |
| T350 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1019127485 |
|
|
Jan 17 04:42:11 PM PST 24 |
Jan 17 04:49:49 PM PST 24 |
4028767640 ps |
| T351 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1513988205 |
|
|
Jan 17 05:09:25 PM PST 24 |
Jan 17 05:19:14 PM PST 24 |
4682354810 ps |
| T252 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.1865676269 |
|
|
Jan 17 05:02:44 PM PST 24 |
Jan 17 05:09:24 PM PST 24 |
4023690824 ps |
| T671 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.2084009902 |
|
|
Jan 17 05:04:42 PM PST 24 |
Jan 17 05:16:08 PM PST 24 |
4652885460 ps |
| T203 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2861076988 |
|
|
Jan 17 05:10:08 PM PST 24 |
Jan 17 05:19:27 PM PST 24 |
5751326208 ps |
| T850 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.1524005219 |
|
|
Jan 17 04:45:29 PM PST 24 |
Jan 17 05:19:03 PM PST 24 |
8383734937 ps |
| T851 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.1436940585 |
|
|
Jan 17 04:57:17 PM PST 24 |
Jan 17 05:26:30 PM PST 24 |
8755361036 ps |
| T4 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2960025390 |
|
|
Jan 17 04:44:32 PM PST 24 |
Jan 17 04:50:36 PM PST 24 |
3106802342 ps |
| T158 |
/workspace/coverage/default/0.chip_sw_gpio.3651978857 |
|
|
Jan 17 04:39:59 PM PST 24 |
Jan 17 04:47:46 PM PST 24 |
3888767920 ps |
| T57 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.3493120340 |
|
|
Jan 17 04:47:48 PM PST 24 |
Jan 17 05:10:41 PM PST 24 |
11027266052 ps |
| T852 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2078802328 |
|
|
Jan 17 04:52:12 PM PST 24 |
Jan 17 04:58:49 PM PST 24 |
4809613046 ps |
| T724 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.4081528793 |
|
|
Jan 17 05:09:26 PM PST 24 |
Jan 17 05:15:51 PM PST 24 |
3413653580 ps |
| T674 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.1921129572 |
|
|
Jan 17 05:04:47 PM PST 24 |
Jan 17 05:15:14 PM PST 24 |
4826227728 ps |
| T649 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.59053833 |
|
|
Jan 17 04:41:27 PM PST 24 |
Jan 17 04:49:43 PM PST 24 |
5559226856 ps |
| T853 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.503635750 |
|
|
Jan 17 04:47:02 PM PST 24 |
Jan 17 05:03:51 PM PST 24 |
5545476544 ps |
| T854 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.1775405443 |
|
|
Jan 17 04:47:28 PM PST 24 |
Jan 17 04:59:36 PM PST 24 |
5550775972 ps |
| T282 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2276334956 |
|
|
Jan 17 04:42:19 PM PST 24 |
Jan 17 04:51:10 PM PST 24 |
5706901494 ps |
| T855 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.858166352 |
|
|
Jan 17 04:52:17 PM PST 24 |
Jan 17 04:56:32 PM PST 24 |
3552682191 ps |
| T856 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2693574340 |
|
|
Jan 17 04:43:20 PM PST 24 |
Jan 17 04:48:35 PM PST 24 |
2951152462 ps |
| T857 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.3112667128 |
|
|
Jan 17 04:47:50 PM PST 24 |
Jan 17 04:55:22 PM PST 24 |
7094297166 ps |
| T119 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.3894870754 |
|
|
Jan 17 04:44:50 PM PST 24 |
Jan 17 04:53:12 PM PST 24 |
4695109322 ps |
| T858 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2054232706 |
|
|
Jan 17 04:45:54 PM PST 24 |
Jan 17 05:02:14 PM PST 24 |
10380320712 ps |
| T682 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.1594949307 |
|
|
Jan 17 05:10:08 PM PST 24 |
Jan 17 05:20:06 PM PST 24 |
5503584788 ps |
| T58 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.468728480 |
|
|
Jan 17 04:42:05 PM PST 24 |
Jan 17 04:47:45 PM PST 24 |
2896273221 ps |
| T48 |
/workspace/coverage/default/3.chip_tap_straps_dev.3480313256 |
|
|
Jan 17 05:01:29 PM PST 24 |
Jan 17 05:12:30 PM PST 24 |
7524714155 ps |
| T603 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2966936042 |
|
|
Jan 17 04:41:33 PM PST 24 |
Jan 17 08:22:12 PM PST 24 |
255766685544 ps |
| T859 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.790215975 |
|
|
Jan 17 04:50:56 PM PST 24 |
Jan 17 04:57:23 PM PST 24 |
3205190900 ps |
| T260 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.2911595069 |
|
|
Jan 17 04:47:41 PM PST 24 |
Jan 17 05:23:32 PM PST 24 |
8882140082 ps |
| T860 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.3192425962 |
|
|
Jan 17 05:04:14 PM PST 24 |
Jan 17 05:28:03 PM PST 24 |
8890943855 ps |
| T664 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.3469458678 |
|
|
Jan 17 05:10:35 PM PST 24 |
Jan 17 05:22:01 PM PST 24 |
5522203854 ps |
| T861 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.1018862539 |
|
|
Jan 17 04:42:09 PM PST 24 |
Jan 17 04:55:00 PM PST 24 |
6701169800 ps |
| T862 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.3725846239 |
|
|
Jan 17 05:03:26 PM PST 24 |
Jan 17 06:02:46 PM PST 24 |
23224719220 ps |
| T684 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.3683500595 |
|
|
Jan 17 05:02:29 PM PST 24 |
Jan 17 05:09:51 PM PST 24 |
3945704360 ps |
| T863 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.3686185190 |
|
|
Jan 17 04:48:24 PM PST 24 |
Jan 17 05:30:45 PM PST 24 |
10796665276 ps |
| T310 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.3721371618 |
|
|
Jan 17 04:56:28 PM PST 24 |
Jan 17 05:00:48 PM PST 24 |
2288242426 ps |
| T864 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.3069164702 |
|
|
Jan 17 04:40:34 PM PST 24 |
Jan 17 04:49:17 PM PST 24 |
4534571170 ps |
| T47 |
/workspace/coverage/default/3.chip_tap_straps_rma.2172037516 |
|
|
Jan 17 05:02:17 PM PST 24 |
Jan 17 05:06:19 PM PST 24 |
3298659119 ps |
| T653 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.3429031189 |
|
|
Jan 17 05:06:24 PM PST 24 |
Jan 17 05:12:16 PM PST 24 |
3677621896 ps |
| T670 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3010958434 |
|
|
Jan 17 04:58:18 PM PST 24 |
Jan 17 05:04:34 PM PST 24 |
3059531080 ps |
| T865 |
/workspace/coverage/default/3.chip_tap_straps_prod.1513597526 |
|
|
Jan 17 05:02:34 PM PST 24 |
Jan 17 05:05:20 PM PST 24 |
3051635910 ps |
| T654 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.3734766318 |
|
|
Jan 17 05:07:54 PM PST 24 |
Jan 17 05:19:56 PM PST 24 |
5144430280 ps |
| T866 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2942072337 |
|
|
Jan 17 04:43:58 PM PST 24 |
Jan 17 04:47:57 PM PST 24 |
2567491640 ps |
| T867 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.149641173 |
|
|
Jan 17 04:47:31 PM PST 24 |
Jan 17 05:11:55 PM PST 24 |
6711069698 ps |
| T651 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.1196025306 |
|
|
Jan 17 05:07:16 PM PST 24 |
Jan 17 05:13:34 PM PST 24 |
3658986818 ps |
| T360 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2295114562 |
|
|
Jan 17 04:45:06 PM PST 24 |
Jan 17 04:48:59 PM PST 24 |
2909723340 ps |
| T868 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.352803162 |
|
|
Jan 17 04:54:35 PM PST 24 |
Jan 17 04:59:11 PM PST 24 |
3162268360 ps |
| T120 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.2929589540 |
|
|
Jan 17 04:46:42 PM PST 24 |
Jan 17 05:04:56 PM PST 24 |
8077724564 ps |
| T869 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2745964263 |
|
|
Jan 17 04:59:26 PM PST 24 |
Jan 17 05:10:46 PM PST 24 |
4184982828 ps |
| T735 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.792261439 |
|
|
Jan 17 05:07:57 PM PST 24 |
Jan 17 05:17:15 PM PST 24 |
5395872430 ps |
| T870 |
/workspace/coverage/default/2.chip_sw_edn_kat.2738957982 |
|
|
Jan 17 04:58:34 PM PST 24 |
Jan 17 05:08:52 PM PST 24 |
3042354976 ps |
| T871 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2900110997 |
|
|
Jan 17 04:41:06 PM PST 24 |
Jan 17 04:51:55 PM PST 24 |
4989927246 ps |
| T257 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2675941931 |
|
|
Jan 17 04:50:43 PM PST 24 |
Jan 17 05:00:51 PM PST 24 |
4958221468 ps |
| T872 |
/workspace/coverage/default/1.chip_sw_aes_enc.920894948 |
|
|
Jan 17 04:47:44 PM PST 24 |
Jan 17 04:52:27 PM PST 24 |
2257864784 ps |
| T290 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.3461631873 |
|
|
Jan 17 05:08:19 PM PST 24 |
Jan 17 05:14:04 PM PST 24 |
3512871150 ps |
| T307 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.1335617409 |
|
|
Jan 17 04:48:06 PM PST 24 |
Jan 17 05:40:24 PM PST 24 |
11838444818 ps |
| T873 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.299512035 |
|
|
Jan 17 04:39:40 PM PST 24 |
Jan 17 04:44:38 PM PST 24 |
2365652630 ps |
| T283 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.3352672602 |
|
|
Jan 17 05:02:04 PM PST 24 |
Jan 17 05:14:39 PM PST 24 |
6516191322 ps |
| T668 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.42338545 |
|
|
Jan 17 05:08:27 PM PST 24 |
Jan 17 05:19:27 PM PST 24 |
5198246404 ps |
| T874 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.4252399105 |
|
|
Jan 17 04:57:02 PM PST 24 |
Jan 17 05:02:11 PM PST 24 |
3088468504 ps |
| T875 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1219879239 |
|
|
Jan 17 04:57:44 PM PST 24 |
Jan 17 05:27:21 PM PST 24 |
8679824796 ps |
| T696 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.178111593 |
|
|
Jan 17 05:07:03 PM PST 24 |
Jan 17 05:13:51 PM PST 24 |
3764615848 ps |
| T876 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.15004521 |
|
|
Jan 17 04:47:56 PM PST 24 |
Jan 17 04:56:33 PM PST 24 |
3893684664 ps |
| T877 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.262488870 |
|
|
Jan 17 05:00:58 PM PST 24 |
Jan 17 05:04:49 PM PST 24 |
2937107866 ps |
| T725 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1037180105 |
|
|
Jan 17 05:09:45 PM PST 24 |
Jan 17 05:17:00 PM PST 24 |
3624644310 ps |
| T878 |
/workspace/coverage/default/2.chip_sw_example_rom.2028302841 |
|
|
Jan 17 04:53:32 PM PST 24 |
Jan 17 04:55:30 PM PST 24 |
2327578990 ps |
| T638 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3523370632 |
|
|
Jan 17 04:40:59 PM PST 24 |
Jan 17 04:55:36 PM PST 24 |
5339528760 ps |
| T707 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.507916639 |
|
|
Jan 17 05:04:33 PM PST 24 |
Jan 17 05:10:19 PM PST 24 |
3837839600 ps |
| T686 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.3178853855 |
|
|
Jan 17 05:09:33 PM PST 24 |
Jan 17 05:19:04 PM PST 24 |
5267716410 ps |
| T27 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.182842142 |
|
|
Jan 17 04:39:38 PM PST 24 |
Jan 17 04:45:14 PM PST 24 |
4375152630 ps |
| T579 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.873026273 |
|
|
Jan 17 04:59:04 PM PST 24 |
Jan 17 05:48:08 PM PST 24 |
23937052445 ps |
| T879 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.1380755734 |
|
|
Jan 17 04:58:16 PM PST 24 |
Jan 17 05:16:23 PM PST 24 |
9011208230 ps |
| T880 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1830716231 |
|
|
Jan 17 04:44:36 PM PST 24 |
Jan 17 05:02:10 PM PST 24 |
6339068804 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.25117192 |
|
|
Jan 17 04:45:22 PM PST 24 |
Jan 17 04:50:02 PM PST 24 |
2980829240 ps |
| T656 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.1567490799 |
|
|
Jan 17 05:10:05 PM PST 24 |
Jan 17 05:18:29 PM PST 24 |
4407927496 ps |
| T643 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1278971054 |
|
|
Jan 17 04:47:23 PM PST 24 |
Jan 17 05:26:10 PM PST 24 |
9902415853 ps |
| T685 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.1417687782 |
|
|
Jan 17 05:06:53 PM PST 24 |
Jan 17 05:13:02 PM PST 24 |
3921735096 ps |
| T881 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.3542283548 |
|
|
Jan 17 04:50:51 PM PST 24 |
Jan 17 04:55:25 PM PST 24 |
2377090670 ps |
| T103 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.3735955008 |
|
|
Jan 17 05:02:25 PM PST 24 |
Jan 17 05:14:49 PM PST 24 |
6532894176 ps |
| T151 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.678911008 |
|
|
Jan 17 04:54:57 PM PST 24 |
Jan 17 04:59:13 PM PST 24 |
3105018973 ps |
| T186 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3379410672 |
|
|
Jan 17 05:02:59 PM PST 24 |
Jan 17 05:15:15 PM PST 24 |
5034016584 ps |
| T882 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.3999667438 |
|
|
Jan 17 04:40:33 PM PST 24 |
Jan 17 05:30:51 PM PST 24 |
13427571686 ps |
| T883 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.155008997 |
|
|
Jan 17 04:49:37 PM PST 24 |
Jan 17 05:27:18 PM PST 24 |
17586173746 ps |
| T884 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.147157142 |
|
|
Jan 17 04:52:38 PM PST 24 |
Jan 17 04:55:58 PM PST 24 |
2928741609 ps |
| T210 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.3647176474 |
|
|
Jan 17 05:00:41 PM PST 24 |
Jan 17 05:14:47 PM PST 24 |
5287015170 ps |
| T41 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.1214251673 |
|
|
Jan 17 04:39:55 PM PST 24 |
Jan 17 04:46:03 PM PST 24 |
4158549012 ps |
| T885 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3732936993 |
|
|
Jan 17 04:43:20 PM PST 24 |
Jan 17 04:48:47 PM PST 24 |
2598355600 ps |
| T886 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.237299641 |
|
|
Jan 17 04:40:19 PM PST 24 |
Jan 17 04:50:25 PM PST 24 |
4563506218 ps |
| T887 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2034379024 |
|
|
Jan 17 04:39:53 PM PST 24 |
Jan 17 04:42:52 PM PST 24 |
2573804360 ps |
| T652 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.525851281 |
|
|
Jan 17 05:02:01 PM PST 24 |
Jan 17 05:08:19 PM PST 24 |
3567231472 ps |
| T134 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3177681114 |
|
|
Jan 17 04:48:42 PM PST 24 |
Jan 17 05:23:48 PM PST 24 |
9149430516 ps |
| T888 |
/workspace/coverage/default/2.rom_e2e_smoke.3930900795 |
|
|
Jan 17 04:58:52 PM PST 24 |
Jan 17 05:30:03 PM PST 24 |
8628911472 ps |
| T889 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.4098699377 |
|
|
Jan 17 04:57:56 PM PST 24 |
Jan 17 05:07:38 PM PST 24 |
4804682890 ps |
| T890 |
/workspace/coverage/default/0.chip_sw_aes_idle.2227678082 |
|
|
Jan 17 04:42:23 PM PST 24 |
Jan 17 04:46:57 PM PST 24 |
2797794604 ps |
| T891 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.2395419796 |
|
|
Jan 17 04:47:55 PM PST 24 |
Jan 17 04:54:52 PM PST 24 |
3941019180 ps |
| T175 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.1722307118 |
|
|
Jan 17 04:40:11 PM PST 24 |
Jan 17 05:07:35 PM PST 24 |
9927938132 ps |
| T892 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.2137352133 |
|
|
Jan 17 05:00:25 PM PST 24 |
Jan 17 05:09:20 PM PST 24 |
3343249252 ps |
| T736 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.1871677346 |
|
|
Jan 17 05:09:12 PM PST 24 |
Jan 17 05:19:45 PM PST 24 |
5098234628 ps |
| T893 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.1526138118 |
|
|
Jan 17 04:55:00 PM PST 24 |
Jan 17 05:00:05 PM PST 24 |
4103669370 ps |
| T159 |
/workspace/coverage/default/1.chip_sw_gpio.2730473477 |
|
|
Jan 17 04:45:43 PM PST 24 |
Jan 17 04:54:18 PM PST 24 |
4014488860 ps |
| T894 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.584307930 |
|
|
Jan 17 04:58:16 PM PST 24 |
Jan 17 05:06:14 PM PST 24 |
3459410952 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1430734197 |
|
|
Jan 17 04:39:38 PM PST 24 |
Jan 17 06:31:41 PM PST 24 |
31258966024 ps |
| T84 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1070148895 |
|
|
Jan 17 04:59:47 PM PST 24 |
Jan 17 05:09:53 PM PST 24 |
9673894726 ps |
| T895 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1923853299 |
|
|
Jan 17 04:55:14 PM PST 24 |
Jan 17 05:10:48 PM PST 24 |
6040168720 ps |
| T896 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1000020131 |
|
|
Jan 17 04:46:17 PM PST 24 |
Jan 17 05:24:52 PM PST 24 |
22542857911 ps |
| T897 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1738105639 |
|
|
Jan 17 04:40:45 PM PST 24 |
Jan 17 05:36:13 PM PST 24 |
18434899183 ps |
| T898 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.1264636332 |
|
|
Jan 17 04:47:57 PM PST 24 |
Jan 17 05:40:56 PM PST 24 |
11938553476 ps |
| T899 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3391097460 |
|
|
Jan 17 04:39:30 PM PST 24 |
Jan 17 05:03:29 PM PST 24 |
12467638485 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1906869563 |
|
|
Jan 17 04:41:01 PM PST 24 |
Jan 17 04:50:41 PM PST 24 |
5249838307 ps |
| T181 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1390780996 |
|
|
Jan 17 04:55:37 PM PST 24 |
Jan 17 05:08:40 PM PST 24 |
4705258288 ps |
| T900 |
/workspace/coverage/default/2.chip_sw_aes_idle.3207433810 |
|
|
Jan 17 04:56:36 PM PST 24 |
Jan 17 05:01:53 PM PST 24 |
2836748252 ps |
| T901 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.4151437153 |
|
|
Jan 17 05:01:38 PM PST 24 |
Jan 17 05:16:47 PM PST 24 |
5869429632 ps |
| T902 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.275649506 |
|
|
Jan 17 04:39:25 PM PST 24 |
Jan 17 04:57:39 PM PST 24 |
5272661097 ps |
| T226 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.3596907781 |
|
|
Jan 17 04:59:25 PM PST 24 |
Jan 17 05:05:21 PM PST 24 |
3104412624 ps |
| T903 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.2438776593 |
|
|
Jan 17 04:48:02 PM PST 24 |
Jan 17 05:07:47 PM PST 24 |
10497033009 ps |
| T904 |
/workspace/coverage/default/0.rom_raw_unlock.3309574410 |
|
|
Jan 17 04:44:48 PM PST 24 |
Jan 17 05:18:51 PM PST 24 |
15813925641 ps |
| T905 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1435198586 |
|
|
Jan 17 04:40:20 PM PST 24 |
Jan 17 05:09:57 PM PST 24 |
13621622692 ps |
| T734 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1271623270 |
|
|
Jan 17 05:06:33 PM PST 24 |
Jan 17 05:12:45 PM PST 24 |
3406009800 ps |
| T906 |
/workspace/coverage/default/1.chip_sw_uart_smoketest_signed.2569896243 |
|
|
Jan 17 04:57:51 PM PST 24 |
Jan 17 05:33:22 PM PST 24 |
8208802484 ps |
| T907 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.1355031377 |
|
|
Jan 17 04:52:17 PM PST 24 |
Jan 17 04:56:24 PM PST 24 |
3150891921 ps |
| T140 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.4147587838 |
|
|
Jan 17 04:48:49 PM PST 24 |
Jan 17 04:55:15 PM PST 24 |
3493373329 ps |
| T216 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3111742282 |
|
|
Jan 17 04:43:17 PM PST 24 |
Jan 17 04:56:03 PM PST 24 |
3898197399 ps |
| T908 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1564877672 |
|
|
Jan 17 05:03:31 PM PST 24 |
Jan 17 05:17:06 PM PST 24 |
5892391754 ps |
| T909 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.2420088890 |
|
|
Jan 17 04:49:04 PM PST 24 |
Jan 17 05:34:49 PM PST 24 |
11759413158 ps |
| T910 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.2135426547 |
|
|
Jan 17 04:54:38 PM PST 24 |
Jan 17 07:42:23 PM PST 24 |
60460032830 ps |
| T665 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.1627420952 |
|
|
Jan 17 04:54:44 PM PST 24 |
Jan 17 05:08:11 PM PST 24 |
6461483984 ps |
| T155 |
/workspace/coverage/default/0.chip_sw_entropy_src_fuse_en_fw_read_test.1774095932 |
|
|
Jan 17 04:41:31 PM PST 24 |
Jan 17 04:51:22 PM PST 24 |
3979473320 ps |
| T648 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.106887752 |
|
|
Jan 17 04:56:06 PM PST 24 |
Jan 17 05:02:07 PM PST 24 |
3204452848 ps |
| T911 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.100531995 |
|
|
Jan 17 04:40:54 PM PST 24 |
Jan 17 04:48:34 PM PST 24 |
7570212956 ps |
| T912 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2323757787 |
|
|
Jan 17 04:47:21 PM PST 24 |
Jan 17 05:40:23 PM PST 24 |
17041678352 ps |
| T913 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.1375051008 |
|
|
Jan 17 04:39:04 PM PST 24 |
Jan 17 04:43:57 PM PST 24 |
4429306302 ps |
| T199 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.170347903 |
|
|
Jan 17 04:54:38 PM PST 24 |
Jan 17 05:00:18 PM PST 24 |
3136939342 ps |
| T914 |
/workspace/coverage/default/1.chip_sw_hmac_enc.1880914172 |
|
|
Jan 17 04:49:41 PM PST 24 |
Jan 17 04:55:25 PM PST 24 |
3231200072 ps |
| T915 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.3058428305 |
|
|
Jan 17 04:56:24 PM PST 24 |
Jan 17 05:05:21 PM PST 24 |
5315937752 ps |
| T916 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.3148261890 |
|
|
Jan 17 04:40:21 PM PST 24 |
Jan 17 04:45:14 PM PST 24 |
2642702178 ps |
| T308 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.4261220479 |
|
|
Jan 17 05:02:59 PM PST 24 |
Jan 17 05:31:08 PM PST 24 |
8839447219 ps |
| T699 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.1603224857 |
|
|
Jan 17 05:06:52 PM PST 24 |
Jan 17 05:14:08 PM PST 24 |
4243487582 ps |
| T107 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2020228450 |
|
|
Jan 17 04:55:48 PM PST 24 |
Jan 17 05:03:15 PM PST 24 |
8482563329 ps |
| T166 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3510200041 |
|
|
Jan 17 04:39:52 PM PST 24 |
Jan 17 04:53:42 PM PST 24 |
4161937560 ps |
| T917 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.3923126126 |
|
|
Jan 17 05:04:22 PM PST 24 |
Jan 17 05:37:53 PM PST 24 |
13119826454 ps |
| T918 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.3663427414 |
|
|
Jan 17 04:47:06 PM PST 24 |
Jan 17 05:22:39 PM PST 24 |
8736853064 ps |
| T666 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2508533165 |
|
|
Jan 17 05:10:04 PM PST 24 |
Jan 17 05:16:07 PM PST 24 |
3318323544 ps |
| T919 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3577464892 |
|
|
Jan 17 04:50:10 PM PST 24 |
Jan 17 04:59:34 PM PST 24 |
3628805496 ps |
| T23 |
/workspace/coverage/default/1.chip_sw_alert_test.2638067728 |
|
|
Jan 17 04:48:03 PM PST 24 |
Jan 17 04:52:28 PM PST 24 |
3000576136 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3031140776 |
|
|
Jan 17 04:42:55 PM PST 24 |
Jan 17 04:47:18 PM PST 24 |
2478473827 ps |
| T729 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.159761328 |
|
|
Jan 17 05:07:45 PM PST 24 |
Jan 17 05:17:52 PM PST 24 |
6095863304 ps |
| T920 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2190724095 |
|
|
Jan 17 04:52:27 PM PST 24 |
Jan 17 05:09:31 PM PST 24 |
7289711038 ps |
| T921 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.1222906885 |
|
|
Jan 17 05:03:35 PM PST 24 |
Jan 17 05:20:17 PM PST 24 |
12399193492 ps |
| T922 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3006542862 |
|
|
Jan 17 05:04:57 PM PST 24 |
Jan 17 05:11:20 PM PST 24 |
5446706828 ps |
| T178 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.3440666963 |
|
|
Jan 17 05:02:29 PM PST 24 |
Jan 17 05:14:54 PM PST 24 |
4489005156 ps |
| T923 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3060881820 |
|
|
Jan 17 04:54:40 PM PST 24 |
Jan 17 04:59:34 PM PST 24 |
2733768800 ps |
| T924 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1169787365 |
|
|
Jan 17 04:44:04 PM PST 24 |
Jan 17 04:48:22 PM PST 24 |
2685742800 ps |
| T580 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1702336027 |
|
|
Jan 17 04:40:41 PM PST 24 |
Jan 17 05:39:15 PM PST 24 |
24379575741 ps |
| T925 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3605032153 |
|
|
Jan 17 04:40:10 PM PST 24 |
Jan 17 04:50:01 PM PST 24 |
5094659920 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.3595190595 |
|
|
Jan 17 04:45:19 PM PST 24 |
Jan 17 04:59:04 PM PST 24 |
4601940500 ps |
| T124 |
/workspace/coverage/default/0.chip_sw_spi_device_tx_rx.3277370313 |
|
|
Jan 17 04:39:42 PM PST 24 |
Jan 17 04:46:33 PM PST 24 |
3907913496 ps |
| T927 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.1557960614 |
|
|
Jan 17 04:49:23 PM PST 24 |
Jan 17 04:56:47 PM PST 24 |
9831625966 ps |
| T928 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.4263932072 |
|
|
Jan 17 04:42:14 PM PST 24 |
Jan 17 05:00:55 PM PST 24 |
7212968344 ps |
| T249 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.637691970 |
|
|
Jan 17 04:40:24 PM PST 24 |
Jan 17 04:49:43 PM PST 24 |
4608349012 ps |
| T250 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.1656329532 |
|
|
Jan 17 05:07:33 PM PST 24 |
Jan 17 05:15:22 PM PST 24 |
5691183568 ps |
| T108 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1099435813 |
|
|
Jan 17 04:46:52 PM PST 24 |
Jan 17 04:55:36 PM PST 24 |
6791799400 ps |
| T721 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.3943874369 |
|
|
Jan 17 05:08:06 PM PST 24 |
Jan 17 05:18:55 PM PST 24 |
5639668376 ps |
| T929 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.1134795664 |
|
|
Jan 17 05:02:12 PM PST 24 |
Jan 17 05:19:45 PM PST 24 |
10456743591 ps |
| T930 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.315253745 |
|
|
Jan 17 04:55:36 PM PST 24 |
Jan 17 04:59:34 PM PST 24 |
2508327680 ps |
| T588 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1340647620 |
|
|
Jan 17 05:00:30 PM PST 24 |
Jan 17 05:08:50 PM PST 24 |
4166299789 ps |
| T931 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1298424274 |
|
|
Jan 17 04:46:04 PM PST 24 |
Jan 17 04:56:11 PM PST 24 |
5380819648 ps |
| T680 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.241728093 |
|
|
Jan 17 05:09:27 PM PST 24 |
Jan 17 05:22:23 PM PST 24 |
4462347890 ps |
| T730 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.573672530 |
|
|
Jan 17 05:05:43 PM PST 24 |
Jan 17 05:12:10 PM PST 24 |
3355866340 ps |
| T318 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3940141443 |
|
|
Jan 17 04:39:00 PM PST 24 |
Jan 17 04:42:58 PM PST 24 |
3027026410 ps |
| T932 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.4276624437 |
|
|
Jan 17 05:02:57 PM PST 24 |
Jan 17 05:16:31 PM PST 24 |
5992695504 ps |
| T933 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.52911658 |
|
|
Jan 17 04:56:49 PM PST 24 |
Jan 17 05:16:10 PM PST 24 |
5927143294 ps |
| T658 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.2838214138 |
|
|
Jan 17 05:03:27 PM PST 24 |
Jan 17 05:11:58 PM PST 24 |
3767019456 ps |
| T51 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3216427863 |
|
|
Jan 17 04:38:43 PM PST 24 |
Jan 17 04:43:41 PM PST 24 |
2898188014 ps |
| T109 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.2791679852 |
|
|
Jan 17 04:57:55 PM PST 24 |
Jan 17 05:01:57 PM PST 24 |
2663552956 ps |
| T934 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.481854779 |
|
|
Jan 17 04:40:38 PM PST 24 |
Jan 17 05:13:46 PM PST 24 |
8737798560 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1996477631 |
|
|
Jan 17 04:59:02 PM PST 24 |
Jan 17 05:10:44 PM PST 24 |
6685622389 ps |
| T935 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.985347676 |
|
|
Jan 17 04:46:08 PM PST 24 |
Jan 17 04:50:03 PM PST 24 |
2236539676 ps |
| T164 |
/workspace/coverage/default/2.chip_sival_flash_info_access.3659188986 |
|
|
Jan 17 04:54:09 PM PST 24 |
Jan 17 05:03:08 PM PST 24 |
3078787048 ps |
| T936 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2092180005 |
|
|
Jan 17 04:41:11 PM PST 24 |
Jan 17 05:01:13 PM PST 24 |
8066710372 ps |
| T167 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.896818776 |
|
|
Jan 17 04:56:15 PM PST 24 |
Jan 17 05:13:18 PM PST 24 |
4554875170 ps |
| T937 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.1665213388 |
|
|
Jan 17 04:39:03 PM PST 24 |
Jan 17 05:24:19 PM PST 24 |
36289110093 ps |
| T695 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.817941856 |
|
|
Jan 17 05:06:35 PM PST 24 |
Jan 17 05:12:12 PM PST 24 |
3150772600 ps |
| T938 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.482641266 |
|
|
Jan 17 05:04:16 PM PST 24 |
Jan 17 05:15:08 PM PST 24 |
4715108420 ps |
| T939 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.34522368 |
|
|
Jan 17 05:00:51 PM PST 24 |
Jan 17 05:18:00 PM PST 24 |
4856771112 ps |
| T940 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.497903108 |
|
|
Jan 17 05:05:34 PM PST 24 |
Jan 17 05:27:16 PM PST 24 |
6593500316 ps |
| T148 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.33032167 |
|
|
Jan 17 04:40:36 PM PST 24 |
Jan 17 04:48:34 PM PST 24 |
5105685012 ps |
| T941 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.3004476977 |
|
|
Jan 17 04:47:01 PM PST 24 |
Jan 17 05:19:24 PM PST 24 |
8400107340 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.1288063002 |
|
|
Jan 17 04:57:37 PM PST 24 |
Jan 17 05:21:42 PM PST 24 |
7212013400 ps |
| T942 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.618063863 |
|
|
Jan 17 04:45:22 PM PST 24 |
Jan 17 05:03:33 PM PST 24 |
5559469230 ps |
| T943 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.962071847 |
|
|
Jan 17 04:40:08 PM PST 24 |
Jan 17 04:51:07 PM PST 24 |
5535708024 ps |
| T944 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3077279435 |
|
|
Jan 17 04:41:36 PM PST 24 |
Jan 17 04:50:44 PM PST 24 |
4876051566 ps |
| T678 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.915406066 |
|
|
Jan 17 05:11:11 PM PST 24 |
Jan 17 05:16:49 PM PST 24 |
3672549276 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.989681957 |
|
|
Jan 17 04:44:14 PM PST 24 |
Jan 17 04:52:50 PM PST 24 |
4941204660 ps |
| T182 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.2570236143 |
|
|
Jan 17 04:39:31 PM PST 24 |
Jan 17 04:54:17 PM PST 24 |
4690004176 ps |
| T265 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.3064928522 |
|
|
Jan 17 05:09:38 PM PST 24 |
Jan 17 05:18:25 PM PST 24 |
4217787088 ps |
| T946 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.1030237368 |
|
|
Jan 17 04:47:09 PM PST 24 |
Jan 17 04:57:58 PM PST 24 |
5294419991 ps |
| T947 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.70588876 |
|
|
Jan 17 04:51:13 PM PST 24 |
Jan 17 05:04:24 PM PST 24 |
4895150778 ps |
| T948 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1787004143 |
|
|
Jan 17 04:41:38 PM PST 24 |
Jan 17 04:59:43 PM PST 24 |
5418870648 ps |
| T949 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1059356512 |
|
|
Jan 17 04:40:50 PM PST 24 |
Jan 17 04:47:31 PM PST 24 |
6976104565 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.1532741979 |
|
|
Jan 17 04:51:39 PM PST 24 |
Jan 17 04:55:52 PM PST 24 |
2598604504 ps |
| T180 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.2346110978 |
|
|
Jan 17 04:54:51 PM PST 24 |
Jan 17 05:11:06 PM PST 24 |
5125894450 ps |
| T950 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.1691317326 |
|
|
Jan 17 04:55:44 PM PST 24 |
Jan 17 05:04:41 PM PST 24 |
4981408492 ps |
| T951 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.1704464207 |
|
|
Jan 17 05:07:59 PM PST 24 |
Jan 17 05:16:37 PM PST 24 |
5464644864 ps |
| T726 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.3896649665 |
|
|
Jan 17 05:03:50 PM PST 24 |
Jan 17 05:14:49 PM PST 24 |
5933813250 ps |
| T741 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.1811899761 |
|
|
Jan 17 05:08:14 PM PST 24 |
Jan 17 05:18:14 PM PST 24 |
4287186940 ps |
| T952 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.2570582715 |
|
|
Jan 17 05:09:14 PM PST 24 |
Jan 17 05:15:05 PM PST 24 |
3590283368 ps |
| T593 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2780056417 |
|
|
Jan 17 04:38:39 PM PST 24 |
Jan 17 04:40:42 PM PST 24 |
3046893639 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3874474018 |
|
|
Jan 17 04:55:49 PM PST 24 |
Jan 17 05:00:20 PM PST 24 |
2772813292 ps |
| T125 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.652135844 |
|
|
Jan 17 04:50:34 PM PST 24 |
Jan 17 05:01:49 PM PST 24 |
4153648120 ps |
| T954 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.1177547783 |
|
|
Jan 17 05:03:33 PM PST 24 |
Jan 17 06:07:55 PM PST 24 |
23088755036 ps |
| T955 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.814272433 |
|
|
Jan 17 04:57:55 PM PST 24 |
Jan 17 05:02:39 PM PST 24 |
3142529760 ps |
| T147 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.3736499777 |
|
|
Jan 17 05:09:45 PM PST 24 |
Jan 17 05:19:21 PM PST 24 |
5469600088 ps |
| T727 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2643742232 |
|
|
Jan 17 05:02:35 PM PST 24 |
Jan 17 05:15:08 PM PST 24 |
4801186664 ps |
| T190 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.3631100925 |
|
|
Jan 17 04:45:35 PM PST 24 |
Jan 17 04:56:28 PM PST 24 |
4188886796 ps |
| T956 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.1600421071 |
|
|
Jan 17 04:46:30 PM PST 24 |
Jan 17 05:01:39 PM PST 24 |
8172360032 ps |
| T285 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2399626626 |
|
|
Jan 17 04:53:24 PM PST 24 |
Jan 17 05:02:31 PM PST 24 |
5366425576 ps |
| T957 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3120057436 |
|
|
Jan 17 04:56:21 PM PST 24 |
Jan 17 05:47:51 PM PST 24 |
33496569410 ps |
| T958 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.2516925315 |
|
|
Jan 17 04:44:05 PM PST 24 |
Jan 17 04:49:51 PM PST 24 |
4103679964 ps |
| T170 |
/workspace/coverage/default/2.chip_sw_gpio.1103909082 |
|
|
Jan 17 04:54:55 PM PST 24 |
Jan 17 05:05:01 PM PST 24 |
4340284152 ps |
| T959 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.2165274817 |
|
|
Jan 17 04:42:37 PM PST 24 |
Jan 17 05:35:49 PM PST 24 |
20436909424 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2267561763 |
|
|
Jan 17 04:43:14 PM PST 24 |
Jan 17 05:07:26 PM PST 24 |
11013336349 ps |
| T961 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.1022315438 |
|
|
Jan 17 04:43:21 PM PST 24 |
Jan 17 04:46:48 PM PST 24 |
2607427128 ps |
| T655 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2768330648 |
|
|
Jan 17 05:07:11 PM PST 24 |
Jan 17 05:15:35 PM PST 24 |
3887547480 ps |
| T962 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3259010699 |
|
|
Jan 17 04:42:14 PM PST 24 |
Jan 17 04:50:07 PM PST 24 |
4574566694 ps |
| T963 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.3198095186 |
|
|
Jan 17 04:40:34 PM PST 24 |
Jan 17 04:45:25 PM PST 24 |
3254504464 ps |