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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.78 95.37 94.46 98.06 95.24 97.93 99.61


Total test records in report: 2866
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T1279 /workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2717317111 Jan 17 05:04:59 PM PST 24 Jan 17 05:42:19 PM PST 24 13749527896 ps
T1280 /workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3788137470 Jan 17 04:58:24 PM PST 24 Jan 17 05:03:55 PM PST 24 3133132352 ps
T703 /workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.712169585 Jan 17 05:09:31 PM PST 24 Jan 17 05:15:40 PM PST 24 4096890800 ps
T1281 /workspace/coverage/default/5.chip_sw_data_integrity_escalation.3279139840 Jan 17 05:02:06 PM PST 24 Jan 17 05:11:30 PM PST 24 6281620610 ps
T1282 /workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.3530971166 Jan 17 04:50:16 PM PST 24 Jan 17 05:00:16 PM PST 24 5228576696 ps
T1283 /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.3461514043 Jan 17 05:09:31 PM PST 24 Jan 17 05:14:48 PM PST 24 3619456952 ps
T1284 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.370199020 Jan 17 04:46:36 PM PST 24 Jan 17 05:30:44 PM PST 24 12208518200 ps
T1285 /workspace/coverage/default/1.chip_sw_kmac_smoketest.3281267588 Jan 17 04:53:50 PM PST 24 Jan 17 04:59:23 PM PST 24 2874978900 ps
T1286 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.2208759834 Jan 17 04:59:08 PM PST 24 Jan 17 05:27:06 PM PST 24 8051836884 ps
T1287 /workspace/coverage/default/1.chip_sw_keymgr_key_derivation.1219982541 Jan 17 04:48:51 PM PST 24 Jan 17 04:55:26 PM PST 24 5057607670 ps
T1288 /workspace/coverage/default/0.rom_e2e_static_critical.4217822230 Jan 17 04:49:22 PM PST 24 Jan 17 05:31:28 PM PST 24 10696830972 ps
T1289 /workspace/coverage/default/4.chip_sw_uart_rand_baudrate.1122589348 Jan 17 05:02:25 PM PST 24 Jan 17 06:08:03 PM PST 24 22517142920 ps
T1290 /workspace/coverage/cover_reg_top/13.xbar_smoke_zero_delays.1719711789 Jan 17 04:19:10 PM PST 24 Jan 17 04:19:21 PM PST 24 49127637 ps
T1291 /workspace/coverage/cover_reg_top/16.xbar_smoke.4224687896 Jan 17 04:19:05 PM PST 24 Jan 17 04:19:21 PM PST 24 201655244 ps
T1292 /workspace/coverage/cover_reg_top/1.chip_csr_bit_bash.3337942274 Jan 17 04:18:24 PM PST 24 Jan 17 04:50:14 PM PST 24 14670576248 ps
T502 /workspace/coverage/cover_reg_top/84.xbar_stress_all_with_error.474682521 Jan 17 04:29:39 PM PST 24 Jan 17 04:42:12 PM PST 24 19127018483 ps
T1293 /workspace/coverage/cover_reg_top/39.xbar_smoke_large_delays.2537470197 Jan 17 04:22:56 PM PST 24 Jan 17 04:24:42 PM PST 24 9075620780 ps
T767 /workspace/coverage/cover_reg_top/67.xbar_random_slow_rsp.190367141 Jan 17 04:27:04 PM PST 24 Jan 17 04:31:17 PM PST 24 13706933278 ps
T743 /workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.1991753711 Jan 17 04:22:48 PM PST 24 Jan 17 04:44:43 PM PST 24 76479943734 ps
T1294 /workspace/coverage/cover_reg_top/28.xbar_error_and_unmapped_addr.3189014585 Jan 17 04:21:14 PM PST 24 Jan 17 04:21:55 PM PST 24 829108531 ps
T323 /workspace/coverage/cover_reg_top/5.chip_csr_mem_rw_with_rand_reset.989558606 Jan 17 04:19:03 PM PST 24 Jan 17 04:23:02 PM PST 24 5786194742 ps
T430 /workspace/coverage/cover_reg_top/83.xbar_same_source.1051239099 Jan 17 04:29:24 PM PST 24 Jan 17 04:30:01 PM PST 24 1303155882 ps
T112 /workspace/coverage/cover_reg_top/1.chip_csr_rw.3710403590 Jan 17 04:18:17 PM PST 24 Jan 17 04:23:14 PM PST 24 3738183731 ps
T650 /workspace/coverage/cover_reg_top/2.xbar_stress_all_with_error.3829458003 Jan 17 04:18:27 PM PST 24 Jan 17 04:22:30 PM PST 24 6668995489 ps
T752 /workspace/coverage/cover_reg_top/86.xbar_access_same_device_slow_rsp.1825260041 Jan 17 04:29:47 PM PST 24 Jan 17 04:34:14 PM PST 24 15112636444 ps
T575 /workspace/coverage/cover_reg_top/24.xbar_stress_all_with_error.64287791 Jan 17 04:20:37 PM PST 24 Jan 17 04:23:43 PM PST 24 4636986882 ps
T404 /workspace/coverage/cover_reg_top/1.chip_tl_errors.2336386674 Jan 17 04:18:27 PM PST 24 Jan 17 04:23:32 PM PST 24 3717305355 ps
T1295 /workspace/coverage/cover_reg_top/27.xbar_smoke_zero_delays.4045861738 Jan 17 04:21:18 PM PST 24 Jan 17 04:21:30 PM PST 24 47623880 ps
T471 /workspace/coverage/cover_reg_top/2.xbar_random_slow_rsp.2818753915 Jan 17 04:18:26 PM PST 24 Jan 17 04:24:28 PM PST 24 21296264580 ps
T425 /workspace/coverage/cover_reg_top/79.xbar_same_source.2379991347 Jan 17 04:28:53 PM PST 24 Jan 17 04:30:04 PM PST 24 2449056151 ps
T639 /workspace/coverage/cover_reg_top/11.xbar_random_slow_rsp.3693819058 Jan 17 04:18:49 PM PST 24 Jan 17 04:21:04 PM PST 24 7613287785 ps
T573 /workspace/coverage/cover_reg_top/13.chip_csr_mem_rw_with_rand_reset.331628305 Jan 17 04:19:03 PM PST 24 Jan 17 04:22:42 PM PST 24 4860064057 ps
T1296 /workspace/coverage/cover_reg_top/65.xbar_smoke_zero_delays.49842799 Jan 17 04:26:36 PM PST 24 Jan 17 04:26:48 PM PST 24 41140513 ps
T768 /workspace/coverage/cover_reg_top/71.xbar_access_same_device_slow_rsp.250266918 Jan 17 04:27:35 PM PST 24 Jan 17 04:35:17 PM PST 24 26059240562 ps
T765 /workspace/coverage/cover_reg_top/36.xbar_smoke_slow_rsp.3647658142 Jan 17 04:22:21 PM PST 24 Jan 17 04:23:51 PM PST 24 4703582750 ps
T113 /workspace/coverage/cover_reg_top/4.chip_same_csr_outstanding.2620842315 Jan 17 04:18:35 PM PST 24 Jan 17 04:51:55 PM PST 24 15091781430 ps
T1297 /workspace/coverage/cover_reg_top/89.xbar_same_source.2571015186 Jan 17 04:30:14 PM PST 24 Jan 17 04:30:36 PM PST 24 309531493 ps
T521 /workspace/coverage/cover_reg_top/38.xbar_stress_all_with_error.141712460 Jan 17 04:22:51 PM PST 24 Jan 17 04:26:02 PM PST 24 4440048785 ps
T539 /workspace/coverage/cover_reg_top/69.xbar_random_slow_rsp.3551646239 Jan 17 04:27:19 PM PST 24 Jan 17 04:40:08 PM PST 24 41117635730 ps
T501 /workspace/coverage/cover_reg_top/19.xbar_stress_all_with_rand_reset.2757488596 Jan 17 04:19:59 PM PST 24 Jan 17 04:23:46 PM PST 24 2459267943 ps
T774 /workspace/coverage/cover_reg_top/52.xbar_stress_all_with_reset_error.643273389 Jan 17 04:25:04 PM PST 24 Jan 17 04:28:03 PM PST 24 554043539 ps
T527 /workspace/coverage/cover_reg_top/2.xbar_unmapped_addr.470520672 Jan 17 04:18:50 PM PST 24 Jan 17 04:18:59 PM PST 24 38919260 ps
T783 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_reset_error.1504254702 Jan 17 04:31:31 PM PST 24 Jan 17 04:32:51 PM PST 24 256929701 ps
T572 /workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.2620125540 Jan 17 04:18:51 PM PST 24 Jan 17 04:22:33 PM PST 24 6175649988 ps
T1298 /workspace/coverage/cover_reg_top/93.xbar_access_same_device.2193846510 Jan 17 04:30:57 PM PST 24 Jan 17 04:31:20 PM PST 24 260423557 ps
T451 /workspace/coverage/cover_reg_top/41.xbar_stress_all_with_reset_error.2735706439 Jan 17 04:23:36 PM PST 24 Jan 17 04:28:38 PM PST 24 3418160972 ps
T1299 /workspace/coverage/cover_reg_top/34.xbar_smoke_slow_rsp.573262658 Jan 17 04:22:06 PM PST 24 Jan 17 04:23:41 PM PST 24 5569801764 ps
T302 /workspace/coverage/cover_reg_top/15.chip_csr_rw.3501483586 Jan 17 04:19:16 PM PST 24 Jan 17 04:26:18 PM PST 24 5796719405 ps
T1300 /workspace/coverage/cover_reg_top/62.xbar_random_zero_delays.84339370 Jan 17 04:26:24 PM PST 24 Jan 17 04:26:41 PM PST 24 189244404 ps
T1301 /workspace/coverage/cover_reg_top/9.xbar_smoke_slow_rsp.3059937731 Jan 17 04:18:46 PM PST 24 Jan 17 04:19:55 PM PST 24 3851883562 ps
T460 /workspace/coverage/cover_reg_top/22.xbar_random_zero_delays.1196219553 Jan 17 04:20:22 PM PST 24 Jan 17 04:21:08 PM PST 24 561418963 ps
T766 /workspace/coverage/cover_reg_top/91.xbar_stress_all_with_reset_error.898796526 Jan 17 04:30:36 PM PST 24 Jan 17 04:33:37 PM PST 24 655149297 ps
T380 /workspace/coverage/cover_reg_top/91.xbar_random.1007259785 Jan 17 04:30:30 PM PST 24 Jan 17 04:31:09 PM PST 24 503529561 ps
T1302 /workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.3837817654 Jan 17 04:31:10 PM PST 24 Jan 17 04:32:01 PM PST 24 618095751 ps
T1303 /workspace/coverage/cover_reg_top/41.xbar_smoke.1976794765 Jan 17 04:23:12 PM PST 24 Jan 17 04:23:21 PM PST 24 138182011 ps
T578 /workspace/coverage/cover_reg_top/77.xbar_stress_all_with_reset_error.3588953418 Jan 17 04:28:57 PM PST 24 Jan 17 04:31:31 PM PST 24 721194831 ps
T769 /workspace/coverage/cover_reg_top/72.xbar_error_random.4026204554 Jan 17 04:27:51 PM PST 24 Jan 17 04:28:48 PM PST 24 1659753332 ps
T751 /workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.3779698991 Jan 17 04:31:29 PM PST 24 Jan 17 04:52:28 PM PST 24 65651258074 ps
T413 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.285213823 Jan 17 04:18:52 PM PST 24 Jan 17 04:36:39 PM PST 24 25098370562 ps
T481 /workspace/coverage/cover_reg_top/46.xbar_random_slow_rsp.131363549 Jan 17 04:24:05 PM PST 24 Jan 17 04:43:09 PM PST 24 61259609999 ps
T1304 /workspace/coverage/cover_reg_top/62.xbar_smoke_large_delays.4052411621 Jan 17 04:26:34 PM PST 24 Jan 17 04:27:56 PM PST 24 6598505550 ps
T1305 /workspace/coverage/cover_reg_top/2.chip_prim_tl_access.3417720106 Jan 17 04:18:25 PM PST 24 Jan 17 04:24:04 PM PST 24 8353927600 ps
T545 /workspace/coverage/cover_reg_top/35.xbar_random_large_delays.2940967219 Jan 17 04:22:09 PM PST 24 Jan 17 04:38:21 PM PST 24 88143347276 ps
T1306 /workspace/coverage/cover_reg_top/18.xbar_error_and_unmapped_addr.2449452955 Jan 17 04:19:39 PM PST 24 Jan 17 04:19:46 PM PST 24 52399717 ps
T754 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_error.1015450890 Jan 17 04:30:10 PM PST 24 Jan 17 04:43:06 PM PST 24 19169579481 ps
T506 /workspace/coverage/cover_reg_top/62.xbar_unmapped_addr.2479359443 Jan 17 04:26:27 PM PST 24 Jan 17 04:26:44 PM PST 24 106960677 ps
T620 /workspace/coverage/cover_reg_top/6.chip_csr_mem_rw_with_rand_reset.3724996470 Jan 17 04:18:57 PM PST 24 Jan 17 04:22:16 PM PST 24 4525339935 ps
T342 /workspace/coverage/cover_reg_top/13.chip_csr_rw.1774001581 Jan 17 04:19:13 PM PST 24 Jan 17 04:23:16 PM PST 24 3579136557 ps
T443 /workspace/coverage/cover_reg_top/89.xbar_access_same_device_slow_rsp.2985405125 Jan 17 04:30:19 PM PST 24 Jan 17 04:56:15 PM PST 24 87915056181 ps
T772 /workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.208619789 Jan 17 04:31:31 PM PST 24 Jan 17 04:41:15 PM PST 24 32587608748 ps
T461 /workspace/coverage/cover_reg_top/1.xbar_same_source.2009610712 Jan 17 04:18:17 PM PST 24 Jan 17 04:19:16 PM PST 24 1844598237 ps
T406 /workspace/coverage/cover_reg_top/22.xbar_stress_all.752790241 Jan 17 04:20:30 PM PST 24 Jan 17 04:27:57 PM PST 24 4706486708 ps
T511 /workspace/coverage/cover_reg_top/38.xbar_same_source.2652823862 Jan 17 04:22:42 PM PST 24 Jan 17 04:23:44 PM PST 24 1990180985 ps
T453 /workspace/coverage/cover_reg_top/55.xbar_random_large_delays.2516927748 Jan 17 04:25:18 PM PST 24 Jan 17 04:32:31 PM PST 24 39232284110 ps
T472 /workspace/coverage/cover_reg_top/5.xbar_unmapped_addr.1038473240 Jan 17 04:18:46 PM PST 24 Jan 17 04:19:10 PM PST 24 440207606 ps
T1307 /workspace/coverage/cover_reg_top/48.xbar_random.398165614 Jan 17 04:24:28 PM PST 24 Jan 17 04:24:49 PM PST 24 380678495 ps
T427 /workspace/coverage/cover_reg_top/96.xbar_random_slow_rsp.2640160948 Jan 17 04:31:30 PM PST 24 Jan 17 04:50:37 PM PST 24 56842618861 ps
T762 /workspace/coverage/cover_reg_top/58.xbar_stress_all_with_error.3585856112 Jan 17 04:25:52 PM PST 24 Jan 17 04:28:12 PM PST 24 4352813714 ps
T1308 /workspace/coverage/cover_reg_top/47.xbar_error_random.993409997 Jan 17 04:24:15 PM PST 24 Jan 17 04:25:31 PM PST 24 2170875388 ps
T426 /workspace/coverage/cover_reg_top/15.xbar_stress_all.2210274125 Jan 17 04:19:04 PM PST 24 Jan 17 04:20:56 PM PST 24 1255356427 ps
T450 /workspace/coverage/cover_reg_top/58.xbar_stress_all.1635080925 Jan 17 04:25:54 PM PST 24 Jan 17 04:27:28 PM PST 24 1126534985 ps
T436 /workspace/coverage/cover_reg_top/46.xbar_stress_all.4139644212 Jan 17 04:24:08 PM PST 24 Jan 17 04:28:21 PM PST 24 2900709630 ps
T1309 /workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.2129208819 Jan 17 04:18:57 PM PST 24 Jan 17 04:20:12 PM PST 24 4262770975 ps
T469 /workspace/coverage/cover_reg_top/29.xbar_random_zero_delays.1250889224 Jan 17 04:21:15 PM PST 24 Jan 17 04:21:50 PM PST 24 246764534 ps
T1310 /workspace/coverage/cover_reg_top/19.xbar_error_random.1864972215 Jan 17 04:20:02 PM PST 24 Jan 17 04:20:51 PM PST 24 1308043077 ps
T755 /workspace/coverage/cover_reg_top/50.xbar_stress_all_with_reset_error.1677927773 Jan 17 04:24:40 PM PST 24 Jan 17 04:32:40 PM PST 24 10252907703 ps
T1311 /workspace/coverage/cover_reg_top/55.xbar_same_source.2372614760 Jan 17 04:25:26 PM PST 24 Jan 17 04:25:41 PM PST 24 436272517 ps
T300 /workspace/coverage/cover_reg_top/6.chip_same_csr_outstanding.572693301 Jan 17 04:19:13 PM PST 24 Jan 17 05:16:56 PM PST 24 29856037662 ps
T1312 /workspace/coverage/cover_reg_top/97.xbar_error_random.691314056 Jan 17 04:31:36 PM PST 24 Jan 17 04:32:05 PM PST 24 203850418 ps
T1313 /workspace/coverage/cover_reg_top/32.xbar_smoke_large_delays.3654312947 Jan 17 04:21:48 PM PST 24 Jan 17 04:23:04 PM PST 24 7015615562 ps
T749 /workspace/coverage/cover_reg_top/64.xbar_stress_all_with_error.3520808799 Jan 17 04:26:38 PM PST 24 Jan 17 04:29:03 PM PST 24 1807951369 ps
T547 /workspace/coverage/cover_reg_top/9.xbar_random_zero_delays.1861753489 Jan 17 04:18:54 PM PST 24 Jan 17 04:19:12 PM PST 24 180452253 ps
T1314 /workspace/coverage/cover_reg_top/10.xbar_error_random.2867893504 Jan 17 04:18:41 PM PST 24 Jan 17 04:19:03 PM PST 24 111186954 ps
T435 /workspace/coverage/cover_reg_top/56.xbar_same_source.88915141 Jan 17 04:25:32 PM PST 24 Jan 17 04:26:14 PM PST 24 581039403 ps
T1315 /workspace/coverage/cover_reg_top/97.xbar_smoke.3464908210 Jan 17 04:31:29 PM PST 24 Jan 17 04:31:43 PM PST 24 59902744 ps
T775 /workspace/coverage/cover_reg_top/76.xbar_stress_all_with_reset_error.2731799674 Jan 17 04:28:27 PM PST 24 Jan 17 04:30:55 PM PST 24 1367541072 ps
T464 /workspace/coverage/cover_reg_top/64.xbar_random_zero_delays.687281178 Jan 17 04:26:43 PM PST 24 Jan 17 04:27:01 PM PST 24 198582860 ps
T1316 /workspace/coverage/cover_reg_top/47.xbar_smoke.2224512663 Jan 17 04:24:14 PM PST 24 Jan 17 04:24:23 PM PST 24 178256473 ps
T756 /workspace/coverage/cover_reg_top/26.xbar_access_same_device_slow_rsp.3858487802 Jan 17 04:20:47 PM PST 24 Jan 17 04:39:49 PM PST 24 63346588180 ps
T440 /workspace/coverage/cover_reg_top/19.xbar_random_zero_delays.1082379734 Jan 17 04:19:46 PM PST 24 Jan 17 04:20:47 PM PST 24 586400336 ps
T483 /workspace/coverage/cover_reg_top/26.xbar_random_large_delays.1929729391 Jan 17 04:21:04 PM PST 24 Jan 17 04:25:42 PM PST 24 27266234109 ps
T401 /workspace/coverage/cover_reg_top/18.xbar_random_zero_delays.2522354471 Jan 17 04:19:33 PM PST 24 Jan 17 04:19:48 PM PST 24 165829176 ps
T811 /workspace/coverage/cover_reg_top/78.xbar_stress_all_with_reset_error.2976587182 Jan 17 04:28:49 PM PST 24 Jan 17 04:29:36 PM PST 24 182997346 ps
T411 /workspace/coverage/cover_reg_top/24.xbar_stress_all.1197469750 Jan 17 04:20:38 PM PST 24 Jan 17 04:23:56 PM PST 24 5058531865 ps
T1317 /workspace/coverage/cover_reg_top/59.xbar_error_random.1500409025 Jan 17 04:25:56 PM PST 24 Jan 17 04:26:36 PM PST 24 1217418166 ps
T1318 /workspace/coverage/cover_reg_top/62.xbar_error_random.398163536 Jan 17 04:26:33 PM PST 24 Jan 17 04:27:01 PM PST 24 826732430 ps
T1319 /workspace/coverage/cover_reg_top/87.xbar_smoke.614970912 Jan 17 04:29:58 PM PST 24 Jan 17 04:30:08 PM PST 24 220304429 ps
T475 /workspace/coverage/cover_reg_top/15.xbar_random_zero_delays.1427270733 Jan 17 04:19:15 PM PST 24 Jan 17 04:19:47 PM PST 24 328004437 ps
T420 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_rand_reset.3519556661 Jan 17 04:21:16 PM PST 24 Jan 17 04:25:54 PM PST 24 2841864153 ps
T441 /workspace/coverage/cover_reg_top/12.xbar_unmapped_addr.122477041 Jan 17 04:19:01 PM PST 24 Jan 17 04:20:04 PM PST 24 1364677940 ps
T1320 /workspace/coverage/cover_reg_top/4.xbar_smoke.2619814709 Jan 17 04:18:40 PM PST 24 Jan 17 04:18:54 PM PST 24 47594796 ps
T516 /workspace/coverage/cover_reg_top/29.xbar_smoke_zero_delays.220739676 Jan 17 04:21:18 PM PST 24 Jan 17 04:21:31 PM PST 24 53757495 ps
T1321 /workspace/coverage/cover_reg_top/36.xbar_error_random.220109832 Jan 17 04:22:24 PM PST 24 Jan 17 04:23:26 PM PST 24 1846496281 ps
T442 /workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.4214325249 Jan 17 04:19:11 PM PST 24 Jan 17 04:19:41 PM PST 24 286000524 ps
T520 /workspace/coverage/cover_reg_top/17.xbar_unmapped_addr.3076477570 Jan 17 04:19:21 PM PST 24 Jan 17 04:20:12 PM PST 24 1256976401 ps
T485 /workspace/coverage/cover_reg_top/98.xbar_random_zero_delays.1468382750 Jan 17 04:31:46 PM PST 24 Jan 17 04:32:21 PM PST 24 213672789 ps
T1322 /workspace/coverage/cover_reg_top/86.xbar_smoke_zero_delays.1119659096 Jan 17 04:29:51 PM PST 24 Jan 17 04:29:58 PM PST 24 43685639 ps
T784 /workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.238098117 Jan 17 04:31:32 PM PST 24 Jan 17 04:39:26 PM PST 24 4209688847 ps
T1323 /workspace/coverage/cover_reg_top/31.xbar_error_random.3730724689 Jan 17 04:21:34 PM PST 24 Jan 17 04:22:13 PM PST 24 509449825 ps
T408 /workspace/coverage/cover_reg_top/97.xbar_stress_all.1352740077 Jan 17 04:31:34 PM PST 24 Jan 17 04:40:20 PM PST 24 13028055968 ps
T1324 /workspace/coverage/cover_reg_top/54.xbar_error_and_unmapped_addr.2416166761 Jan 17 04:25:25 PM PST 24 Jan 17 04:25:36 PM PST 24 69290476 ps
T497 /workspace/coverage/cover_reg_top/34.xbar_smoke_zero_delays.3910071315 Jan 17 04:22:07 PM PST 24 Jan 17 04:22:17 PM PST 24 46179504 ps
T1325 /workspace/coverage/cover_reg_top/85.xbar_error_and_unmapped_addr.3733649491 Jan 17 04:29:43 PM PST 24 Jan 17 04:29:57 PM PST 24 147901115 ps
T410 /workspace/coverage/cover_reg_top/12.xbar_stress_all.3154676077 Jan 17 04:19:10 PM PST 24 Jan 17 04:20:14 PM PST 24 689400338 ps
T1326 /workspace/coverage/cover_reg_top/80.xbar_error_and_unmapped_addr.318612402 Jan 17 04:29:08 PM PST 24 Jan 17 04:29:28 PM PST 24 267486688 ps
T1327 /workspace/coverage/cover_reg_top/40.xbar_smoke.1806030943 Jan 17 04:23:01 PM PST 24 Jan 17 04:23:11 PM PST 24 205235603 ps
T448 /workspace/coverage/cover_reg_top/63.xbar_stress_all.1925728610 Jan 17 04:26:40 PM PST 24 Jan 17 04:28:10 PM PST 24 2785165158 ps
T1328 /workspace/coverage/cover_reg_top/15.xbar_smoke_zero_delays.1257062559 Jan 17 04:18:52 PM PST 24 Jan 17 04:19:01 PM PST 24 58799715 ps
T405 /workspace/coverage/cover_reg_top/16.chip_tl_errors.2392212654 Jan 17 04:19:04 PM PST 24 Jan 17 04:24:54 PM PST 24 3843814332 ps
T1329 /workspace/coverage/cover_reg_top/55.xbar_smoke_slow_rsp.1180545459 Jan 17 04:25:18 PM PST 24 Jan 17 04:26:58 PM PST 24 5988510533 ps
T1330 /workspace/coverage/cover_reg_top/45.xbar_smoke.1253594586 Jan 17 04:23:50 PM PST 24 Jan 17 04:24:03 PM PST 24 235398456 ps
T421 /workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.1445660408 Jan 17 04:30:30 PM PST 24 Jan 17 04:37:42 PM PST 24 2868987590 ps
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