| T230 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1602353142 |
|
|
Jan 17 05:01:01 PM PST 24 |
Jan 17 05:05:14 PM PST 24 |
2032243336 ps |
| T328 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.3120787671 |
|
|
Jan 17 04:53:52 PM PST 24 |
Jan 17 04:58:07 PM PST 24 |
2819449194 ps |
| T329 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.2704860788 |
|
|
Jan 17 04:47:23 PM PST 24 |
Jan 17 05:21:37 PM PST 24 |
8752938872 ps |
| T330 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.3711036444 |
|
|
Jan 17 04:39:29 PM PST 24 |
Jan 17 04:43:23 PM PST 24 |
3636488854 ps |
| T331 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.340100765 |
|
|
Jan 17 04:59:23 PM PST 24 |
Jan 17 06:00:10 PM PST 24 |
16075234928 ps |
| T332 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg.252731573 |
|
|
Jan 17 04:54:36 PM PST 24 |
Jan 17 04:59:13 PM PST 24 |
3363425564 ps |
| T333 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.3225960529 |
|
|
Jan 17 04:55:51 PM PST 24 |
Jan 17 05:05:44 PM PST 24 |
4521932737 ps |
| T334 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.903407927 |
|
|
Jan 17 05:10:20 PM PST 24 |
Jan 17 05:15:56 PM PST 24 |
3212433704 ps |
| T335 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1347645300 |
|
|
Jan 17 05:06:22 PM PST 24 |
Jan 17 05:11:56 PM PST 24 |
3530393872 ps |
| T336 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2747194420 |
|
|
Jan 17 04:55:30 PM PST 24 |
Jan 17 05:05:39 PM PST 24 |
6092411682 ps |
| T1105 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3742666682 |
|
|
Jan 17 04:54:24 PM PST 24 |
Jan 17 05:11:04 PM PST 24 |
5000889471 ps |
| T1106 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg.2239514702 |
|
|
Jan 17 04:39:57 PM PST 24 |
Jan 17 04:45:36 PM PST 24 |
3402290024 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2292556333 |
|
|
Jan 17 04:54:07 PM PST 24 |
Jan 17 08:21:17 PM PST 24 |
73204203380 ps |
| T1108 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.4149038821 |
|
|
Jan 17 04:56:08 PM PST 24 |
Jan 17 05:26:36 PM PST 24 |
8571925858 ps |
| T1109 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.1515758997 |
|
|
Jan 17 04:48:58 PM PST 24 |
Jan 17 04:53:01 PM PST 24 |
2576805006 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.4288409080 |
|
|
Jan 17 04:39:21 PM PST 24 |
Jan 17 04:50:25 PM PST 24 |
4745307668 ps |
| T1111 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.4171882638 |
|
|
Jan 17 04:40:44 PM PST 24 |
Jan 17 05:03:12 PM PST 24 |
9684482968 ps |
| T720 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.2881110906 |
|
|
Jan 17 05:03:55 PM PST 24 |
Jan 17 05:12:10 PM PST 24 |
5714247400 ps |
| T692 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.843960602 |
|
|
Jan 17 05:10:43 PM PST 24 |
Jan 17 05:17:21 PM PST 24 |
3614272438 ps |
| T1112 |
/workspace/coverage/default/2.chip_sw_aes_entropy.3924973144 |
|
|
Jan 17 04:56:41 PM PST 24 |
Jan 17 05:02:31 PM PST 24 |
3660951024 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.1415198447 |
|
|
Jan 17 04:58:13 PM PST 24 |
Jan 17 05:12:00 PM PST 24 |
7089254540 ps |
| T1113 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.3378187014 |
|
|
Jan 17 05:05:11 PM PST 24 |
Jan 17 05:13:12 PM PST 24 |
5295963827 ps |
| T1114 |
/workspace/coverage/default/2.chip_tap_straps_prod.3300961244 |
|
|
Jan 17 04:59:40 PM PST 24 |
Jan 17 05:02:03 PM PST 24 |
2062871185 ps |
| T723 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.621420705 |
|
|
Jan 17 05:10:36 PM PST 24 |
Jan 17 05:19:29 PM PST 24 |
5298292268 ps |
| T1115 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1292004405 |
|
|
Jan 17 04:45:09 PM PST 24 |
Jan 17 07:35:24 PM PST 24 |
59582278300 ps |
| T1116 |
/workspace/coverage/default/1.chip_sw_example_rom.2227960449 |
|
|
Jan 17 04:43:35 PM PST 24 |
Jan 17 04:45:48 PM PST 24 |
2257870888 ps |
| T739 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.413918980 |
|
|
Jan 17 05:08:18 PM PST 24 |
Jan 17 05:14:37 PM PST 24 |
3830526548 ps |
| T1117 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3143571887 |
|
|
Jan 17 04:56:05 PM PST 24 |
Jan 17 05:18:52 PM PST 24 |
8998974076 ps |
| T693 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.4024262312 |
|
|
Jan 17 05:06:14 PM PST 24 |
Jan 17 05:12:55 PM PST 24 |
4314615452 ps |
| T1118 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.2181378983 |
|
|
Jan 17 05:00:28 PM PST 24 |
Jan 17 05:10:47 PM PST 24 |
5344334598 ps |
| T1119 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.584611422 |
|
|
Jan 17 04:43:50 PM PST 24 |
Jan 17 04:46:59 PM PST 24 |
2277890620 ps |
| T1120 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.2409126103 |
|
|
Jan 17 04:54:33 PM PST 24 |
Jan 17 05:26:20 PM PST 24 |
31721998424 ps |
| T1121 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1094808051 |
|
|
Jan 17 04:54:34 PM PST 24 |
Jan 17 05:34:03 PM PST 24 |
12705544333 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1294323786 |
|
|
Jan 17 04:57:22 PM PST 24 |
Jan 17 05:05:41 PM PST 24 |
3964697254 ps |
| T1123 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.832392247 |
|
|
Jan 17 05:00:14 PM PST 24 |
Jan 17 05:08:56 PM PST 24 |
5064612824 ps |
| T1124 |
/workspace/coverage/default/2.rom_raw_unlock.2497776369 |
|
|
Jan 17 05:01:04 PM PST 24 |
Jan 17 05:33:27 PM PST 24 |
14808553559 ps |
| T1125 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3006078066 |
|
|
Jan 17 05:06:30 PM PST 24 |
Jan 17 05:13:27 PM PST 24 |
3698260910 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.4048512454 |
|
|
Jan 17 04:41:46 PM PST 24 |
Jan 17 05:19:12 PM PST 24 |
11868845560 ps |
| T1127 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2027814176 |
|
|
Jan 17 04:55:57 PM PST 24 |
Jan 17 05:01:54 PM PST 24 |
2735228468 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.4265834315 |
|
|
Jan 17 04:40:24 PM PST 24 |
Jan 17 04:55:57 PM PST 24 |
4674974488 ps |
| T740 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.3835382973 |
|
|
Jan 17 05:07:12 PM PST 24 |
Jan 17 05:13:15 PM PST 24 |
3277698920 ps |
| T1129 |
/workspace/coverage/default/4.chip_tap_straps_rma.854469999 |
|
|
Jan 17 05:02:08 PM PST 24 |
Jan 17 05:08:44 PM PST 24 |
3831617461 ps |
| T1130 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.1126415777 |
|
|
Jan 17 04:40:25 PM PST 24 |
Jan 17 04:53:05 PM PST 24 |
9927048514 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.305271723 |
|
|
Jan 17 04:43:39 PM PST 24 |
Jan 17 04:58:59 PM PST 24 |
5301414950 ps |
| T1132 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1633037257 |
|
|
Jan 17 04:55:11 PM PST 24 |
Jan 17 05:07:02 PM PST 24 |
5747811168 ps |
| T1133 |
/workspace/coverage/default/0.rom_keymgr_functest.3011952276 |
|
|
Jan 17 04:44:10 PM PST 24 |
Jan 17 04:56:12 PM PST 24 |
4140312190 ps |
| T1134 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3713037936 |
|
|
Jan 17 05:01:06 PM PST 24 |
Jan 17 05:05:53 PM PST 24 |
2789639318 ps |
| T1135 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.228653601 |
|
|
Jan 17 04:53:56 PM PST 24 |
Jan 17 05:00:06 PM PST 24 |
3067405034 ps |
| T742 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1676067115 |
|
|
Jan 17 05:03:14 PM PST 24 |
Jan 17 05:10:32 PM PST 24 |
4258650304 ps |
| T1136 |
/workspace/coverage/default/4.chip_tap_straps_dev.1557431260 |
|
|
Jan 17 05:02:07 PM PST 24 |
Jan 17 05:07:07 PM PST 24 |
3431044475 ps |
| T15 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.4042721445 |
|
|
Jan 17 04:38:52 PM PST 24 |
Jan 17 04:44:18 PM PST 24 |
3484688162 ps |
| T1137 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.702525540 |
|
|
Jan 17 04:48:46 PM PST 24 |
Jan 17 04:52:11 PM PST 24 |
3092514728 ps |
| T1138 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2788779556 |
|
|
Jan 17 04:42:31 PM PST 24 |
Jan 17 04:50:49 PM PST 24 |
6240574644 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.305522233 |
|
|
Jan 17 04:56:04 PM PST 24 |
Jan 17 05:08:04 PM PST 24 |
5590681448 ps |
| T1140 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.2614196756 |
|
|
Jan 17 04:55:45 PM PST 24 |
Jan 17 05:28:06 PM PST 24 |
8680438360 ps |
| T1141 |
/workspace/coverage/default/1.chip_tap_straps_dev.606014063 |
|
|
Jan 17 04:50:30 PM PST 24 |
Jan 17 04:53:21 PM PST 24 |
2788989757 ps |
| T711 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1689995336 |
|
|
Jan 17 05:06:32 PM PST 24 |
Jan 17 05:13:22 PM PST 24 |
3621906288 ps |
| T631 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1974173028 |
|
|
Jan 17 04:58:46 PM PST 24 |
Jan 17 05:06:20 PM PST 24 |
3826469850 ps |
| T1142 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.3554201060 |
|
|
Jan 17 04:43:57 PM PST 24 |
Jan 17 04:48:20 PM PST 24 |
3660930152 ps |
| T123 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.1758901403 |
|
|
Jan 17 04:55:14 PM PST 24 |
Jan 17 05:04:38 PM PST 24 |
4208420277 ps |
| T1143 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.2137044211 |
|
|
Jan 17 04:57:11 PM PST 24 |
Jan 17 05:07:20 PM PST 24 |
5697847640 ps |
| T1144 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.2518420502 |
|
|
Jan 17 04:54:06 PM PST 24 |
Jan 17 05:22:55 PM PST 24 |
8807147812 ps |
| T231 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.753552964 |
|
|
Jan 17 04:41:35 PM PST 24 |
Jan 17 04:47:33 PM PST 24 |
3076457332 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2955321478 |
|
|
Jan 17 04:56:58 PM PST 24 |
Jan 17 05:11:22 PM PST 24 |
5374087840 ps |
| T1146 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.3502140140 |
|
|
Jan 17 05:01:28 PM PST 24 |
Jan 17 05:20:18 PM PST 24 |
5313947482 ps |
| T126 |
/workspace/coverage/default/1.chip_sw_spi_device_tx_rx.546924532 |
|
|
Jan 17 04:44:10 PM PST 24 |
Jan 17 04:48:52 PM PST 24 |
3227251550 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.540216757 |
|
|
Jan 17 04:54:52 PM PST 24 |
Jan 17 05:04:54 PM PST 24 |
5135108976 ps |
| T1148 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.2064785589 |
|
|
Jan 17 04:54:47 PM PST 24 |
Jan 17 05:00:13 PM PST 24 |
2849112168 ps |
| T1149 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.2368181901 |
|
|
Jan 17 04:50:50 PM PST 24 |
Jan 17 04:56:40 PM PST 24 |
5911958790 ps |
| T676 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3086837391 |
|
|
Jan 17 05:04:53 PM PST 24 |
Jan 17 05:12:43 PM PST 24 |
3878762148 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.239483654 |
|
|
Jan 17 04:51:12 PM PST 24 |
Jan 17 04:55:29 PM PST 24 |
2861944400 ps |
| T1150 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2072260068 |
|
|
Jan 17 04:57:36 PM PST 24 |
Jan 17 05:13:56 PM PST 24 |
5075267096 ps |
| T1151 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.3142440435 |
|
|
Jan 17 05:05:45 PM PST 24 |
Jan 17 05:17:34 PM PST 24 |
6129738416 ps |
| T6 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.731675160 |
|
|
Jan 17 04:54:51 PM PST 24 |
Jan 17 05:01:39 PM PST 24 |
3566825476 ps |
| T1152 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.1173411112 |
|
|
Jan 17 04:58:16 PM PST 24 |
Jan 17 05:05:27 PM PST 24 |
3677529500 ps |
| T690 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.2448828304 |
|
|
Jan 17 05:06:10 PM PST 24 |
Jan 17 05:15:20 PM PST 24 |
5045183084 ps |
| T1153 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.247381935 |
|
|
Jan 17 04:59:09 PM PST 24 |
Jan 17 05:15:47 PM PST 24 |
6408889604 ps |
| T1154 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.435340409 |
|
|
Jan 17 04:59:43 PM PST 24 |
Jan 17 05:04:36 PM PST 24 |
3052726840 ps |
| T610 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.1032727511 |
|
|
Jan 17 05:09:28 PM PST 24 |
Jan 17 05:20:05 PM PST 24 |
5388797280 ps |
| T1155 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1505131662 |
|
|
Jan 17 05:04:58 PM PST 24 |
Jan 17 05:09:37 PM PST 24 |
3404710000 ps |
| T220 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.438907456 |
|
|
Jan 17 04:42:11 PM PST 24 |
Jan 17 04:58:15 PM PST 24 |
5748434989 ps |
| T592 |
/workspace/coverage/default/0.chip_tap_straps_dev.968502774 |
|
|
Jan 17 04:40:15 PM PST 24 |
Jan 17 05:03:00 PM PST 24 |
13927721054 ps |
| T1156 |
/workspace/coverage/default/0.chip_tap_straps_prod.568037194 |
|
|
Jan 17 04:41:10 PM PST 24 |
Jan 17 04:54:47 PM PST 24 |
7685647253 ps |
| T1157 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.4136909103 |
|
|
Jan 17 05:05:03 PM PST 24 |
Jan 17 05:37:49 PM PST 24 |
14047871423 ps |
| T1158 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.3968190392 |
|
|
Jan 17 05:02:51 PM PST 24 |
Jan 17 05:12:05 PM PST 24 |
5368453208 ps |
| T641 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3419416262 |
|
|
Jan 17 04:48:00 PM PST 24 |
Jan 17 05:01:44 PM PST 24 |
5510453842 ps |
| T1159 |
/workspace/coverage/default/0.rom_e2e_smoke.1386391050 |
|
|
Jan 17 04:41:55 PM PST 24 |
Jan 17 05:20:11 PM PST 24 |
8995535308 ps |
| T1160 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.2795556181 |
|
|
Jan 17 05:05:21 PM PST 24 |
Jan 17 05:31:45 PM PST 24 |
8623224095 ps |
| T1161 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.1379878900 |
|
|
Jan 17 04:39:50 PM PST 24 |
Jan 17 04:48:48 PM PST 24 |
5358878956 ps |
| T1162 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2103642152 |
|
|
Jan 17 04:38:23 PM PST 24 |
Jan 17 04:50:32 PM PST 24 |
5070809792 ps |
| T1163 |
/workspace/coverage/default/0.chip_sw_kmac_idle.2575656289 |
|
|
Jan 17 04:42:19 PM PST 24 |
Jan 17 04:48:07 PM PST 24 |
2835361480 ps |
| T1164 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.3295969631 |
|
|
Jan 17 04:49:58 PM PST 24 |
Jan 17 04:55:22 PM PST 24 |
2889083638 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3774758374 |
|
|
Jan 17 04:56:29 PM PST 24 |
Jan 17 05:02:20 PM PST 24 |
2943243150 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.2779941065 |
|
|
Jan 17 04:50:18 PM PST 24 |
Jan 17 05:04:00 PM PST 24 |
6289394664 ps |
| T1167 |
/workspace/coverage/default/1.chip_sw_edn_kat.678603157 |
|
|
Jan 17 04:48:50 PM PST 24 |
Jan 17 04:59:02 PM PST 24 |
3492776194 ps |
| T365 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.3031757152 |
|
|
Jan 17 04:49:45 PM PST 24 |
Jan 17 05:37:26 PM PST 24 |
12317882248 ps |
| T16 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3388608410 |
|
|
Jan 17 04:58:20 PM PST 24 |
Jan 17 05:06:10 PM PST 24 |
5065932968 ps |
| T1168 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1031738919 |
|
|
Jan 17 04:56:32 PM PST 24 |
Jan 17 05:15:47 PM PST 24 |
12111425792 ps |
| T1169 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.1779512700 |
|
|
Jan 17 04:49:01 PM PST 24 |
Jan 17 04:55:16 PM PST 24 |
3311904032 ps |
| T1170 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.3041909942 |
|
|
Jan 17 04:48:28 PM PST 24 |
Jan 17 04:52:56 PM PST 24 |
3037084936 ps |
| T200 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.1390853149 |
|
|
Jan 17 04:44:53 PM PST 24 |
Jan 17 04:51:00 PM PST 24 |
3059640630 ps |
| T1171 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1362242645 |
|
|
Jan 17 04:46:13 PM PST 24 |
Jan 17 04:50:44 PM PST 24 |
2911428370 ps |
| T1172 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.1426358376 |
|
|
Jan 17 04:53:15 PM PST 24 |
Jan 17 04:57:39 PM PST 24 |
3390897390 ps |
| T1173 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.4163975148 |
|
|
Jan 17 04:38:58 PM PST 24 |
Jan 17 05:05:42 PM PST 24 |
7933925266 ps |
| T1174 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1982013913 |
|
|
Jan 17 04:56:46 PM PST 24 |
Jan 17 05:28:14 PM PST 24 |
8636193190 ps |
| T1175 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.987242866 |
|
|
Jan 17 04:46:33 PM PST 24 |
Jan 17 05:17:30 PM PST 24 |
13115921332 ps |
| T1176 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2870130750 |
|
|
Jan 17 04:55:23 PM PST 24 |
Jan 17 05:07:06 PM PST 24 |
4107876920 ps |
| T1177 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.3943670749 |
|
|
Jan 17 05:01:46 PM PST 24 |
Jan 17 05:07:45 PM PST 24 |
3057413548 ps |
| T241 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.4098168088 |
|
|
Jan 17 05:05:39 PM PST 24 |
Jan 17 05:14:32 PM PST 24 |
4661210272 ps |
| T1178 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2001681154 |
|
|
Jan 17 05:03:27 PM PST 24 |
Jan 17 05:08:50 PM PST 24 |
6509473340 ps |
| T1179 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.874262943 |
|
|
Jan 17 04:39:41 PM PST 24 |
Jan 17 04:46:49 PM PST 24 |
3588758756 ps |
| T716 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.2756143703 |
|
|
Jan 17 05:09:32 PM PST 24 |
Jan 17 05:19:54 PM PST 24 |
5743797700 ps |
| T1180 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.2244347262 |
|
|
Jan 17 04:39:07 PM PST 24 |
Jan 17 04:55:22 PM PST 24 |
5744895360 ps |
| T1181 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.4216375004 |
|
|
Jan 17 04:56:30 PM PST 24 |
Jan 17 05:44:49 PM PST 24 |
20930846190 ps |
| T1182 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.2103657576 |
|
|
Jan 17 04:53:12 PM PST 24 |
Jan 17 04:57:56 PM PST 24 |
2903501560 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3146616928 |
|
|
Jan 17 04:41:29 PM PST 24 |
Jan 17 04:47:25 PM PST 24 |
4787851610 ps |
| T1184 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.843362027 |
|
|
Jan 17 04:59:58 PM PST 24 |
Jan 17 05:06:56 PM PST 24 |
4602133045 ps |
| T722 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3742752849 |
|
|
Jan 17 05:03:50 PM PST 24 |
Jan 17 05:10:28 PM PST 24 |
4179643250 ps |
| T677 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.3755417791 |
|
|
Jan 17 05:07:54 PM PST 24 |
Jan 17 05:18:08 PM PST 24 |
4481257810 ps |
| T1185 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3134236583 |
|
|
Jan 17 05:04:40 PM PST 24 |
Jan 17 05:10:15 PM PST 24 |
3372057664 ps |
| T1186 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3986712183 |
|
|
Jan 17 04:41:33 PM PST 24 |
Jan 17 04:46:53 PM PST 24 |
2952533979 ps |
| T355 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.2262103211 |
|
|
Jan 17 04:58:11 PM PST 24 |
Jan 17 05:25:22 PM PST 24 |
17221527683 ps |
| T1187 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2541791523 |
|
|
Jan 17 04:41:32 PM PST 24 |
Jan 17 04:46:25 PM PST 24 |
3365070500 ps |
| T1188 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3247671515 |
|
|
Jan 17 04:55:10 PM PST 24 |
Jan 17 05:10:40 PM PST 24 |
5019096480 ps |
| T1189 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.251490182 |
|
|
Jan 17 04:50:21 PM PST 24 |
Jan 17 05:28:28 PM PST 24 |
8713444032 ps |
| T1190 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.2253454918 |
|
|
Jan 17 04:46:52 PM PST 24 |
Jan 17 05:33:28 PM PST 24 |
11923588152 ps |
| T1191 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.544926534 |
|
|
Jan 17 05:03:10 PM PST 24 |
Jan 17 05:10:43 PM PST 24 |
4042251798 ps |
| T292 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.881840746 |
|
|
Jan 17 05:04:29 PM PST 24 |
Jan 17 05:11:32 PM PST 24 |
3898021568 ps |
| T1192 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3755603779 |
|
|
Jan 17 04:59:02 PM PST 24 |
Jan 17 05:08:31 PM PST 24 |
5798677562 ps |
| T177 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.2939513461 |
|
|
Jan 17 04:49:33 PM PST 24 |
Jan 17 05:16:50 PM PST 24 |
6917381410 ps |
| T637 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.3599025469 |
|
|
Jan 17 05:08:08 PM PST 24 |
Jan 17 05:16:47 PM PST 24 |
5212526784 ps |
| T1193 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.4036273952 |
|
|
Jan 17 04:44:11 PM PST 24 |
Jan 17 08:13:20 PM PST 24 |
73807587160 ps |
| T1194 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.1963521369 |
|
|
Jan 17 04:57:01 PM PST 24 |
Jan 17 05:13:19 PM PST 24 |
4821089103 ps |
| T1195 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.663100565 |
|
|
Jan 17 05:04:27 PM PST 24 |
Jan 17 05:41:29 PM PST 24 |
13866634244 ps |
| T1196 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.1515802967 |
|
|
Jan 17 05:00:41 PM PST 24 |
Jan 17 05:07:11 PM PST 24 |
3361095960 ps |
| T1197 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1431701241 |
|
|
Jan 17 04:49:36 PM PST 24 |
Jan 17 04:58:42 PM PST 24 |
4785271418 ps |
| T1198 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2993095411 |
|
|
Jan 17 04:56:38 PM PST 24 |
Jan 17 05:11:46 PM PST 24 |
9265479800 ps |
| T1199 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.3955602334 |
|
|
Jan 17 04:46:08 PM PST 24 |
Jan 17 04:49:23 PM PST 24 |
2497677596 ps |
| T1200 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1322145751 |
|
|
Jan 17 04:58:04 PM PST 24 |
Jan 17 05:03:38 PM PST 24 |
3244820192 ps |
| T1201 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.1032673635 |
|
|
Jan 17 05:01:01 PM PST 24 |
Jan 17 05:16:02 PM PST 24 |
5508246270 ps |
| T1202 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2772185193 |
|
|
Jan 17 04:46:52 PM PST 24 |
Jan 17 04:57:14 PM PST 24 |
3880522982 ps |
| T1203 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3430326377 |
|
|
Jan 17 04:39:34 PM PST 24 |
Jan 17 04:45:12 PM PST 24 |
4504201681 ps |
| T1204 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2424687838 |
|
|
Jan 17 04:50:46 PM PST 24 |
Jan 17 05:02:49 PM PST 24 |
5035539820 ps |
| T293 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.2568167506 |
|
|
Jan 17 05:10:26 PM PST 24 |
Jan 17 05:17:13 PM PST 24 |
4303301512 ps |
| T1205 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.1554036994 |
|
|
Jan 17 04:58:47 PM PST 24 |
Jan 17 05:01:35 PM PST 24 |
2657560407 ps |
| T176 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.1323884671 |
|
|
Jan 17 04:55:15 PM PST 24 |
Jan 17 05:20:51 PM PST 24 |
9657754930 ps |
| T1206 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.613318212 |
|
|
Jan 17 04:41:14 PM PST 24 |
Jan 17 04:53:48 PM PST 24 |
7221467436 ps |
| T236 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.329454662 |
|
|
Jan 17 05:04:01 PM PST 24 |
Jan 17 05:18:55 PM PST 24 |
9016554382 ps |
| T1207 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.711666505 |
|
|
Jan 17 04:53:29 PM PST 24 |
Jan 17 04:57:38 PM PST 24 |
2586857266 ps |
| T611 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.737415981 |
|
|
Jan 17 05:04:16 PM PST 24 |
Jan 17 05:11:34 PM PST 24 |
5678443402 ps |
| T1208 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.1759917065 |
|
|
Jan 17 05:08:17 PM PST 24 |
Jan 17 05:15:25 PM PST 24 |
5459267208 ps |
| T1209 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.1870820976 |
|
|
Jan 17 04:46:04 PM PST 24 |
Jan 17 05:19:01 PM PST 24 |
8938777480 ps |
| T1210 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.1042501390 |
|
|
Jan 17 04:50:46 PM PST 24 |
Jan 17 05:08:38 PM PST 24 |
6424024124 ps |
| T1211 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.1868471108 |
|
|
Jan 17 04:41:09 PM PST 24 |
Jan 17 04:46:03 PM PST 24 |
2055419938 ps |
| T1212 |
/workspace/coverage/default/0.chip_sw_uart_smoketest_signed.2522502865 |
|
|
Jan 17 04:48:46 PM PST 24 |
Jan 17 05:23:03 PM PST 24 |
9235566748 ps |
| T1213 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.1989534062 |
|
|
Jan 17 04:41:29 PM PST 24 |
Jan 17 04:49:14 PM PST 24 |
4955051616 ps |
| T1214 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.47293244 |
|
|
Jan 17 04:59:07 PM PST 24 |
Jan 17 05:04:43 PM PST 24 |
2667312773 ps |
| T42 |
/workspace/coverage/default/2.chip_tap_straps_rma.4131561069 |
|
|
Jan 17 04:59:24 PM PST 24 |
Jan 17 05:03:30 PM PST 24 |
3236340423 ps |
| T589 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.3920680590 |
|
|
Jan 17 04:51:16 PM PST 24 |
Jan 17 05:00:25 PM PST 24 |
5226425689 ps |
| T163 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2550790458 |
|
|
Jan 17 04:40:23 PM PST 24 |
Jan 17 04:59:58 PM PST 24 |
6081238898 ps |
| T1215 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.143374868 |
|
|
Jan 17 05:00:31 PM PST 24 |
Jan 17 05:06:29 PM PST 24 |
2758088216 ps |
| T149 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.3423220987 |
|
|
Jan 17 04:58:01 PM PST 24 |
Jan 17 05:06:33 PM PST 24 |
5448746240 ps |
| T1216 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1020307864 |
|
|
Jan 17 04:56:33 PM PST 24 |
Jan 17 05:03:48 PM PST 24 |
5203718982 ps |
| T1217 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.573438324 |
|
|
Jan 17 05:04:05 PM PST 24 |
Jan 17 05:18:19 PM PST 24 |
5015148420 ps |
| T1218 |
/workspace/coverage/default/2.rom_e2e_static_critical.1816499410 |
|
|
Jan 17 05:04:31 PM PST 24 |
Jan 17 05:38:52 PM PST 24 |
10660803940 ps |
| T1219 |
/workspace/coverage/default/1.chip_sw_power_idle_load.577738749 |
|
|
Jan 17 04:52:44 PM PST 24 |
Jan 17 05:05:37 PM PST 24 |
4765973172 ps |
| T34 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3890918615 |
|
|
Jan 17 04:54:04 PM PST 24 |
Jan 17 04:59:25 PM PST 24 |
5278843250 ps |
| T1220 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.2683278784 |
|
|
Jan 17 04:40:50 PM PST 24 |
Jan 17 04:46:18 PM PST 24 |
3315855193 ps |
| T1221 |
/workspace/coverage/default/1.chip_sw_entropy_src_fuse_en_fw_read_test.2646833197 |
|
|
Jan 17 04:48:44 PM PST 24 |
Jan 17 04:59:16 PM PST 24 |
4559709168 ps |
| T1222 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.298038567 |
|
|
Jan 17 04:55:57 PM PST 24 |
Jan 17 05:03:07 PM PST 24 |
3919326248 ps |
| T1223 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.604657469 |
|
|
Jan 17 05:04:26 PM PST 24 |
Jan 17 06:08:29 PM PST 24 |
23313739696 ps |
| T1224 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.1449311344 |
|
|
Jan 17 04:38:46 PM PST 24 |
Jan 17 04:42:28 PM PST 24 |
2686423162 ps |
| T1225 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.2673909669 |
|
|
Jan 17 04:40:47 PM PST 24 |
Jan 17 04:44:37 PM PST 24 |
2972376830 ps |
| T1226 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.1267210283 |
|
|
Jan 17 04:46:02 PM PST 24 |
Jan 17 05:13:20 PM PST 24 |
6740468914 ps |
| T1227 |
/workspace/coverage/default/0.chip_sw_example_flash.1041962314 |
|
|
Jan 17 04:38:59 PM PST 24 |
Jan 17 04:43:32 PM PST 24 |
3052830748 ps |
| T127 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3099080409 |
|
|
Jan 17 04:40:41 PM PST 24 |
Jan 17 04:47:40 PM PST 24 |
3683412850 ps |
| T1228 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.471285418 |
|
|
Jan 17 04:56:28 PM PST 24 |
Jan 17 05:07:56 PM PST 24 |
5041766634 ps |
| T1229 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1011074105 |
|
|
Jan 17 05:07:44 PM PST 24 |
Jan 17 05:21:18 PM PST 24 |
4999114912 ps |
| T1230 |
/workspace/coverage/default/1.chip_tap_straps_rma.1989522088 |
|
|
Jan 17 04:51:04 PM PST 24 |
Jan 17 04:59:01 PM PST 24 |
5014695267 ps |
| T1231 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.1362779579 |
|
|
Jan 17 04:40:48 PM PST 24 |
Jan 17 04:52:03 PM PST 24 |
9350978732 ps |
| T1232 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.1434476325 |
|
|
Jan 17 04:44:31 PM PST 24 |
Jan 17 04:47:05 PM PST 24 |
2903486225 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.148147946 |
|
|
Jan 17 04:42:07 PM PST 24 |
Jan 17 05:10:30 PM PST 24 |
22487990288 ps |
| T732 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2023090926 |
|
|
Jan 17 05:12:38 PM PST 24 |
Jan 17 05:23:55 PM PST 24 |
5308782640 ps |
| T1234 |
/workspace/coverage/default/1.chip_tap_straps_prod.3360016265 |
|
|
Jan 17 04:51:39 PM PST 24 |
Jan 17 04:54:40 PM PST 24 |
2716826594 ps |
| T714 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1421789573 |
|
|
Jan 17 05:06:52 PM PST 24 |
Jan 17 05:12:27 PM PST 24 |
3659422870 ps |
| T1235 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.892164113 |
|
|
Jan 17 04:44:03 PM PST 24 |
Jan 17 04:48:17 PM PST 24 |
3120808054 ps |
| T1236 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.1456623084 |
|
|
Jan 17 04:49:48 PM PST 24 |
Jan 17 04:59:31 PM PST 24 |
4074643812 ps |
| T1237 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.956272949 |
|
|
Jan 17 04:53:22 PM PST 24 |
Jan 17 04:58:24 PM PST 24 |
2957996374 ps |
| T1238 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2598349498 |
|
|
Jan 17 04:49:35 PM PST 24 |
Jan 17 04:54:10 PM PST 24 |
2837067734 ps |
| T1239 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3380709503 |
|
|
Jan 17 04:43:47 PM PST 24 |
Jan 17 04:54:42 PM PST 24 |
3862330360 ps |
| T341 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.4192528624 |
|
|
Jan 17 04:51:19 PM PST 24 |
Jan 17 04:56:19 PM PST 24 |
3400180204 ps |
| T1240 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.550887892 |
|
|
Jan 17 05:08:29 PM PST 24 |
Jan 17 05:13:54 PM PST 24 |
3592505588 ps |
| T197 |
/workspace/coverage/default/2.chip_sw_spi_device_tx_rx.1748031492 |
|
|
Jan 17 04:54:58 PM PST 24 |
Jan 17 05:00:23 PM PST 24 |
3960621234 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3920204148 |
|
|
Jan 17 04:42:13 PM PST 24 |
Jan 17 05:00:00 PM PST 24 |
8434238000 ps |
| T1242 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1229173174 |
|
|
Jan 17 04:54:58 PM PST 24 |
Jan 17 05:12:23 PM PST 24 |
5604604541 ps |
| T1243 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.1194274558 |
|
|
Jan 17 04:45:28 PM PST 24 |
Jan 17 07:50:29 PM PST 24 |
65775672520 ps |
| T1244 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.2802805631 |
|
|
Jan 17 05:01:29 PM PST 24 |
Jan 17 05:04:53 PM PST 24 |
3198152531 ps |
| T1245 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.842671797 |
|
|
Jan 17 04:55:28 PM PST 24 |
Jan 17 05:00:20 PM PST 24 |
3606321756 ps |
| T660 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.3831455636 |
|
|
Jan 17 05:09:33 PM PST 24 |
Jan 17 05:19:47 PM PST 24 |
5501298472 ps |
| T143 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.839735839 |
|
|
Jan 17 04:45:09 PM PST 24 |
Jan 17 04:48:11 PM PST 24 |
3339808642 ps |
| T87 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2859201355 |
|
|
Jan 17 04:58:44 PM PST 24 |
Jan 17 05:24:10 PM PST 24 |
7537215284 ps |
| T1246 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.1846589535 |
|
|
Jan 17 05:02:56 PM PST 24 |
Jan 17 05:44:25 PM PST 24 |
23721292526 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.3676353673 |
|
|
Jan 17 04:39:03 PM PST 24 |
Jan 17 04:43:06 PM PST 24 |
3186402924 ps |
| T1248 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.2727577165 |
|
|
Jan 17 04:52:17 PM PST 24 |
Jan 17 04:55:16 PM PST 24 |
2666098938 ps |
| T88 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.1359986362 |
|
|
Jan 17 04:53:03 PM PST 24 |
Jan 17 05:16:15 PM PST 24 |
8471669309 ps |
| T1249 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.1280438691 |
|
|
Jan 17 04:56:45 PM PST 24 |
Jan 17 05:01:04 PM PST 24 |
2900450984 ps |
| T584 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.150476101 |
|
|
Jan 17 04:57:26 PM PST 24 |
Jan 17 05:08:10 PM PST 24 |
2860876952 ps |
| T708 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.619117135 |
|
|
Jan 17 05:07:48 PM PST 24 |
Jan 17 05:20:56 PM PST 24 |
6171019192 ps |
| T1250 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1396649054 |
|
|
Jan 17 04:43:42 PM PST 24 |
Jan 17 04:49:09 PM PST 24 |
3465640483 ps |
| T1251 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.2851509612 |
|
|
Jan 17 04:44:10 PM PST 24 |
Jan 17 04:58:28 PM PST 24 |
5663142502 ps |
| T13 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1384204408 |
|
|
Jan 17 04:54:14 PM PST 24 |
Jan 17 05:04:20 PM PST 24 |
5275417482 ps |
| T1252 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.528866261 |
|
|
Jan 17 04:49:02 PM PST 24 |
Jan 17 05:17:30 PM PST 24 |
7878234824 ps |
| T1253 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.1914810983 |
|
|
Jan 17 04:48:51 PM PST 24 |
Jan 17 04:58:21 PM PST 24 |
5264684840 ps |
| T1254 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.101030923 |
|
|
Jan 17 05:01:37 PM PST 24 |
Jan 17 05:25:04 PM PST 24 |
6455070574 ps |
| T1255 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.1266263268 |
|
|
Jan 17 04:47:20 PM PST 24 |
Jan 17 05:19:29 PM PST 24 |
8044764000 ps |
| T1256 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.4259650313 |
|
|
Jan 17 04:42:51 PM PST 24 |
Jan 17 04:46:31 PM PST 24 |
2999597772 ps |
| T1257 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.1087521450 |
|
|
Jan 17 04:46:09 PM PST 24 |
Jan 17 05:19:16 PM PST 24 |
8285950271 ps |
| T1258 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.45604919 |
|
|
Jan 17 04:45:02 PM PST 24 |
Jan 17 05:02:26 PM PST 24 |
5772566520 ps |
| T1259 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.2338239129 |
|
|
Jan 17 05:04:11 PM PST 24 |
Jan 17 05:10:20 PM PST 24 |
3811348244 ps |
| T712 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.976713591 |
|
|
Jan 17 05:04:57 PM PST 24 |
Jan 17 05:12:17 PM PST 24 |
4340687800 ps |
| T590 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.791080168 |
|
|
Jan 17 04:42:21 PM PST 24 |
Jan 17 04:49:36 PM PST 24 |
5329960110 ps |
| T1260 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.2445306776 |
|
|
Jan 17 05:07:59 PM PST 24 |
Jan 17 05:14:53 PM PST 24 |
4234226864 ps |
| T1261 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.2752624532 |
|
|
Jan 17 04:39:28 PM PST 24 |
Jan 17 05:01:16 PM PST 24 |
8255509050 ps |
| T1262 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.1582965191 |
|
|
Jan 17 04:55:43 PM PST 24 |
Jan 17 05:06:30 PM PST 24 |
7535916277 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3748971041 |
|
|
Jan 17 04:43:33 PM PST 24 |
Jan 17 04:55:34 PM PST 24 |
5307159848 ps |
| T683 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.3044221432 |
|
|
Jan 17 05:04:01 PM PST 24 |
Jan 17 05:17:15 PM PST 24 |
5740108578 ps |
| T1263 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3094207534 |
|
|
Jan 17 04:48:12 PM PST 24 |
Jan 17 07:49:09 PM PST 24 |
254632801208 ps |
| T1264 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.707522263 |
|
|
Jan 17 04:53:54 PM PST 24 |
Jan 17 05:00:23 PM PST 24 |
3068475780 ps |
| T1265 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3349235350 |
|
|
Jan 17 04:58:27 PM PST 24 |
Jan 17 05:04:08 PM PST 24 |
3319608880 ps |
| T1266 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.2366023278 |
|
|
Jan 17 04:44:58 PM PST 24 |
Jan 17 05:26:41 PM PST 24 |
12953938414 ps |
| T128 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1107513898 |
|
|
Jan 17 04:58:44 PM PST 24 |
Jan 17 05:10:10 PM PST 24 |
4365894838 ps |
| T1267 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3935409588 |
|
|
Jan 17 05:02:59 PM PST 24 |
Jan 17 05:18:16 PM PST 24 |
12589909331 ps |
| T1268 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.1651756057 |
|
|
Jan 17 04:42:56 PM PST 24 |
Jan 17 04:48:47 PM PST 24 |
4419944196 ps |
| T52 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1629950294 |
|
|
Jan 17 05:00:50 PM PST 24 |
Jan 17 05:10:02 PM PST 24 |
5460973580 ps |
| T1269 |
/workspace/coverage/default/0.chip_jtag_mem_access.3876919444 |
|
|
Jan 17 04:33:43 PM PST 24 |
Jan 17 04:57:33 PM PST 24 |
13276736395 ps |
| T1270 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.1992040827 |
|
|
Jan 17 05:03:56 PM PST 24 |
Jan 17 05:13:06 PM PST 24 |
5778043115 ps |
| T1271 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.3080460135 |
|
|
Jan 17 04:55:37 PM PST 24 |
Jan 17 05:03:13 PM PST 24 |
4129234968 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_coremark.3230992844 |
|
|
Jan 17 04:40:23 PM PST 24 |
Jan 17 07:25:59 PM PST 24 |
50247348850 ps |
| T1273 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.1847994973 |
|
|
Jan 17 04:58:06 PM PST 24 |
Jan 17 05:08:50 PM PST 24 |
5434604108 ps |
| T697 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.3359495220 |
|
|
Jan 17 05:06:44 PM PST 24 |
Jan 17 05:15:20 PM PST 24 |
4923492824 ps |
| T706 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.1655749699 |
|
|
Jan 17 05:07:29 PM PST 24 |
Jan 17 05:17:22 PM PST 24 |
5010679128 ps |
| T154 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.3304020447 |
|
|
Jan 17 04:54:47 PM PST 24 |
Jan 17 06:24:05 PM PST 24 |
47634130840 ps |
| T1274 |
/workspace/coverage/default/0.chip_sw_aes_entropy.2639570965 |
|
|
Jan 17 04:40:22 PM PST 24 |
Jan 17 04:43:21 PM PST 24 |
2796122248 ps |
| T106 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.389369448 |
|
|
Jan 17 04:51:24 PM PST 24 |
Jan 17 04:58:26 PM PST 24 |
5175851272 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1815644352 |
|
|
Jan 17 04:42:36 PM PST 24 |
Jan 17 04:50:22 PM PST 24 |
4907950200 ps |
| T1275 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3798061603 |
|
|
Jan 17 04:46:50 PM PST 24 |
Jan 17 05:24:02 PM PST 24 |
8717886716 ps |
| T1276 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.3693862089 |
|
|
Jan 17 05:04:57 PM PST 24 |
Jan 17 05:12:01 PM PST 24 |
7864636296 ps |
| T737 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.209228671 |
|
|
Jan 17 05:05:46 PM PST 24 |
Jan 17 05:16:28 PM PST 24 |
6523720852 ps |
| T1277 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.1242776708 |
|
|
Jan 17 04:56:49 PM PST 24 |
Jan 17 05:01:19 PM PST 24 |
2739649688 ps |
| T1278 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.57324199 |
|
|
Jan 17 05:09:28 PM PST 24 |
Jan 17 05:16:34 PM PST 24 |
4138832150 ps |